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Side by Side Diff: src/IceTargetLoweringX8664.cpp

Issue 1531623007: Add option to force filetype=asm for testing (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Formatting Created 5 years ago
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1 //===- subzero/src/IceTargetLoweringX8664.cpp - x86-64 lowering -----------===// 1 //===- subzero/src/IceTargetLoweringX8664.cpp - x86-64 lowering -----------===//
2 // 2 //
3 // The Subzero Code Generator 3 // The Subzero Code Generator
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 /// 9 ///
10 /// \file 10 /// \file
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360 360
361 void TargetX8664::lowerRet(const InstRet *Inst) { 361 void TargetX8664::lowerRet(const InstRet *Inst) {
362 Variable *Reg = nullptr; 362 Variable *Reg = nullptr;
363 if (Inst->hasRetValue()) { 363 if (Inst->hasRetValue()) {
364 Operand *Src0 = legalize(Inst->getRetValue()); 364 Operand *Src0 = legalize(Inst->getRetValue());
365 if (isVectorType(Src0->getType()) || 365 if (isVectorType(Src0->getType()) ||
366 isScalarFloatingType(Src0->getType())) { 366 isScalarFloatingType(Src0->getType())) {
367 Reg = legalizeToReg(Src0, Traits::RegisterSet::Reg_xmm0); 367 Reg = legalizeToReg(Src0, Traits::RegisterSet::Reg_xmm0);
368 } else { 368 } else {
369 assert(isScalarIntegerType(Src0->getType())); 369 assert(isScalarIntegerType(Src0->getType()));
370 _mov(Reg, Src0, Traits::RegisterSet::Reg_eax); 370 if (Src0->getType() == IceType_i8) {
Jim Stichnoth 2015/12/20 18:42:23 Same comment as in x86-32 - handle IceType_i1 as w
sehr 2016/01/07 18:53:11 Done.
371 // TODO(sehr,stichnot): I think these need to sign/zero extend.
372 _mov(Reg, Src0, Traits::RegisterSet::Reg_al);
373 } else if (Src0->getType() == IceType_i16) {
374 _mov(Reg, Src0, Traits::RegisterSet::Reg_ax);
375 } else {
376 _mov(Reg, Src0, Traits::RegisterSet::Reg_eax);
Jim Stichnoth 2015/12/20 18:42:23 You probably need to deal with i32/eax and i64/rax
sehr 2016/01/07 18:53:11 John beat me to the punch. It should work there a
377 }
371 } 378 }
372 } 379 }
373 // Add a ret instruction even if sandboxing is enabled, because addEpilog 380 // Add a ret instruction even if sandboxing is enabled, because addEpilog
374 // explicitly looks for a ret instruction as a marker for where to insert the 381 // explicitly looks for a ret instruction as a marker for where to insert the
375 // frame removal instructions. 382 // frame removal instructions.
376 _ret(Reg); 383 _ret(Reg);
377 // Add a fake use of esp to make sure esp stays alive for the entire 384 // Add a fake use of esp to make sure esp stays alive for the entire
378 // function. Otherwise post-call esp adjustments get dead-code eliminated. 385 // function. Otherwise post-call esp adjustments get dead-code eliminated.
379 keepEspLiveAtExit(); 386 keepEspLiveAtExit();
380 } 387 }
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977 // case the high-level table has extra entries. 984 // case the high-level table has extra entries.
978 #define X(tag, sizeLog2, align, elts, elty, str) \ 985 #define X(tag, sizeLog2, align, elts, elty, str) \
979 static_assert(_table1_##tag == _table2_##tag, \ 986 static_assert(_table1_##tag == _table2_##tag, \
980 "Inconsistency between ICETYPEX8664_TABLE and ICETYPE_TABLE"); 987 "Inconsistency between ICETYPEX8664_TABLE and ICETYPE_TABLE");
981 ICETYPE_TABLE 988 ICETYPE_TABLE
982 #undef X 989 #undef X
983 } // end of namespace dummy3 990 } // end of namespace dummy3
984 } // end of anonymous namespace 991 } // end of anonymous namespace
985 992
986 } // end of namespace Ice 993 } // end of namespace Ice
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