Index: tests_lit/llvm2ice_tests/strength-reduce.ll |
diff --git a/tests_lit/llvm2ice_tests/strength-reduce.ll b/tests_lit/llvm2ice_tests/strength-reduce.ll |
index 50ca6e8ad63a87c5676a7d5dc362df2ab3261b97..b8609a719d7af5dbf419d2b8e5a7eb8cc40139e1 100644 |
--- a/tests_lit/llvm2ice_tests/strength-reduce.ll |
+++ b/tests_lit/llvm2ice_tests/strength-reduce.ll |
@@ -43,25 +43,26 @@ define internal i32 @mul_i32_arg_m45(i32 %arg) { |
; CHECK-DAG: lea [[REG]],{{\[}}[[REG]]+[[REG]]*4] |
; CHECK: neg [[REG]] |
-define internal i16 @mul_i16_arg_18(i16 %arg) { |
+define internal i32 @mul_i16_arg_18(i16 %arg) { |
%result = mul i16 %arg, 18 |
- ret i16 %result |
+ %result.i32 = zext i16 %result to i32 |
+ ret i32 %result.i32 |
} |
-; Disassembly will look like "lea ax,[eax+eax*8]". |
; CHECK-LABEL: mul_i16_arg_18 |
-; CHECK-DAG: lea [[REG:..]],{{\[}}e[[REG]]+e[[REG]]*8] |
-; CHECK-DAG: shl [[REG]],1 |
+; CHECK: imul |
-define internal i8 @mul_i8_arg_16(i8 %arg) { |
+define internal i32 @mul_i8_arg_16(i8 %arg) { |
%result = mul i8 %arg, 16 |
- ret i8 %result |
+ %result.i32 = zext i8 %result to i32 |
+ ret i32 %result.i32 |
} |
; CHECK-LABEL: mul_i8_arg_16 |
; CHECK: shl {{.*}},0x4 |
-define internal i8 @mul_i8_arg_18(i8 %arg) { |
+define internal i32 @mul_i8_arg_18(i8 %arg) { |
%result = mul i8 %arg, 18 |
- ret i8 %result |
+ %result.i32 = zext i8 %result to i32 |
+ ret i32 %result.i32 |
} |
; CHECK-LABEL: mul_i8_arg_18 |
; CHECK: imul |