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1 ; This tests various strength reduction operations. | 1 ; This tests various strength reduction operations. |
2 | 2 |
3 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \ | 3 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \ |
4 ; RUN: --target x8632 -i %s --args -O2 \ | 4 ; RUN: --target x8632 -i %s --args -O2 \ |
5 ; RUN: | %if --need=target_X8632 --command FileCheck %s | 5 ; RUN: | %if --need=target_X8632 --command FileCheck %s |
6 | 6 |
7 define internal i32 @mul_i32_arg_5(i32 %arg) { | 7 define internal i32 @mul_i32_arg_5(i32 %arg) { |
8 %result = mul i32 %arg, 5 | 8 %result = mul i32 %arg, 5 |
9 ret i32 %result | 9 ret i32 %result |
10 } | 10 } |
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36 | 36 |
37 define internal i32 @mul_i32_arg_m45(i32 %arg) { | 37 define internal i32 @mul_i32_arg_m45(i32 %arg) { |
38 %result = mul i32 %arg, -45 | 38 %result = mul i32 %arg, -45 |
39 ret i32 %result | 39 ret i32 %result |
40 } | 40 } |
41 ; CHECK-LABEL: mul_i32_arg_m45 | 41 ; CHECK-LABEL: mul_i32_arg_m45 |
42 ; CHECK-DAG: lea [[REG:e..]],{{\[}}[[REG]]+[[REG]]*8] | 42 ; CHECK-DAG: lea [[REG:e..]],{{\[}}[[REG]]+[[REG]]*8] |
43 ; CHECK-DAG: lea [[REG]],{{\[}}[[REG]]+[[REG]]*4] | 43 ; CHECK-DAG: lea [[REG]],{{\[}}[[REG]]+[[REG]]*4] |
44 ; CHECK: neg [[REG]] | 44 ; CHECK: neg [[REG]] |
45 | 45 |
46 define internal i16 @mul_i16_arg_18(i16 %arg) { | 46 define internal i32 @mul_i16_arg_18(i16 %arg) { |
47 %result = mul i16 %arg, 18 | 47 %result = mul i16 %arg, 18 |
48 ret i16 %result | 48 %result.i32 = zext i16 %result to i32 |
| 49 ret i32 %result.i32 |
49 } | 50 } |
50 ; Disassembly will look like "lea ax,[eax+eax*8]". | |
51 ; CHECK-LABEL: mul_i16_arg_18 | 51 ; CHECK-LABEL: mul_i16_arg_18 |
52 ; CHECK-DAG: lea [[REG:..]],{{\[}}e[[REG]]+e[[REG]]*8] | 52 ; CHECK: imul |
53 ; CHECK-DAG: shl [[REG]],1 | |
54 | 53 |
55 define internal i8 @mul_i8_arg_16(i8 %arg) { | 54 define internal i32 @mul_i8_arg_16(i8 %arg) { |
56 %result = mul i8 %arg, 16 | 55 %result = mul i8 %arg, 16 |
57 ret i8 %result | 56 %result.i32 = zext i8 %result to i32 |
| 57 ret i32 %result.i32 |
58 } | 58 } |
59 ; CHECK-LABEL: mul_i8_arg_16 | 59 ; CHECK-LABEL: mul_i8_arg_16 |
60 ; CHECK: shl {{.*}},0x4 | 60 ; CHECK: shl {{.*}},0x4 |
61 | 61 |
62 define internal i8 @mul_i8_arg_18(i8 %arg) { | 62 define internal i32 @mul_i8_arg_18(i8 %arg) { |
63 %result = mul i8 %arg, 18 | 63 %result = mul i8 %arg, 18 |
64 ret i8 %result | 64 %result.i32 = zext i8 %result to i32 |
| 65 ret i32 %result.i32 |
65 } | 66 } |
66 ; CHECK-LABEL: mul_i8_arg_18 | 67 ; CHECK-LABEL: mul_i8_arg_18 |
67 ; CHECK: imul | 68 ; CHECK: imul |
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