add RBIT instruction to the ARM integrated assembler.

src/IceAssemblerARM32.h

Index: src/IceAssemblerARM32.h
diff --git a/src/IceAssemblerARM32.h b/src/IceAssemblerARM32.h
index 18cb679a59492c41ab4b4442e9493850c314fd2f..ae084b4c7464b316b00341d8079b23a9b73845d4 100644
--- a/src/IceAssemblerARM32.h
+++ b/src/IceAssemblerARM32.h
@@ -265,7 +265,9 @@ public:
   // Note: Registers is a bitset, where bit n corresponds to register Rn.
   void pushList(const IValueT Registers, CondARM32::Cond Cond);
 
-  void rev(const Operand *OpRd, const Operand *OpSrc, CondARM32::Cond Cond);
+  void rbit(const Operand *OpRd, const Operand *OpRm, CondARM32::Cond Cond);
+
+  void rev(const Operand *OpRd, const Operand *OpRm, CondARM32::Cond Cond);
 
   void rsb(const Operand *OpRd, const Operand *OpRn, const Operand *OpSrc1,
            bool SetFlags, CondARM32::Cond Cond);
@@ -384,6 +386,11 @@ private:
                  bool IsByte, IValueT Rt, IValueT Address,
                  const char *InstName);
 
+  // Emit ccccxxxxxxxxxxxxddddxxxxxxxxmmmm where cccc=Cond,
+  // xxxxxxxxxxxx0000xxxxxxxx0000=Opcode, dddd=Rd, and mmmm=Rm.
+  void emitRdRm(CondARM32::Cond Cond, IValueT Opcode, const Operand *OpRd,
+                const Operand *OpRm, const char *InstName);
+
   // Emit ldr/ldrb/str/strb instruction with given address.
   void emitMemOp(CondARM32::Cond Cond, bool IsLoad, bool IsByte, IValueT Rt,
                  const Operand *OpAddress, const TargetInfo &TInfo,