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Unified Diff: src/IceAssemblerARM32.cpp

Issue 1519873003: Add trap (an UDF instruction) to the ARM integrated Assembler. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Created 5 years ago
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Index: src/IceAssemblerARM32.cpp
diff --git a/src/IceAssemblerARM32.cpp b/src/IceAssemblerARM32.cpp
index cbb5bdc71a3289ebb91684064331349ad89b6341..e8e9d141ecd752fa78c071b5618dd090f532a36a 100644
--- a/src/IceAssemblerARM32.cpp
+++ b/src/IceAssemblerARM32.cpp
@@ -1716,6 +1716,16 @@ void AssemblerARM32::sub(const Operand *OpRd, const Operand *OpRn,
SubName);
}
+// Use a particular UDF encoding -- TRAPNaCl in LLVM: 0xE7FEDEF0
+// http://llvm.org/viewvc/llvm-project?view=revision&revision=173943
+const uint8_t AssemblerARM32::TrapInst[4] = {0xE7, 0xFE, 0xDE, 0xF0};
Jim Stichnoth 2015/12/11 23:31:08 I think you can omit the "4".
Karl 2015/12/17 16:23:09 Done.
+
+void AssemblerARM32::trap() {
+ AssemblerBuffer::EnsureCapacity ensured(&Buffer);
+ for (size_t i = 1, len = llvm::array_lengthof(TrapInst); i <= len; ++i)
Jim Stichnoth 2015/12/11 23:31:08 Hmm, I would use a "more familiar" form of the loo
Karl 2015/12/17 16:23:09 Done.
+ Buffer.emit<uint8_t>(TrapInst[len - i]);
+}
+
void AssemblerARM32::tst(const Operand *OpRn, const Operand *OpSrc1,
CondARM32::Cond Cond) {
// TST (register) - ARM section A8.8.241, encoding A1:
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