[turbofan] Store nodes use only MachineRepresentation, not MachineType.

test/unittests/compiler/ia32/instruction-selector-ia32-unittest.cc

Index: test/unittests/compiler/ia32/instruction-selector-ia32-unittest.cc
diff --git a/test/unittests/compiler/ia32/instruction-selector-ia32-unittest.cc b/test/unittests/compiler/ia32/instruction-selector-ia32-unittest.cc
index 92795c1bd41161e6d7a7e7bfbb1b1d9a423e9690..5280f69aa030aa01c40bc8f46393430713f983cf 100644
--- a/test/unittests/compiler/ia32/instruction-selector-ia32-unittest.cc
+++ b/test/unittests/compiler/ia32/instruction-selector-ia32-unittest.cc
@@ -255,8 +255,8 @@ TEST_P(InstructionSelectorMemoryAccessTest, StoreWithParameters) {
   const MemoryAccess memacc = GetParam();
   StreamBuilder m(this, MachineType::Int32(), MachineType::Pointer(),
                   MachineType::Int32(), memacc.type);
-  m.Store(memacc.type, m.Parameter(0), m.Parameter(1), m.Parameter(2),
-          kNoWriteBarrier);
+  m.Store(memacc.type.representation(), m.Parameter(0), m.Parameter(1),
+          m.Parameter(2), kNoWriteBarrier);
   m.Return(m.Int32Constant(0));
   Stream s = m.Build();
   ASSERT_EQ(1U, s.size());
@@ -271,8 +271,8 @@ TEST_P(InstructionSelectorMemoryAccessTest, StoreWithImmediateBase) {
   TRACED_FOREACH(int32_t, base, kImmediates) {
     StreamBuilder m(this, MachineType::Int32(), MachineType::Int32(),
                     memacc.type);
-    m.Store(memacc.type, m.Int32Constant(base), m.Parameter(0), m.Parameter(1),
-            kNoWriteBarrier);
+    m.Store(memacc.type.representation(), m.Int32Constant(base), m.Parameter(0),
+            m.Parameter(1), kNoWriteBarrier);
     m.Return(m.Int32Constant(0));
     Stream s = m.Build();
     ASSERT_EQ(1U, s.size());
@@ -294,8 +294,8 @@ TEST_P(InstructionSelectorMemoryAccessTest, StoreWithImmediateIndex) {
   TRACED_FOREACH(int32_t, index, kImmediates) {
     StreamBuilder m(this, MachineType::Int32(), MachineType::Pointer(),
                     memacc.type);
-    m.Store(memacc.type, m.Parameter(0), m.Int32Constant(index), m.Parameter(1),
-            kNoWriteBarrier);
+    m.Store(memacc.type.representation(), m.Parameter(0),
+            m.Int32Constant(index), m.Parameter(1), kNoWriteBarrier);
     m.Return(m.Int32Constant(0));
     Stream s = m.Build();
     ASSERT_EQ(1U, s.size());
@@ -329,7 +329,8 @@ class AddressingModeUnitTest : public InstructionSelectorTest {
   void Run(Node* base, Node* load_index, Node* store_index,
            AddressingMode mode) {
     Node* load = m->Load(MachineType::Int32(), base, load_index);
-    m->Store(MachineType::Int32(), base, store_index, load, kNoWriteBarrier);
+    m->Store(MachineRepresentation::kWord32, base, store_index, load,
+             kNoWriteBarrier);
     m->Return(m->Int32Constant(0));
     Stream s = m->Build();
     ASSERT_EQ(2U, s.size());