Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(112)

Unified Diff: runtime/vm/assembler_mips.h

Issue 15038008: Impelemnts some FPU arithmetic function for the MIPS simulator, assembler, disassembler. (Closed) Base URL: http://dart.googlecode.com/svn/branches/bleeding_edge/dart/
Patch Set: Created 7 years, 7 months ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View side-by-side diff with in-line comments
Download patch
« no previous file with comments | « no previous file | runtime/vm/assembler_mips_test.cc » ('j') | runtime/vm/constants_mips.h » ('J')
Expand Comments ('e') | Collapse Comments ('c') | Show Comments Hide Comments ('s')
Index: runtime/vm/assembler_mips.h
===================================================================
--- runtime/vm/assembler_mips.h (revision 22804)
+++ runtime/vm/assembler_mips.h (working copy)
@@ -454,10 +454,23 @@
EmitFpuRType(COP1, FMT_L, F0, fs, fd, COP1_CVT_D);
}
+ void cvtwd(FRegister fd, FRegister fs) {
+ ASSERT(EvenFPURegister(fs));
+ ASSERT(EvenFPURegister(fd));
+ EmitFpuRType(COP1, FMT_D, F0, fs, fd, COP1_CVT_W);
+ }
+
void div(Register rs, Register rt) {
EmitRType(SPECIAL, rs, rt, R0, 0, DIV);
}
+ void divd(FRegister fd, FRegister fs, FRegister ft) {
+ ASSERT(EvenFPURegister(fd));
+ ASSERT(EvenFPURegister(fs));
+ ASSERT(EvenFPURegister(ft));
+ EmitFpuRType(COP1, FMT_D, ft, fs, fd, COP1_DIV);
+ }
+
void divu(Register rs, Register rt) {
EmitRType(SPECIAL, rs, rt, R0, 0, DIVU);
}
@@ -554,6 +567,13 @@
fs << kFsShift);
}
+ void muld(FRegister fd, FRegister fs, FRegister ft) {
+ ASSERT(EvenFPURegister(fd));
+ ASSERT(EvenFPURegister(fs));
+ ASSERT(EvenFPURegister(ft));
+ EmitFpuRType(COP1, FMT_D, ft, fs, fd, COP1_MUL);
+ }
+
void mult(Register rs, Register rt) {
EmitRType(SPECIAL, rs, rt, R0, 0, MULT);
}
@@ -609,6 +629,12 @@
EmitRType(SPECIAL, rs, rt, rd, 0, SLTU);
}
+ void sqrtd(FRegister fd, FRegister fs) {
+ ASSERT(EvenFPURegister(fd));
+ ASSERT(EvenFPURegister(fs));
+ EmitFpuRType(COP1, FMT_D, F0, fs, fd, COP1_SQRT);
+ }
+
void sra(Register rd, Register rt, int sa) {
EmitRType(SPECIAL, R0, rt, rd, sa, SRA);
}
@@ -625,6 +651,13 @@
EmitRType(SPECIAL, rs, rt, rd, 0, SRLV);
}
+ void subd(FRegister fd, FRegister fs, FRegister ft) {
+ ASSERT(EvenFPURegister(fd));
+ ASSERT(EvenFPURegister(fs));
+ ASSERT(EvenFPURegister(ft));
+ EmitFpuRType(COP1, FMT_D, ft, fs, fd, COP1_SUB);
+ }
+
void subu(Register rd, Register rs, Register rt) {
EmitRType(SPECIAL, rs, rt, rd, 0, SUBU);
}
« no previous file with comments | « no previous file | runtime/vm/assembler_mips_test.cc » ('j') | runtime/vm/constants_mips.h » ('J')

Powered by Google App Engine
This is Rietveld 408576698