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Unified Diff: tests_lit/llvm2ice_tests/64bit.pnacl.ll

Issue 1467473003: Subzero. ARM32. No more SP frobbing. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Fixes the Offsetis typo. Created 5 years, 1 month ago
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Index: tests_lit/llvm2ice_tests/64bit.pnacl.ll
diff --git a/tests_lit/llvm2ice_tests/64bit.pnacl.ll b/tests_lit/llvm2ice_tests/64bit.pnacl.ll
index b0110bf81157bbc0ca356a24d3e8a6c0ff146aa0..88d4a3d6786e06034b0a95878b4ca1e5db6ff4e2 100644
--- a/tests_lit/llvm2ice_tests/64bit.pnacl.ll
+++ b/tests_lit/llvm2ice_tests/64bit.pnacl.ll
@@ -92,25 +92,19 @@ entry:
; OPTM1: call {{.*}} R_{{.*}} ignore64BitArgNoInline
; ARM32-LABEL: pass64BitArg
-; ARM32: sub sp, {{.*}} #16
; ARM32: str {{.*}}, [sp]
; ARM32: movw r2, #123
; ARM32: bl {{.*}} ignore64BitArgNoInline
-; ARM32: add sp, {{.*}} #16
-; ARM32: sub sp, {{.*}} #16
; ARM32: str {{.*}}, [sp]
; ARM32: {{mov|ldr}} r0
; ARM32: {{mov|ldr}} r1
; ARM32: movw r2, #123
; ARM32: bl {{.*}} ignore64BitArgNoInline
-; ARM32: add sp, {{.*}} #16
-; ARM32: sub sp, {{.*}} #16
; ARM32: str {{.*}}, [sp]
; ARM32: {{mov|ldr}} r0
; ARM32: {{mov|ldr}} r1
; ARM32: movw r2, #123
; ARM32: bl {{.*}} ignore64BitArgNoInline
-; ARM32: add sp, {{.*}} #16
declare i32 @ignore64BitArgNoInline(i64, i32, i64)
@@ -144,7 +138,6 @@ entry:
; OPTM1: call {{.*}} R_{{.*}} ignore64BitArgNoInline
; ARM32-LABEL: pass64BitConstArg
-; ARM32: sub sp, {{.*}} #16
; ARM32: movw [[REG1:r.*]], {{.*}} ; 0xbeef
; ARM32: movt [[REG1]], {{.*}} ; 0xdead
; ARM32: movw [[REG2:r.*]], {{.*}} ; 0x5678
@@ -155,7 +148,6 @@ entry:
; ARM32: {{mov|ldr}} r1
; ARM32: movw r2, #123
; ARM32: bl {{.*}} ignore64BitArgNoInline
-; ARM32: add sp, {{.*}} #16
define internal i32 @pass64BitUndefArg() {
entry:

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