| Index: src/IceTargetLoweringMIPS32.cpp
|
| diff --git a/src/IceTargetLoweringMIPS32.cpp b/src/IceTargetLoweringMIPS32.cpp
|
| index 8e2480831e44929d6fa989a2770563dd26561188..85a9a46c64a516a113b99577cc13deb91fc4991b 100644
|
| --- a/src/IceTargetLoweringMIPS32.cpp
|
| +++ b/src/IceTargetLoweringMIPS32.cpp
|
| @@ -91,6 +91,7 @@ void TargetMIPS32::translateO2() {
|
|
|
| // TODO(stichnot): share passes with X86?
|
| // https://code.google.com/p/nativeclient/issues/detail?id=4094
|
| + genTargetHelperCalls();
|
|
|
| // Merge Alloca instructions, and lay out the stack.
|
| static constexpr bool SortAndCombineAllocas = true;
|
| @@ -191,6 +192,7 @@ void TargetMIPS32::translateOm1() {
|
| TimerMarker T(TimerStack::TT_Om1, Func);
|
|
|
| // TODO: share passes with X86?
|
| + genTargetHelperCalls();
|
|
|
| // Do not merge Alloca instructions, and lay out the stack.
|
| static constexpr bool SortAndCombineAllocas = false;
|
|
|