tests_lit/llvm2ice_tests/64bit.pnacl.ll - Issue 1438773004: Subzero. ARM32. Improve constant lowering.

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Unified Diff: tests_lit/llvm2ice_tests/64bit.pnacl.ll

Issue 1438773004: Subzero. ARM32. Improve constant lowering. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master

Patch Set: Created 5 years, 1 month ago

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Index: tests_lit/llvm2ice_tests/64bit.pnacl.ll

diff --git a/tests_lit/llvm2ice_tests/64bit.pnacl.ll b/tests_lit/llvm2ice_tests/64bit.pnacl.ll

index 9631656cd8b0f28ae7be2e0217cad0b74920fbb4..b0110bf81157bbc0ca356a24d3e8a6c0ff146aa0 100644

--- a/tests_lit/llvm2ice_tests/64bit.pnacl.ll

+++ b/tests_lit/llvm2ice_tests/64bit.pnacl.ll

@@ -512,13 +512,13 @@ entry:

; OPTM1: sar {{.*}},0x1f

; ARM32-LABEL: shr64BitSigned

-; ARM32: lsr [[T0:r[0-9]+]], r0, r2

-; ARM32: rsb [[T1:r[0-9]+]], r2, #32

-; ARM32: orr r0, [[T0]], r1, lsl [[T1]]

-; ARM32: sub [[T2:r[0-9]+]], r2, #32

+; ARM32: lsr [[T0:r[0-9]+]], r{{[0-9]+}}, r{{[0-9]+}}

+; ARM32: rsb [[T1:r[0-9]+]], r{{[0-9]+}}, #32

+; ARM32: orr r{{[0-9]+}}, [[T0]], r{{[0-9]+}}, lsl [[T1]]

+; ARM32: sub [[T2:r[0-9]+]], r{{[0-9]+}}, #32

; ARM32: cmp [[T2]], #0

-; ARM32: asrge r0, r1, [[T2]]

-; ARM32: asr r{{[0-9]+}}, r1, r2

+; ARM32: asrge r{{[0-9]+}}, r{{[0-9]+}}, [[T2]]

+; ARM32: asr r{{[0-9]+}}, r{{[0-9]+}}, r{{[0-9]+}}

define internal i32 @shr64BitSignedTrunc(i64 %a, i64 %b) {

entry:

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