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Unified Diff: src/IceTargetLowering.cpp

Issue 1435363002: Merge fixed alloca stack adjustments into the prolog (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Final code review comments Created 5 years, 1 month ago
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Index: src/IceTargetLowering.cpp
diff --git a/src/IceTargetLowering.cpp b/src/IceTargetLowering.cpp
index 0ee0afa2301929fa5e2596a709f0db2bd03e3886..38ab89f22a18007b4f5582ba42b83162bdb90833 100644
--- a/src/IceTargetLowering.cpp
+++ b/src/IceTargetLowering.cpp
@@ -363,7 +363,13 @@ void TargetLowering::getVarStackSlotParams(
VarList SpilledVariables;
for (Variable *Var : Variables) {
if (Var->hasReg()) {
- RegsUsed[Var->getRegNum()] = true;
+ // Don't consider a rematerializable variable to be an actual register use
+ // (specifically of the frame pointer). Otherwise, the prolog may decide
+ // to save the frame pointer twice - once because of the explicit need for
+ // a frame pointer, and once because of an active use of a callee-save
+ // register.
+ if (!Var->isRematerializable())
+ RegsUsed[Var->getRegNum()] = true;
continue;
}
// An argument either does not need a stack slot (if passed in a register)
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