| Index: src/IceAssemblerARM32.cpp
|
| diff --git a/src/IceAssemblerARM32.cpp b/src/IceAssemblerARM32.cpp
|
| index 99be7954e5d505e41333ff953a268729caccf9a8..1147f71898eb1a7d87d2546bbee21f83a04be2f4 100644
|
| --- a/src/IceAssemblerARM32.cpp
|
| +++ b/src/IceAssemblerARM32.cpp
|
| @@ -236,8 +236,10 @@ DecodedResult decodeAddress(const Operand *Opnd, IValueT &Value) {
|
| const IOffsetT Offset = Var->getStackOffset();
|
| if (!Utils::IsAbsoluteUint(12, Offset))
|
| return CantDecode;
|
| - Value = decodeImmRegOffset(RegARM32::Encoded_Reg_sp, Offset,
|
| - OperandARM32Mem::Offset);
|
| + RegARM32::GPRRegister BaseReg = RegARM32::Encoded_Reg_sp;
|
| + if (const auto *StackVar = llvm::dyn_cast<StackVariable>(Var))
|
| + BaseReg = decodeGPRRegister(StackVar->getBaseRegNum());
|
| + Value = decodeImmRegOffset(BaseReg, Offset, OperandARM32Mem::Offset);
|
| return DecodedAsImmRegOffset;
|
| }
|
| if (const auto *Mem = llvm::dyn_cast<OperandARM32Mem>(Opnd)) {
|
|
|