Index: src/IceInstARM32.cpp |
diff --git a/src/IceInstARM32.cpp b/src/IceInstARM32.cpp |
index 4d8bccfbb0289b61acae88d084648e959574853b..f982ccfe5129d86035200118b66ec6891f92216a 100644 |
--- a/src/IceInstARM32.cpp |
+++ b/src/IceInstARM32.cpp |
@@ -84,6 +84,11 @@ CondARM32::Cond InstARM32::getOppositeCondition(CondARM32::Cond Cond) { |
return InstARM32CondAttributes[Cond].Opposite; |
} |
+void InstARM32::startNextInst(const Cfg *Func) const { |
+ if (auto *Asm = Func->getAssembler<ARM32::AssemblerARM32>()) |
+ Asm->startNextInst(); |
+} |
+ |
void InstARM32::emitUsingTextFixup(const Cfg *Func) const { |
if (!BuildDefs::dump()) |
return; |
@@ -98,9 +103,13 @@ void InstARM32::emitUsingTextFixup(const Cfg *Func) const { |
OstreamLocker L(Ctx); |
Ostream &OldStr = Ctx->getStrEmit(); |
Ctx->setStrEmit(StrBuf); |
+ // Start counting instructions here, so that emit() methods don't |
+ // need to call this for the first instruction. |
+ Asm->startFirstInst(); |
emit(Func); |
Ctx->setStrEmit(OldStr); |
- Asm->emitTextInst(StrBuf.str()); |
+ Asm->emitTextInst(StrBuf.str(), |
+ Asm->getNumberEmittedInsts() * sizeof(uint32_t)); |
} |
void InstARM32::emitIAS(const Cfg *Func) const { emitUsingTextFixup(Func); } |
@@ -802,6 +811,7 @@ void InstARM32Br::emit(const Cfg *Func) const { |
} else { |
Str << getTargetTrue()->getAsmName(); |
if (getTargetFalse()) { |
+ startNextInst(Func); |
Jim Stichnoth
2015/11/04 23:45:26
This is interesting. Are our ARM conditional bran
|
Str << "\n\t" |
<< "b" |
<< "\t" << getTargetFalse()->getAsmName(); |
@@ -1061,6 +1071,7 @@ void InstARM32Pop::emit(const Cfg *Func) const { |
for (const Operand *Op : Dests) { |
if (isScalarIntegerType(Op->getType())) |
continue; |
+ startNextInst(Func); |
Str << "\t" |
<< "vpop" |
<< "\t{"; |
@@ -1131,6 +1142,7 @@ void InstARM32Push::emit(const Cfg *Func) const { |
Str << "}\n"; |
} |
if (IntegerCount != 0) { |
+ startNextInst(Func); |
Str << "\t" |
<< "push" |
<< "\t{"; |