MIPS64: Fix r6 boolean materializations after a float32 compare.

MIPS64: Fix r6 boolean materializations after a float32 compare.

The upper 32-bits of the FP compare register are undefined in
the float32 case. The compare instruction returns all 1's or
all 0's, so just use the LS bit.

Remove unnecessary use of 'at' reg. Change mips32 for consistency,
but it did not have the bug.

TEST=mjsunit/asm/embenchen/box2d (r6)
BUG=

Committed: https://crrev.com/efa752d98b471981b9bef99334cc6921f23efcf2
Cr-Commit-Position: refs/heads/master@{#31582}

[ivica.bogosavljevic, 2015-10-26 09:45:51]

ivica.bogosavljevic@imgtec.com changed reviewers:
+ ivica.bogosavljevic@imgtec.com

[ivica.bogosavljevic, 2015-10-26 09:45:51]

https://codereview.chromium.org/1425603002/diff/20001/src/compiler/mips64/cod...
File src/compiler/mips64/code-generator-mips64.cc (right):

https://codereview.chromium.org/1425603002/diff/20001/src/compiler/mips64/cod...
src/compiler/mips64/code-generator-mips64.cc:1184: __ andi(result, result, 1); 
// Cmp returns all 1's/0's, use only LSB.
That's the thing we need :)

[Ilija.Pavlovic1, 2015-10-26 12:04:50]

ilija.pavlovic@imgtec.com changed reviewers:
+ Ilija.Pavlovic@imgtec.com

[Ilija.Pavlovic1, 2015-10-26 12:04:51]

lgtm

[paul.l..., 2015-10-26 15:22:02]

Description was changed from

==========
MIPS64: Fix r6 boolean materializations after a float32 compare.

The upper 32-bits of the FP compare register are undefined in
the float32 case. The compare instruction returns all 1's or
all 0's, so just use the LS bit.

Also remove unnecessary use of 'at' reg.

TEST=mjsunit/asm/embenchen/box2d (r6)
BUG=
==========

to

==========
MIPS64: Fix r6 boolean materializations after a float32 compare.

The upper 32-bits of the FP compare register are undefined in
the float32 case. The compare instruction returns all 1's or
all 0's, so just use the LS bit.

Remove unnecessary use of 'at' reg. Change mips32 for consistency -- but it did
not have the bug.

TEST=mjsunit/asm/embenchen/box2d (r6)
BUG=
==========

[paul.l..., 2015-10-26 15:22:02]

paul.lind@imgtec.com changed reviewers:
+ ilija.pavlovic@imgtec.com
- Ilija.Pavlovic@imgtec.com

[akos.palfi.imgtec, 2015-10-26 16:27:29]

akos.palfi@imgtec.com changed reviewers:
+ akos.palfi@imgtec.com

[akos.palfi.imgtec, 2015-10-26 16:27:29]

LGTM.

[paul.l..., 2015-10-26 16:35:15]

The CQ bit was checked by paul.lind@imgtec.com

[commit-bot: I haz the power, 2015-10-26 16:35:28]

CQ is trying da patch. Follow status at
 https://chromium-cq-status.appspot.com/patch-status/1425603002/20001
View timeline at
 https://chromium-cq-status.appspot.com/patch-timeline/1425603002/20001

[paul.l..., 2015-10-26 16:36:21]

Description was changed from

==========
MIPS64: Fix r6 boolean materializations after a float32 compare.

The upper 32-bits of the FP compare register are undefined in
the float32 case. The compare instruction returns all 1's or
all 0's, so just use the LS bit.

Remove unnecessary use of 'at' reg. Change mips32 for consistency -- but it did
not have the bug.

TEST=mjsunit/asm/embenchen/box2d (r6)
BUG=
==========

to

==========
MIPS64: Fix r6 boolean materializations after a float32 compare.

The upper 32-bits of the FP compare register are undefined in
the float32 case. The compare instruction returns all 1's or
all 0's, so just use the LS bit.

Remove unnecessary use of 'at' reg. Change mips32 for consistency,
but it did not have the bug.

TEST=mjsunit/asm/embenchen/box2d (r6)
BUG=
==========

[commit-bot: I haz the power, 2015-10-26 17:46:40]

Committed patchset #2 (id:20001)

[commit-bot: I haz the power, 2015-10-26 17:47:00]

Patchset 2 (id:??) landed as
https://crrev.com/efa752d98b471981b9bef99334cc6921f23efcf2
Cr-Commit-Position: refs/heads/master@{#31582}