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Unified Diff: test/Transforms/NaCl/vector-canonicalization-cmps.ll

Issue 1423873002: PNaCl: Add a vector type legalization pass. Base URL: https://chromium.googlesource.com/native_client/pnacl-llvm.git@master
Patch Set: Created 5 years, 2 months ago
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Index: test/Transforms/NaCl/vector-canonicalization-cmps.ll
diff --git a/test/Transforms/NaCl/vector-canonicalization-cmps.ll b/test/Transforms/NaCl/vector-canonicalization-cmps.ll
new file mode 100644
index 0000000000000000000000000000000000000000..227cbba2d314ab84ac1598288bc815637e0a8e64
--- /dev/null
+++ b/test/Transforms/NaCl/vector-canonicalization-cmps.ll
@@ -0,0 +1,9728 @@
+; RUN: opt -S -pnacl-vector-canonicalization %s | FileCheck %s
+
+; Auto-generated tests for cmp instructions.
+
+target datalayout = "e-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-p:32:32:32-v128:32:128"
+
+define <2 x float> @fcmp_true_on_2xfloat(<2 x float>, <2 x float>, <2 x float>, <2 x float>) {
+entry:
+ %4 = fcmp true <2 x float> %0, %1
+ %5 = select <2 x i1> %4, <2 x float> %2, <2 x float> %3
+ ret <2 x float> %5
+}
+; CHECK-LABEL: define <4 x float> @fcmp_true_on_2xfloat(<4 x float>, <4 x float>, <4 x float>, <4 x float>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = fcmp true <4 x float> %0, %1
+; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x float> %2, <4 x float> %3
+; CHECK-NEXT: ret <4 x float> %5
+; CHECK-NEXT: }
+
+define <2 x float> @fcmp_false_on_2xfloat(<2 x float>, <2 x float>, <2 x float>, <2 x float>) {
+entry:
+ %4 = fcmp false <2 x float> %0, %1
+ %5 = select <2 x i1> %4, <2 x float> %2, <2 x float> %3
+ ret <2 x float> %5
+}
+; CHECK-LABEL: define <4 x float> @fcmp_false_on_2xfloat(<4 x float>, <4 x float>, <4 x float>, <4 x float>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = fcmp false <4 x float> %0, %1
+; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x float> %2, <4 x float> %3
+; CHECK-NEXT: ret <4 x float> %5
+; CHECK-NEXT: }
+
+define <2 x float> @fcmp_oeq_on_2xfloat(<2 x float>, <2 x float>, <2 x float>, <2 x float>) {
+entry:
+ %4 = fcmp oeq <2 x float> %0, %1
+ %5 = select <2 x i1> %4, <2 x float> %2, <2 x float> %3
+ ret <2 x float> %5
+}
+; CHECK-LABEL: define <4 x float> @fcmp_oeq_on_2xfloat(<4 x float>, <4 x float>, <4 x float>, <4 x float>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = fcmp oeq <4 x float> %0, %1
+; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x float> %2, <4 x float> %3
+; CHECK-NEXT: ret <4 x float> %5
+; CHECK-NEXT: }
+
+define <2 x float> @fcmp_ueq_on_2xfloat(<2 x float>, <2 x float>, <2 x float>, <2 x float>) {
+entry:
+ %4 = fcmp ueq <2 x float> %0, %1
+ %5 = select <2 x i1> %4, <2 x float> %2, <2 x float> %3
+ ret <2 x float> %5
+}
+; CHECK-LABEL: define <4 x float> @fcmp_ueq_on_2xfloat(<4 x float>, <4 x float>, <4 x float>, <4 x float>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = fcmp ueq <4 x float> %0, %1
+; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x float> %2, <4 x float> %3
+; CHECK-NEXT: ret <4 x float> %5
+; CHECK-NEXT: }
+
+define <2 x float> @fcmp_one_on_2xfloat(<2 x float>, <2 x float>, <2 x float>, <2 x float>) {
+entry:
+ %4 = fcmp one <2 x float> %0, %1
+ %5 = select <2 x i1> %4, <2 x float> %2, <2 x float> %3
+ ret <2 x float> %5
+}
+; CHECK-LABEL: define <4 x float> @fcmp_one_on_2xfloat(<4 x float>, <4 x float>, <4 x float>, <4 x float>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = fcmp one <4 x float> %0, %1
+; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x float> %2, <4 x float> %3
+; CHECK-NEXT: ret <4 x float> %5
+; CHECK-NEXT: }
+
+define <2 x float> @fcmp_une_on_2xfloat(<2 x float>, <2 x float>, <2 x float>, <2 x float>) {
+entry:
+ %4 = fcmp une <2 x float> %0, %1
+ %5 = select <2 x i1> %4, <2 x float> %2, <2 x float> %3
+ ret <2 x float> %5
+}
+; CHECK-LABEL: define <4 x float> @fcmp_une_on_2xfloat(<4 x float>, <4 x float>, <4 x float>, <4 x float>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = fcmp une <4 x float> %0, %1
+; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x float> %2, <4 x float> %3
+; CHECK-NEXT: ret <4 x float> %5
+; CHECK-NEXT: }
+
+define <2 x float> @fcmp_ogt_on_2xfloat(<2 x float>, <2 x float>, <2 x float>, <2 x float>) {
+entry:
+ %4 = fcmp ogt <2 x float> %0, %1
+ %5 = select <2 x i1> %4, <2 x float> %2, <2 x float> %3
+ ret <2 x float> %5
+}
+; CHECK-LABEL: define <4 x float> @fcmp_ogt_on_2xfloat(<4 x float>, <4 x float>, <4 x float>, <4 x float>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = fcmp ogt <4 x float> %0, %1
+; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x float> %2, <4 x float> %3
+; CHECK-NEXT: ret <4 x float> %5
+; CHECK-NEXT: }
+
+define <2 x float> @fcmp_ugt_on_2xfloat(<2 x float>, <2 x float>, <2 x float>, <2 x float>) {
+entry:
+ %4 = fcmp ugt <2 x float> %0, %1
+ %5 = select <2 x i1> %4, <2 x float> %2, <2 x float> %3
+ ret <2 x float> %5
+}
+; CHECK-LABEL: define <4 x float> @fcmp_ugt_on_2xfloat(<4 x float>, <4 x float>, <4 x float>, <4 x float>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = fcmp ugt <4 x float> %0, %1
+; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x float> %2, <4 x float> %3
+; CHECK-NEXT: ret <4 x float> %5
+; CHECK-NEXT: }
+
+define <2 x float> @fcmp_oge_on_2xfloat(<2 x float>, <2 x float>, <2 x float>, <2 x float>) {
+entry:
+ %4 = fcmp oge <2 x float> %0, %1
+ %5 = select <2 x i1> %4, <2 x float> %2, <2 x float> %3
+ ret <2 x float> %5
+}
+; CHECK-LABEL: define <4 x float> @fcmp_oge_on_2xfloat(<4 x float>, <4 x float>, <4 x float>, <4 x float>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = fcmp oge <4 x float> %0, %1
+; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x float> %2, <4 x float> %3
+; CHECK-NEXT: ret <4 x float> %5
+; CHECK-NEXT: }
+
+define <2 x float> @fcmp_uge_on_2xfloat(<2 x float>, <2 x float>, <2 x float>, <2 x float>) {
+entry:
+ %4 = fcmp uge <2 x float> %0, %1
+ %5 = select <2 x i1> %4, <2 x float> %2, <2 x float> %3
+ ret <2 x float> %5
+}
+; CHECK-LABEL: define <4 x float> @fcmp_uge_on_2xfloat(<4 x float>, <4 x float>, <4 x float>, <4 x float>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = fcmp uge <4 x float> %0, %1
+; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x float> %2, <4 x float> %3
+; CHECK-NEXT: ret <4 x float> %5
+; CHECK-NEXT: }
+
+define <2 x float> @fcmp_ord_on_2xfloat(<2 x float>, <2 x float>, <2 x float>, <2 x float>) {
+entry:
+ %4 = fcmp ord <2 x float> %0, %1
+ %5 = select <2 x i1> %4, <2 x float> %2, <2 x float> %3
+ ret <2 x float> %5
+}
+; CHECK-LABEL: define <4 x float> @fcmp_ord_on_2xfloat(<4 x float>, <4 x float>, <4 x float>, <4 x float>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = fcmp ord <4 x float> %0, %1
+; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x float> %2, <4 x float> %3
+; CHECK-NEXT: ret <4 x float> %5
+; CHECK-NEXT: }
+
+define <2 x float> @fcmp_uno_on_2xfloat(<2 x float>, <2 x float>, <2 x float>, <2 x float>) {
+entry:
+ %4 = fcmp uno <2 x float> %0, %1
+ %5 = select <2 x i1> %4, <2 x float> %2, <2 x float> %3
+ ret <2 x float> %5
+}
+; CHECK-LABEL: define <4 x float> @fcmp_uno_on_2xfloat(<4 x float>, <4 x float>, <4 x float>, <4 x float>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = fcmp uno <4 x float> %0, %1
+; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x float> %2, <4 x float> %3
+; CHECK-NEXT: ret <4 x float> %5
+; CHECK-NEXT: }
+
+define <2 x double> @fcmp_true_on_2xdouble(<2 x double>, <2 x double>, <2 x double>, <2 x double>) {
+entry:
+ %4 = fcmp true <2 x double> %0, %1
+ %5 = select <2 x i1> %4, <2 x double> %2, <2 x double> %3
+ ret <2 x double> %5
+}
+; CHECK-LABEL: define <2 x double> @fcmp_true_on_2xdouble(<2 x double>, <2 x double>, <2 x double>, <2 x double>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = fcmp true <2 x double> %0, %1
+; CHECK-NEXT: %5 = select <2 x i1> %4, <2 x double> %2, <2 x double> %3
+; CHECK-NEXT: ret <2 x double> %5
+; CHECK-NEXT: }
+
+define <2 x double> @fcmp_false_on_2xdouble(<2 x double>, <2 x double>, <2 x double>, <2 x double>) {
+entry:
+ %4 = fcmp false <2 x double> %0, %1
+ %5 = select <2 x i1> %4, <2 x double> %2, <2 x double> %3
+ ret <2 x double> %5
+}
+; CHECK-LABEL: define <2 x double> @fcmp_false_on_2xdouble(<2 x double>, <2 x double>, <2 x double>, <2 x double>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = fcmp false <2 x double> %0, %1
+; CHECK-NEXT: %5 = select <2 x i1> %4, <2 x double> %2, <2 x double> %3
+; CHECK-NEXT: ret <2 x double> %5
+; CHECK-NEXT: }
+
+define <2 x double> @fcmp_oeq_on_2xdouble(<2 x double>, <2 x double>, <2 x double>, <2 x double>) {
+entry:
+ %4 = fcmp oeq <2 x double> %0, %1
+ %5 = select <2 x i1> %4, <2 x double> %2, <2 x double> %3
+ ret <2 x double> %5
+}
+; CHECK-LABEL: define <2 x double> @fcmp_oeq_on_2xdouble(<2 x double>, <2 x double>, <2 x double>, <2 x double>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = fcmp oeq <2 x double> %0, %1
+; CHECK-NEXT: %5 = select <2 x i1> %4, <2 x double> %2, <2 x double> %3
+; CHECK-NEXT: ret <2 x double> %5
+; CHECK-NEXT: }
+
+define <2 x double> @fcmp_ueq_on_2xdouble(<2 x double>, <2 x double>, <2 x double>, <2 x double>) {
+entry:
+ %4 = fcmp ueq <2 x double> %0, %1
+ %5 = select <2 x i1> %4, <2 x double> %2, <2 x double> %3
+ ret <2 x double> %5
+}
+; CHECK-LABEL: define <2 x double> @fcmp_ueq_on_2xdouble(<2 x double>, <2 x double>, <2 x double>, <2 x double>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = fcmp ueq <2 x double> %0, %1
+; CHECK-NEXT: %5 = select <2 x i1> %4, <2 x double> %2, <2 x double> %3
+; CHECK-NEXT: ret <2 x double> %5
+; CHECK-NEXT: }
+
+define <2 x double> @fcmp_one_on_2xdouble(<2 x double>, <2 x double>, <2 x double>, <2 x double>) {
+entry:
+ %4 = fcmp one <2 x double> %0, %1
+ %5 = select <2 x i1> %4, <2 x double> %2, <2 x double> %3
+ ret <2 x double> %5
+}
+; CHECK-LABEL: define <2 x double> @fcmp_one_on_2xdouble(<2 x double>, <2 x double>, <2 x double>, <2 x double>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = fcmp one <2 x double> %0, %1
+; CHECK-NEXT: %5 = select <2 x i1> %4, <2 x double> %2, <2 x double> %3
+; CHECK-NEXT: ret <2 x double> %5
+; CHECK-NEXT: }
+
+define <2 x double> @fcmp_une_on_2xdouble(<2 x double>, <2 x double>, <2 x double>, <2 x double>) {
+entry:
+ %4 = fcmp une <2 x double> %0, %1
+ %5 = select <2 x i1> %4, <2 x double> %2, <2 x double> %3
+ ret <2 x double> %5
+}
+; CHECK-LABEL: define <2 x double> @fcmp_une_on_2xdouble(<2 x double>, <2 x double>, <2 x double>, <2 x double>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = fcmp une <2 x double> %0, %1
+; CHECK-NEXT: %5 = select <2 x i1> %4, <2 x double> %2, <2 x double> %3
+; CHECK-NEXT: ret <2 x double> %5
+; CHECK-NEXT: }
+
+define <2 x double> @fcmp_ogt_on_2xdouble(<2 x double>, <2 x double>, <2 x double>, <2 x double>) {
+entry:
+ %4 = fcmp ogt <2 x double> %0, %1
+ %5 = select <2 x i1> %4, <2 x double> %2, <2 x double> %3
+ ret <2 x double> %5
+}
+; CHECK-LABEL: define <2 x double> @fcmp_ogt_on_2xdouble(<2 x double>, <2 x double>, <2 x double>, <2 x double>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = fcmp ogt <2 x double> %0, %1
+; CHECK-NEXT: %5 = select <2 x i1> %4, <2 x double> %2, <2 x double> %3
+; CHECK-NEXT: ret <2 x double> %5
+; CHECK-NEXT: }
+
+define <2 x double> @fcmp_ugt_on_2xdouble(<2 x double>, <2 x double>, <2 x double>, <2 x double>) {
+entry:
+ %4 = fcmp ugt <2 x double> %0, %1
+ %5 = select <2 x i1> %4, <2 x double> %2, <2 x double> %3
+ ret <2 x double> %5
+}
+; CHECK-LABEL: define <2 x double> @fcmp_ugt_on_2xdouble(<2 x double>, <2 x double>, <2 x double>, <2 x double>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = fcmp ugt <2 x double> %0, %1
+; CHECK-NEXT: %5 = select <2 x i1> %4, <2 x double> %2, <2 x double> %3
+; CHECK-NEXT: ret <2 x double> %5
+; CHECK-NEXT: }
+
+define <2 x double> @fcmp_oge_on_2xdouble(<2 x double>, <2 x double>, <2 x double>, <2 x double>) {
+entry:
+ %4 = fcmp oge <2 x double> %0, %1
+ %5 = select <2 x i1> %4, <2 x double> %2, <2 x double> %3
+ ret <2 x double> %5
+}
+; CHECK-LABEL: define <2 x double> @fcmp_oge_on_2xdouble(<2 x double>, <2 x double>, <2 x double>, <2 x double>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = fcmp oge <2 x double> %0, %1
+; CHECK-NEXT: %5 = select <2 x i1> %4, <2 x double> %2, <2 x double> %3
+; CHECK-NEXT: ret <2 x double> %5
+; CHECK-NEXT: }
+
+define <2 x double> @fcmp_uge_on_2xdouble(<2 x double>, <2 x double>, <2 x double>, <2 x double>) {
+entry:
+ %4 = fcmp uge <2 x double> %0, %1
+ %5 = select <2 x i1> %4, <2 x double> %2, <2 x double> %3
+ ret <2 x double> %5
+}
+; CHECK-LABEL: define <2 x double> @fcmp_uge_on_2xdouble(<2 x double>, <2 x double>, <2 x double>, <2 x double>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = fcmp uge <2 x double> %0, %1
+; CHECK-NEXT: %5 = select <2 x i1> %4, <2 x double> %2, <2 x double> %3
+; CHECK-NEXT: ret <2 x double> %5
+; CHECK-NEXT: }
+
+define <2 x double> @fcmp_ord_on_2xdouble(<2 x double>, <2 x double>, <2 x double>, <2 x double>) {
+entry:
+ %4 = fcmp ord <2 x double> %0, %1
+ %5 = select <2 x i1> %4, <2 x double> %2, <2 x double> %3
+ ret <2 x double> %5
+}
+; CHECK-LABEL: define <2 x double> @fcmp_ord_on_2xdouble(<2 x double>, <2 x double>, <2 x double>, <2 x double>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = fcmp ord <2 x double> %0, %1
+; CHECK-NEXT: %5 = select <2 x i1> %4, <2 x double> %2, <2 x double> %3
+; CHECK-NEXT: ret <2 x double> %5
+; CHECK-NEXT: }
+
+define <2 x double> @fcmp_uno_on_2xdouble(<2 x double>, <2 x double>, <2 x double>, <2 x double>) {
+entry:
+ %4 = fcmp uno <2 x double> %0, %1
+ %5 = select <2 x i1> %4, <2 x double> %2, <2 x double> %3
+ ret <2 x double> %5
+}
+; CHECK-LABEL: define <2 x double> @fcmp_uno_on_2xdouble(<2 x double>, <2 x double>, <2 x double>, <2 x double>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = fcmp uno <2 x double> %0, %1
+; CHECK-NEXT: %5 = select <2 x i1> %4, <2 x double> %2, <2 x double> %3
+; CHECK-NEXT: ret <2 x double> %5
+; CHECK-NEXT: }
+
+define <4 x float> @fcmp_true_on_4xfloat(<4 x float>, <4 x float>, <4 x float>, <4 x float>) {
+entry:
+ %4 = fcmp true <4 x float> %0, %1
+ %5 = select <4 x i1> %4, <4 x float> %2, <4 x float> %3
+ ret <4 x float> %5
+}
+; CHECK-LABEL: define <4 x float> @fcmp_true_on_4xfloat(<4 x float>, <4 x float>, <4 x float>, <4 x float>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = fcmp true <4 x float> %0, %1
+; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x float> %2, <4 x float> %3
+; CHECK-NEXT: ret <4 x float> %5
+; CHECK-NEXT: }
+
+define <4 x float> @fcmp_false_on_4xfloat(<4 x float>, <4 x float>, <4 x float>, <4 x float>) {
+entry:
+ %4 = fcmp false <4 x float> %0, %1
+ %5 = select <4 x i1> %4, <4 x float> %2, <4 x float> %3
+ ret <4 x float> %5
+}
+; CHECK-LABEL: define <4 x float> @fcmp_false_on_4xfloat(<4 x float>, <4 x float>, <4 x float>, <4 x float>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = fcmp false <4 x float> %0, %1
+; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x float> %2, <4 x float> %3
+; CHECK-NEXT: ret <4 x float> %5
+; CHECK-NEXT: }
+
+define <4 x float> @fcmp_oeq_on_4xfloat(<4 x float>, <4 x float>, <4 x float>, <4 x float>) {
+entry:
+ %4 = fcmp oeq <4 x float> %0, %1
+ %5 = select <4 x i1> %4, <4 x float> %2, <4 x float> %3
+ ret <4 x float> %5
+}
+; CHECK-LABEL: define <4 x float> @fcmp_oeq_on_4xfloat(<4 x float>, <4 x float>, <4 x float>, <4 x float>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = fcmp oeq <4 x float> %0, %1
+; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x float> %2, <4 x float> %3
+; CHECK-NEXT: ret <4 x float> %5
+; CHECK-NEXT: }
+
+define <4 x float> @fcmp_ueq_on_4xfloat(<4 x float>, <4 x float>, <4 x float>, <4 x float>) {
+entry:
+ %4 = fcmp ueq <4 x float> %0, %1
+ %5 = select <4 x i1> %4, <4 x float> %2, <4 x float> %3
+ ret <4 x float> %5
+}
+; CHECK-LABEL: define <4 x float> @fcmp_ueq_on_4xfloat(<4 x float>, <4 x float>, <4 x float>, <4 x float>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = fcmp ueq <4 x float> %0, %1
+; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x float> %2, <4 x float> %3
+; CHECK-NEXT: ret <4 x float> %5
+; CHECK-NEXT: }
+
+define <4 x float> @fcmp_one_on_4xfloat(<4 x float>, <4 x float>, <4 x float>, <4 x float>) {
+entry:
+ %4 = fcmp one <4 x float> %0, %1
+ %5 = select <4 x i1> %4, <4 x float> %2, <4 x float> %3
+ ret <4 x float> %5
+}
+; CHECK-LABEL: define <4 x float> @fcmp_one_on_4xfloat(<4 x float>, <4 x float>, <4 x float>, <4 x float>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = fcmp one <4 x float> %0, %1
+; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x float> %2, <4 x float> %3
+; CHECK-NEXT: ret <4 x float> %5
+; CHECK-NEXT: }
+
+define <4 x float> @fcmp_une_on_4xfloat(<4 x float>, <4 x float>, <4 x float>, <4 x float>) {
+entry:
+ %4 = fcmp une <4 x float> %0, %1
+ %5 = select <4 x i1> %4, <4 x float> %2, <4 x float> %3
+ ret <4 x float> %5
+}
+; CHECK-LABEL: define <4 x float> @fcmp_une_on_4xfloat(<4 x float>, <4 x float>, <4 x float>, <4 x float>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = fcmp une <4 x float> %0, %1
+; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x float> %2, <4 x float> %3
+; CHECK-NEXT: ret <4 x float> %5
+; CHECK-NEXT: }
+
+define <4 x float> @fcmp_ogt_on_4xfloat(<4 x float>, <4 x float>, <4 x float>, <4 x float>) {
+entry:
+ %4 = fcmp ogt <4 x float> %0, %1
+ %5 = select <4 x i1> %4, <4 x float> %2, <4 x float> %3
+ ret <4 x float> %5
+}
+; CHECK-LABEL: define <4 x float> @fcmp_ogt_on_4xfloat(<4 x float>, <4 x float>, <4 x float>, <4 x float>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = fcmp ogt <4 x float> %0, %1
+; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x float> %2, <4 x float> %3
+; CHECK-NEXT: ret <4 x float> %5
+; CHECK-NEXT: }
+
+define <4 x float> @fcmp_ugt_on_4xfloat(<4 x float>, <4 x float>, <4 x float>, <4 x float>) {
+entry:
+ %4 = fcmp ugt <4 x float> %0, %1
+ %5 = select <4 x i1> %4, <4 x float> %2, <4 x float> %3
+ ret <4 x float> %5
+}
+; CHECK-LABEL: define <4 x float> @fcmp_ugt_on_4xfloat(<4 x float>, <4 x float>, <4 x float>, <4 x float>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = fcmp ugt <4 x float> %0, %1
+; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x float> %2, <4 x float> %3
+; CHECK-NEXT: ret <4 x float> %5
+; CHECK-NEXT: }
+
+define <4 x float> @fcmp_oge_on_4xfloat(<4 x float>, <4 x float>, <4 x float>, <4 x float>) {
+entry:
+ %4 = fcmp oge <4 x float> %0, %1
+ %5 = select <4 x i1> %4, <4 x float> %2, <4 x float> %3
+ ret <4 x float> %5
+}
+; CHECK-LABEL: define <4 x float> @fcmp_oge_on_4xfloat(<4 x float>, <4 x float>, <4 x float>, <4 x float>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = fcmp oge <4 x float> %0, %1
+; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x float> %2, <4 x float> %3
+; CHECK-NEXT: ret <4 x float> %5
+; CHECK-NEXT: }
+
+define <4 x float> @fcmp_uge_on_4xfloat(<4 x float>, <4 x float>, <4 x float>, <4 x float>) {
+entry:
+ %4 = fcmp uge <4 x float> %0, %1
+ %5 = select <4 x i1> %4, <4 x float> %2, <4 x float> %3
+ ret <4 x float> %5
+}
+; CHECK-LABEL: define <4 x float> @fcmp_uge_on_4xfloat(<4 x float>, <4 x float>, <4 x float>, <4 x float>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = fcmp uge <4 x float> %0, %1
+; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x float> %2, <4 x float> %3
+; CHECK-NEXT: ret <4 x float> %5
+; CHECK-NEXT: }
+
+define <4 x float> @fcmp_ord_on_4xfloat(<4 x float>, <4 x float>, <4 x float>, <4 x float>) {
+entry:
+ %4 = fcmp ord <4 x float> %0, %1
+ %5 = select <4 x i1> %4, <4 x float> %2, <4 x float> %3
+ ret <4 x float> %5
+}
+; CHECK-LABEL: define <4 x float> @fcmp_ord_on_4xfloat(<4 x float>, <4 x float>, <4 x float>, <4 x float>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = fcmp ord <4 x float> %0, %1
+; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x float> %2, <4 x float> %3
+; CHECK-NEXT: ret <4 x float> %5
+; CHECK-NEXT: }
+
+define <4 x float> @fcmp_uno_on_4xfloat(<4 x float>, <4 x float>, <4 x float>, <4 x float>) {
+entry:
+ %4 = fcmp uno <4 x float> %0, %1
+ %5 = select <4 x i1> %4, <4 x float> %2, <4 x float> %3
+ ret <4 x float> %5
+}
+; CHECK-LABEL: define <4 x float> @fcmp_uno_on_4xfloat(<4 x float>, <4 x float>, <4 x float>, <4 x float>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = fcmp uno <4 x float> %0, %1
+; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x float> %2, <4 x float> %3
+; CHECK-NEXT: ret <4 x float> %5
+; CHECK-NEXT: }
+
+define <4 x double> @fcmp_true_on_4xdouble(<4 x double>, <4 x double>, <4 x double>, <4 x double>) {
+entry:
+ %4 = fcmp true <4 x double> %0, %1
+ %5 = select <4 x i1> %4, <4 x double> %2, <4 x double> %3
+ ret <4 x double> %5
+}
+; CHECK-LABEL: define <2 x double> @fcmp_true_on_4xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = fcmp true <2 x double> %1, %3
+; CHECK-NEXT: %10 = fcmp true <2 x double> %2, %4
+; CHECK-NEXT: %11 = select <2 x i1> %9, <2 x double> %5, <2 x double> %7
+; CHECK-NEXT: %12 = select <2 x i1> %10, <2 x double> %6, <2 x double> %8
+; CHECK-NEXT: store <2 x double> %12, <2 x double>* %0, align 16
+; CHECK-NEXT: ret <2 x double> %11
+; CHECK-NEXT: }
+
+define <4 x double> @fcmp_false_on_4xdouble(<4 x double>, <4 x double>, <4 x double>, <4 x double>) {
+entry:
+ %4 = fcmp false <4 x double> %0, %1
+ %5 = select <4 x i1> %4, <4 x double> %2, <4 x double> %3
+ ret <4 x double> %5
+}
+; CHECK-LABEL: define <2 x double> @fcmp_false_on_4xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = fcmp false <2 x double> %1, %3
+; CHECK-NEXT: %10 = fcmp false <2 x double> %2, %4
+; CHECK-NEXT: %11 = select <2 x i1> %9, <2 x double> %5, <2 x double> %7
+; CHECK-NEXT: %12 = select <2 x i1> %10, <2 x double> %6, <2 x double> %8
+; CHECK-NEXT: store <2 x double> %12, <2 x double>* %0, align 16
+; CHECK-NEXT: ret <2 x double> %11
+; CHECK-NEXT: }
+
+define <4 x double> @fcmp_oeq_on_4xdouble(<4 x double>, <4 x double>, <4 x double>, <4 x double>) {
+entry:
+ %4 = fcmp oeq <4 x double> %0, %1
+ %5 = select <4 x i1> %4, <4 x double> %2, <4 x double> %3
+ ret <4 x double> %5
+}
+; CHECK-LABEL: define <2 x double> @fcmp_oeq_on_4xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = fcmp oeq <2 x double> %1, %3
+; CHECK-NEXT: %10 = fcmp oeq <2 x double> %2, %4
+; CHECK-NEXT: %11 = select <2 x i1> %9, <2 x double> %5, <2 x double> %7
+; CHECK-NEXT: %12 = select <2 x i1> %10, <2 x double> %6, <2 x double> %8
+; CHECK-NEXT: store <2 x double> %12, <2 x double>* %0, align 16
+; CHECK-NEXT: ret <2 x double> %11
+; CHECK-NEXT: }
+
+define <4 x double> @fcmp_ueq_on_4xdouble(<4 x double>, <4 x double>, <4 x double>, <4 x double>) {
+entry:
+ %4 = fcmp ueq <4 x double> %0, %1
+ %5 = select <4 x i1> %4, <4 x double> %2, <4 x double> %3
+ ret <4 x double> %5
+}
+; CHECK-LABEL: define <2 x double> @fcmp_ueq_on_4xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = fcmp ueq <2 x double> %1, %3
+; CHECK-NEXT: %10 = fcmp ueq <2 x double> %2, %4
+; CHECK-NEXT: %11 = select <2 x i1> %9, <2 x double> %5, <2 x double> %7
+; CHECK-NEXT: %12 = select <2 x i1> %10, <2 x double> %6, <2 x double> %8
+; CHECK-NEXT: store <2 x double> %12, <2 x double>* %0, align 16
+; CHECK-NEXT: ret <2 x double> %11
+; CHECK-NEXT: }
+
+define <4 x double> @fcmp_one_on_4xdouble(<4 x double>, <4 x double>, <4 x double>, <4 x double>) {
+entry:
+ %4 = fcmp one <4 x double> %0, %1
+ %5 = select <4 x i1> %4, <4 x double> %2, <4 x double> %3
+ ret <4 x double> %5
+}
+; CHECK-LABEL: define <2 x double> @fcmp_one_on_4xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = fcmp one <2 x double> %1, %3
+; CHECK-NEXT: %10 = fcmp one <2 x double> %2, %4
+; CHECK-NEXT: %11 = select <2 x i1> %9, <2 x double> %5, <2 x double> %7
+; CHECK-NEXT: %12 = select <2 x i1> %10, <2 x double> %6, <2 x double> %8
+; CHECK-NEXT: store <2 x double> %12, <2 x double>* %0, align 16
+; CHECK-NEXT: ret <2 x double> %11
+; CHECK-NEXT: }
+
+define <4 x double> @fcmp_une_on_4xdouble(<4 x double>, <4 x double>, <4 x double>, <4 x double>) {
+entry:
+ %4 = fcmp une <4 x double> %0, %1
+ %5 = select <4 x i1> %4, <4 x double> %2, <4 x double> %3
+ ret <4 x double> %5
+}
+; CHECK-LABEL: define <2 x double> @fcmp_une_on_4xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = fcmp une <2 x double> %1, %3
+; CHECK-NEXT: %10 = fcmp une <2 x double> %2, %4
+; CHECK-NEXT: %11 = select <2 x i1> %9, <2 x double> %5, <2 x double> %7
+; CHECK-NEXT: %12 = select <2 x i1> %10, <2 x double> %6, <2 x double> %8
+; CHECK-NEXT: store <2 x double> %12, <2 x double>* %0, align 16
+; CHECK-NEXT: ret <2 x double> %11
+; CHECK-NEXT: }
+
+define <4 x double> @fcmp_ogt_on_4xdouble(<4 x double>, <4 x double>, <4 x double>, <4 x double>) {
+entry:
+ %4 = fcmp ogt <4 x double> %0, %1
+ %5 = select <4 x i1> %4, <4 x double> %2, <4 x double> %3
+ ret <4 x double> %5
+}
+; CHECK-LABEL: define <2 x double> @fcmp_ogt_on_4xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = fcmp ogt <2 x double> %1, %3
+; CHECK-NEXT: %10 = fcmp ogt <2 x double> %2, %4
+; CHECK-NEXT: %11 = select <2 x i1> %9, <2 x double> %5, <2 x double> %7
+; CHECK-NEXT: %12 = select <2 x i1> %10, <2 x double> %6, <2 x double> %8
+; CHECK-NEXT: store <2 x double> %12, <2 x double>* %0, align 16
+; CHECK-NEXT: ret <2 x double> %11
+; CHECK-NEXT: }
+
+define <4 x double> @fcmp_ugt_on_4xdouble(<4 x double>, <4 x double>, <4 x double>, <4 x double>) {
+entry:
+ %4 = fcmp ugt <4 x double> %0, %1
+ %5 = select <4 x i1> %4, <4 x double> %2, <4 x double> %3
+ ret <4 x double> %5
+}
+; CHECK-LABEL: define <2 x double> @fcmp_ugt_on_4xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = fcmp ugt <2 x double> %1, %3
+; CHECK-NEXT: %10 = fcmp ugt <2 x double> %2, %4
+; CHECK-NEXT: %11 = select <2 x i1> %9, <2 x double> %5, <2 x double> %7
+; CHECK-NEXT: %12 = select <2 x i1> %10, <2 x double> %6, <2 x double> %8
+; CHECK-NEXT: store <2 x double> %12, <2 x double>* %0, align 16
+; CHECK-NEXT: ret <2 x double> %11
+; CHECK-NEXT: }
+
+define <4 x double> @fcmp_oge_on_4xdouble(<4 x double>, <4 x double>, <4 x double>, <4 x double>) {
+entry:
+ %4 = fcmp oge <4 x double> %0, %1
+ %5 = select <4 x i1> %4, <4 x double> %2, <4 x double> %3
+ ret <4 x double> %5
+}
+; CHECK-LABEL: define <2 x double> @fcmp_oge_on_4xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = fcmp oge <2 x double> %1, %3
+; CHECK-NEXT: %10 = fcmp oge <2 x double> %2, %4
+; CHECK-NEXT: %11 = select <2 x i1> %9, <2 x double> %5, <2 x double> %7
+; CHECK-NEXT: %12 = select <2 x i1> %10, <2 x double> %6, <2 x double> %8
+; CHECK-NEXT: store <2 x double> %12, <2 x double>* %0, align 16
+; CHECK-NEXT: ret <2 x double> %11
+; CHECK-NEXT: }
+
+define <4 x double> @fcmp_uge_on_4xdouble(<4 x double>, <4 x double>, <4 x double>, <4 x double>) {
+entry:
+ %4 = fcmp uge <4 x double> %0, %1
+ %5 = select <4 x i1> %4, <4 x double> %2, <4 x double> %3
+ ret <4 x double> %5
+}
+; CHECK-LABEL: define <2 x double> @fcmp_uge_on_4xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = fcmp uge <2 x double> %1, %3
+; CHECK-NEXT: %10 = fcmp uge <2 x double> %2, %4
+; CHECK-NEXT: %11 = select <2 x i1> %9, <2 x double> %5, <2 x double> %7
+; CHECK-NEXT: %12 = select <2 x i1> %10, <2 x double> %6, <2 x double> %8
+; CHECK-NEXT: store <2 x double> %12, <2 x double>* %0, align 16
+; CHECK-NEXT: ret <2 x double> %11
+; CHECK-NEXT: }
+
+define <4 x double> @fcmp_ord_on_4xdouble(<4 x double>, <4 x double>, <4 x double>, <4 x double>) {
+entry:
+ %4 = fcmp ord <4 x double> %0, %1
+ %5 = select <4 x i1> %4, <4 x double> %2, <4 x double> %3
+ ret <4 x double> %5
+}
+; CHECK-LABEL: define <2 x double> @fcmp_ord_on_4xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = fcmp ord <2 x double> %1, %3
+; CHECK-NEXT: %10 = fcmp ord <2 x double> %2, %4
+; CHECK-NEXT: %11 = select <2 x i1> %9, <2 x double> %5, <2 x double> %7
+; CHECK-NEXT: %12 = select <2 x i1> %10, <2 x double> %6, <2 x double> %8
+; CHECK-NEXT: store <2 x double> %12, <2 x double>* %0, align 16
+; CHECK-NEXT: ret <2 x double> %11
+; CHECK-NEXT: }
+
+define <4 x double> @fcmp_uno_on_4xdouble(<4 x double>, <4 x double>, <4 x double>, <4 x double>) {
+entry:
+ %4 = fcmp uno <4 x double> %0, %1
+ %5 = select <4 x i1> %4, <4 x double> %2, <4 x double> %3
+ ret <4 x double> %5
+}
+; CHECK-LABEL: define <2 x double> @fcmp_uno_on_4xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = fcmp uno <2 x double> %1, %3
+; CHECK-NEXT: %10 = fcmp uno <2 x double> %2, %4
+; CHECK-NEXT: %11 = select <2 x i1> %9, <2 x double> %5, <2 x double> %7
+; CHECK-NEXT: %12 = select <2 x i1> %10, <2 x double> %6, <2 x double> %8
+; CHECK-NEXT: store <2 x double> %12, <2 x double>* %0, align 16
+; CHECK-NEXT: ret <2 x double> %11
+; CHECK-NEXT: }
+
+define <6 x float> @fcmp_true_on_6xfloat(<6 x float>, <6 x float>, <6 x float>, <6 x float>) {
+entry:
+ %4 = fcmp true <6 x float> %0, %1
+ %5 = select <6 x i1> %4, <6 x float> %2, <6 x float> %3
+ ret <6 x float> %5
+}
+; CHECK-LABEL: define <4 x float> @fcmp_true_on_6xfloat(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = fcmp true <4 x float> %1, %3
+; CHECK-NEXT: %10 = fcmp true <4 x float> %2, %4
+; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x float> %5, <4 x float> %7
+; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x float> %6, <4 x float> %8
+; CHECK-NEXT: store <4 x float> %12, <4 x float>* %0, align 16
+; CHECK-NEXT: ret <4 x float> %11
+; CHECK-NEXT: }
+
+define <6 x float> @fcmp_false_on_6xfloat(<6 x float>, <6 x float>, <6 x float>, <6 x float>) {
+entry:
+ %4 = fcmp false <6 x float> %0, %1
+ %5 = select <6 x i1> %4, <6 x float> %2, <6 x float> %3
+ ret <6 x float> %5
+}
+; CHECK-LABEL: define <4 x float> @fcmp_false_on_6xfloat(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = fcmp false <4 x float> %1, %3
+; CHECK-NEXT: %10 = fcmp false <4 x float> %2, %4
+; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x float> %5, <4 x float> %7
+; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x float> %6, <4 x float> %8
+; CHECK-NEXT: store <4 x float> %12, <4 x float>* %0, align 16
+; CHECK-NEXT: ret <4 x float> %11
+; CHECK-NEXT: }
+
+define <6 x float> @fcmp_oeq_on_6xfloat(<6 x float>, <6 x float>, <6 x float>, <6 x float>) {
+entry:
+ %4 = fcmp oeq <6 x float> %0, %1
+ %5 = select <6 x i1> %4, <6 x float> %2, <6 x float> %3
+ ret <6 x float> %5
+}
+; CHECK-LABEL: define <4 x float> @fcmp_oeq_on_6xfloat(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = fcmp oeq <4 x float> %1, %3
+; CHECK-NEXT: %10 = fcmp oeq <4 x float> %2, %4
+; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x float> %5, <4 x float> %7
+; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x float> %6, <4 x float> %8
+; CHECK-NEXT: store <4 x float> %12, <4 x float>* %0, align 16
+; CHECK-NEXT: ret <4 x float> %11
+; CHECK-NEXT: }
+
+define <6 x float> @fcmp_ueq_on_6xfloat(<6 x float>, <6 x float>, <6 x float>, <6 x float>) {
+entry:
+ %4 = fcmp ueq <6 x float> %0, %1
+ %5 = select <6 x i1> %4, <6 x float> %2, <6 x float> %3
+ ret <6 x float> %5
+}
+; CHECK-LABEL: define <4 x float> @fcmp_ueq_on_6xfloat(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = fcmp ueq <4 x float> %1, %3
+; CHECK-NEXT: %10 = fcmp ueq <4 x float> %2, %4
+; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x float> %5, <4 x float> %7
+; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x float> %6, <4 x float> %8
+; CHECK-NEXT: store <4 x float> %12, <4 x float>* %0, align 16
+; CHECK-NEXT: ret <4 x float> %11
+; CHECK-NEXT: }
+
+define <6 x float> @fcmp_one_on_6xfloat(<6 x float>, <6 x float>, <6 x float>, <6 x float>) {
+entry:
+ %4 = fcmp one <6 x float> %0, %1
+ %5 = select <6 x i1> %4, <6 x float> %2, <6 x float> %3
+ ret <6 x float> %5
+}
+; CHECK-LABEL: define <4 x float> @fcmp_one_on_6xfloat(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = fcmp one <4 x float> %1, %3
+; CHECK-NEXT: %10 = fcmp one <4 x float> %2, %4
+; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x float> %5, <4 x float> %7
+; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x float> %6, <4 x float> %8
+; CHECK-NEXT: store <4 x float> %12, <4 x float>* %0, align 16
+; CHECK-NEXT: ret <4 x float> %11
+; CHECK-NEXT: }
+
+define <6 x float> @fcmp_une_on_6xfloat(<6 x float>, <6 x float>, <6 x float>, <6 x float>) {
+entry:
+ %4 = fcmp une <6 x float> %0, %1
+ %5 = select <6 x i1> %4, <6 x float> %2, <6 x float> %3
+ ret <6 x float> %5
+}
+; CHECK-LABEL: define <4 x float> @fcmp_une_on_6xfloat(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = fcmp une <4 x float> %1, %3
+; CHECK-NEXT: %10 = fcmp une <4 x float> %2, %4
+; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x float> %5, <4 x float> %7
+; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x float> %6, <4 x float> %8
+; CHECK-NEXT: store <4 x float> %12, <4 x float>* %0, align 16
+; CHECK-NEXT: ret <4 x float> %11
+; CHECK-NEXT: }
+
+define <6 x float> @fcmp_ogt_on_6xfloat(<6 x float>, <6 x float>, <6 x float>, <6 x float>) {
+entry:
+ %4 = fcmp ogt <6 x float> %0, %1
+ %5 = select <6 x i1> %4, <6 x float> %2, <6 x float> %3
+ ret <6 x float> %5
+}
+; CHECK-LABEL: define <4 x float> @fcmp_ogt_on_6xfloat(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = fcmp ogt <4 x float> %1, %3
+; CHECK-NEXT: %10 = fcmp ogt <4 x float> %2, %4
+; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x float> %5, <4 x float> %7
+; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x float> %6, <4 x float> %8
+; CHECK-NEXT: store <4 x float> %12, <4 x float>* %0, align 16
+; CHECK-NEXT: ret <4 x float> %11
+; CHECK-NEXT: }
+
+define <6 x float> @fcmp_ugt_on_6xfloat(<6 x float>, <6 x float>, <6 x float>, <6 x float>) {
+entry:
+ %4 = fcmp ugt <6 x float> %0, %1
+ %5 = select <6 x i1> %4, <6 x float> %2, <6 x float> %3
+ ret <6 x float> %5
+}
+; CHECK-LABEL: define <4 x float> @fcmp_ugt_on_6xfloat(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = fcmp ugt <4 x float> %1, %3
+; CHECK-NEXT: %10 = fcmp ugt <4 x float> %2, %4
+; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x float> %5, <4 x float> %7
+; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x float> %6, <4 x float> %8
+; CHECK-NEXT: store <4 x float> %12, <4 x float>* %0, align 16
+; CHECK-NEXT: ret <4 x float> %11
+; CHECK-NEXT: }
+
+define <6 x float> @fcmp_oge_on_6xfloat(<6 x float>, <6 x float>, <6 x float>, <6 x float>) {
+entry:
+ %4 = fcmp oge <6 x float> %0, %1
+ %5 = select <6 x i1> %4, <6 x float> %2, <6 x float> %3
+ ret <6 x float> %5
+}
+; CHECK-LABEL: define <4 x float> @fcmp_oge_on_6xfloat(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = fcmp oge <4 x float> %1, %3
+; CHECK-NEXT: %10 = fcmp oge <4 x float> %2, %4
+; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x float> %5, <4 x float> %7
+; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x float> %6, <4 x float> %8
+; CHECK-NEXT: store <4 x float> %12, <4 x float>* %0, align 16
+; CHECK-NEXT: ret <4 x float> %11
+; CHECK-NEXT: }
+
+define <6 x float> @fcmp_uge_on_6xfloat(<6 x float>, <6 x float>, <6 x float>, <6 x float>) {
+entry:
+ %4 = fcmp uge <6 x float> %0, %1
+ %5 = select <6 x i1> %4, <6 x float> %2, <6 x float> %3
+ ret <6 x float> %5
+}
+; CHECK-LABEL: define <4 x float> @fcmp_uge_on_6xfloat(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = fcmp uge <4 x float> %1, %3
+; CHECK-NEXT: %10 = fcmp uge <4 x float> %2, %4
+; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x float> %5, <4 x float> %7
+; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x float> %6, <4 x float> %8
+; CHECK-NEXT: store <4 x float> %12, <4 x float>* %0, align 16
+; CHECK-NEXT: ret <4 x float> %11
+; CHECK-NEXT: }
+
+define <6 x float> @fcmp_ord_on_6xfloat(<6 x float>, <6 x float>, <6 x float>, <6 x float>) {
+entry:
+ %4 = fcmp ord <6 x float> %0, %1
+ %5 = select <6 x i1> %4, <6 x float> %2, <6 x float> %3
+ ret <6 x float> %5
+}
+; CHECK-LABEL: define <4 x float> @fcmp_ord_on_6xfloat(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = fcmp ord <4 x float> %1, %3
+; CHECK-NEXT: %10 = fcmp ord <4 x float> %2, %4
+; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x float> %5, <4 x float> %7
+; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x float> %6, <4 x float> %8
+; CHECK-NEXT: store <4 x float> %12, <4 x float>* %0, align 16
+; CHECK-NEXT: ret <4 x float> %11
+; CHECK-NEXT: }
+
+define <6 x float> @fcmp_uno_on_6xfloat(<6 x float>, <6 x float>, <6 x float>, <6 x float>) {
+entry:
+ %4 = fcmp uno <6 x float> %0, %1
+ %5 = select <6 x i1> %4, <6 x float> %2, <6 x float> %3
+ ret <6 x float> %5
+}
+; CHECK-LABEL: define <4 x float> @fcmp_uno_on_6xfloat(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = fcmp uno <4 x float> %1, %3
+; CHECK-NEXT: %10 = fcmp uno <4 x float> %2, %4
+; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x float> %5, <4 x float> %7
+; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x float> %6, <4 x float> %8
+; CHECK-NEXT: store <4 x float> %12, <4 x float>* %0, align 16
+; CHECK-NEXT: ret <4 x float> %11
+; CHECK-NEXT: }
+
+define <6 x double> @fcmp_true_on_6xdouble(<6 x double>, <6 x double>, <6 x double>, <6 x double>) {
+entry:
+ %4 = fcmp true <6 x double> %0, %1
+ %5 = select <6 x i1> %4, <6 x double> %2, <6 x double> %3
+ ret <6 x double> %5
+}
+; CHECK-LABEL: define <2 x double> @fcmp_true_on_6xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
+; CHECK: entry:
+; CHECK-NEXT: %14 = fcmp true <2 x double> %2, %5
+; CHECK-NEXT: %15 = fcmp true <2 x double> %3, %6
+; CHECK-NEXT: %16 = fcmp true <2 x double> %4, %7
+; CHECK-NEXT: %17 = select <2 x i1> %14, <2 x double> %8, <2 x double> %11
+; CHECK-NEXT: %18 = select <2 x i1> %15, <2 x double> %9, <2 x double> %12
+; CHECK-NEXT: %19 = select <2 x i1> %16, <2 x double> %10, <2 x double> %13
+; CHECK-NEXT: store <2 x double> %18, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %19, <2 x double>* %1, align 16
+; CHECK-NEXT: ret <2 x double> %17
+; CHECK-NEXT: }
+
+define <6 x double> @fcmp_false_on_6xdouble(<6 x double>, <6 x double>, <6 x double>, <6 x double>) {
+entry:
+ %4 = fcmp false <6 x double> %0, %1
+ %5 = select <6 x i1> %4, <6 x double> %2, <6 x double> %3
+ ret <6 x double> %5
+}
+; CHECK-LABEL: define <2 x double> @fcmp_false_on_6xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
+; CHECK: entry:
+; CHECK-NEXT: %14 = fcmp false <2 x double> %2, %5
+; CHECK-NEXT: %15 = fcmp false <2 x double> %3, %6
+; CHECK-NEXT: %16 = fcmp false <2 x double> %4, %7
+; CHECK-NEXT: %17 = select <2 x i1> %14, <2 x double> %8, <2 x double> %11
+; CHECK-NEXT: %18 = select <2 x i1> %15, <2 x double> %9, <2 x double> %12
+; CHECK-NEXT: %19 = select <2 x i1> %16, <2 x double> %10, <2 x double> %13
+; CHECK-NEXT: store <2 x double> %18, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %19, <2 x double>* %1, align 16
+; CHECK-NEXT: ret <2 x double> %17
+; CHECK-NEXT: }
+
+define <6 x double> @fcmp_oeq_on_6xdouble(<6 x double>, <6 x double>, <6 x double>, <6 x double>) {
+entry:
+ %4 = fcmp oeq <6 x double> %0, %1
+ %5 = select <6 x i1> %4, <6 x double> %2, <6 x double> %3
+ ret <6 x double> %5
+}
+; CHECK-LABEL: define <2 x double> @fcmp_oeq_on_6xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
+; CHECK: entry:
+; CHECK-NEXT: %14 = fcmp oeq <2 x double> %2, %5
+; CHECK-NEXT: %15 = fcmp oeq <2 x double> %3, %6
+; CHECK-NEXT: %16 = fcmp oeq <2 x double> %4, %7
+; CHECK-NEXT: %17 = select <2 x i1> %14, <2 x double> %8, <2 x double> %11
+; CHECK-NEXT: %18 = select <2 x i1> %15, <2 x double> %9, <2 x double> %12
+; CHECK-NEXT: %19 = select <2 x i1> %16, <2 x double> %10, <2 x double> %13
+; CHECK-NEXT: store <2 x double> %18, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %19, <2 x double>* %1, align 16
+; CHECK-NEXT: ret <2 x double> %17
+; CHECK-NEXT: }
+
+define <6 x double> @fcmp_ueq_on_6xdouble(<6 x double>, <6 x double>, <6 x double>, <6 x double>) {
+entry:
+ %4 = fcmp ueq <6 x double> %0, %1
+ %5 = select <6 x i1> %4, <6 x double> %2, <6 x double> %3
+ ret <6 x double> %5
+}
+; CHECK-LABEL: define <2 x double> @fcmp_ueq_on_6xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
+; CHECK: entry:
+; CHECK-NEXT: %14 = fcmp ueq <2 x double> %2, %5
+; CHECK-NEXT: %15 = fcmp ueq <2 x double> %3, %6
+; CHECK-NEXT: %16 = fcmp ueq <2 x double> %4, %7
+; CHECK-NEXT: %17 = select <2 x i1> %14, <2 x double> %8, <2 x double> %11
+; CHECK-NEXT: %18 = select <2 x i1> %15, <2 x double> %9, <2 x double> %12
+; CHECK-NEXT: %19 = select <2 x i1> %16, <2 x double> %10, <2 x double> %13
+; CHECK-NEXT: store <2 x double> %18, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %19, <2 x double>* %1, align 16
+; CHECK-NEXT: ret <2 x double> %17
+; CHECK-NEXT: }
+
+define <6 x double> @fcmp_one_on_6xdouble(<6 x double>, <6 x double>, <6 x double>, <6 x double>) {
+entry:
+ %4 = fcmp one <6 x double> %0, %1
+ %5 = select <6 x i1> %4, <6 x double> %2, <6 x double> %3
+ ret <6 x double> %5
+}
+; CHECK-LABEL: define <2 x double> @fcmp_one_on_6xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
+; CHECK: entry:
+; CHECK-NEXT: %14 = fcmp one <2 x double> %2, %5
+; CHECK-NEXT: %15 = fcmp one <2 x double> %3, %6
+; CHECK-NEXT: %16 = fcmp one <2 x double> %4, %7
+; CHECK-NEXT: %17 = select <2 x i1> %14, <2 x double> %8, <2 x double> %11
+; CHECK-NEXT: %18 = select <2 x i1> %15, <2 x double> %9, <2 x double> %12
+; CHECK-NEXT: %19 = select <2 x i1> %16, <2 x double> %10, <2 x double> %13
+; CHECK-NEXT: store <2 x double> %18, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %19, <2 x double>* %1, align 16
+; CHECK-NEXT: ret <2 x double> %17
+; CHECK-NEXT: }
+
+define <6 x double> @fcmp_une_on_6xdouble(<6 x double>, <6 x double>, <6 x double>, <6 x double>) {
+entry:
+ %4 = fcmp une <6 x double> %0, %1
+ %5 = select <6 x i1> %4, <6 x double> %2, <6 x double> %3
+ ret <6 x double> %5
+}
+; CHECK-LABEL: define <2 x double> @fcmp_une_on_6xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
+; CHECK: entry:
+; CHECK-NEXT: %14 = fcmp une <2 x double> %2, %5
+; CHECK-NEXT: %15 = fcmp une <2 x double> %3, %6
+; CHECK-NEXT: %16 = fcmp une <2 x double> %4, %7
+; CHECK-NEXT: %17 = select <2 x i1> %14, <2 x double> %8, <2 x double> %11
+; CHECK-NEXT: %18 = select <2 x i1> %15, <2 x double> %9, <2 x double> %12
+; CHECK-NEXT: %19 = select <2 x i1> %16, <2 x double> %10, <2 x double> %13
+; CHECK-NEXT: store <2 x double> %18, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %19, <2 x double>* %1, align 16
+; CHECK-NEXT: ret <2 x double> %17
+; CHECK-NEXT: }
+
+define <6 x double> @fcmp_ogt_on_6xdouble(<6 x double>, <6 x double>, <6 x double>, <6 x double>) {
+entry:
+ %4 = fcmp ogt <6 x double> %0, %1
+ %5 = select <6 x i1> %4, <6 x double> %2, <6 x double> %3
+ ret <6 x double> %5
+}
+; CHECK-LABEL: define <2 x double> @fcmp_ogt_on_6xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
+; CHECK: entry:
+; CHECK-NEXT: %14 = fcmp ogt <2 x double> %2, %5
+; CHECK-NEXT: %15 = fcmp ogt <2 x double> %3, %6
+; CHECK-NEXT: %16 = fcmp ogt <2 x double> %4, %7
+; CHECK-NEXT: %17 = select <2 x i1> %14, <2 x double> %8, <2 x double> %11
+; CHECK-NEXT: %18 = select <2 x i1> %15, <2 x double> %9, <2 x double> %12
+; CHECK-NEXT: %19 = select <2 x i1> %16, <2 x double> %10, <2 x double> %13
+; CHECK-NEXT: store <2 x double> %18, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %19, <2 x double>* %1, align 16
+; CHECK-NEXT: ret <2 x double> %17
+; CHECK-NEXT: }
+
+define <6 x double> @fcmp_ugt_on_6xdouble(<6 x double>, <6 x double>, <6 x double>, <6 x double>) {
+entry:
+ %4 = fcmp ugt <6 x double> %0, %1
+ %5 = select <6 x i1> %4, <6 x double> %2, <6 x double> %3
+ ret <6 x double> %5
+}
+; CHECK-LABEL: define <2 x double> @fcmp_ugt_on_6xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
+; CHECK: entry:
+; CHECK-NEXT: %14 = fcmp ugt <2 x double> %2, %5
+; CHECK-NEXT: %15 = fcmp ugt <2 x double> %3, %6
+; CHECK-NEXT: %16 = fcmp ugt <2 x double> %4, %7
+; CHECK-NEXT: %17 = select <2 x i1> %14, <2 x double> %8, <2 x double> %11
+; CHECK-NEXT: %18 = select <2 x i1> %15, <2 x double> %9, <2 x double> %12
+; CHECK-NEXT: %19 = select <2 x i1> %16, <2 x double> %10, <2 x double> %13
+; CHECK-NEXT: store <2 x double> %18, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %19, <2 x double>* %1, align 16
+; CHECK-NEXT: ret <2 x double> %17
+; CHECK-NEXT: }
+
+define <6 x double> @fcmp_oge_on_6xdouble(<6 x double>, <6 x double>, <6 x double>, <6 x double>) {
+entry:
+ %4 = fcmp oge <6 x double> %0, %1
+ %5 = select <6 x i1> %4, <6 x double> %2, <6 x double> %3
+ ret <6 x double> %5
+}
+; CHECK-LABEL: define <2 x double> @fcmp_oge_on_6xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
+; CHECK: entry:
+; CHECK-NEXT: %14 = fcmp oge <2 x double> %2, %5
+; CHECK-NEXT: %15 = fcmp oge <2 x double> %3, %6
+; CHECK-NEXT: %16 = fcmp oge <2 x double> %4, %7
+; CHECK-NEXT: %17 = select <2 x i1> %14, <2 x double> %8, <2 x double> %11
+; CHECK-NEXT: %18 = select <2 x i1> %15, <2 x double> %9, <2 x double> %12
+; CHECK-NEXT: %19 = select <2 x i1> %16, <2 x double> %10, <2 x double> %13
+; CHECK-NEXT: store <2 x double> %18, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %19, <2 x double>* %1, align 16
+; CHECK-NEXT: ret <2 x double> %17
+; CHECK-NEXT: }
+
+define <6 x double> @fcmp_uge_on_6xdouble(<6 x double>, <6 x double>, <6 x double>, <6 x double>) {
+entry:
+ %4 = fcmp uge <6 x double> %0, %1
+ %5 = select <6 x i1> %4, <6 x double> %2, <6 x double> %3
+ ret <6 x double> %5
+}
+; CHECK-LABEL: define <2 x double> @fcmp_uge_on_6xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
+; CHECK: entry:
+; CHECK-NEXT: %14 = fcmp uge <2 x double> %2, %5
+; CHECK-NEXT: %15 = fcmp uge <2 x double> %3, %6
+; CHECK-NEXT: %16 = fcmp uge <2 x double> %4, %7
+; CHECK-NEXT: %17 = select <2 x i1> %14, <2 x double> %8, <2 x double> %11
+; CHECK-NEXT: %18 = select <2 x i1> %15, <2 x double> %9, <2 x double> %12
+; CHECK-NEXT: %19 = select <2 x i1> %16, <2 x double> %10, <2 x double> %13
+; CHECK-NEXT: store <2 x double> %18, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %19, <2 x double>* %1, align 16
+; CHECK-NEXT: ret <2 x double> %17
+; CHECK-NEXT: }
+
+define <6 x double> @fcmp_ord_on_6xdouble(<6 x double>, <6 x double>, <6 x double>, <6 x double>) {
+entry:
+ %4 = fcmp ord <6 x double> %0, %1
+ %5 = select <6 x i1> %4, <6 x double> %2, <6 x double> %3
+ ret <6 x double> %5
+}
+; CHECK-LABEL: define <2 x double> @fcmp_ord_on_6xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
+; CHECK: entry:
+; CHECK-NEXT: %14 = fcmp ord <2 x double> %2, %5
+; CHECK-NEXT: %15 = fcmp ord <2 x double> %3, %6
+; CHECK-NEXT: %16 = fcmp ord <2 x double> %4, %7
+; CHECK-NEXT: %17 = select <2 x i1> %14, <2 x double> %8, <2 x double> %11
+; CHECK-NEXT: %18 = select <2 x i1> %15, <2 x double> %9, <2 x double> %12
+; CHECK-NEXT: %19 = select <2 x i1> %16, <2 x double> %10, <2 x double> %13
+; CHECK-NEXT: store <2 x double> %18, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %19, <2 x double>* %1, align 16
+; CHECK-NEXT: ret <2 x double> %17
+; CHECK-NEXT: }
+
+define <6 x double> @fcmp_uno_on_6xdouble(<6 x double>, <6 x double>, <6 x double>, <6 x double>) {
+entry:
+ %4 = fcmp uno <6 x double> %0, %1
+ %5 = select <6 x i1> %4, <6 x double> %2, <6 x double> %3
+ ret <6 x double> %5
+}
+; CHECK-LABEL: define <2 x double> @fcmp_uno_on_6xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
+; CHECK: entry:
+; CHECK-NEXT: %14 = fcmp uno <2 x double> %2, %5
+; CHECK-NEXT: %15 = fcmp uno <2 x double> %3, %6
+; CHECK-NEXT: %16 = fcmp uno <2 x double> %4, %7
+; CHECK-NEXT: %17 = select <2 x i1> %14, <2 x double> %8, <2 x double> %11
+; CHECK-NEXT: %18 = select <2 x i1> %15, <2 x double> %9, <2 x double> %12
+; CHECK-NEXT: %19 = select <2 x i1> %16, <2 x double> %10, <2 x double> %13
+; CHECK-NEXT: store <2 x double> %18, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %19, <2 x double>* %1, align 16
+; CHECK-NEXT: ret <2 x double> %17
+; CHECK-NEXT: }
+
+define <8 x float> @fcmp_true_on_8xfloat(<8 x float>, <8 x float>, <8 x float>, <8 x float>) {
+entry:
+ %4 = fcmp true <8 x float> %0, %1
+ %5 = select <8 x i1> %4, <8 x float> %2, <8 x float> %3
+ ret <8 x float> %5
+}
+; CHECK-LABEL: define <4 x float> @fcmp_true_on_8xfloat(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = fcmp true <4 x float> %1, %3
+; CHECK-NEXT: %10 = fcmp true <4 x float> %2, %4
+; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x float> %5, <4 x float> %7
+; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x float> %6, <4 x float> %8
+; CHECK-NEXT: store <4 x float> %12, <4 x float>* %0, align 16
+; CHECK-NEXT: ret <4 x float> %11
+; CHECK-NEXT: }
+
+define <8 x float> @fcmp_false_on_8xfloat(<8 x float>, <8 x float>, <8 x float>, <8 x float>) {
+entry:
+ %4 = fcmp false <8 x float> %0, %1
+ %5 = select <8 x i1> %4, <8 x float> %2, <8 x float> %3
+ ret <8 x float> %5
+}
+; CHECK-LABEL: define <4 x float> @fcmp_false_on_8xfloat(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = fcmp false <4 x float> %1, %3
+; CHECK-NEXT: %10 = fcmp false <4 x float> %2, %4
+; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x float> %5, <4 x float> %7
+; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x float> %6, <4 x float> %8
+; CHECK-NEXT: store <4 x float> %12, <4 x float>* %0, align 16
+; CHECK-NEXT: ret <4 x float> %11
+; CHECK-NEXT: }
+
+define <8 x float> @fcmp_oeq_on_8xfloat(<8 x float>, <8 x float>, <8 x float>, <8 x float>) {
+entry:
+ %4 = fcmp oeq <8 x float> %0, %1
+ %5 = select <8 x i1> %4, <8 x float> %2, <8 x float> %3
+ ret <8 x float> %5
+}
+; CHECK-LABEL: define <4 x float> @fcmp_oeq_on_8xfloat(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = fcmp oeq <4 x float> %1, %3
+; CHECK-NEXT: %10 = fcmp oeq <4 x float> %2, %4
+; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x float> %5, <4 x float> %7
+; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x float> %6, <4 x float> %8
+; CHECK-NEXT: store <4 x float> %12, <4 x float>* %0, align 16
+; CHECK-NEXT: ret <4 x float> %11
+; CHECK-NEXT: }
+
+define <8 x float> @fcmp_ueq_on_8xfloat(<8 x float>, <8 x float>, <8 x float>, <8 x float>) {
+entry:
+ %4 = fcmp ueq <8 x float> %0, %1
+ %5 = select <8 x i1> %4, <8 x float> %2, <8 x float> %3
+ ret <8 x float> %5
+}
+; CHECK-LABEL: define <4 x float> @fcmp_ueq_on_8xfloat(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = fcmp ueq <4 x float> %1, %3
+; CHECK-NEXT: %10 = fcmp ueq <4 x float> %2, %4
+; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x float> %5, <4 x float> %7
+; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x float> %6, <4 x float> %8
+; CHECK-NEXT: store <4 x float> %12, <4 x float>* %0, align 16
+; CHECK-NEXT: ret <4 x float> %11
+; CHECK-NEXT: }
+
+define <8 x float> @fcmp_one_on_8xfloat(<8 x float>, <8 x float>, <8 x float>, <8 x float>) {
+entry:
+ %4 = fcmp one <8 x float> %0, %1
+ %5 = select <8 x i1> %4, <8 x float> %2, <8 x float> %3
+ ret <8 x float> %5
+}
+; CHECK-LABEL: define <4 x float> @fcmp_one_on_8xfloat(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = fcmp one <4 x float> %1, %3
+; CHECK-NEXT: %10 = fcmp one <4 x float> %2, %4
+; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x float> %5, <4 x float> %7
+; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x float> %6, <4 x float> %8
+; CHECK-NEXT: store <4 x float> %12, <4 x float>* %0, align 16
+; CHECK-NEXT: ret <4 x float> %11
+; CHECK-NEXT: }
+
+define <8 x float> @fcmp_une_on_8xfloat(<8 x float>, <8 x float>, <8 x float>, <8 x float>) {
+entry:
+ %4 = fcmp une <8 x float> %0, %1
+ %5 = select <8 x i1> %4, <8 x float> %2, <8 x float> %3
+ ret <8 x float> %5
+}
+; CHECK-LABEL: define <4 x float> @fcmp_une_on_8xfloat(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = fcmp une <4 x float> %1, %3
+; CHECK-NEXT: %10 = fcmp une <4 x float> %2, %4
+; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x float> %5, <4 x float> %7
+; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x float> %6, <4 x float> %8
+; CHECK-NEXT: store <4 x float> %12, <4 x float>* %0, align 16
+; CHECK-NEXT: ret <4 x float> %11
+; CHECK-NEXT: }
+
+define <8 x float> @fcmp_ogt_on_8xfloat(<8 x float>, <8 x float>, <8 x float>, <8 x float>) {
+entry:
+ %4 = fcmp ogt <8 x float> %0, %1
+ %5 = select <8 x i1> %4, <8 x float> %2, <8 x float> %3
+ ret <8 x float> %5
+}
+; CHECK-LABEL: define <4 x float> @fcmp_ogt_on_8xfloat(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = fcmp ogt <4 x float> %1, %3
+; CHECK-NEXT: %10 = fcmp ogt <4 x float> %2, %4
+; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x float> %5, <4 x float> %7
+; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x float> %6, <4 x float> %8
+; CHECK-NEXT: store <4 x float> %12, <4 x float>* %0, align 16
+; CHECK-NEXT: ret <4 x float> %11
+; CHECK-NEXT: }
+
+define <8 x float> @fcmp_ugt_on_8xfloat(<8 x float>, <8 x float>, <8 x float>, <8 x float>) {
+entry:
+ %4 = fcmp ugt <8 x float> %0, %1
+ %5 = select <8 x i1> %4, <8 x float> %2, <8 x float> %3
+ ret <8 x float> %5
+}
+; CHECK-LABEL: define <4 x float> @fcmp_ugt_on_8xfloat(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = fcmp ugt <4 x float> %1, %3
+; CHECK-NEXT: %10 = fcmp ugt <4 x float> %2, %4
+; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x float> %5, <4 x float> %7
+; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x float> %6, <4 x float> %8
+; CHECK-NEXT: store <4 x float> %12, <4 x float>* %0, align 16
+; CHECK-NEXT: ret <4 x float> %11
+; CHECK-NEXT: }
+
+define <8 x float> @fcmp_oge_on_8xfloat(<8 x float>, <8 x float>, <8 x float>, <8 x float>) {
+entry:
+ %4 = fcmp oge <8 x float> %0, %1
+ %5 = select <8 x i1> %4, <8 x float> %2, <8 x float> %3
+ ret <8 x float> %5
+}
+; CHECK-LABEL: define <4 x float> @fcmp_oge_on_8xfloat(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = fcmp oge <4 x float> %1, %3
+; CHECK-NEXT: %10 = fcmp oge <4 x float> %2, %4
+; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x float> %5, <4 x float> %7
+; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x float> %6, <4 x float> %8
+; CHECK-NEXT: store <4 x float> %12, <4 x float>* %0, align 16
+; CHECK-NEXT: ret <4 x float> %11
+; CHECK-NEXT: }
+
+define <8 x float> @fcmp_uge_on_8xfloat(<8 x float>, <8 x float>, <8 x float>, <8 x float>) {
+entry:
+ %4 = fcmp uge <8 x float> %0, %1
+ %5 = select <8 x i1> %4, <8 x float> %2, <8 x float> %3
+ ret <8 x float> %5
+}
+; CHECK-LABEL: define <4 x float> @fcmp_uge_on_8xfloat(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = fcmp uge <4 x float> %1, %3
+; CHECK-NEXT: %10 = fcmp uge <4 x float> %2, %4
+; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x float> %5, <4 x float> %7
+; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x float> %6, <4 x float> %8
+; CHECK-NEXT: store <4 x float> %12, <4 x float>* %0, align 16
+; CHECK-NEXT: ret <4 x float> %11
+; CHECK-NEXT: }
+
+define <8 x float> @fcmp_ord_on_8xfloat(<8 x float>, <8 x float>, <8 x float>, <8 x float>) {
+entry:
+ %4 = fcmp ord <8 x float> %0, %1
+ %5 = select <8 x i1> %4, <8 x float> %2, <8 x float> %3
+ ret <8 x float> %5
+}
+; CHECK-LABEL: define <4 x float> @fcmp_ord_on_8xfloat(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = fcmp ord <4 x float> %1, %3
+; CHECK-NEXT: %10 = fcmp ord <4 x float> %2, %4
+; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x float> %5, <4 x float> %7
+; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x float> %6, <4 x float> %8
+; CHECK-NEXT: store <4 x float> %12, <4 x float>* %0, align 16
+; CHECK-NEXT: ret <4 x float> %11
+; CHECK-NEXT: }
+
+define <8 x float> @fcmp_uno_on_8xfloat(<8 x float>, <8 x float>, <8 x float>, <8 x float>) {
+entry:
+ %4 = fcmp uno <8 x float> %0, %1
+ %5 = select <8 x i1> %4, <8 x float> %2, <8 x float> %3
+ ret <8 x float> %5
+}
+; CHECK-LABEL: define <4 x float> @fcmp_uno_on_8xfloat(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = fcmp uno <4 x float> %1, %3
+; CHECK-NEXT: %10 = fcmp uno <4 x float> %2, %4
+; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x float> %5, <4 x float> %7
+; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x float> %6, <4 x float> %8
+; CHECK-NEXT: store <4 x float> %12, <4 x float>* %0, align 16
+; CHECK-NEXT: ret <4 x float> %11
+; CHECK-NEXT: }
+
+define <8 x double> @fcmp_true_on_8xdouble(<8 x double>, <8 x double>, <8 x double>, <8 x double>) {
+entry:
+ %4 = fcmp true <8 x double> %0, %1
+ %5 = select <8 x i1> %4, <8 x double> %2, <8 x double> %3
+ ret <8 x double> %5
+}
+; CHECK-LABEL: define <2 x double> @fcmp_true_on_8xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
+; CHECK: entry:
+; CHECK-NEXT: %19 = fcmp true <2 x double> %3, %7
+; CHECK-NEXT: %20 = fcmp true <2 x double> %4, %8
+; CHECK-NEXT: %21 = fcmp true <2 x double> %5, %9
+; CHECK-NEXT: %22 = fcmp true <2 x double> %6, %10
+; CHECK-NEXT: %23 = select <2 x i1> %19, <2 x double> %11, <2 x double> %15
+; CHECK-NEXT: %24 = select <2 x i1> %20, <2 x double> %12, <2 x double> %16
+; CHECK-NEXT: %25 = select <2 x i1> %21, <2 x double> %13, <2 x double> %17
+; CHECK-NEXT: %26 = select <2 x i1> %22, <2 x double> %14, <2 x double> %18
+; CHECK-NEXT: store <2 x double> %24, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %25, <2 x double>* %1, align 16
+; CHECK-NEXT: store <2 x double> %26, <2 x double>* %2, align 16
+; CHECK-NEXT: ret <2 x double> %23
+; CHECK-NEXT: }
+
+define <8 x double> @fcmp_false_on_8xdouble(<8 x double>, <8 x double>, <8 x double>, <8 x double>) {
+entry:
+ %4 = fcmp false <8 x double> %0, %1
+ %5 = select <8 x i1> %4, <8 x double> %2, <8 x double> %3
+ ret <8 x double> %5
+}
+; CHECK-LABEL: define <2 x double> @fcmp_false_on_8xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
+; CHECK: entry:
+; CHECK-NEXT: %19 = fcmp false <2 x double> %3, %7
+; CHECK-NEXT: %20 = fcmp false <2 x double> %4, %8
+; CHECK-NEXT: %21 = fcmp false <2 x double> %5, %9
+; CHECK-NEXT: %22 = fcmp false <2 x double> %6, %10
+; CHECK-NEXT: %23 = select <2 x i1> %19, <2 x double> %11, <2 x double> %15
+; CHECK-NEXT: %24 = select <2 x i1> %20, <2 x double> %12, <2 x double> %16
+; CHECK-NEXT: %25 = select <2 x i1> %21, <2 x double> %13, <2 x double> %17
+; CHECK-NEXT: %26 = select <2 x i1> %22, <2 x double> %14, <2 x double> %18
+; CHECK-NEXT: store <2 x double> %24, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %25, <2 x double>* %1, align 16
+; CHECK-NEXT: store <2 x double> %26, <2 x double>* %2, align 16
+; CHECK-NEXT: ret <2 x double> %23
+; CHECK-NEXT: }
+
+define <8 x double> @fcmp_oeq_on_8xdouble(<8 x double>, <8 x double>, <8 x double>, <8 x double>) {
+entry:
+ %4 = fcmp oeq <8 x double> %0, %1
+ %5 = select <8 x i1> %4, <8 x double> %2, <8 x double> %3
+ ret <8 x double> %5
+}
+; CHECK-LABEL: define <2 x double> @fcmp_oeq_on_8xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
+; CHECK: entry:
+; CHECK-NEXT: %19 = fcmp oeq <2 x double> %3, %7
+; CHECK-NEXT: %20 = fcmp oeq <2 x double> %4, %8
+; CHECK-NEXT: %21 = fcmp oeq <2 x double> %5, %9
+; CHECK-NEXT: %22 = fcmp oeq <2 x double> %6, %10
+; CHECK-NEXT: %23 = select <2 x i1> %19, <2 x double> %11, <2 x double> %15
+; CHECK-NEXT: %24 = select <2 x i1> %20, <2 x double> %12, <2 x double> %16
+; CHECK-NEXT: %25 = select <2 x i1> %21, <2 x double> %13, <2 x double> %17
+; CHECK-NEXT: %26 = select <2 x i1> %22, <2 x double> %14, <2 x double> %18
+; CHECK-NEXT: store <2 x double> %24, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %25, <2 x double>* %1, align 16
+; CHECK-NEXT: store <2 x double> %26, <2 x double>* %2, align 16
+; CHECK-NEXT: ret <2 x double> %23
+; CHECK-NEXT: }
+
+define <8 x double> @fcmp_ueq_on_8xdouble(<8 x double>, <8 x double>, <8 x double>, <8 x double>) {
+entry:
+ %4 = fcmp ueq <8 x double> %0, %1
+ %5 = select <8 x i1> %4, <8 x double> %2, <8 x double> %3
+ ret <8 x double> %5
+}
+; CHECK-LABEL: define <2 x double> @fcmp_ueq_on_8xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
+; CHECK: entry:
+; CHECK-NEXT: %19 = fcmp ueq <2 x double> %3, %7
+; CHECK-NEXT: %20 = fcmp ueq <2 x double> %4, %8
+; CHECK-NEXT: %21 = fcmp ueq <2 x double> %5, %9
+; CHECK-NEXT: %22 = fcmp ueq <2 x double> %6, %10
+; CHECK-NEXT: %23 = select <2 x i1> %19, <2 x double> %11, <2 x double> %15
+; CHECK-NEXT: %24 = select <2 x i1> %20, <2 x double> %12, <2 x double> %16
+; CHECK-NEXT: %25 = select <2 x i1> %21, <2 x double> %13, <2 x double> %17
+; CHECK-NEXT: %26 = select <2 x i1> %22, <2 x double> %14, <2 x double> %18
+; CHECK-NEXT: store <2 x double> %24, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %25, <2 x double>* %1, align 16
+; CHECK-NEXT: store <2 x double> %26, <2 x double>* %2, align 16
+; CHECK-NEXT: ret <2 x double> %23
+; CHECK-NEXT: }
+
+define <8 x double> @fcmp_one_on_8xdouble(<8 x double>, <8 x double>, <8 x double>, <8 x double>) {
+entry:
+ %4 = fcmp one <8 x double> %0, %1
+ %5 = select <8 x i1> %4, <8 x double> %2, <8 x double> %3
+ ret <8 x double> %5
+}
+; CHECK-LABEL: define <2 x double> @fcmp_one_on_8xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
+; CHECK: entry:
+; CHECK-NEXT: %19 = fcmp one <2 x double> %3, %7
+; CHECK-NEXT: %20 = fcmp one <2 x double> %4, %8
+; CHECK-NEXT: %21 = fcmp one <2 x double> %5, %9
+; CHECK-NEXT: %22 = fcmp one <2 x double> %6, %10
+; CHECK-NEXT: %23 = select <2 x i1> %19, <2 x double> %11, <2 x double> %15
+; CHECK-NEXT: %24 = select <2 x i1> %20, <2 x double> %12, <2 x double> %16
+; CHECK-NEXT: %25 = select <2 x i1> %21, <2 x double> %13, <2 x double> %17
+; CHECK-NEXT: %26 = select <2 x i1> %22, <2 x double> %14, <2 x double> %18
+; CHECK-NEXT: store <2 x double> %24, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %25, <2 x double>* %1, align 16
+; CHECK-NEXT: store <2 x double> %26, <2 x double>* %2, align 16
+; CHECK-NEXT: ret <2 x double> %23
+; CHECK-NEXT: }
+
+define <8 x double> @fcmp_une_on_8xdouble(<8 x double>, <8 x double>, <8 x double>, <8 x double>) {
+entry:
+ %4 = fcmp une <8 x double> %0, %1
+ %5 = select <8 x i1> %4, <8 x double> %2, <8 x double> %3
+ ret <8 x double> %5
+}
+; CHECK-LABEL: define <2 x double> @fcmp_une_on_8xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
+; CHECK: entry:
+; CHECK-NEXT: %19 = fcmp une <2 x double> %3, %7
+; CHECK-NEXT: %20 = fcmp une <2 x double> %4, %8
+; CHECK-NEXT: %21 = fcmp une <2 x double> %5, %9
+; CHECK-NEXT: %22 = fcmp une <2 x double> %6, %10
+; CHECK-NEXT: %23 = select <2 x i1> %19, <2 x double> %11, <2 x double> %15
+; CHECK-NEXT: %24 = select <2 x i1> %20, <2 x double> %12, <2 x double> %16
+; CHECK-NEXT: %25 = select <2 x i1> %21, <2 x double> %13, <2 x double> %17
+; CHECK-NEXT: %26 = select <2 x i1> %22, <2 x double> %14, <2 x double> %18
+; CHECK-NEXT: store <2 x double> %24, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %25, <2 x double>* %1, align 16
+; CHECK-NEXT: store <2 x double> %26, <2 x double>* %2, align 16
+; CHECK-NEXT: ret <2 x double> %23
+; CHECK-NEXT: }
+
+define <8 x double> @fcmp_ogt_on_8xdouble(<8 x double>, <8 x double>, <8 x double>, <8 x double>) {
+entry:
+ %4 = fcmp ogt <8 x double> %0, %1
+ %5 = select <8 x i1> %4, <8 x double> %2, <8 x double> %3
+ ret <8 x double> %5
+}
+; CHECK-LABEL: define <2 x double> @fcmp_ogt_on_8xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
+; CHECK: entry:
+; CHECK-NEXT: %19 = fcmp ogt <2 x double> %3, %7
+; CHECK-NEXT: %20 = fcmp ogt <2 x double> %4, %8
+; CHECK-NEXT: %21 = fcmp ogt <2 x double> %5, %9
+; CHECK-NEXT: %22 = fcmp ogt <2 x double> %6, %10
+; CHECK-NEXT: %23 = select <2 x i1> %19, <2 x double> %11, <2 x double> %15
+; CHECK-NEXT: %24 = select <2 x i1> %20, <2 x double> %12, <2 x double> %16
+; CHECK-NEXT: %25 = select <2 x i1> %21, <2 x double> %13, <2 x double> %17
+; CHECK-NEXT: %26 = select <2 x i1> %22, <2 x double> %14, <2 x double> %18
+; CHECK-NEXT: store <2 x double> %24, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %25, <2 x double>* %1, align 16
+; CHECK-NEXT: store <2 x double> %26, <2 x double>* %2, align 16
+; CHECK-NEXT: ret <2 x double> %23
+; CHECK-NEXT: }
+
+define <8 x double> @fcmp_ugt_on_8xdouble(<8 x double>, <8 x double>, <8 x double>, <8 x double>) {
+entry:
+ %4 = fcmp ugt <8 x double> %0, %1
+ %5 = select <8 x i1> %4, <8 x double> %2, <8 x double> %3
+ ret <8 x double> %5
+}
+; CHECK-LABEL: define <2 x double> @fcmp_ugt_on_8xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
+; CHECK: entry:
+; CHECK-NEXT: %19 = fcmp ugt <2 x double> %3, %7
+; CHECK-NEXT: %20 = fcmp ugt <2 x double> %4, %8
+; CHECK-NEXT: %21 = fcmp ugt <2 x double> %5, %9
+; CHECK-NEXT: %22 = fcmp ugt <2 x double> %6, %10
+; CHECK-NEXT: %23 = select <2 x i1> %19, <2 x double> %11, <2 x double> %15
+; CHECK-NEXT: %24 = select <2 x i1> %20, <2 x double> %12, <2 x double> %16
+; CHECK-NEXT: %25 = select <2 x i1> %21, <2 x double> %13, <2 x double> %17
+; CHECK-NEXT: %26 = select <2 x i1> %22, <2 x double> %14, <2 x double> %18
+; CHECK-NEXT: store <2 x double> %24, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %25, <2 x double>* %1, align 16
+; CHECK-NEXT: store <2 x double> %26, <2 x double>* %2, align 16
+; CHECK-NEXT: ret <2 x double> %23
+; CHECK-NEXT: }
+
+define <8 x double> @fcmp_oge_on_8xdouble(<8 x double>, <8 x double>, <8 x double>, <8 x double>) {
+entry:
+ %4 = fcmp oge <8 x double> %0, %1
+ %5 = select <8 x i1> %4, <8 x double> %2, <8 x double> %3
+ ret <8 x double> %5
+}
+; CHECK-LABEL: define <2 x double> @fcmp_oge_on_8xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
+; CHECK: entry:
+; CHECK-NEXT: %19 = fcmp oge <2 x double> %3, %7
+; CHECK-NEXT: %20 = fcmp oge <2 x double> %4, %8
+; CHECK-NEXT: %21 = fcmp oge <2 x double> %5, %9
+; CHECK-NEXT: %22 = fcmp oge <2 x double> %6, %10
+; CHECK-NEXT: %23 = select <2 x i1> %19, <2 x double> %11, <2 x double> %15
+; CHECK-NEXT: %24 = select <2 x i1> %20, <2 x double> %12, <2 x double> %16
+; CHECK-NEXT: %25 = select <2 x i1> %21, <2 x double> %13, <2 x double> %17
+; CHECK-NEXT: %26 = select <2 x i1> %22, <2 x double> %14, <2 x double> %18
+; CHECK-NEXT: store <2 x double> %24, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %25, <2 x double>* %1, align 16
+; CHECK-NEXT: store <2 x double> %26, <2 x double>* %2, align 16
+; CHECK-NEXT: ret <2 x double> %23
+; CHECK-NEXT: }
+
+define <8 x double> @fcmp_uge_on_8xdouble(<8 x double>, <8 x double>, <8 x double>, <8 x double>) {
+entry:
+ %4 = fcmp uge <8 x double> %0, %1
+ %5 = select <8 x i1> %4, <8 x double> %2, <8 x double> %3
+ ret <8 x double> %5
+}
+; CHECK-LABEL: define <2 x double> @fcmp_uge_on_8xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
+; CHECK: entry:
+; CHECK-NEXT: %19 = fcmp uge <2 x double> %3, %7
+; CHECK-NEXT: %20 = fcmp uge <2 x double> %4, %8
+; CHECK-NEXT: %21 = fcmp uge <2 x double> %5, %9
+; CHECK-NEXT: %22 = fcmp uge <2 x double> %6, %10
+; CHECK-NEXT: %23 = select <2 x i1> %19, <2 x double> %11, <2 x double> %15
+; CHECK-NEXT: %24 = select <2 x i1> %20, <2 x double> %12, <2 x double> %16
+; CHECK-NEXT: %25 = select <2 x i1> %21, <2 x double> %13, <2 x double> %17
+; CHECK-NEXT: %26 = select <2 x i1> %22, <2 x double> %14, <2 x double> %18
+; CHECK-NEXT: store <2 x double> %24, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %25, <2 x double>* %1, align 16
+; CHECK-NEXT: store <2 x double> %26, <2 x double>* %2, align 16
+; CHECK-NEXT: ret <2 x double> %23
+; CHECK-NEXT: }
+
+define <8 x double> @fcmp_ord_on_8xdouble(<8 x double>, <8 x double>, <8 x double>, <8 x double>) {
+entry:
+ %4 = fcmp ord <8 x double> %0, %1
+ %5 = select <8 x i1> %4, <8 x double> %2, <8 x double> %3
+ ret <8 x double> %5
+}
+; CHECK-LABEL: define <2 x double> @fcmp_ord_on_8xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
+; CHECK: entry:
+; CHECK-NEXT: %19 = fcmp ord <2 x double> %3, %7
+; CHECK-NEXT: %20 = fcmp ord <2 x double> %4, %8
+; CHECK-NEXT: %21 = fcmp ord <2 x double> %5, %9
+; CHECK-NEXT: %22 = fcmp ord <2 x double> %6, %10
+; CHECK-NEXT: %23 = select <2 x i1> %19, <2 x double> %11, <2 x double> %15
+; CHECK-NEXT: %24 = select <2 x i1> %20, <2 x double> %12, <2 x double> %16
+; CHECK-NEXT: %25 = select <2 x i1> %21, <2 x double> %13, <2 x double> %17
+; CHECK-NEXT: %26 = select <2 x i1> %22, <2 x double> %14, <2 x double> %18
+; CHECK-NEXT: store <2 x double> %24, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %25, <2 x double>* %1, align 16
+; CHECK-NEXT: store <2 x double> %26, <2 x double>* %2, align 16
+; CHECK-NEXT: ret <2 x double> %23
+; CHECK-NEXT: }
+
+define <8 x double> @fcmp_uno_on_8xdouble(<8 x double>, <8 x double>, <8 x double>, <8 x double>) {
+entry:
+ %4 = fcmp uno <8 x double> %0, %1
+ %5 = select <8 x i1> %4, <8 x double> %2, <8 x double> %3
+ ret <8 x double> %5
+}
+; CHECK-LABEL: define <2 x double> @fcmp_uno_on_8xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
+; CHECK: entry:
+; CHECK-NEXT: %19 = fcmp uno <2 x double> %3, %7
+; CHECK-NEXT: %20 = fcmp uno <2 x double> %4, %8
+; CHECK-NEXT: %21 = fcmp uno <2 x double> %5, %9
+; CHECK-NEXT: %22 = fcmp uno <2 x double> %6, %10
+; CHECK-NEXT: %23 = select <2 x i1> %19, <2 x double> %11, <2 x double> %15
+; CHECK-NEXT: %24 = select <2 x i1> %20, <2 x double> %12, <2 x double> %16
+; CHECK-NEXT: %25 = select <2 x i1> %21, <2 x double> %13, <2 x double> %17
+; CHECK-NEXT: %26 = select <2 x i1> %22, <2 x double> %14, <2 x double> %18
+; CHECK-NEXT: store <2 x double> %24, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %25, <2 x double>* %1, align 16
+; CHECK-NEXT: store <2 x double> %26, <2 x double>* %2, align 16
+; CHECK-NEXT: ret <2 x double> %23
+; CHECK-NEXT: }
+
+define <12 x float> @fcmp_true_on_12xfloat(<12 x float>, <12 x float>, <12 x float>, <12 x float>) {
+entry:
+ %4 = fcmp true <12 x float> %0, %1
+ %5 = select <12 x i1> %4, <12 x float> %2, <12 x float> %3
+ ret <12 x float> %5
+}
+; CHECK-LABEL: define <4 x float> @fcmp_true_on_12xfloat(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>) {
+; CHECK: entry:
+; CHECK-NEXT: %14 = fcmp true <4 x float> %2, %5
+; CHECK-NEXT: %15 = fcmp true <4 x float> %3, %6
+; CHECK-NEXT: %16 = fcmp true <4 x float> %4, %7
+; CHECK-NEXT: %17 = select <4 x i1> %14, <4 x float> %8, <4 x float> %11
+; CHECK-NEXT: %18 = select <4 x i1> %15, <4 x float> %9, <4 x float> %12
+; CHECK-NEXT: %19 = select <4 x i1> %16, <4 x float> %10, <4 x float> %13
+; CHECK-NEXT: store <4 x float> %18, <4 x float>* %0, align 16
+; CHECK-NEXT: store <4 x float> %19, <4 x float>* %1, align 16
+; CHECK-NEXT: ret <4 x float> %17
+; CHECK-NEXT: }
+
+define <12 x float> @fcmp_false_on_12xfloat(<12 x float>, <12 x float>, <12 x float>, <12 x float>) {
+entry:
+ %4 = fcmp false <12 x float> %0, %1
+ %5 = select <12 x i1> %4, <12 x float> %2, <12 x float> %3
+ ret <12 x float> %5
+}
+; CHECK-LABEL: define <4 x float> @fcmp_false_on_12xfloat(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>) {
+; CHECK: entry:
+; CHECK-NEXT: %14 = fcmp false <4 x float> %2, %5
+; CHECK-NEXT: %15 = fcmp false <4 x float> %3, %6
+; CHECK-NEXT: %16 = fcmp false <4 x float> %4, %7
+; CHECK-NEXT: %17 = select <4 x i1> %14, <4 x float> %8, <4 x float> %11
+; CHECK-NEXT: %18 = select <4 x i1> %15, <4 x float> %9, <4 x float> %12
+; CHECK-NEXT: %19 = select <4 x i1> %16, <4 x float> %10, <4 x float> %13
+; CHECK-NEXT: store <4 x float> %18, <4 x float>* %0, align 16
+; CHECK-NEXT: store <4 x float> %19, <4 x float>* %1, align 16
+; CHECK-NEXT: ret <4 x float> %17
+; CHECK-NEXT: }
+
+define <12 x float> @fcmp_oeq_on_12xfloat(<12 x float>, <12 x float>, <12 x float>, <12 x float>) {
+entry:
+ %4 = fcmp oeq <12 x float> %0, %1
+ %5 = select <12 x i1> %4, <12 x float> %2, <12 x float> %3
+ ret <12 x float> %5
+}
+; CHECK-LABEL: define <4 x float> @fcmp_oeq_on_12xfloat(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>) {
+; CHECK: entry:
+; CHECK-NEXT: %14 = fcmp oeq <4 x float> %2, %5
+; CHECK-NEXT: %15 = fcmp oeq <4 x float> %3, %6
+; CHECK-NEXT: %16 = fcmp oeq <4 x float> %4, %7
+; CHECK-NEXT: %17 = select <4 x i1> %14, <4 x float> %8, <4 x float> %11
+; CHECK-NEXT: %18 = select <4 x i1> %15, <4 x float> %9, <4 x float> %12
+; CHECK-NEXT: %19 = select <4 x i1> %16, <4 x float> %10, <4 x float> %13
+; CHECK-NEXT: store <4 x float> %18, <4 x float>* %0, align 16
+; CHECK-NEXT: store <4 x float> %19, <4 x float>* %1, align 16
+; CHECK-NEXT: ret <4 x float> %17
+; CHECK-NEXT: }
+
+define <12 x float> @fcmp_ueq_on_12xfloat(<12 x float>, <12 x float>, <12 x float>, <12 x float>) {
+entry:
+ %4 = fcmp ueq <12 x float> %0, %1
+ %5 = select <12 x i1> %4, <12 x float> %2, <12 x float> %3
+ ret <12 x float> %5
+}
+; CHECK-LABEL: define <4 x float> @fcmp_ueq_on_12xfloat(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>) {
+; CHECK: entry:
+; CHECK-NEXT: %14 = fcmp ueq <4 x float> %2, %5
+; CHECK-NEXT: %15 = fcmp ueq <4 x float> %3, %6
+; CHECK-NEXT: %16 = fcmp ueq <4 x float> %4, %7
+; CHECK-NEXT: %17 = select <4 x i1> %14, <4 x float> %8, <4 x float> %11
+; CHECK-NEXT: %18 = select <4 x i1> %15, <4 x float> %9, <4 x float> %12
+; CHECK-NEXT: %19 = select <4 x i1> %16, <4 x float> %10, <4 x float> %13
+; CHECK-NEXT: store <4 x float> %18, <4 x float>* %0, align 16
+; CHECK-NEXT: store <4 x float> %19, <4 x float>* %1, align 16
+; CHECK-NEXT: ret <4 x float> %17
+; CHECK-NEXT: }
+
+define <12 x float> @fcmp_one_on_12xfloat(<12 x float>, <12 x float>, <12 x float>, <12 x float>) {
+entry:
+ %4 = fcmp one <12 x float> %0, %1
+ %5 = select <12 x i1> %4, <12 x float> %2, <12 x float> %3
+ ret <12 x float> %5
+}
+; CHECK-LABEL: define <4 x float> @fcmp_one_on_12xfloat(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>) {
+; CHECK: entry:
+; CHECK-NEXT: %14 = fcmp one <4 x float> %2, %5
+; CHECK-NEXT: %15 = fcmp one <4 x float> %3, %6
+; CHECK-NEXT: %16 = fcmp one <4 x float> %4, %7
+; CHECK-NEXT: %17 = select <4 x i1> %14, <4 x float> %8, <4 x float> %11
+; CHECK-NEXT: %18 = select <4 x i1> %15, <4 x float> %9, <4 x float> %12
+; CHECK-NEXT: %19 = select <4 x i1> %16, <4 x float> %10, <4 x float> %13
+; CHECK-NEXT: store <4 x float> %18, <4 x float>* %0, align 16
+; CHECK-NEXT: store <4 x float> %19, <4 x float>* %1, align 16
+; CHECK-NEXT: ret <4 x float> %17
+; CHECK-NEXT: }
+
+define <12 x float> @fcmp_une_on_12xfloat(<12 x float>, <12 x float>, <12 x float>, <12 x float>) {
+entry:
+ %4 = fcmp une <12 x float> %0, %1
+ %5 = select <12 x i1> %4, <12 x float> %2, <12 x float> %3
+ ret <12 x float> %5
+}
+; CHECK-LABEL: define <4 x float> @fcmp_une_on_12xfloat(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>) {
+; CHECK: entry:
+; CHECK-NEXT: %14 = fcmp une <4 x float> %2, %5
+; CHECK-NEXT: %15 = fcmp une <4 x float> %3, %6
+; CHECK-NEXT: %16 = fcmp une <4 x float> %4, %7
+; CHECK-NEXT: %17 = select <4 x i1> %14, <4 x float> %8, <4 x float> %11
+; CHECK-NEXT: %18 = select <4 x i1> %15, <4 x float> %9, <4 x float> %12
+; CHECK-NEXT: %19 = select <4 x i1> %16, <4 x float> %10, <4 x float> %13
+; CHECK-NEXT: store <4 x float> %18, <4 x float>* %0, align 16
+; CHECK-NEXT: store <4 x float> %19, <4 x float>* %1, align 16
+; CHECK-NEXT: ret <4 x float> %17
+; CHECK-NEXT: }
+
+define <12 x float> @fcmp_ogt_on_12xfloat(<12 x float>, <12 x float>, <12 x float>, <12 x float>) {
+entry:
+ %4 = fcmp ogt <12 x float> %0, %1
+ %5 = select <12 x i1> %4, <12 x float> %2, <12 x float> %3
+ ret <12 x float> %5
+}
+; CHECK-LABEL: define <4 x float> @fcmp_ogt_on_12xfloat(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>) {
+; CHECK: entry:
+; CHECK-NEXT: %14 = fcmp ogt <4 x float> %2, %5
+; CHECK-NEXT: %15 = fcmp ogt <4 x float> %3, %6
+; CHECK-NEXT: %16 = fcmp ogt <4 x float> %4, %7
+; CHECK-NEXT: %17 = select <4 x i1> %14, <4 x float> %8, <4 x float> %11
+; CHECK-NEXT: %18 = select <4 x i1> %15, <4 x float> %9, <4 x float> %12
+; CHECK-NEXT: %19 = select <4 x i1> %16, <4 x float> %10, <4 x float> %13
+; CHECK-NEXT: store <4 x float> %18, <4 x float>* %0, align 16
+; CHECK-NEXT: store <4 x float> %19, <4 x float>* %1, align 16
+; CHECK-NEXT: ret <4 x float> %17
+; CHECK-NEXT: }
+
+define <12 x float> @fcmp_ugt_on_12xfloat(<12 x float>, <12 x float>, <12 x float>, <12 x float>) {
+entry:
+ %4 = fcmp ugt <12 x float> %0, %1
+ %5 = select <12 x i1> %4, <12 x float> %2, <12 x float> %3
+ ret <12 x float> %5
+}
+; CHECK-LABEL: define <4 x float> @fcmp_ugt_on_12xfloat(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>) {
+; CHECK: entry:
+; CHECK-NEXT: %14 = fcmp ugt <4 x float> %2, %5
+; CHECK-NEXT: %15 = fcmp ugt <4 x float> %3, %6
+; CHECK-NEXT: %16 = fcmp ugt <4 x float> %4, %7
+; CHECK-NEXT: %17 = select <4 x i1> %14, <4 x float> %8, <4 x float> %11
+; CHECK-NEXT: %18 = select <4 x i1> %15, <4 x float> %9, <4 x float> %12
+; CHECK-NEXT: %19 = select <4 x i1> %16, <4 x float> %10, <4 x float> %13
+; CHECK-NEXT: store <4 x float> %18, <4 x float>* %0, align 16
+; CHECK-NEXT: store <4 x float> %19, <4 x float>* %1, align 16
+; CHECK-NEXT: ret <4 x float> %17
+; CHECK-NEXT: }
+
+define <12 x float> @fcmp_oge_on_12xfloat(<12 x float>, <12 x float>, <12 x float>, <12 x float>) {
+entry:
+ %4 = fcmp oge <12 x float> %0, %1
+ %5 = select <12 x i1> %4, <12 x float> %2, <12 x float> %3
+ ret <12 x float> %5
+}
+; CHECK-LABEL: define <4 x float> @fcmp_oge_on_12xfloat(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>) {
+; CHECK: entry:
+; CHECK-NEXT: %14 = fcmp oge <4 x float> %2, %5
+; CHECK-NEXT: %15 = fcmp oge <4 x float> %3, %6
+; CHECK-NEXT: %16 = fcmp oge <4 x float> %4, %7
+; CHECK-NEXT: %17 = select <4 x i1> %14, <4 x float> %8, <4 x float> %11
+; CHECK-NEXT: %18 = select <4 x i1> %15, <4 x float> %9, <4 x float> %12
+; CHECK-NEXT: %19 = select <4 x i1> %16, <4 x float> %10, <4 x float> %13
+; CHECK-NEXT: store <4 x float> %18, <4 x float>* %0, align 16
+; CHECK-NEXT: store <4 x float> %19, <4 x float>* %1, align 16
+; CHECK-NEXT: ret <4 x float> %17
+; CHECK-NEXT: }
+
+define <12 x float> @fcmp_uge_on_12xfloat(<12 x float>, <12 x float>, <12 x float>, <12 x float>) {
+entry:
+ %4 = fcmp uge <12 x float> %0, %1
+ %5 = select <12 x i1> %4, <12 x float> %2, <12 x float> %3
+ ret <12 x float> %5
+}
+; CHECK-LABEL: define <4 x float> @fcmp_uge_on_12xfloat(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>) {
+; CHECK: entry:
+; CHECK-NEXT: %14 = fcmp uge <4 x float> %2, %5
+; CHECK-NEXT: %15 = fcmp uge <4 x float> %3, %6
+; CHECK-NEXT: %16 = fcmp uge <4 x float> %4, %7
+; CHECK-NEXT: %17 = select <4 x i1> %14, <4 x float> %8, <4 x float> %11
+; CHECK-NEXT: %18 = select <4 x i1> %15, <4 x float> %9, <4 x float> %12
+; CHECK-NEXT: %19 = select <4 x i1> %16, <4 x float> %10, <4 x float> %13
+; CHECK-NEXT: store <4 x float> %18, <4 x float>* %0, align 16
+; CHECK-NEXT: store <4 x float> %19, <4 x float>* %1, align 16
+; CHECK-NEXT: ret <4 x float> %17
+; CHECK-NEXT: }
+
+define <12 x float> @fcmp_ord_on_12xfloat(<12 x float>, <12 x float>, <12 x float>, <12 x float>) {
+entry:
+ %4 = fcmp ord <12 x float> %0, %1
+ %5 = select <12 x i1> %4, <12 x float> %2, <12 x float> %3
+ ret <12 x float> %5
+}
+; CHECK-LABEL: define <4 x float> @fcmp_ord_on_12xfloat(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>) {
+; CHECK: entry:
+; CHECK-NEXT: %14 = fcmp ord <4 x float> %2, %5
+; CHECK-NEXT: %15 = fcmp ord <4 x float> %3, %6
+; CHECK-NEXT: %16 = fcmp ord <4 x float> %4, %7
+; CHECK-NEXT: %17 = select <4 x i1> %14, <4 x float> %8, <4 x float> %11
+; CHECK-NEXT: %18 = select <4 x i1> %15, <4 x float> %9, <4 x float> %12
+; CHECK-NEXT: %19 = select <4 x i1> %16, <4 x float> %10, <4 x float> %13
+; CHECK-NEXT: store <4 x float> %18, <4 x float>* %0, align 16
+; CHECK-NEXT: store <4 x float> %19, <4 x float>* %1, align 16
+; CHECK-NEXT: ret <4 x float> %17
+; CHECK-NEXT: }
+
+define <12 x float> @fcmp_uno_on_12xfloat(<12 x float>, <12 x float>, <12 x float>, <12 x float>) {
+entry:
+ %4 = fcmp uno <12 x float> %0, %1
+ %5 = select <12 x i1> %4, <12 x float> %2, <12 x float> %3
+ ret <12 x float> %5
+}
+; CHECK-LABEL: define <4 x float> @fcmp_uno_on_12xfloat(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>) {
+; CHECK: entry:
+; CHECK-NEXT: %14 = fcmp uno <4 x float> %2, %5
+; CHECK-NEXT: %15 = fcmp uno <4 x float> %3, %6
+; CHECK-NEXT: %16 = fcmp uno <4 x float> %4, %7
+; CHECK-NEXT: %17 = select <4 x i1> %14, <4 x float> %8, <4 x float> %11
+; CHECK-NEXT: %18 = select <4 x i1> %15, <4 x float> %9, <4 x float> %12
+; CHECK-NEXT: %19 = select <4 x i1> %16, <4 x float> %10, <4 x float> %13
+; CHECK-NEXT: store <4 x float> %18, <4 x float>* %0, align 16
+; CHECK-NEXT: store <4 x float> %19, <4 x float>* %1, align 16
+; CHECK-NEXT: ret <4 x float> %17
+; CHECK-NEXT: }
+
+define <12 x double> @fcmp_true_on_12xdouble(<12 x double>, <12 x double>, <12 x double>, <12 x double>) {
+entry:
+ %4 = fcmp true <12 x double> %0, %1
+ %5 = select <12 x i1> %4, <12 x double> %2, <12 x double> %3
+ ret <12 x double> %5
+}
+; CHECK-LABEL: define <2 x double> @fcmp_true_on_12xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
+; CHECK: entry:
+; CHECK-NEXT: %29 = fcmp true <2 x double> %5, %11
+; CHECK-NEXT: %30 = fcmp true <2 x double> %6, %12
+; CHECK-NEXT: %31 = fcmp true <2 x double> %7, %13
+; CHECK-NEXT: %32 = fcmp true <2 x double> %8, %14
+; CHECK-NEXT: %33 = fcmp true <2 x double> %9, %15
+; CHECK-NEXT: %34 = fcmp true <2 x double> %10, %16
+; CHECK-NEXT: %35 = select <2 x i1> %29, <2 x double> %17, <2 x double> %23
+; CHECK-NEXT: %36 = select <2 x i1> %30, <2 x double> %18, <2 x double> %24
+; CHECK-NEXT: %37 = select <2 x i1> %31, <2 x double> %19, <2 x double> %25
+; CHECK-NEXT: %38 = select <2 x i1> %32, <2 x double> %20, <2 x double> %26
+; CHECK-NEXT: %39 = select <2 x i1> %33, <2 x double> %21, <2 x double> %27
+; CHECK-NEXT: %40 = select <2 x i1> %34, <2 x double> %22, <2 x double> %28
+; CHECK-NEXT: store <2 x double> %36, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %37, <2 x double>* %1, align 16
+; CHECK-NEXT: store <2 x double> %38, <2 x double>* %2, align 16
+; CHECK-NEXT: store <2 x double> %39, <2 x double>* %3, align 16
+; CHECK-NEXT: store <2 x double> %40, <2 x double>* %4, align 16
+; CHECK-NEXT: ret <2 x double> %35
+; CHECK-NEXT: }
+
+define <12 x double> @fcmp_false_on_12xdouble(<12 x double>, <12 x double>, <12 x double>, <12 x double>) {
+entry:
+ %4 = fcmp false <12 x double> %0, %1
+ %5 = select <12 x i1> %4, <12 x double> %2, <12 x double> %3
+ ret <12 x double> %5
+}
+; CHECK-LABEL: define <2 x double> @fcmp_false_on_12xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
+; CHECK: entry:
+; CHECK-NEXT: %29 = fcmp false <2 x double> %5, %11
+; CHECK-NEXT: %30 = fcmp false <2 x double> %6, %12
+; CHECK-NEXT: %31 = fcmp false <2 x double> %7, %13
+; CHECK-NEXT: %32 = fcmp false <2 x double> %8, %14
+; CHECK-NEXT: %33 = fcmp false <2 x double> %9, %15
+; CHECK-NEXT: %34 = fcmp false <2 x double> %10, %16
+; CHECK-NEXT: %35 = select <2 x i1> %29, <2 x double> %17, <2 x double> %23
+; CHECK-NEXT: %36 = select <2 x i1> %30, <2 x double> %18, <2 x double> %24
+; CHECK-NEXT: %37 = select <2 x i1> %31, <2 x double> %19, <2 x double> %25
+; CHECK-NEXT: %38 = select <2 x i1> %32, <2 x double> %20, <2 x double> %26
+; CHECK-NEXT: %39 = select <2 x i1> %33, <2 x double> %21, <2 x double> %27
+; CHECK-NEXT: %40 = select <2 x i1> %34, <2 x double> %22, <2 x double> %28
+; CHECK-NEXT: store <2 x double> %36, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %37, <2 x double>* %1, align 16
+; CHECK-NEXT: store <2 x double> %38, <2 x double>* %2, align 16
+; CHECK-NEXT: store <2 x double> %39, <2 x double>* %3, align 16
+; CHECK-NEXT: store <2 x double> %40, <2 x double>* %4, align 16
+; CHECK-NEXT: ret <2 x double> %35
+; CHECK-NEXT: }
+
+define <12 x double> @fcmp_oeq_on_12xdouble(<12 x double>, <12 x double>, <12 x double>, <12 x double>) {
+entry:
+ %4 = fcmp oeq <12 x double> %0, %1
+ %5 = select <12 x i1> %4, <12 x double> %2, <12 x double> %3
+ ret <12 x double> %5
+}
+; CHECK-LABEL: define <2 x double> @fcmp_oeq_on_12xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
+; CHECK: entry:
+; CHECK-NEXT: %29 = fcmp oeq <2 x double> %5, %11
+; CHECK-NEXT: %30 = fcmp oeq <2 x double> %6, %12
+; CHECK-NEXT: %31 = fcmp oeq <2 x double> %7, %13
+; CHECK-NEXT: %32 = fcmp oeq <2 x double> %8, %14
+; CHECK-NEXT: %33 = fcmp oeq <2 x double> %9, %15
+; CHECK-NEXT: %34 = fcmp oeq <2 x double> %10, %16
+; CHECK-NEXT: %35 = select <2 x i1> %29, <2 x double> %17, <2 x double> %23
+; CHECK-NEXT: %36 = select <2 x i1> %30, <2 x double> %18, <2 x double> %24
+; CHECK-NEXT: %37 = select <2 x i1> %31, <2 x double> %19, <2 x double> %25
+; CHECK-NEXT: %38 = select <2 x i1> %32, <2 x double> %20, <2 x double> %26
+; CHECK-NEXT: %39 = select <2 x i1> %33, <2 x double> %21, <2 x double> %27
+; CHECK-NEXT: %40 = select <2 x i1> %34, <2 x double> %22, <2 x double> %28
+; CHECK-NEXT: store <2 x double> %36, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %37, <2 x double>* %1, align 16
+; CHECK-NEXT: store <2 x double> %38, <2 x double>* %2, align 16
+; CHECK-NEXT: store <2 x double> %39, <2 x double>* %3, align 16
+; CHECK-NEXT: store <2 x double> %40, <2 x double>* %4, align 16
+; CHECK-NEXT: ret <2 x double> %35
+; CHECK-NEXT: }
+
+define <12 x double> @fcmp_ueq_on_12xdouble(<12 x double>, <12 x double>, <12 x double>, <12 x double>) {
+entry:
+ %4 = fcmp ueq <12 x double> %0, %1
+ %5 = select <12 x i1> %4, <12 x double> %2, <12 x double> %3
+ ret <12 x double> %5
+}
+; CHECK-LABEL: define <2 x double> @fcmp_ueq_on_12xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
+; CHECK: entry:
+; CHECK-NEXT: %29 = fcmp ueq <2 x double> %5, %11
+; CHECK-NEXT: %30 = fcmp ueq <2 x double> %6, %12
+; CHECK-NEXT: %31 = fcmp ueq <2 x double> %7, %13
+; CHECK-NEXT: %32 = fcmp ueq <2 x double> %8, %14
+; CHECK-NEXT: %33 = fcmp ueq <2 x double> %9, %15
+; CHECK-NEXT: %34 = fcmp ueq <2 x double> %10, %16
+; CHECK-NEXT: %35 = select <2 x i1> %29, <2 x double> %17, <2 x double> %23
+; CHECK-NEXT: %36 = select <2 x i1> %30, <2 x double> %18, <2 x double> %24
+; CHECK-NEXT: %37 = select <2 x i1> %31, <2 x double> %19, <2 x double> %25
+; CHECK-NEXT: %38 = select <2 x i1> %32, <2 x double> %20, <2 x double> %26
+; CHECK-NEXT: %39 = select <2 x i1> %33, <2 x double> %21, <2 x double> %27
+; CHECK-NEXT: %40 = select <2 x i1> %34, <2 x double> %22, <2 x double> %28
+; CHECK-NEXT: store <2 x double> %36, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %37, <2 x double>* %1, align 16
+; CHECK-NEXT: store <2 x double> %38, <2 x double>* %2, align 16
+; CHECK-NEXT: store <2 x double> %39, <2 x double>* %3, align 16
+; CHECK-NEXT: store <2 x double> %40, <2 x double>* %4, align 16
+; CHECK-NEXT: ret <2 x double> %35
+; CHECK-NEXT: }
+
+define <12 x double> @fcmp_one_on_12xdouble(<12 x double>, <12 x double>, <12 x double>, <12 x double>) {
+entry:
+ %4 = fcmp one <12 x double> %0, %1
+ %5 = select <12 x i1> %4, <12 x double> %2, <12 x double> %3
+ ret <12 x double> %5
+}
+; CHECK-LABEL: define <2 x double> @fcmp_one_on_12xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
+; CHECK: entry:
+; CHECK-NEXT: %29 = fcmp one <2 x double> %5, %11
+; CHECK-NEXT: %30 = fcmp one <2 x double> %6, %12
+; CHECK-NEXT: %31 = fcmp one <2 x double> %7, %13
+; CHECK-NEXT: %32 = fcmp one <2 x double> %8, %14
+; CHECK-NEXT: %33 = fcmp one <2 x double> %9, %15
+; CHECK-NEXT: %34 = fcmp one <2 x double> %10, %16
+; CHECK-NEXT: %35 = select <2 x i1> %29, <2 x double> %17, <2 x double> %23
+; CHECK-NEXT: %36 = select <2 x i1> %30, <2 x double> %18, <2 x double> %24
+; CHECK-NEXT: %37 = select <2 x i1> %31, <2 x double> %19, <2 x double> %25
+; CHECK-NEXT: %38 = select <2 x i1> %32, <2 x double> %20, <2 x double> %26
+; CHECK-NEXT: %39 = select <2 x i1> %33, <2 x double> %21, <2 x double> %27
+; CHECK-NEXT: %40 = select <2 x i1> %34, <2 x double> %22, <2 x double> %28
+; CHECK-NEXT: store <2 x double> %36, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %37, <2 x double>* %1, align 16
+; CHECK-NEXT: store <2 x double> %38, <2 x double>* %2, align 16
+; CHECK-NEXT: store <2 x double> %39, <2 x double>* %3, align 16
+; CHECK-NEXT: store <2 x double> %40, <2 x double>* %4, align 16
+; CHECK-NEXT: ret <2 x double> %35
+; CHECK-NEXT: }
+
+define <12 x double> @fcmp_une_on_12xdouble(<12 x double>, <12 x double>, <12 x double>, <12 x double>) {
+entry:
+ %4 = fcmp une <12 x double> %0, %1
+ %5 = select <12 x i1> %4, <12 x double> %2, <12 x double> %3
+ ret <12 x double> %5
+}
+; CHECK-LABEL: define <2 x double> @fcmp_une_on_12xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
+; CHECK: entry:
+; CHECK-NEXT: %29 = fcmp une <2 x double> %5, %11
+; CHECK-NEXT: %30 = fcmp une <2 x double> %6, %12
+; CHECK-NEXT: %31 = fcmp une <2 x double> %7, %13
+; CHECK-NEXT: %32 = fcmp une <2 x double> %8, %14
+; CHECK-NEXT: %33 = fcmp une <2 x double> %9, %15
+; CHECK-NEXT: %34 = fcmp une <2 x double> %10, %16
+; CHECK-NEXT: %35 = select <2 x i1> %29, <2 x double> %17, <2 x double> %23
+; CHECK-NEXT: %36 = select <2 x i1> %30, <2 x double> %18, <2 x double> %24
+; CHECK-NEXT: %37 = select <2 x i1> %31, <2 x double> %19, <2 x double> %25
+; CHECK-NEXT: %38 = select <2 x i1> %32, <2 x double> %20, <2 x double> %26
+; CHECK-NEXT: %39 = select <2 x i1> %33, <2 x double> %21, <2 x double> %27
+; CHECK-NEXT: %40 = select <2 x i1> %34, <2 x double> %22, <2 x double> %28
+; CHECK-NEXT: store <2 x double> %36, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %37, <2 x double>* %1, align 16
+; CHECK-NEXT: store <2 x double> %38, <2 x double>* %2, align 16
+; CHECK-NEXT: store <2 x double> %39, <2 x double>* %3, align 16
+; CHECK-NEXT: store <2 x double> %40, <2 x double>* %4, align 16
+; CHECK-NEXT: ret <2 x double> %35
+; CHECK-NEXT: }
+
+define <12 x double> @fcmp_ogt_on_12xdouble(<12 x double>, <12 x double>, <12 x double>, <12 x double>) {
+entry:
+ %4 = fcmp ogt <12 x double> %0, %1
+ %5 = select <12 x i1> %4, <12 x double> %2, <12 x double> %3
+ ret <12 x double> %5
+}
+; CHECK-LABEL: define <2 x double> @fcmp_ogt_on_12xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
+; CHECK: entry:
+; CHECK-NEXT: %29 = fcmp ogt <2 x double> %5, %11
+; CHECK-NEXT: %30 = fcmp ogt <2 x double> %6, %12
+; CHECK-NEXT: %31 = fcmp ogt <2 x double> %7, %13
+; CHECK-NEXT: %32 = fcmp ogt <2 x double> %8, %14
+; CHECK-NEXT: %33 = fcmp ogt <2 x double> %9, %15
+; CHECK-NEXT: %34 = fcmp ogt <2 x double> %10, %16
+; CHECK-NEXT: %35 = select <2 x i1> %29, <2 x double> %17, <2 x double> %23
+; CHECK-NEXT: %36 = select <2 x i1> %30, <2 x double> %18, <2 x double> %24
+; CHECK-NEXT: %37 = select <2 x i1> %31, <2 x double> %19, <2 x double> %25
+; CHECK-NEXT: %38 = select <2 x i1> %32, <2 x double> %20, <2 x double> %26
+; CHECK-NEXT: %39 = select <2 x i1> %33, <2 x double> %21, <2 x double> %27
+; CHECK-NEXT: %40 = select <2 x i1> %34, <2 x double> %22, <2 x double> %28
+; CHECK-NEXT: store <2 x double> %36, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %37, <2 x double>* %1, align 16
+; CHECK-NEXT: store <2 x double> %38, <2 x double>* %2, align 16
+; CHECK-NEXT: store <2 x double> %39, <2 x double>* %3, align 16
+; CHECK-NEXT: store <2 x double> %40, <2 x double>* %4, align 16
+; CHECK-NEXT: ret <2 x double> %35
+; CHECK-NEXT: }
+
+define <12 x double> @fcmp_ugt_on_12xdouble(<12 x double>, <12 x double>, <12 x double>, <12 x double>) {
+entry:
+ %4 = fcmp ugt <12 x double> %0, %1
+ %5 = select <12 x i1> %4, <12 x double> %2, <12 x double> %3
+ ret <12 x double> %5
+}
+; CHECK-LABEL: define <2 x double> @fcmp_ugt_on_12xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
+; CHECK: entry:
+; CHECK-NEXT: %29 = fcmp ugt <2 x double> %5, %11
+; CHECK-NEXT: %30 = fcmp ugt <2 x double> %6, %12
+; CHECK-NEXT: %31 = fcmp ugt <2 x double> %7, %13
+; CHECK-NEXT: %32 = fcmp ugt <2 x double> %8, %14
+; CHECK-NEXT: %33 = fcmp ugt <2 x double> %9, %15
+; CHECK-NEXT: %34 = fcmp ugt <2 x double> %10, %16
+; CHECK-NEXT: %35 = select <2 x i1> %29, <2 x double> %17, <2 x double> %23
+; CHECK-NEXT: %36 = select <2 x i1> %30, <2 x double> %18, <2 x double> %24
+; CHECK-NEXT: %37 = select <2 x i1> %31, <2 x double> %19, <2 x double> %25
+; CHECK-NEXT: %38 = select <2 x i1> %32, <2 x double> %20, <2 x double> %26
+; CHECK-NEXT: %39 = select <2 x i1> %33, <2 x double> %21, <2 x double> %27
+; CHECK-NEXT: %40 = select <2 x i1> %34, <2 x double> %22, <2 x double> %28
+; CHECK-NEXT: store <2 x double> %36, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %37, <2 x double>* %1, align 16
+; CHECK-NEXT: store <2 x double> %38, <2 x double>* %2, align 16
+; CHECK-NEXT: store <2 x double> %39, <2 x double>* %3, align 16
+; CHECK-NEXT: store <2 x double> %40, <2 x double>* %4, align 16
+; CHECK-NEXT: ret <2 x double> %35
+; CHECK-NEXT: }
+
+define <12 x double> @fcmp_oge_on_12xdouble(<12 x double>, <12 x double>, <12 x double>, <12 x double>) {
+entry:
+ %4 = fcmp oge <12 x double> %0, %1
+ %5 = select <12 x i1> %4, <12 x double> %2, <12 x double> %3
+ ret <12 x double> %5
+}
+; CHECK-LABEL: define <2 x double> @fcmp_oge_on_12xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
+; CHECK: entry:
+; CHECK-NEXT: %29 = fcmp oge <2 x double> %5, %11
+; CHECK-NEXT: %30 = fcmp oge <2 x double> %6, %12
+; CHECK-NEXT: %31 = fcmp oge <2 x double> %7, %13
+; CHECK-NEXT: %32 = fcmp oge <2 x double> %8, %14
+; CHECK-NEXT: %33 = fcmp oge <2 x double> %9, %15
+; CHECK-NEXT: %34 = fcmp oge <2 x double> %10, %16
+; CHECK-NEXT: %35 = select <2 x i1> %29, <2 x double> %17, <2 x double> %23
+; CHECK-NEXT: %36 = select <2 x i1> %30, <2 x double> %18, <2 x double> %24
+; CHECK-NEXT: %37 = select <2 x i1> %31, <2 x double> %19, <2 x double> %25
+; CHECK-NEXT: %38 = select <2 x i1> %32, <2 x double> %20, <2 x double> %26
+; CHECK-NEXT: %39 = select <2 x i1> %33, <2 x double> %21, <2 x double> %27
+; CHECK-NEXT: %40 = select <2 x i1> %34, <2 x double> %22, <2 x double> %28
+; CHECK-NEXT: store <2 x double> %36, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %37, <2 x double>* %1, align 16
+; CHECK-NEXT: store <2 x double> %38, <2 x double>* %2, align 16
+; CHECK-NEXT: store <2 x double> %39, <2 x double>* %3, align 16
+; CHECK-NEXT: store <2 x double> %40, <2 x double>* %4, align 16
+; CHECK-NEXT: ret <2 x double> %35
+; CHECK-NEXT: }
+
+define <12 x double> @fcmp_uge_on_12xdouble(<12 x double>, <12 x double>, <12 x double>, <12 x double>) {
+entry:
+ %4 = fcmp uge <12 x double> %0, %1
+ %5 = select <12 x i1> %4, <12 x double> %2, <12 x double> %3
+ ret <12 x double> %5
+}
+; CHECK-LABEL: define <2 x double> @fcmp_uge_on_12xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
+; CHECK: entry:
+; CHECK-NEXT: %29 = fcmp uge <2 x double> %5, %11
+; CHECK-NEXT: %30 = fcmp uge <2 x double> %6, %12
+; CHECK-NEXT: %31 = fcmp uge <2 x double> %7, %13
+; CHECK-NEXT: %32 = fcmp uge <2 x double> %8, %14
+; CHECK-NEXT: %33 = fcmp uge <2 x double> %9, %15
+; CHECK-NEXT: %34 = fcmp uge <2 x double> %10, %16
+; CHECK-NEXT: %35 = select <2 x i1> %29, <2 x double> %17, <2 x double> %23
+; CHECK-NEXT: %36 = select <2 x i1> %30, <2 x double> %18, <2 x double> %24
+; CHECK-NEXT: %37 = select <2 x i1> %31, <2 x double> %19, <2 x double> %25
+; CHECK-NEXT: %38 = select <2 x i1> %32, <2 x double> %20, <2 x double> %26
+; CHECK-NEXT: %39 = select <2 x i1> %33, <2 x double> %21, <2 x double> %27
+; CHECK-NEXT: %40 = select <2 x i1> %34, <2 x double> %22, <2 x double> %28
+; CHECK-NEXT: store <2 x double> %36, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %37, <2 x double>* %1, align 16
+; CHECK-NEXT: store <2 x double> %38, <2 x double>* %2, align 16
+; CHECK-NEXT: store <2 x double> %39, <2 x double>* %3, align 16
+; CHECK-NEXT: store <2 x double> %40, <2 x double>* %4, align 16
+; CHECK-NEXT: ret <2 x double> %35
+; CHECK-NEXT: }
+
+define <12 x double> @fcmp_ord_on_12xdouble(<12 x double>, <12 x double>, <12 x double>, <12 x double>) {
+entry:
+ %4 = fcmp ord <12 x double> %0, %1
+ %5 = select <12 x i1> %4, <12 x double> %2, <12 x double> %3
+ ret <12 x double> %5
+}
+; CHECK-LABEL: define <2 x double> @fcmp_ord_on_12xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
+; CHECK: entry:
+; CHECK-NEXT: %29 = fcmp ord <2 x double> %5, %11
+; CHECK-NEXT: %30 = fcmp ord <2 x double> %6, %12
+; CHECK-NEXT: %31 = fcmp ord <2 x double> %7, %13
+; CHECK-NEXT: %32 = fcmp ord <2 x double> %8, %14
+; CHECK-NEXT: %33 = fcmp ord <2 x double> %9, %15
+; CHECK-NEXT: %34 = fcmp ord <2 x double> %10, %16
+; CHECK-NEXT: %35 = select <2 x i1> %29, <2 x double> %17, <2 x double> %23
+; CHECK-NEXT: %36 = select <2 x i1> %30, <2 x double> %18, <2 x double> %24
+; CHECK-NEXT: %37 = select <2 x i1> %31, <2 x double> %19, <2 x double> %25
+; CHECK-NEXT: %38 = select <2 x i1> %32, <2 x double> %20, <2 x double> %26
+; CHECK-NEXT: %39 = select <2 x i1> %33, <2 x double> %21, <2 x double> %27
+; CHECK-NEXT: %40 = select <2 x i1> %34, <2 x double> %22, <2 x double> %28
+; CHECK-NEXT: store <2 x double> %36, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %37, <2 x double>* %1, align 16
+; CHECK-NEXT: store <2 x double> %38, <2 x double>* %2, align 16
+; CHECK-NEXT: store <2 x double> %39, <2 x double>* %3, align 16
+; CHECK-NEXT: store <2 x double> %40, <2 x double>* %4, align 16
+; CHECK-NEXT: ret <2 x double> %35
+; CHECK-NEXT: }
+
+define <12 x double> @fcmp_uno_on_12xdouble(<12 x double>, <12 x double>, <12 x double>, <12 x double>) {
+entry:
+ %4 = fcmp uno <12 x double> %0, %1
+ %5 = select <12 x i1> %4, <12 x double> %2, <12 x double> %3
+ ret <12 x double> %5
+}
+; CHECK-LABEL: define <2 x double> @fcmp_uno_on_12xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
+; CHECK: entry:
+; CHECK-NEXT: %29 = fcmp uno <2 x double> %5, %11
+; CHECK-NEXT: %30 = fcmp uno <2 x double> %6, %12
+; CHECK-NEXT: %31 = fcmp uno <2 x double> %7, %13
+; CHECK-NEXT: %32 = fcmp uno <2 x double> %8, %14
+; CHECK-NEXT: %33 = fcmp uno <2 x double> %9, %15
+; CHECK-NEXT: %34 = fcmp uno <2 x double> %10, %16
+; CHECK-NEXT: %35 = select <2 x i1> %29, <2 x double> %17, <2 x double> %23
+; CHECK-NEXT: %36 = select <2 x i1> %30, <2 x double> %18, <2 x double> %24
+; CHECK-NEXT: %37 = select <2 x i1> %31, <2 x double> %19, <2 x double> %25
+; CHECK-NEXT: %38 = select <2 x i1> %32, <2 x double> %20, <2 x double> %26
+; CHECK-NEXT: %39 = select <2 x i1> %33, <2 x double> %21, <2 x double> %27
+; CHECK-NEXT: %40 = select <2 x i1> %34, <2 x double> %22, <2 x double> %28
+; CHECK-NEXT: store <2 x double> %36, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %37, <2 x double>* %1, align 16
+; CHECK-NEXT: store <2 x double> %38, <2 x double>* %2, align 16
+; CHECK-NEXT: store <2 x double> %39, <2 x double>* %3, align 16
+; CHECK-NEXT: store <2 x double> %40, <2 x double>* %4, align 16
+; CHECK-NEXT: ret <2 x double> %35
+; CHECK-NEXT: }
+
+define <16 x float> @fcmp_true_on_16xfloat(<16 x float>, <16 x float>, <16 x float>, <16 x float>) {
+entry:
+ %4 = fcmp true <16 x float> %0, %1
+ %5 = select <16 x i1> %4, <16 x float> %2, <16 x float> %3
+ ret <16 x float> %5
+}
+; CHECK-LABEL: define <4 x float> @fcmp_true_on_16xfloat(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>) {
+; CHECK: entry:
+; CHECK-NEXT: %19 = fcmp true <4 x float> %3, %7
+; CHECK-NEXT: %20 = fcmp true <4 x float> %4, %8
+; CHECK-NEXT: %21 = fcmp true <4 x float> %5, %9
+; CHECK-NEXT: %22 = fcmp true <4 x float> %6, %10
+; CHECK-NEXT: %23 = select <4 x i1> %19, <4 x float> %11, <4 x float> %15
+; CHECK-NEXT: %24 = select <4 x i1> %20, <4 x float> %12, <4 x float> %16
+; CHECK-NEXT: %25 = select <4 x i1> %21, <4 x float> %13, <4 x float> %17
+; CHECK-NEXT: %26 = select <4 x i1> %22, <4 x float> %14, <4 x float> %18
+; CHECK-NEXT: store <4 x float> %24, <4 x float>* %0, align 16
+; CHECK-NEXT: store <4 x float> %25, <4 x float>* %1, align 16
+; CHECK-NEXT: store <4 x float> %26, <4 x float>* %2, align 16
+; CHECK-NEXT: ret <4 x float> %23
+; CHECK-NEXT: }
+
+define <16 x float> @fcmp_false_on_16xfloat(<16 x float>, <16 x float>, <16 x float>, <16 x float>) {
+entry:
+ %4 = fcmp false <16 x float> %0, %1
+ %5 = select <16 x i1> %4, <16 x float> %2, <16 x float> %3
+ ret <16 x float> %5
+}
+; CHECK-LABEL: define <4 x float> @fcmp_false_on_16xfloat(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>) {
+; CHECK: entry:
+; CHECK-NEXT: %19 = fcmp false <4 x float> %3, %7
+; CHECK-NEXT: %20 = fcmp false <4 x float> %4, %8
+; CHECK-NEXT: %21 = fcmp false <4 x float> %5, %9
+; CHECK-NEXT: %22 = fcmp false <4 x float> %6, %10
+; CHECK-NEXT: %23 = select <4 x i1> %19, <4 x float> %11, <4 x float> %15
+; CHECK-NEXT: %24 = select <4 x i1> %20, <4 x float> %12, <4 x float> %16
+; CHECK-NEXT: %25 = select <4 x i1> %21, <4 x float> %13, <4 x float> %17
+; CHECK-NEXT: %26 = select <4 x i1> %22, <4 x float> %14, <4 x float> %18
+; CHECK-NEXT: store <4 x float> %24, <4 x float>* %0, align 16
+; CHECK-NEXT: store <4 x float> %25, <4 x float>* %1, align 16
+; CHECK-NEXT: store <4 x float> %26, <4 x float>* %2, align 16
+; CHECK-NEXT: ret <4 x float> %23
+; CHECK-NEXT: }
+
+define <16 x float> @fcmp_oeq_on_16xfloat(<16 x float>, <16 x float>, <16 x float>, <16 x float>) {
+entry:
+ %4 = fcmp oeq <16 x float> %0, %1
+ %5 = select <16 x i1> %4, <16 x float> %2, <16 x float> %3
+ ret <16 x float> %5
+}
+; CHECK-LABEL: define <4 x float> @fcmp_oeq_on_16xfloat(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>) {
+; CHECK: entry:
+; CHECK-NEXT: %19 = fcmp oeq <4 x float> %3, %7
+; CHECK-NEXT: %20 = fcmp oeq <4 x float> %4, %8
+; CHECK-NEXT: %21 = fcmp oeq <4 x float> %5, %9
+; CHECK-NEXT: %22 = fcmp oeq <4 x float> %6, %10
+; CHECK-NEXT: %23 = select <4 x i1> %19, <4 x float> %11, <4 x float> %15
+; CHECK-NEXT: %24 = select <4 x i1> %20, <4 x float> %12, <4 x float> %16
+; CHECK-NEXT: %25 = select <4 x i1> %21, <4 x float> %13, <4 x float> %17
+; CHECK-NEXT: %26 = select <4 x i1> %22, <4 x float> %14, <4 x float> %18
+; CHECK-NEXT: store <4 x float> %24, <4 x float>* %0, align 16
+; CHECK-NEXT: store <4 x float> %25, <4 x float>* %1, align 16
+; CHECK-NEXT: store <4 x float> %26, <4 x float>* %2, align 16
+; CHECK-NEXT: ret <4 x float> %23
+; CHECK-NEXT: }
+
+define <16 x float> @fcmp_ueq_on_16xfloat(<16 x float>, <16 x float>, <16 x float>, <16 x float>) {
+entry:
+ %4 = fcmp ueq <16 x float> %0, %1
+ %5 = select <16 x i1> %4, <16 x float> %2, <16 x float> %3
+ ret <16 x float> %5
+}
+; CHECK-LABEL: define <4 x float> @fcmp_ueq_on_16xfloat(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>) {
+; CHECK: entry:
+; CHECK-NEXT: %19 = fcmp ueq <4 x float> %3, %7
+; CHECK-NEXT: %20 = fcmp ueq <4 x float> %4, %8
+; CHECK-NEXT: %21 = fcmp ueq <4 x float> %5, %9
+; CHECK-NEXT: %22 = fcmp ueq <4 x float> %6, %10
+; CHECK-NEXT: %23 = select <4 x i1> %19, <4 x float> %11, <4 x float> %15
+; CHECK-NEXT: %24 = select <4 x i1> %20, <4 x float> %12, <4 x float> %16
+; CHECK-NEXT: %25 = select <4 x i1> %21, <4 x float> %13, <4 x float> %17
+; CHECK-NEXT: %26 = select <4 x i1> %22, <4 x float> %14, <4 x float> %18
+; CHECK-NEXT: store <4 x float> %24, <4 x float>* %0, align 16
+; CHECK-NEXT: store <4 x float> %25, <4 x float>* %1, align 16
+; CHECK-NEXT: store <4 x float> %26, <4 x float>* %2, align 16
+; CHECK-NEXT: ret <4 x float> %23
+; CHECK-NEXT: }
+
+define <16 x float> @fcmp_one_on_16xfloat(<16 x float>, <16 x float>, <16 x float>, <16 x float>) {
+entry:
+ %4 = fcmp one <16 x float> %0, %1
+ %5 = select <16 x i1> %4, <16 x float> %2, <16 x float> %3
+ ret <16 x float> %5
+}
+; CHECK-LABEL: define <4 x float> @fcmp_one_on_16xfloat(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>) {
+; CHECK: entry:
+; CHECK-NEXT: %19 = fcmp one <4 x float> %3, %7
+; CHECK-NEXT: %20 = fcmp one <4 x float> %4, %8
+; CHECK-NEXT: %21 = fcmp one <4 x float> %5, %9
+; CHECK-NEXT: %22 = fcmp one <4 x float> %6, %10
+; CHECK-NEXT: %23 = select <4 x i1> %19, <4 x float> %11, <4 x float> %15
+; CHECK-NEXT: %24 = select <4 x i1> %20, <4 x float> %12, <4 x float> %16
+; CHECK-NEXT: %25 = select <4 x i1> %21, <4 x float> %13, <4 x float> %17
+; CHECK-NEXT: %26 = select <4 x i1> %22, <4 x float> %14, <4 x float> %18
+; CHECK-NEXT: store <4 x float> %24, <4 x float>* %0, align 16
+; CHECK-NEXT: store <4 x float> %25, <4 x float>* %1, align 16
+; CHECK-NEXT: store <4 x float> %26, <4 x float>* %2, align 16
+; CHECK-NEXT: ret <4 x float> %23
+; CHECK-NEXT: }
+
+define <16 x float> @fcmp_une_on_16xfloat(<16 x float>, <16 x float>, <16 x float>, <16 x float>) {
+entry:
+ %4 = fcmp une <16 x float> %0, %1
+ %5 = select <16 x i1> %4, <16 x float> %2, <16 x float> %3
+ ret <16 x float> %5
+}
+; CHECK-LABEL: define <4 x float> @fcmp_une_on_16xfloat(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>) {
+; CHECK: entry:
+; CHECK-NEXT: %19 = fcmp une <4 x float> %3, %7
+; CHECK-NEXT: %20 = fcmp une <4 x float> %4, %8
+; CHECK-NEXT: %21 = fcmp une <4 x float> %5, %9
+; CHECK-NEXT: %22 = fcmp une <4 x float> %6, %10
+; CHECK-NEXT: %23 = select <4 x i1> %19, <4 x float> %11, <4 x float> %15
+; CHECK-NEXT: %24 = select <4 x i1> %20, <4 x float> %12, <4 x float> %16
+; CHECK-NEXT: %25 = select <4 x i1> %21, <4 x float> %13, <4 x float> %17
+; CHECK-NEXT: %26 = select <4 x i1> %22, <4 x float> %14, <4 x float> %18
+; CHECK-NEXT: store <4 x float> %24, <4 x float>* %0, align 16
+; CHECK-NEXT: store <4 x float> %25, <4 x float>* %1, align 16
+; CHECK-NEXT: store <4 x float> %26, <4 x float>* %2, align 16
+; CHECK-NEXT: ret <4 x float> %23
+; CHECK-NEXT: }
+
+define <16 x float> @fcmp_ogt_on_16xfloat(<16 x float>, <16 x float>, <16 x float>, <16 x float>) {
+entry:
+ %4 = fcmp ogt <16 x float> %0, %1
+ %5 = select <16 x i1> %4, <16 x float> %2, <16 x float> %3
+ ret <16 x float> %5
+}
+; CHECK-LABEL: define <4 x float> @fcmp_ogt_on_16xfloat(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>) {
+; CHECK: entry:
+; CHECK-NEXT: %19 = fcmp ogt <4 x float> %3, %7
+; CHECK-NEXT: %20 = fcmp ogt <4 x float> %4, %8
+; CHECK-NEXT: %21 = fcmp ogt <4 x float> %5, %9
+; CHECK-NEXT: %22 = fcmp ogt <4 x float> %6, %10
+; CHECK-NEXT: %23 = select <4 x i1> %19, <4 x float> %11, <4 x float> %15
+; CHECK-NEXT: %24 = select <4 x i1> %20, <4 x float> %12, <4 x float> %16
+; CHECK-NEXT: %25 = select <4 x i1> %21, <4 x float> %13, <4 x float> %17
+; CHECK-NEXT: %26 = select <4 x i1> %22, <4 x float> %14, <4 x float> %18
+; CHECK-NEXT: store <4 x float> %24, <4 x float>* %0, align 16
+; CHECK-NEXT: store <4 x float> %25, <4 x float>* %1, align 16
+; CHECK-NEXT: store <4 x float> %26, <4 x float>* %2, align 16
+; CHECK-NEXT: ret <4 x float> %23
+; CHECK-NEXT: }
+
+define <16 x float> @fcmp_ugt_on_16xfloat(<16 x float>, <16 x float>, <16 x float>, <16 x float>) {
+entry:
+ %4 = fcmp ugt <16 x float> %0, %1
+ %5 = select <16 x i1> %4, <16 x float> %2, <16 x float> %3
+ ret <16 x float> %5
+}
+; CHECK-LABEL: define <4 x float> @fcmp_ugt_on_16xfloat(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>) {
+; CHECK: entry:
+; CHECK-NEXT: %19 = fcmp ugt <4 x float> %3, %7
+; CHECK-NEXT: %20 = fcmp ugt <4 x float> %4, %8
+; CHECK-NEXT: %21 = fcmp ugt <4 x float> %5, %9
+; CHECK-NEXT: %22 = fcmp ugt <4 x float> %6, %10
+; CHECK-NEXT: %23 = select <4 x i1> %19, <4 x float> %11, <4 x float> %15
+; CHECK-NEXT: %24 = select <4 x i1> %20, <4 x float> %12, <4 x float> %16
+; CHECK-NEXT: %25 = select <4 x i1> %21, <4 x float> %13, <4 x float> %17
+; CHECK-NEXT: %26 = select <4 x i1> %22, <4 x float> %14, <4 x float> %18
+; CHECK-NEXT: store <4 x float> %24, <4 x float>* %0, align 16
+; CHECK-NEXT: store <4 x float> %25, <4 x float>* %1, align 16
+; CHECK-NEXT: store <4 x float> %26, <4 x float>* %2, align 16
+; CHECK-NEXT: ret <4 x float> %23
+; CHECK-NEXT: }
+
+define <16 x float> @fcmp_oge_on_16xfloat(<16 x float>, <16 x float>, <16 x float>, <16 x float>) {
+entry:
+ %4 = fcmp oge <16 x float> %0, %1
+ %5 = select <16 x i1> %4, <16 x float> %2, <16 x float> %3
+ ret <16 x float> %5
+}
+; CHECK-LABEL: define <4 x float> @fcmp_oge_on_16xfloat(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>) {
+; CHECK: entry:
+; CHECK-NEXT: %19 = fcmp oge <4 x float> %3, %7
+; CHECK-NEXT: %20 = fcmp oge <4 x float> %4, %8
+; CHECK-NEXT: %21 = fcmp oge <4 x float> %5, %9
+; CHECK-NEXT: %22 = fcmp oge <4 x float> %6, %10
+; CHECK-NEXT: %23 = select <4 x i1> %19, <4 x float> %11, <4 x float> %15
+; CHECK-NEXT: %24 = select <4 x i1> %20, <4 x float> %12, <4 x float> %16
+; CHECK-NEXT: %25 = select <4 x i1> %21, <4 x float> %13, <4 x float> %17
+; CHECK-NEXT: %26 = select <4 x i1> %22, <4 x float> %14, <4 x float> %18
+; CHECK-NEXT: store <4 x float> %24, <4 x float>* %0, align 16
+; CHECK-NEXT: store <4 x float> %25, <4 x float>* %1, align 16
+; CHECK-NEXT: store <4 x float> %26, <4 x float>* %2, align 16
+; CHECK-NEXT: ret <4 x float> %23
+; CHECK-NEXT: }
+
+define <16 x float> @fcmp_uge_on_16xfloat(<16 x float>, <16 x float>, <16 x float>, <16 x float>) {
+entry:
+ %4 = fcmp uge <16 x float> %0, %1
+ %5 = select <16 x i1> %4, <16 x float> %2, <16 x float> %3
+ ret <16 x float> %5
+}
+; CHECK-LABEL: define <4 x float> @fcmp_uge_on_16xfloat(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>) {
+; CHECK: entry:
+; CHECK-NEXT: %19 = fcmp uge <4 x float> %3, %7
+; CHECK-NEXT: %20 = fcmp uge <4 x float> %4, %8
+; CHECK-NEXT: %21 = fcmp uge <4 x float> %5, %9
+; CHECK-NEXT: %22 = fcmp uge <4 x float> %6, %10
+; CHECK-NEXT: %23 = select <4 x i1> %19, <4 x float> %11, <4 x float> %15
+; CHECK-NEXT: %24 = select <4 x i1> %20, <4 x float> %12, <4 x float> %16
+; CHECK-NEXT: %25 = select <4 x i1> %21, <4 x float> %13, <4 x float> %17
+; CHECK-NEXT: %26 = select <4 x i1> %22, <4 x float> %14, <4 x float> %18
+; CHECK-NEXT: store <4 x float> %24, <4 x float>* %0, align 16
+; CHECK-NEXT: store <4 x float> %25, <4 x float>* %1, align 16
+; CHECK-NEXT: store <4 x float> %26, <4 x float>* %2, align 16
+; CHECK-NEXT: ret <4 x float> %23
+; CHECK-NEXT: }
+
+define <16 x float> @fcmp_ord_on_16xfloat(<16 x float>, <16 x float>, <16 x float>, <16 x float>) {
+entry:
+ %4 = fcmp ord <16 x float> %0, %1
+ %5 = select <16 x i1> %4, <16 x float> %2, <16 x float> %3
+ ret <16 x float> %5
+}
+; CHECK-LABEL: define <4 x float> @fcmp_ord_on_16xfloat(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>) {
+; CHECK: entry:
+; CHECK-NEXT: %19 = fcmp ord <4 x float> %3, %7
+; CHECK-NEXT: %20 = fcmp ord <4 x float> %4, %8
+; CHECK-NEXT: %21 = fcmp ord <4 x float> %5, %9
+; CHECK-NEXT: %22 = fcmp ord <4 x float> %6, %10
+; CHECK-NEXT: %23 = select <4 x i1> %19, <4 x float> %11, <4 x float> %15
+; CHECK-NEXT: %24 = select <4 x i1> %20, <4 x float> %12, <4 x float> %16
+; CHECK-NEXT: %25 = select <4 x i1> %21, <4 x float> %13, <4 x float> %17
+; CHECK-NEXT: %26 = select <4 x i1> %22, <4 x float> %14, <4 x float> %18
+; CHECK-NEXT: store <4 x float> %24, <4 x float>* %0, align 16
+; CHECK-NEXT: store <4 x float> %25, <4 x float>* %1, align 16
+; CHECK-NEXT: store <4 x float> %26, <4 x float>* %2, align 16
+; CHECK-NEXT: ret <4 x float> %23
+; CHECK-NEXT: }
+
+define <16 x float> @fcmp_uno_on_16xfloat(<16 x float>, <16 x float>, <16 x float>, <16 x float>) {
+entry:
+ %4 = fcmp uno <16 x float> %0, %1
+ %5 = select <16 x i1> %4, <16 x float> %2, <16 x float> %3
+ ret <16 x float> %5
+}
+; CHECK-LABEL: define <4 x float> @fcmp_uno_on_16xfloat(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>) {
+; CHECK: entry:
+; CHECK-NEXT: %19 = fcmp uno <4 x float> %3, %7
+; CHECK-NEXT: %20 = fcmp uno <4 x float> %4, %8
+; CHECK-NEXT: %21 = fcmp uno <4 x float> %5, %9
+; CHECK-NEXT: %22 = fcmp uno <4 x float> %6, %10
+; CHECK-NEXT: %23 = select <4 x i1> %19, <4 x float> %11, <4 x float> %15
+; CHECK-NEXT: %24 = select <4 x i1> %20, <4 x float> %12, <4 x float> %16
+; CHECK-NEXT: %25 = select <4 x i1> %21, <4 x float> %13, <4 x float> %17
+; CHECK-NEXT: %26 = select <4 x i1> %22, <4 x float> %14, <4 x float> %18
+; CHECK-NEXT: store <4 x float> %24, <4 x float>* %0, align 16
+; CHECK-NEXT: store <4 x float> %25, <4 x float>* %1, align 16
+; CHECK-NEXT: store <4 x float> %26, <4 x float>* %2, align 16
+; CHECK-NEXT: ret <4 x float> %23
+; CHECK-NEXT: }
+
+define <16 x double> @fcmp_true_on_16xdouble(<16 x double>, <16 x double>, <16 x double>, <16 x double>) {
+entry:
+ %4 = fcmp true <16 x double> %0, %1
+ %5 = select <16 x i1> %4, <16 x double> %2, <16 x double> %3
+ ret <16 x double> %5
+}
+; CHECK-LABEL: define <2 x double> @fcmp_true_on_16xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
+; CHECK: entry:
+; CHECK-NEXT: %39 = fcmp true <2 x double> %7, %15
+; CHECK-NEXT: %40 = fcmp true <2 x double> %8, %16
+; CHECK-NEXT: %41 = fcmp true <2 x double> %9, %17
+; CHECK-NEXT: %42 = fcmp true <2 x double> %10, %18
+; CHECK-NEXT: %43 = fcmp true <2 x double> %11, %19
+; CHECK-NEXT: %44 = fcmp true <2 x double> %12, %20
+; CHECK-NEXT: %45 = fcmp true <2 x double> %13, %21
+; CHECK-NEXT: %46 = fcmp true <2 x double> %14, %22
+; CHECK-NEXT: %47 = select <2 x i1> %39, <2 x double> %23, <2 x double> %31
+; CHECK-NEXT: %48 = select <2 x i1> %40, <2 x double> %24, <2 x double> %32
+; CHECK-NEXT: %49 = select <2 x i1> %41, <2 x double> %25, <2 x double> %33
+; CHECK-NEXT: %50 = select <2 x i1> %42, <2 x double> %26, <2 x double> %34
+; CHECK-NEXT: %51 = select <2 x i1> %43, <2 x double> %27, <2 x double> %35
+; CHECK-NEXT: %52 = select <2 x i1> %44, <2 x double> %28, <2 x double> %36
+; CHECK-NEXT: %53 = select <2 x i1> %45, <2 x double> %29, <2 x double> %37
+; CHECK-NEXT: %54 = select <2 x i1> %46, <2 x double> %30, <2 x double> %38
+; CHECK-NEXT: store <2 x double> %48, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %49, <2 x double>* %1, align 16
+; CHECK-NEXT: store <2 x double> %50, <2 x double>* %2, align 16
+; CHECK-NEXT: store <2 x double> %51, <2 x double>* %3, align 16
+; CHECK-NEXT: store <2 x double> %52, <2 x double>* %4, align 16
+; CHECK-NEXT: store <2 x double> %53, <2 x double>* %5, align 16
+; CHECK-NEXT: store <2 x double> %54, <2 x double>* %6, align 16
+; CHECK-NEXT: ret <2 x double> %47
+; CHECK-NEXT: }
+
+define <16 x double> @fcmp_false_on_16xdouble(<16 x double>, <16 x double>, <16 x double>, <16 x double>) {
+entry:
+ %4 = fcmp false <16 x double> %0, %1
+ %5 = select <16 x i1> %4, <16 x double> %2, <16 x double> %3
+ ret <16 x double> %5
+}
+; CHECK-LABEL: define <2 x double> @fcmp_false_on_16xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
+; CHECK: entry:
+; CHECK-NEXT: %39 = fcmp false <2 x double> %7, %15
+; CHECK-NEXT: %40 = fcmp false <2 x double> %8, %16
+; CHECK-NEXT: %41 = fcmp false <2 x double> %9, %17
+; CHECK-NEXT: %42 = fcmp false <2 x double> %10, %18
+; CHECK-NEXT: %43 = fcmp false <2 x double> %11, %19
+; CHECK-NEXT: %44 = fcmp false <2 x double> %12, %20
+; CHECK-NEXT: %45 = fcmp false <2 x double> %13, %21
+; CHECK-NEXT: %46 = fcmp false <2 x double> %14, %22
+; CHECK-NEXT: %47 = select <2 x i1> %39, <2 x double> %23, <2 x double> %31
+; CHECK-NEXT: %48 = select <2 x i1> %40, <2 x double> %24, <2 x double> %32
+; CHECK-NEXT: %49 = select <2 x i1> %41, <2 x double> %25, <2 x double> %33
+; CHECK-NEXT: %50 = select <2 x i1> %42, <2 x double> %26, <2 x double> %34
+; CHECK-NEXT: %51 = select <2 x i1> %43, <2 x double> %27, <2 x double> %35
+; CHECK-NEXT: %52 = select <2 x i1> %44, <2 x double> %28, <2 x double> %36
+; CHECK-NEXT: %53 = select <2 x i1> %45, <2 x double> %29, <2 x double> %37
+; CHECK-NEXT: %54 = select <2 x i1> %46, <2 x double> %30, <2 x double> %38
+; CHECK-NEXT: store <2 x double> %48, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %49, <2 x double>* %1, align 16
+; CHECK-NEXT: store <2 x double> %50, <2 x double>* %2, align 16
+; CHECK-NEXT: store <2 x double> %51, <2 x double>* %3, align 16
+; CHECK-NEXT: store <2 x double> %52, <2 x double>* %4, align 16
+; CHECK-NEXT: store <2 x double> %53, <2 x double>* %5, align 16
+; CHECK-NEXT: store <2 x double> %54, <2 x double>* %6, align 16
+; CHECK-NEXT: ret <2 x double> %47
+; CHECK-NEXT: }
+
+define <16 x double> @fcmp_oeq_on_16xdouble(<16 x double>, <16 x double>, <16 x double>, <16 x double>) {
+entry:
+ %4 = fcmp oeq <16 x double> %0, %1
+ %5 = select <16 x i1> %4, <16 x double> %2, <16 x double> %3
+ ret <16 x double> %5
+}
+; CHECK-LABEL: define <2 x double> @fcmp_oeq_on_16xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
+; CHECK: entry:
+; CHECK-NEXT: %39 = fcmp oeq <2 x double> %7, %15
+; CHECK-NEXT: %40 = fcmp oeq <2 x double> %8, %16
+; CHECK-NEXT: %41 = fcmp oeq <2 x double> %9, %17
+; CHECK-NEXT: %42 = fcmp oeq <2 x double> %10, %18
+; CHECK-NEXT: %43 = fcmp oeq <2 x double> %11, %19
+; CHECK-NEXT: %44 = fcmp oeq <2 x double> %12, %20
+; CHECK-NEXT: %45 = fcmp oeq <2 x double> %13, %21
+; CHECK-NEXT: %46 = fcmp oeq <2 x double> %14, %22
+; CHECK-NEXT: %47 = select <2 x i1> %39, <2 x double> %23, <2 x double> %31
+; CHECK-NEXT: %48 = select <2 x i1> %40, <2 x double> %24, <2 x double> %32
+; CHECK-NEXT: %49 = select <2 x i1> %41, <2 x double> %25, <2 x double> %33
+; CHECK-NEXT: %50 = select <2 x i1> %42, <2 x double> %26, <2 x double> %34
+; CHECK-NEXT: %51 = select <2 x i1> %43, <2 x double> %27, <2 x double> %35
+; CHECK-NEXT: %52 = select <2 x i1> %44, <2 x double> %28, <2 x double> %36
+; CHECK-NEXT: %53 = select <2 x i1> %45, <2 x double> %29, <2 x double> %37
+; CHECK-NEXT: %54 = select <2 x i1> %46, <2 x double> %30, <2 x double> %38
+; CHECK-NEXT: store <2 x double> %48, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %49, <2 x double>* %1, align 16
+; CHECK-NEXT: store <2 x double> %50, <2 x double>* %2, align 16
+; CHECK-NEXT: store <2 x double> %51, <2 x double>* %3, align 16
+; CHECK-NEXT: store <2 x double> %52, <2 x double>* %4, align 16
+; CHECK-NEXT: store <2 x double> %53, <2 x double>* %5, align 16
+; CHECK-NEXT: store <2 x double> %54, <2 x double>* %6, align 16
+; CHECK-NEXT: ret <2 x double> %47
+; CHECK-NEXT: }
+
+define <16 x double> @fcmp_ueq_on_16xdouble(<16 x double>, <16 x double>, <16 x double>, <16 x double>) {
+entry:
+ %4 = fcmp ueq <16 x double> %0, %1
+ %5 = select <16 x i1> %4, <16 x double> %2, <16 x double> %3
+ ret <16 x double> %5
+}
+; CHECK-LABEL: define <2 x double> @fcmp_ueq_on_16xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
+; CHECK: entry:
+; CHECK-NEXT: %39 = fcmp ueq <2 x double> %7, %15
+; CHECK-NEXT: %40 = fcmp ueq <2 x double> %8, %16
+; CHECK-NEXT: %41 = fcmp ueq <2 x double> %9, %17
+; CHECK-NEXT: %42 = fcmp ueq <2 x double> %10, %18
+; CHECK-NEXT: %43 = fcmp ueq <2 x double> %11, %19
+; CHECK-NEXT: %44 = fcmp ueq <2 x double> %12, %20
+; CHECK-NEXT: %45 = fcmp ueq <2 x double> %13, %21
+; CHECK-NEXT: %46 = fcmp ueq <2 x double> %14, %22
+; CHECK-NEXT: %47 = select <2 x i1> %39, <2 x double> %23, <2 x double> %31
+; CHECK-NEXT: %48 = select <2 x i1> %40, <2 x double> %24, <2 x double> %32
+; CHECK-NEXT: %49 = select <2 x i1> %41, <2 x double> %25, <2 x double> %33
+; CHECK-NEXT: %50 = select <2 x i1> %42, <2 x double> %26, <2 x double> %34
+; CHECK-NEXT: %51 = select <2 x i1> %43, <2 x double> %27, <2 x double> %35
+; CHECK-NEXT: %52 = select <2 x i1> %44, <2 x double> %28, <2 x double> %36
+; CHECK-NEXT: %53 = select <2 x i1> %45, <2 x double> %29, <2 x double> %37
+; CHECK-NEXT: %54 = select <2 x i1> %46, <2 x double> %30, <2 x double> %38
+; CHECK-NEXT: store <2 x double> %48, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %49, <2 x double>* %1, align 16
+; CHECK-NEXT: store <2 x double> %50, <2 x double>* %2, align 16
+; CHECK-NEXT: store <2 x double> %51, <2 x double>* %3, align 16
+; CHECK-NEXT: store <2 x double> %52, <2 x double>* %4, align 16
+; CHECK-NEXT: store <2 x double> %53, <2 x double>* %5, align 16
+; CHECK-NEXT: store <2 x double> %54, <2 x double>* %6, align 16
+; CHECK-NEXT: ret <2 x double> %47
+; CHECK-NEXT: }
+
+define <16 x double> @fcmp_one_on_16xdouble(<16 x double>, <16 x double>, <16 x double>, <16 x double>) {
+entry:
+ %4 = fcmp one <16 x double> %0, %1
+ %5 = select <16 x i1> %4, <16 x double> %2, <16 x double> %3
+ ret <16 x double> %5
+}
+; CHECK-LABEL: define <2 x double> @fcmp_one_on_16xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
+; CHECK: entry:
+; CHECK-NEXT: %39 = fcmp one <2 x double> %7, %15
+; CHECK-NEXT: %40 = fcmp one <2 x double> %8, %16
+; CHECK-NEXT: %41 = fcmp one <2 x double> %9, %17
+; CHECK-NEXT: %42 = fcmp one <2 x double> %10, %18
+; CHECK-NEXT: %43 = fcmp one <2 x double> %11, %19
+; CHECK-NEXT: %44 = fcmp one <2 x double> %12, %20
+; CHECK-NEXT: %45 = fcmp one <2 x double> %13, %21
+; CHECK-NEXT: %46 = fcmp one <2 x double> %14, %22
+; CHECK-NEXT: %47 = select <2 x i1> %39, <2 x double> %23, <2 x double> %31
+; CHECK-NEXT: %48 = select <2 x i1> %40, <2 x double> %24, <2 x double> %32
+; CHECK-NEXT: %49 = select <2 x i1> %41, <2 x double> %25, <2 x double> %33
+; CHECK-NEXT: %50 = select <2 x i1> %42, <2 x double> %26, <2 x double> %34
+; CHECK-NEXT: %51 = select <2 x i1> %43, <2 x double> %27, <2 x double> %35
+; CHECK-NEXT: %52 = select <2 x i1> %44, <2 x double> %28, <2 x double> %36
+; CHECK-NEXT: %53 = select <2 x i1> %45, <2 x double> %29, <2 x double> %37
+; CHECK-NEXT: %54 = select <2 x i1> %46, <2 x double> %30, <2 x double> %38
+; CHECK-NEXT: store <2 x double> %48, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %49, <2 x double>* %1, align 16
+; CHECK-NEXT: store <2 x double> %50, <2 x double>* %2, align 16
+; CHECK-NEXT: store <2 x double> %51, <2 x double>* %3, align 16
+; CHECK-NEXT: store <2 x double> %52, <2 x double>* %4, align 16
+; CHECK-NEXT: store <2 x double> %53, <2 x double>* %5, align 16
+; CHECK-NEXT: store <2 x double> %54, <2 x double>* %6, align 16
+; CHECK-NEXT: ret <2 x double> %47
+; CHECK-NEXT: }
+
+define <16 x double> @fcmp_une_on_16xdouble(<16 x double>, <16 x double>, <16 x double>, <16 x double>) {
+entry:
+ %4 = fcmp une <16 x double> %0, %1
+ %5 = select <16 x i1> %4, <16 x double> %2, <16 x double> %3
+ ret <16 x double> %5
+}
+; CHECK-LABEL: define <2 x double> @fcmp_une_on_16xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
+; CHECK: entry:
+; CHECK-NEXT: %39 = fcmp une <2 x double> %7, %15
+; CHECK-NEXT: %40 = fcmp une <2 x double> %8, %16
+; CHECK-NEXT: %41 = fcmp une <2 x double> %9, %17
+; CHECK-NEXT: %42 = fcmp une <2 x double> %10, %18
+; CHECK-NEXT: %43 = fcmp une <2 x double> %11, %19
+; CHECK-NEXT: %44 = fcmp une <2 x double> %12, %20
+; CHECK-NEXT: %45 = fcmp une <2 x double> %13, %21
+; CHECK-NEXT: %46 = fcmp une <2 x double> %14, %22
+; CHECK-NEXT: %47 = select <2 x i1> %39, <2 x double> %23, <2 x double> %31
+; CHECK-NEXT: %48 = select <2 x i1> %40, <2 x double> %24, <2 x double> %32
+; CHECK-NEXT: %49 = select <2 x i1> %41, <2 x double> %25, <2 x double> %33
+; CHECK-NEXT: %50 = select <2 x i1> %42, <2 x double> %26, <2 x double> %34
+; CHECK-NEXT: %51 = select <2 x i1> %43, <2 x double> %27, <2 x double> %35
+; CHECK-NEXT: %52 = select <2 x i1> %44, <2 x double> %28, <2 x double> %36
+; CHECK-NEXT: %53 = select <2 x i1> %45, <2 x double> %29, <2 x double> %37
+; CHECK-NEXT: %54 = select <2 x i1> %46, <2 x double> %30, <2 x double> %38
+; CHECK-NEXT: store <2 x double> %48, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %49, <2 x double>* %1, align 16
+; CHECK-NEXT: store <2 x double> %50, <2 x double>* %2, align 16
+; CHECK-NEXT: store <2 x double> %51, <2 x double>* %3, align 16
+; CHECK-NEXT: store <2 x double> %52, <2 x double>* %4, align 16
+; CHECK-NEXT: store <2 x double> %53, <2 x double>* %5, align 16
+; CHECK-NEXT: store <2 x double> %54, <2 x double>* %6, align 16
+; CHECK-NEXT: ret <2 x double> %47
+; CHECK-NEXT: }
+
+define <16 x double> @fcmp_ogt_on_16xdouble(<16 x double>, <16 x double>, <16 x double>, <16 x double>) {
+entry:
+ %4 = fcmp ogt <16 x double> %0, %1
+ %5 = select <16 x i1> %4, <16 x double> %2, <16 x double> %3
+ ret <16 x double> %5
+}
+; CHECK-LABEL: define <2 x double> @fcmp_ogt_on_16xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
+; CHECK: entry:
+; CHECK-NEXT: %39 = fcmp ogt <2 x double> %7, %15
+; CHECK-NEXT: %40 = fcmp ogt <2 x double> %8, %16
+; CHECK-NEXT: %41 = fcmp ogt <2 x double> %9, %17
+; CHECK-NEXT: %42 = fcmp ogt <2 x double> %10, %18
+; CHECK-NEXT: %43 = fcmp ogt <2 x double> %11, %19
+; CHECK-NEXT: %44 = fcmp ogt <2 x double> %12, %20
+; CHECK-NEXT: %45 = fcmp ogt <2 x double> %13, %21
+; CHECK-NEXT: %46 = fcmp ogt <2 x double> %14, %22
+; CHECK-NEXT: %47 = select <2 x i1> %39, <2 x double> %23, <2 x double> %31
+; CHECK-NEXT: %48 = select <2 x i1> %40, <2 x double> %24, <2 x double> %32
+; CHECK-NEXT: %49 = select <2 x i1> %41, <2 x double> %25, <2 x double> %33
+; CHECK-NEXT: %50 = select <2 x i1> %42, <2 x double> %26, <2 x double> %34
+; CHECK-NEXT: %51 = select <2 x i1> %43, <2 x double> %27, <2 x double> %35
+; CHECK-NEXT: %52 = select <2 x i1> %44, <2 x double> %28, <2 x double> %36
+; CHECK-NEXT: %53 = select <2 x i1> %45, <2 x double> %29, <2 x double> %37
+; CHECK-NEXT: %54 = select <2 x i1> %46, <2 x double> %30, <2 x double> %38
+; CHECK-NEXT: store <2 x double> %48, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %49, <2 x double>* %1, align 16
+; CHECK-NEXT: store <2 x double> %50, <2 x double>* %2, align 16
+; CHECK-NEXT: store <2 x double> %51, <2 x double>* %3, align 16
+; CHECK-NEXT: store <2 x double> %52, <2 x double>* %4, align 16
+; CHECK-NEXT: store <2 x double> %53, <2 x double>* %5, align 16
+; CHECK-NEXT: store <2 x double> %54, <2 x double>* %6, align 16
+; CHECK-NEXT: ret <2 x double> %47
+; CHECK-NEXT: }
+
+define <16 x double> @fcmp_ugt_on_16xdouble(<16 x double>, <16 x double>, <16 x double>, <16 x double>) {
+entry:
+ %4 = fcmp ugt <16 x double> %0, %1
+ %5 = select <16 x i1> %4, <16 x double> %2, <16 x double> %3
+ ret <16 x double> %5
+}
+; CHECK-LABEL: define <2 x double> @fcmp_ugt_on_16xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
+; CHECK: entry:
+; CHECK-NEXT: %39 = fcmp ugt <2 x double> %7, %15
+; CHECK-NEXT: %40 = fcmp ugt <2 x double> %8, %16
+; CHECK-NEXT: %41 = fcmp ugt <2 x double> %9, %17
+; CHECK-NEXT: %42 = fcmp ugt <2 x double> %10, %18
+; CHECK-NEXT: %43 = fcmp ugt <2 x double> %11, %19
+; CHECK-NEXT: %44 = fcmp ugt <2 x double> %12, %20
+; CHECK-NEXT: %45 = fcmp ugt <2 x double> %13, %21
+; CHECK-NEXT: %46 = fcmp ugt <2 x double> %14, %22
+; CHECK-NEXT: %47 = select <2 x i1> %39, <2 x double> %23, <2 x double> %31
+; CHECK-NEXT: %48 = select <2 x i1> %40, <2 x double> %24, <2 x double> %32
+; CHECK-NEXT: %49 = select <2 x i1> %41, <2 x double> %25, <2 x double> %33
+; CHECK-NEXT: %50 = select <2 x i1> %42, <2 x double> %26, <2 x double> %34
+; CHECK-NEXT: %51 = select <2 x i1> %43, <2 x double> %27, <2 x double> %35
+; CHECK-NEXT: %52 = select <2 x i1> %44, <2 x double> %28, <2 x double> %36
+; CHECK-NEXT: %53 = select <2 x i1> %45, <2 x double> %29, <2 x double> %37
+; CHECK-NEXT: %54 = select <2 x i1> %46, <2 x double> %30, <2 x double> %38
+; CHECK-NEXT: store <2 x double> %48, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %49, <2 x double>* %1, align 16
+; CHECK-NEXT: store <2 x double> %50, <2 x double>* %2, align 16
+; CHECK-NEXT: store <2 x double> %51, <2 x double>* %3, align 16
+; CHECK-NEXT: store <2 x double> %52, <2 x double>* %4, align 16
+; CHECK-NEXT: store <2 x double> %53, <2 x double>* %5, align 16
+; CHECK-NEXT: store <2 x double> %54, <2 x double>* %6, align 16
+; CHECK-NEXT: ret <2 x double> %47
+; CHECK-NEXT: }
+
+define <16 x double> @fcmp_oge_on_16xdouble(<16 x double>, <16 x double>, <16 x double>, <16 x double>) {
+entry:
+ %4 = fcmp oge <16 x double> %0, %1
+ %5 = select <16 x i1> %4, <16 x double> %2, <16 x double> %3
+ ret <16 x double> %5
+}
+; CHECK-LABEL: define <2 x double> @fcmp_oge_on_16xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
+; CHECK: entry:
+; CHECK-NEXT: %39 = fcmp oge <2 x double> %7, %15
+; CHECK-NEXT: %40 = fcmp oge <2 x double> %8, %16
+; CHECK-NEXT: %41 = fcmp oge <2 x double> %9, %17
+; CHECK-NEXT: %42 = fcmp oge <2 x double> %10, %18
+; CHECK-NEXT: %43 = fcmp oge <2 x double> %11, %19
+; CHECK-NEXT: %44 = fcmp oge <2 x double> %12, %20
+; CHECK-NEXT: %45 = fcmp oge <2 x double> %13, %21
+; CHECK-NEXT: %46 = fcmp oge <2 x double> %14, %22
+; CHECK-NEXT: %47 = select <2 x i1> %39, <2 x double> %23, <2 x double> %31
+; CHECK-NEXT: %48 = select <2 x i1> %40, <2 x double> %24, <2 x double> %32
+; CHECK-NEXT: %49 = select <2 x i1> %41, <2 x double> %25, <2 x double> %33
+; CHECK-NEXT: %50 = select <2 x i1> %42, <2 x double> %26, <2 x double> %34
+; CHECK-NEXT: %51 = select <2 x i1> %43, <2 x double> %27, <2 x double> %35
+; CHECK-NEXT: %52 = select <2 x i1> %44, <2 x double> %28, <2 x double> %36
+; CHECK-NEXT: %53 = select <2 x i1> %45, <2 x double> %29, <2 x double> %37
+; CHECK-NEXT: %54 = select <2 x i1> %46, <2 x double> %30, <2 x double> %38
+; CHECK-NEXT: store <2 x double> %48, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %49, <2 x double>* %1, align 16
+; CHECK-NEXT: store <2 x double> %50, <2 x double>* %2, align 16
+; CHECK-NEXT: store <2 x double> %51, <2 x double>* %3, align 16
+; CHECK-NEXT: store <2 x double> %52, <2 x double>* %4, align 16
+; CHECK-NEXT: store <2 x double> %53, <2 x double>* %5, align 16
+; CHECK-NEXT: store <2 x double> %54, <2 x double>* %6, align 16
+; CHECK-NEXT: ret <2 x double> %47
+; CHECK-NEXT: }
+
+define <16 x double> @fcmp_uge_on_16xdouble(<16 x double>, <16 x double>, <16 x double>, <16 x double>) {
+entry:
+ %4 = fcmp uge <16 x double> %0, %1
+ %5 = select <16 x i1> %4, <16 x double> %2, <16 x double> %3
+ ret <16 x double> %5
+}
+; CHECK-LABEL: define <2 x double> @fcmp_uge_on_16xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
+; CHECK: entry:
+; CHECK-NEXT: %39 = fcmp uge <2 x double> %7, %15
+; CHECK-NEXT: %40 = fcmp uge <2 x double> %8, %16
+; CHECK-NEXT: %41 = fcmp uge <2 x double> %9, %17
+; CHECK-NEXT: %42 = fcmp uge <2 x double> %10, %18
+; CHECK-NEXT: %43 = fcmp uge <2 x double> %11, %19
+; CHECK-NEXT: %44 = fcmp uge <2 x double> %12, %20
+; CHECK-NEXT: %45 = fcmp uge <2 x double> %13, %21
+; CHECK-NEXT: %46 = fcmp uge <2 x double> %14, %22
+; CHECK-NEXT: %47 = select <2 x i1> %39, <2 x double> %23, <2 x double> %31
+; CHECK-NEXT: %48 = select <2 x i1> %40, <2 x double> %24, <2 x double> %32
+; CHECK-NEXT: %49 = select <2 x i1> %41, <2 x double> %25, <2 x double> %33
+; CHECK-NEXT: %50 = select <2 x i1> %42, <2 x double> %26, <2 x double> %34
+; CHECK-NEXT: %51 = select <2 x i1> %43, <2 x double> %27, <2 x double> %35
+; CHECK-NEXT: %52 = select <2 x i1> %44, <2 x double> %28, <2 x double> %36
+; CHECK-NEXT: %53 = select <2 x i1> %45, <2 x double> %29, <2 x double> %37
+; CHECK-NEXT: %54 = select <2 x i1> %46, <2 x double> %30, <2 x double> %38
+; CHECK-NEXT: store <2 x double> %48, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %49, <2 x double>* %1, align 16
+; CHECK-NEXT: store <2 x double> %50, <2 x double>* %2, align 16
+; CHECK-NEXT: store <2 x double> %51, <2 x double>* %3, align 16
+; CHECK-NEXT: store <2 x double> %52, <2 x double>* %4, align 16
+; CHECK-NEXT: store <2 x double> %53, <2 x double>* %5, align 16
+; CHECK-NEXT: store <2 x double> %54, <2 x double>* %6, align 16
+; CHECK-NEXT: ret <2 x double> %47
+; CHECK-NEXT: }
+
+define <16 x double> @fcmp_ord_on_16xdouble(<16 x double>, <16 x double>, <16 x double>, <16 x double>) {
+entry:
+ %4 = fcmp ord <16 x double> %0, %1
+ %5 = select <16 x i1> %4, <16 x double> %2, <16 x double> %3
+ ret <16 x double> %5
+}
+; CHECK-LABEL: define <2 x double> @fcmp_ord_on_16xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
+; CHECK: entry:
+; CHECK-NEXT: %39 = fcmp ord <2 x double> %7, %15
+; CHECK-NEXT: %40 = fcmp ord <2 x double> %8, %16
+; CHECK-NEXT: %41 = fcmp ord <2 x double> %9, %17
+; CHECK-NEXT: %42 = fcmp ord <2 x double> %10, %18
+; CHECK-NEXT: %43 = fcmp ord <2 x double> %11, %19
+; CHECK-NEXT: %44 = fcmp ord <2 x double> %12, %20
+; CHECK-NEXT: %45 = fcmp ord <2 x double> %13, %21
+; CHECK-NEXT: %46 = fcmp ord <2 x double> %14, %22
+; CHECK-NEXT: %47 = select <2 x i1> %39, <2 x double> %23, <2 x double> %31
+; CHECK-NEXT: %48 = select <2 x i1> %40, <2 x double> %24, <2 x double> %32
+; CHECK-NEXT: %49 = select <2 x i1> %41, <2 x double> %25, <2 x double> %33
+; CHECK-NEXT: %50 = select <2 x i1> %42, <2 x double> %26, <2 x double> %34
+; CHECK-NEXT: %51 = select <2 x i1> %43, <2 x double> %27, <2 x double> %35
+; CHECK-NEXT: %52 = select <2 x i1> %44, <2 x double> %28, <2 x double> %36
+; CHECK-NEXT: %53 = select <2 x i1> %45, <2 x double> %29, <2 x double> %37
+; CHECK-NEXT: %54 = select <2 x i1> %46, <2 x double> %30, <2 x double> %38
+; CHECK-NEXT: store <2 x double> %48, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %49, <2 x double>* %1, align 16
+; CHECK-NEXT: store <2 x double> %50, <2 x double>* %2, align 16
+; CHECK-NEXT: store <2 x double> %51, <2 x double>* %3, align 16
+; CHECK-NEXT: store <2 x double> %52, <2 x double>* %4, align 16
+; CHECK-NEXT: store <2 x double> %53, <2 x double>* %5, align 16
+; CHECK-NEXT: store <2 x double> %54, <2 x double>* %6, align 16
+; CHECK-NEXT: ret <2 x double> %47
+; CHECK-NEXT: }
+
+define <16 x double> @fcmp_uno_on_16xdouble(<16 x double>, <16 x double>, <16 x double>, <16 x double>) {
+entry:
+ %4 = fcmp uno <16 x double> %0, %1
+ %5 = select <16 x i1> %4, <16 x double> %2, <16 x double> %3
+ ret <16 x double> %5
+}
+; CHECK-LABEL: define <2 x double> @fcmp_uno_on_16xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
+; CHECK: entry:
+; CHECK-NEXT: %39 = fcmp uno <2 x double> %7, %15
+; CHECK-NEXT: %40 = fcmp uno <2 x double> %8, %16
+; CHECK-NEXT: %41 = fcmp uno <2 x double> %9, %17
+; CHECK-NEXT: %42 = fcmp uno <2 x double> %10, %18
+; CHECK-NEXT: %43 = fcmp uno <2 x double> %11, %19
+; CHECK-NEXT: %44 = fcmp uno <2 x double> %12, %20
+; CHECK-NEXT: %45 = fcmp uno <2 x double> %13, %21
+; CHECK-NEXT: %46 = fcmp uno <2 x double> %14, %22
+; CHECK-NEXT: %47 = select <2 x i1> %39, <2 x double> %23, <2 x double> %31
+; CHECK-NEXT: %48 = select <2 x i1> %40, <2 x double> %24, <2 x double> %32
+; CHECK-NEXT: %49 = select <2 x i1> %41, <2 x double> %25, <2 x double> %33
+; CHECK-NEXT: %50 = select <2 x i1> %42, <2 x double> %26, <2 x double> %34
+; CHECK-NEXT: %51 = select <2 x i1> %43, <2 x double> %27, <2 x double> %35
+; CHECK-NEXT: %52 = select <2 x i1> %44, <2 x double> %28, <2 x double> %36
+; CHECK-NEXT: %53 = select <2 x i1> %45, <2 x double> %29, <2 x double> %37
+; CHECK-NEXT: %54 = select <2 x i1> %46, <2 x double> %30, <2 x double> %38
+; CHECK-NEXT: store <2 x double> %48, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %49, <2 x double>* %1, align 16
+; CHECK-NEXT: store <2 x double> %50, <2 x double>* %2, align 16
+; CHECK-NEXT: store <2 x double> %51, <2 x double>* %3, align 16
+; CHECK-NEXT: store <2 x double> %52, <2 x double>* %4, align 16
+; CHECK-NEXT: store <2 x double> %53, <2 x double>* %5, align 16
+; CHECK-NEXT: store <2 x double> %54, <2 x double>* %6, align 16
+; CHECK-NEXT: ret <2 x double> %47
+; CHECK-NEXT: }
+
+define <20 x float> @fcmp_true_on_20xfloat(<20 x float>, <20 x float>, <20 x float>, <20 x float>) {
+entry:
+ %4 = fcmp true <20 x float> %0, %1
+ %5 = select <20 x i1> %4, <20 x float> %2, <20 x float> %3
+ ret <20 x float> %5
+}
+; CHECK-LABEL: define <4 x float> @fcmp_true_on_20xfloat(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>) {
+; CHECK: entry:
+; CHECK-NEXT: %24 = fcmp true <4 x float> %4, %9
+; CHECK-NEXT: %25 = fcmp true <4 x float> %5, %10
+; CHECK-NEXT: %26 = fcmp true <4 x float> %6, %11
+; CHECK-NEXT: %27 = fcmp true <4 x float> %7, %12
+; CHECK-NEXT: %28 = fcmp true <4 x float> %8, %13
+; CHECK-NEXT: %29 = select <4 x i1> %24, <4 x float> %14, <4 x float> %19
+; CHECK-NEXT: %30 = select <4 x i1> %25, <4 x float> %15, <4 x float> %20
+; CHECK-NEXT: %31 = select <4 x i1> %26, <4 x float> %16, <4 x float> %21
+; CHECK-NEXT: %32 = select <4 x i1> %27, <4 x float> %17, <4 x float> %22
+; CHECK-NEXT: %33 = select <4 x i1> %28, <4 x float> %18, <4 x float> %23
+; CHECK-NEXT: store <4 x float> %30, <4 x float>* %0, align 16
+; CHECK-NEXT: store <4 x float> %31, <4 x float>* %1, align 16
+; CHECK-NEXT: store <4 x float> %32, <4 x float>* %2, align 16
+; CHECK-NEXT: store <4 x float> %33, <4 x float>* %3, align 16
+; CHECK-NEXT: ret <4 x float> %29
+; CHECK-NEXT: }
+
+define <20 x float> @fcmp_false_on_20xfloat(<20 x float>, <20 x float>, <20 x float>, <20 x float>) {
+entry:
+ %4 = fcmp false <20 x float> %0, %1
+ %5 = select <20 x i1> %4, <20 x float> %2, <20 x float> %3
+ ret <20 x float> %5
+}
+; CHECK-LABEL: define <4 x float> @fcmp_false_on_20xfloat(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>) {
+; CHECK: entry:
+; CHECK-NEXT: %24 = fcmp false <4 x float> %4, %9
+; CHECK-NEXT: %25 = fcmp false <4 x float> %5, %10
+; CHECK-NEXT: %26 = fcmp false <4 x float> %6, %11
+; CHECK-NEXT: %27 = fcmp false <4 x float> %7, %12
+; CHECK-NEXT: %28 = fcmp false <4 x float> %8, %13
+; CHECK-NEXT: %29 = select <4 x i1> %24, <4 x float> %14, <4 x float> %19
+; CHECK-NEXT: %30 = select <4 x i1> %25, <4 x float> %15, <4 x float> %20
+; CHECK-NEXT: %31 = select <4 x i1> %26, <4 x float> %16, <4 x float> %21
+; CHECK-NEXT: %32 = select <4 x i1> %27, <4 x float> %17, <4 x float> %22
+; CHECK-NEXT: %33 = select <4 x i1> %28, <4 x float> %18, <4 x float> %23
+; CHECK-NEXT: store <4 x float> %30, <4 x float>* %0, align 16
+; CHECK-NEXT: store <4 x float> %31, <4 x float>* %1, align 16
+; CHECK-NEXT: store <4 x float> %32, <4 x float>* %2, align 16
+; CHECK-NEXT: store <4 x float> %33, <4 x float>* %3, align 16
+; CHECK-NEXT: ret <4 x float> %29
+; CHECK-NEXT: }
+
+define <20 x float> @fcmp_oeq_on_20xfloat(<20 x float>, <20 x float>, <20 x float>, <20 x float>) {
+entry:
+ %4 = fcmp oeq <20 x float> %0, %1
+ %5 = select <20 x i1> %4, <20 x float> %2, <20 x float> %3
+ ret <20 x float> %5
+}
+; CHECK-LABEL: define <4 x float> @fcmp_oeq_on_20xfloat(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>) {
+; CHECK: entry:
+; CHECK-NEXT: %24 = fcmp oeq <4 x float> %4, %9
+; CHECK-NEXT: %25 = fcmp oeq <4 x float> %5, %10
+; CHECK-NEXT: %26 = fcmp oeq <4 x float> %6, %11
+; CHECK-NEXT: %27 = fcmp oeq <4 x float> %7, %12
+; CHECK-NEXT: %28 = fcmp oeq <4 x float> %8, %13
+; CHECK-NEXT: %29 = select <4 x i1> %24, <4 x float> %14, <4 x float> %19
+; CHECK-NEXT: %30 = select <4 x i1> %25, <4 x float> %15, <4 x float> %20
+; CHECK-NEXT: %31 = select <4 x i1> %26, <4 x float> %16, <4 x float> %21
+; CHECK-NEXT: %32 = select <4 x i1> %27, <4 x float> %17, <4 x float> %22
+; CHECK-NEXT: %33 = select <4 x i1> %28, <4 x float> %18, <4 x float> %23
+; CHECK-NEXT: store <4 x float> %30, <4 x float>* %0, align 16
+; CHECK-NEXT: store <4 x float> %31, <4 x float>* %1, align 16
+; CHECK-NEXT: store <4 x float> %32, <4 x float>* %2, align 16
+; CHECK-NEXT: store <4 x float> %33, <4 x float>* %3, align 16
+; CHECK-NEXT: ret <4 x float> %29
+; CHECK-NEXT: }
+
+define <20 x float> @fcmp_ueq_on_20xfloat(<20 x float>, <20 x float>, <20 x float>, <20 x float>) {
+entry:
+ %4 = fcmp ueq <20 x float> %0, %1
+ %5 = select <20 x i1> %4, <20 x float> %2, <20 x float> %3
+ ret <20 x float> %5
+}
+; CHECK-LABEL: define <4 x float> @fcmp_ueq_on_20xfloat(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>) {
+; CHECK: entry:
+; CHECK-NEXT: %24 = fcmp ueq <4 x float> %4, %9
+; CHECK-NEXT: %25 = fcmp ueq <4 x float> %5, %10
+; CHECK-NEXT: %26 = fcmp ueq <4 x float> %6, %11
+; CHECK-NEXT: %27 = fcmp ueq <4 x float> %7, %12
+; CHECK-NEXT: %28 = fcmp ueq <4 x float> %8, %13
+; CHECK-NEXT: %29 = select <4 x i1> %24, <4 x float> %14, <4 x float> %19
+; CHECK-NEXT: %30 = select <4 x i1> %25, <4 x float> %15, <4 x float> %20
+; CHECK-NEXT: %31 = select <4 x i1> %26, <4 x float> %16, <4 x float> %21
+; CHECK-NEXT: %32 = select <4 x i1> %27, <4 x float> %17, <4 x float> %22
+; CHECK-NEXT: %33 = select <4 x i1> %28, <4 x float> %18, <4 x float> %23
+; CHECK-NEXT: store <4 x float> %30, <4 x float>* %0, align 16
+; CHECK-NEXT: store <4 x float> %31, <4 x float>* %1, align 16
+; CHECK-NEXT: store <4 x float> %32, <4 x float>* %2, align 16
+; CHECK-NEXT: store <4 x float> %33, <4 x float>* %3, align 16
+; CHECK-NEXT: ret <4 x float> %29
+; CHECK-NEXT: }
+
+define <20 x float> @fcmp_one_on_20xfloat(<20 x float>, <20 x float>, <20 x float>, <20 x float>) {
+entry:
+ %4 = fcmp one <20 x float> %0, %1
+ %5 = select <20 x i1> %4, <20 x float> %2, <20 x float> %3
+ ret <20 x float> %5
+}
+; CHECK-LABEL: define <4 x float> @fcmp_one_on_20xfloat(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>) {
+; CHECK: entry:
+; CHECK-NEXT: %24 = fcmp one <4 x float> %4, %9
+; CHECK-NEXT: %25 = fcmp one <4 x float> %5, %10
+; CHECK-NEXT: %26 = fcmp one <4 x float> %6, %11
+; CHECK-NEXT: %27 = fcmp one <4 x float> %7, %12
+; CHECK-NEXT: %28 = fcmp one <4 x float> %8, %13
+; CHECK-NEXT: %29 = select <4 x i1> %24, <4 x float> %14, <4 x float> %19
+; CHECK-NEXT: %30 = select <4 x i1> %25, <4 x float> %15, <4 x float> %20
+; CHECK-NEXT: %31 = select <4 x i1> %26, <4 x float> %16, <4 x float> %21
+; CHECK-NEXT: %32 = select <4 x i1> %27, <4 x float> %17, <4 x float> %22
+; CHECK-NEXT: %33 = select <4 x i1> %28, <4 x float> %18, <4 x float> %23
+; CHECK-NEXT: store <4 x float> %30, <4 x float>* %0, align 16
+; CHECK-NEXT: store <4 x float> %31, <4 x float>* %1, align 16
+; CHECK-NEXT: store <4 x float> %32, <4 x float>* %2, align 16
+; CHECK-NEXT: store <4 x float> %33, <4 x float>* %3, align 16
+; CHECK-NEXT: ret <4 x float> %29
+; CHECK-NEXT: }
+
+define <20 x float> @fcmp_une_on_20xfloat(<20 x float>, <20 x float>, <20 x float>, <20 x float>) {
+entry:
+ %4 = fcmp une <20 x float> %0, %1
+ %5 = select <20 x i1> %4, <20 x float> %2, <20 x float> %3
+ ret <20 x float> %5
+}
+; CHECK-LABEL: define <4 x float> @fcmp_une_on_20xfloat(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>) {
+; CHECK: entry:
+; CHECK-NEXT: %24 = fcmp une <4 x float> %4, %9
+; CHECK-NEXT: %25 = fcmp une <4 x float> %5, %10
+; CHECK-NEXT: %26 = fcmp une <4 x float> %6, %11
+; CHECK-NEXT: %27 = fcmp une <4 x float> %7, %12
+; CHECK-NEXT: %28 = fcmp une <4 x float> %8, %13
+; CHECK-NEXT: %29 = select <4 x i1> %24, <4 x float> %14, <4 x float> %19
+; CHECK-NEXT: %30 = select <4 x i1> %25, <4 x float> %15, <4 x float> %20
+; CHECK-NEXT: %31 = select <4 x i1> %26, <4 x float> %16, <4 x float> %21
+; CHECK-NEXT: %32 = select <4 x i1> %27, <4 x float> %17, <4 x float> %22
+; CHECK-NEXT: %33 = select <4 x i1> %28, <4 x float> %18, <4 x float> %23
+; CHECK-NEXT: store <4 x float> %30, <4 x float>* %0, align 16
+; CHECK-NEXT: store <4 x float> %31, <4 x float>* %1, align 16
+; CHECK-NEXT: store <4 x float> %32, <4 x float>* %2, align 16
+; CHECK-NEXT: store <4 x float> %33, <4 x float>* %3, align 16
+; CHECK-NEXT: ret <4 x float> %29
+; CHECK-NEXT: }
+
+define <20 x float> @fcmp_ogt_on_20xfloat(<20 x float>, <20 x float>, <20 x float>, <20 x float>) {
+entry:
+ %4 = fcmp ogt <20 x float> %0, %1
+ %5 = select <20 x i1> %4, <20 x float> %2, <20 x float> %3
+ ret <20 x float> %5
+}
+; CHECK-LABEL: define <4 x float> @fcmp_ogt_on_20xfloat(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>) {
+; CHECK: entry:
+; CHECK-NEXT: %24 = fcmp ogt <4 x float> %4, %9
+; CHECK-NEXT: %25 = fcmp ogt <4 x float> %5, %10
+; CHECK-NEXT: %26 = fcmp ogt <4 x float> %6, %11
+; CHECK-NEXT: %27 = fcmp ogt <4 x float> %7, %12
+; CHECK-NEXT: %28 = fcmp ogt <4 x float> %8, %13
+; CHECK-NEXT: %29 = select <4 x i1> %24, <4 x float> %14, <4 x float> %19
+; CHECK-NEXT: %30 = select <4 x i1> %25, <4 x float> %15, <4 x float> %20
+; CHECK-NEXT: %31 = select <4 x i1> %26, <4 x float> %16, <4 x float> %21
+; CHECK-NEXT: %32 = select <4 x i1> %27, <4 x float> %17, <4 x float> %22
+; CHECK-NEXT: %33 = select <4 x i1> %28, <4 x float> %18, <4 x float> %23
+; CHECK-NEXT: store <4 x float> %30, <4 x float>* %0, align 16
+; CHECK-NEXT: store <4 x float> %31, <4 x float>* %1, align 16
+; CHECK-NEXT: store <4 x float> %32, <4 x float>* %2, align 16
+; CHECK-NEXT: store <4 x float> %33, <4 x float>* %3, align 16
+; CHECK-NEXT: ret <4 x float> %29
+; CHECK-NEXT: }
+
+define <20 x float> @fcmp_ugt_on_20xfloat(<20 x float>, <20 x float>, <20 x float>, <20 x float>) {
+entry:
+ %4 = fcmp ugt <20 x float> %0, %1
+ %5 = select <20 x i1> %4, <20 x float> %2, <20 x float> %3
+ ret <20 x float> %5
+}
+; CHECK-LABEL: define <4 x float> @fcmp_ugt_on_20xfloat(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>) {
+; CHECK: entry:
+; CHECK-NEXT: %24 = fcmp ugt <4 x float> %4, %9
+; CHECK-NEXT: %25 = fcmp ugt <4 x float> %5, %10
+; CHECK-NEXT: %26 = fcmp ugt <4 x float> %6, %11
+; CHECK-NEXT: %27 = fcmp ugt <4 x float> %7, %12
+; CHECK-NEXT: %28 = fcmp ugt <4 x float> %8, %13
+; CHECK-NEXT: %29 = select <4 x i1> %24, <4 x float> %14, <4 x float> %19
+; CHECK-NEXT: %30 = select <4 x i1> %25, <4 x float> %15, <4 x float> %20
+; CHECK-NEXT: %31 = select <4 x i1> %26, <4 x float> %16, <4 x float> %21
+; CHECK-NEXT: %32 = select <4 x i1> %27, <4 x float> %17, <4 x float> %22
+; CHECK-NEXT: %33 = select <4 x i1> %28, <4 x float> %18, <4 x float> %23
+; CHECK-NEXT: store <4 x float> %30, <4 x float>* %0, align 16
+; CHECK-NEXT: store <4 x float> %31, <4 x float>* %1, align 16
+; CHECK-NEXT: store <4 x float> %32, <4 x float>* %2, align 16
+; CHECK-NEXT: store <4 x float> %33, <4 x float>* %3, align 16
+; CHECK-NEXT: ret <4 x float> %29
+; CHECK-NEXT: }
+
+define <20 x float> @fcmp_oge_on_20xfloat(<20 x float>, <20 x float>, <20 x float>, <20 x float>) {
+entry:
+ %4 = fcmp oge <20 x float> %0, %1
+ %5 = select <20 x i1> %4, <20 x float> %2, <20 x float> %3
+ ret <20 x float> %5
+}
+; CHECK-LABEL: define <4 x float> @fcmp_oge_on_20xfloat(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>) {
+; CHECK: entry:
+; CHECK-NEXT: %24 = fcmp oge <4 x float> %4, %9
+; CHECK-NEXT: %25 = fcmp oge <4 x float> %5, %10
+; CHECK-NEXT: %26 = fcmp oge <4 x float> %6, %11
+; CHECK-NEXT: %27 = fcmp oge <4 x float> %7, %12
+; CHECK-NEXT: %28 = fcmp oge <4 x float> %8, %13
+; CHECK-NEXT: %29 = select <4 x i1> %24, <4 x float> %14, <4 x float> %19
+; CHECK-NEXT: %30 = select <4 x i1> %25, <4 x float> %15, <4 x float> %20
+; CHECK-NEXT: %31 = select <4 x i1> %26, <4 x float> %16, <4 x float> %21
+; CHECK-NEXT: %32 = select <4 x i1> %27, <4 x float> %17, <4 x float> %22
+; CHECK-NEXT: %33 = select <4 x i1> %28, <4 x float> %18, <4 x float> %23
+; CHECK-NEXT: store <4 x float> %30, <4 x float>* %0, align 16
+; CHECK-NEXT: store <4 x float> %31, <4 x float>* %1, align 16
+; CHECK-NEXT: store <4 x float> %32, <4 x float>* %2, align 16
+; CHECK-NEXT: store <4 x float> %33, <4 x float>* %3, align 16
+; CHECK-NEXT: ret <4 x float> %29
+; CHECK-NEXT: }
+
+define <20 x float> @fcmp_uge_on_20xfloat(<20 x float>, <20 x float>, <20 x float>, <20 x float>) {
+entry:
+ %4 = fcmp uge <20 x float> %0, %1
+ %5 = select <20 x i1> %4, <20 x float> %2, <20 x float> %3
+ ret <20 x float> %5
+}
+; CHECK-LABEL: define <4 x float> @fcmp_uge_on_20xfloat(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>) {
+; CHECK: entry:
+; CHECK-NEXT: %24 = fcmp uge <4 x float> %4, %9
+; CHECK-NEXT: %25 = fcmp uge <4 x float> %5, %10
+; CHECK-NEXT: %26 = fcmp uge <4 x float> %6, %11
+; CHECK-NEXT: %27 = fcmp uge <4 x float> %7, %12
+; CHECK-NEXT: %28 = fcmp uge <4 x float> %8, %13
+; CHECK-NEXT: %29 = select <4 x i1> %24, <4 x float> %14, <4 x float> %19
+; CHECK-NEXT: %30 = select <4 x i1> %25, <4 x float> %15, <4 x float> %20
+; CHECK-NEXT: %31 = select <4 x i1> %26, <4 x float> %16, <4 x float> %21
+; CHECK-NEXT: %32 = select <4 x i1> %27, <4 x float> %17, <4 x float> %22
+; CHECK-NEXT: %33 = select <4 x i1> %28, <4 x float> %18, <4 x float> %23
+; CHECK-NEXT: store <4 x float> %30, <4 x float>* %0, align 16
+; CHECK-NEXT: store <4 x float> %31, <4 x float>* %1, align 16
+; CHECK-NEXT: store <4 x float> %32, <4 x float>* %2, align 16
+; CHECK-NEXT: store <4 x float> %33, <4 x float>* %3, align 16
+; CHECK-NEXT: ret <4 x float> %29
+; CHECK-NEXT: }
+
+define <20 x float> @fcmp_ord_on_20xfloat(<20 x float>, <20 x float>, <20 x float>, <20 x float>) {
+entry:
+ %4 = fcmp ord <20 x float> %0, %1
+ %5 = select <20 x i1> %4, <20 x float> %2, <20 x float> %3
+ ret <20 x float> %5
+}
+; CHECK-LABEL: define <4 x float> @fcmp_ord_on_20xfloat(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>) {
+; CHECK: entry:
+; CHECK-NEXT: %24 = fcmp ord <4 x float> %4, %9
+; CHECK-NEXT: %25 = fcmp ord <4 x float> %5, %10
+; CHECK-NEXT: %26 = fcmp ord <4 x float> %6, %11
+; CHECK-NEXT: %27 = fcmp ord <4 x float> %7, %12
+; CHECK-NEXT: %28 = fcmp ord <4 x float> %8, %13
+; CHECK-NEXT: %29 = select <4 x i1> %24, <4 x float> %14, <4 x float> %19
+; CHECK-NEXT: %30 = select <4 x i1> %25, <4 x float> %15, <4 x float> %20
+; CHECK-NEXT: %31 = select <4 x i1> %26, <4 x float> %16, <4 x float> %21
+; CHECK-NEXT: %32 = select <4 x i1> %27, <4 x float> %17, <4 x float> %22
+; CHECK-NEXT: %33 = select <4 x i1> %28, <4 x float> %18, <4 x float> %23
+; CHECK-NEXT: store <4 x float> %30, <4 x float>* %0, align 16
+; CHECK-NEXT: store <4 x float> %31, <4 x float>* %1, align 16
+; CHECK-NEXT: store <4 x float> %32, <4 x float>* %2, align 16
+; CHECK-NEXT: store <4 x float> %33, <4 x float>* %3, align 16
+; CHECK-NEXT: ret <4 x float> %29
+; CHECK-NEXT: }
+
+define <20 x float> @fcmp_uno_on_20xfloat(<20 x float>, <20 x float>, <20 x float>, <20 x float>) {
+entry:
+ %4 = fcmp uno <20 x float> %0, %1
+ %5 = select <20 x i1> %4, <20 x float> %2, <20 x float> %3
+ ret <20 x float> %5
+}
+; CHECK-LABEL: define <4 x float> @fcmp_uno_on_20xfloat(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>) {
+; CHECK: entry:
+; CHECK-NEXT: %24 = fcmp uno <4 x float> %4, %9
+; CHECK-NEXT: %25 = fcmp uno <4 x float> %5, %10
+; CHECK-NEXT: %26 = fcmp uno <4 x float> %6, %11
+; CHECK-NEXT: %27 = fcmp uno <4 x float> %7, %12
+; CHECK-NEXT: %28 = fcmp uno <4 x float> %8, %13
+; CHECK-NEXT: %29 = select <4 x i1> %24, <4 x float> %14, <4 x float> %19
+; CHECK-NEXT: %30 = select <4 x i1> %25, <4 x float> %15, <4 x float> %20
+; CHECK-NEXT: %31 = select <4 x i1> %26, <4 x float> %16, <4 x float> %21
+; CHECK-NEXT: %32 = select <4 x i1> %27, <4 x float> %17, <4 x float> %22
+; CHECK-NEXT: %33 = select <4 x i1> %28, <4 x float> %18, <4 x float> %23
+; CHECK-NEXT: store <4 x float> %30, <4 x float>* %0, align 16
+; CHECK-NEXT: store <4 x float> %31, <4 x float>* %1, align 16
+; CHECK-NEXT: store <4 x float> %32, <4 x float>* %2, align 16
+; CHECK-NEXT: store <4 x float> %33, <4 x float>* %3, align 16
+; CHECK-NEXT: ret <4 x float> %29
+; CHECK-NEXT: }
+
+define <20 x double> @fcmp_true_on_20xdouble(<20 x double>, <20 x double>, <20 x double>, <20 x double>) {
+entry:
+ %4 = fcmp true <20 x double> %0, %1
+ %5 = select <20 x i1> %4, <20 x double> %2, <20 x double> %3
+ ret <20 x double> %5
+}
+; CHECK-LABEL: define <2 x double> @fcmp_true_on_20xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
+; CHECK: entry:
+; CHECK-NEXT: %49 = fcmp true <2 x double> %9, %19
+; CHECK-NEXT: %50 = fcmp true <2 x double> %10, %20
+; CHECK-NEXT: %51 = fcmp true <2 x double> %11, %21
+; CHECK-NEXT: %52 = fcmp true <2 x double> %12, %22
+; CHECK-NEXT: %53 = fcmp true <2 x double> %13, %23
+; CHECK-NEXT: %54 = fcmp true <2 x double> %14, %24
+; CHECK-NEXT: %55 = fcmp true <2 x double> %15, %25
+; CHECK-NEXT: %56 = fcmp true <2 x double> %16, %26
+; CHECK-NEXT: %57 = fcmp true <2 x double> %17, %27
+; CHECK-NEXT: %58 = fcmp true <2 x double> %18, %28
+; CHECK-NEXT: %59 = select <2 x i1> %49, <2 x double> %29, <2 x double> %39
+; CHECK-NEXT: %60 = select <2 x i1> %50, <2 x double> %30, <2 x double> %40
+; CHECK-NEXT: %61 = select <2 x i1> %51, <2 x double> %31, <2 x double> %41
+; CHECK-NEXT: %62 = select <2 x i1> %52, <2 x double> %32, <2 x double> %42
+; CHECK-NEXT: %63 = select <2 x i1> %53, <2 x double> %33, <2 x double> %43
+; CHECK-NEXT: %64 = select <2 x i1> %54, <2 x double> %34, <2 x double> %44
+; CHECK-NEXT: %65 = select <2 x i1> %55, <2 x double> %35, <2 x double> %45
+; CHECK-NEXT: %66 = select <2 x i1> %56, <2 x double> %36, <2 x double> %46
+; CHECK-NEXT: %67 = select <2 x i1> %57, <2 x double> %37, <2 x double> %47
+; CHECK-NEXT: %68 = select <2 x i1> %58, <2 x double> %38, <2 x double> %48
+; CHECK-NEXT: store <2 x double> %60, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %61, <2 x double>* %1, align 16
+; CHECK-NEXT: store <2 x double> %62, <2 x double>* %2, align 16
+; CHECK-NEXT: store <2 x double> %63, <2 x double>* %3, align 16
+; CHECK-NEXT: store <2 x double> %64, <2 x double>* %4, align 16
+; CHECK-NEXT: store <2 x double> %65, <2 x double>* %5, align 16
+; CHECK-NEXT: store <2 x double> %66, <2 x double>* %6, align 16
+; CHECK-NEXT: store <2 x double> %67, <2 x double>* %7, align 16
+; CHECK-NEXT: store <2 x double> %68, <2 x double>* %8, align 16
+; CHECK-NEXT: ret <2 x double> %59
+; CHECK-NEXT: }
+
+define <20 x double> @fcmp_false_on_20xdouble(<20 x double>, <20 x double>, <20 x double>, <20 x double>) {
+entry:
+ %4 = fcmp false <20 x double> %0, %1
+ %5 = select <20 x i1> %4, <20 x double> %2, <20 x double> %3
+ ret <20 x double> %5
+}
+; CHECK-LABEL: define <2 x double> @fcmp_false_on_20xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
+; CHECK: entry:
+; CHECK-NEXT: %49 = fcmp false <2 x double> %9, %19
+; CHECK-NEXT: %50 = fcmp false <2 x double> %10, %20
+; CHECK-NEXT: %51 = fcmp false <2 x double> %11, %21
+; CHECK-NEXT: %52 = fcmp false <2 x double> %12, %22
+; CHECK-NEXT: %53 = fcmp false <2 x double> %13, %23
+; CHECK-NEXT: %54 = fcmp false <2 x double> %14, %24
+; CHECK-NEXT: %55 = fcmp false <2 x double> %15, %25
+; CHECK-NEXT: %56 = fcmp false <2 x double> %16, %26
+; CHECK-NEXT: %57 = fcmp false <2 x double> %17, %27
+; CHECK-NEXT: %58 = fcmp false <2 x double> %18, %28
+; CHECK-NEXT: %59 = select <2 x i1> %49, <2 x double> %29, <2 x double> %39
+; CHECK-NEXT: %60 = select <2 x i1> %50, <2 x double> %30, <2 x double> %40
+; CHECK-NEXT: %61 = select <2 x i1> %51, <2 x double> %31, <2 x double> %41
+; CHECK-NEXT: %62 = select <2 x i1> %52, <2 x double> %32, <2 x double> %42
+; CHECK-NEXT: %63 = select <2 x i1> %53, <2 x double> %33, <2 x double> %43
+; CHECK-NEXT: %64 = select <2 x i1> %54, <2 x double> %34, <2 x double> %44
+; CHECK-NEXT: %65 = select <2 x i1> %55, <2 x double> %35, <2 x double> %45
+; CHECK-NEXT: %66 = select <2 x i1> %56, <2 x double> %36, <2 x double> %46
+; CHECK-NEXT: %67 = select <2 x i1> %57, <2 x double> %37, <2 x double> %47
+; CHECK-NEXT: %68 = select <2 x i1> %58, <2 x double> %38, <2 x double> %48
+; CHECK-NEXT: store <2 x double> %60, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %61, <2 x double>* %1, align 16
+; CHECK-NEXT: store <2 x double> %62, <2 x double>* %2, align 16
+; CHECK-NEXT: store <2 x double> %63, <2 x double>* %3, align 16
+; CHECK-NEXT: store <2 x double> %64, <2 x double>* %4, align 16
+; CHECK-NEXT: store <2 x double> %65, <2 x double>* %5, align 16
+; CHECK-NEXT: store <2 x double> %66, <2 x double>* %6, align 16
+; CHECK-NEXT: store <2 x double> %67, <2 x double>* %7, align 16
+; CHECK-NEXT: store <2 x double> %68, <2 x double>* %8, align 16
+; CHECK-NEXT: ret <2 x double> %59
+; CHECK-NEXT: }
+
+define <20 x double> @fcmp_oeq_on_20xdouble(<20 x double>, <20 x double>, <20 x double>, <20 x double>) {
+entry:
+ %4 = fcmp oeq <20 x double> %0, %1
+ %5 = select <20 x i1> %4, <20 x double> %2, <20 x double> %3
+ ret <20 x double> %5
+}
+; CHECK-LABEL: define <2 x double> @fcmp_oeq_on_20xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
+; CHECK: entry:
+; CHECK-NEXT: %49 = fcmp oeq <2 x double> %9, %19
+; CHECK-NEXT: %50 = fcmp oeq <2 x double> %10, %20
+; CHECK-NEXT: %51 = fcmp oeq <2 x double> %11, %21
+; CHECK-NEXT: %52 = fcmp oeq <2 x double> %12, %22
+; CHECK-NEXT: %53 = fcmp oeq <2 x double> %13, %23
+; CHECK-NEXT: %54 = fcmp oeq <2 x double> %14, %24
+; CHECK-NEXT: %55 = fcmp oeq <2 x double> %15, %25
+; CHECK-NEXT: %56 = fcmp oeq <2 x double> %16, %26
+; CHECK-NEXT: %57 = fcmp oeq <2 x double> %17, %27
+; CHECK-NEXT: %58 = fcmp oeq <2 x double> %18, %28
+; CHECK-NEXT: %59 = select <2 x i1> %49, <2 x double> %29, <2 x double> %39
+; CHECK-NEXT: %60 = select <2 x i1> %50, <2 x double> %30, <2 x double> %40
+; CHECK-NEXT: %61 = select <2 x i1> %51, <2 x double> %31, <2 x double> %41
+; CHECK-NEXT: %62 = select <2 x i1> %52, <2 x double> %32, <2 x double> %42
+; CHECK-NEXT: %63 = select <2 x i1> %53, <2 x double> %33, <2 x double> %43
+; CHECK-NEXT: %64 = select <2 x i1> %54, <2 x double> %34, <2 x double> %44
+; CHECK-NEXT: %65 = select <2 x i1> %55, <2 x double> %35, <2 x double> %45
+; CHECK-NEXT: %66 = select <2 x i1> %56, <2 x double> %36, <2 x double> %46
+; CHECK-NEXT: %67 = select <2 x i1> %57, <2 x double> %37, <2 x double> %47
+; CHECK-NEXT: %68 = select <2 x i1> %58, <2 x double> %38, <2 x double> %48
+; CHECK-NEXT: store <2 x double> %60, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %61, <2 x double>* %1, align 16
+; CHECK-NEXT: store <2 x double> %62, <2 x double>* %2, align 16
+; CHECK-NEXT: store <2 x double> %63, <2 x double>* %3, align 16
+; CHECK-NEXT: store <2 x double> %64, <2 x double>* %4, align 16
+; CHECK-NEXT: store <2 x double> %65, <2 x double>* %5, align 16
+; CHECK-NEXT: store <2 x double> %66, <2 x double>* %6, align 16
+; CHECK-NEXT: store <2 x double> %67, <2 x double>* %7, align 16
+; CHECK-NEXT: store <2 x double> %68, <2 x double>* %8, align 16
+; CHECK-NEXT: ret <2 x double> %59
+; CHECK-NEXT: }
+
+define <20 x double> @fcmp_ueq_on_20xdouble(<20 x double>, <20 x double>, <20 x double>, <20 x double>) {
+entry:
+ %4 = fcmp ueq <20 x double> %0, %1
+ %5 = select <20 x i1> %4, <20 x double> %2, <20 x double> %3
+ ret <20 x double> %5
+}
+; CHECK-LABEL: define <2 x double> @fcmp_ueq_on_20xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
+; CHECK: entry:
+; CHECK-NEXT: %49 = fcmp ueq <2 x double> %9, %19
+; CHECK-NEXT: %50 = fcmp ueq <2 x double> %10, %20
+; CHECK-NEXT: %51 = fcmp ueq <2 x double> %11, %21
+; CHECK-NEXT: %52 = fcmp ueq <2 x double> %12, %22
+; CHECK-NEXT: %53 = fcmp ueq <2 x double> %13, %23
+; CHECK-NEXT: %54 = fcmp ueq <2 x double> %14, %24
+; CHECK-NEXT: %55 = fcmp ueq <2 x double> %15, %25
+; CHECK-NEXT: %56 = fcmp ueq <2 x double> %16, %26
+; CHECK-NEXT: %57 = fcmp ueq <2 x double> %17, %27
+; CHECK-NEXT: %58 = fcmp ueq <2 x double> %18, %28
+; CHECK-NEXT: %59 = select <2 x i1> %49, <2 x double> %29, <2 x double> %39
+; CHECK-NEXT: %60 = select <2 x i1> %50, <2 x double> %30, <2 x double> %40
+; CHECK-NEXT: %61 = select <2 x i1> %51, <2 x double> %31, <2 x double> %41
+; CHECK-NEXT: %62 = select <2 x i1> %52, <2 x double> %32, <2 x double> %42
+; CHECK-NEXT: %63 = select <2 x i1> %53, <2 x double> %33, <2 x double> %43
+; CHECK-NEXT: %64 = select <2 x i1> %54, <2 x double> %34, <2 x double> %44
+; CHECK-NEXT: %65 = select <2 x i1> %55, <2 x double> %35, <2 x double> %45
+; CHECK-NEXT: %66 = select <2 x i1> %56, <2 x double> %36, <2 x double> %46
+; CHECK-NEXT: %67 = select <2 x i1> %57, <2 x double> %37, <2 x double> %47
+; CHECK-NEXT: %68 = select <2 x i1> %58, <2 x double> %38, <2 x double> %48
+; CHECK-NEXT: store <2 x double> %60, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %61, <2 x double>* %1, align 16
+; CHECK-NEXT: store <2 x double> %62, <2 x double>* %2, align 16
+; CHECK-NEXT: store <2 x double> %63, <2 x double>* %3, align 16
+; CHECK-NEXT: store <2 x double> %64, <2 x double>* %4, align 16
+; CHECK-NEXT: store <2 x double> %65, <2 x double>* %5, align 16
+; CHECK-NEXT: store <2 x double> %66, <2 x double>* %6, align 16
+; CHECK-NEXT: store <2 x double> %67, <2 x double>* %7, align 16
+; CHECK-NEXT: store <2 x double> %68, <2 x double>* %8, align 16
+; CHECK-NEXT: ret <2 x double> %59
+; CHECK-NEXT: }
+
+define <20 x double> @fcmp_one_on_20xdouble(<20 x double>, <20 x double>, <20 x double>, <20 x double>) {
+entry:
+ %4 = fcmp one <20 x double> %0, %1
+ %5 = select <20 x i1> %4, <20 x double> %2, <20 x double> %3
+ ret <20 x double> %5
+}
+; CHECK-LABEL: define <2 x double> @fcmp_one_on_20xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
+; CHECK: entry:
+; CHECK-NEXT: %49 = fcmp one <2 x double> %9, %19
+; CHECK-NEXT: %50 = fcmp one <2 x double> %10, %20
+; CHECK-NEXT: %51 = fcmp one <2 x double> %11, %21
+; CHECK-NEXT: %52 = fcmp one <2 x double> %12, %22
+; CHECK-NEXT: %53 = fcmp one <2 x double> %13, %23
+; CHECK-NEXT: %54 = fcmp one <2 x double> %14, %24
+; CHECK-NEXT: %55 = fcmp one <2 x double> %15, %25
+; CHECK-NEXT: %56 = fcmp one <2 x double> %16, %26
+; CHECK-NEXT: %57 = fcmp one <2 x double> %17, %27
+; CHECK-NEXT: %58 = fcmp one <2 x double> %18, %28
+; CHECK-NEXT: %59 = select <2 x i1> %49, <2 x double> %29, <2 x double> %39
+; CHECK-NEXT: %60 = select <2 x i1> %50, <2 x double> %30, <2 x double> %40
+; CHECK-NEXT: %61 = select <2 x i1> %51, <2 x double> %31, <2 x double> %41
+; CHECK-NEXT: %62 = select <2 x i1> %52, <2 x double> %32, <2 x double> %42
+; CHECK-NEXT: %63 = select <2 x i1> %53, <2 x double> %33, <2 x double> %43
+; CHECK-NEXT: %64 = select <2 x i1> %54, <2 x double> %34, <2 x double> %44
+; CHECK-NEXT: %65 = select <2 x i1> %55, <2 x double> %35, <2 x double> %45
+; CHECK-NEXT: %66 = select <2 x i1> %56, <2 x double> %36, <2 x double> %46
+; CHECK-NEXT: %67 = select <2 x i1> %57, <2 x double> %37, <2 x double> %47
+; CHECK-NEXT: %68 = select <2 x i1> %58, <2 x double> %38, <2 x double> %48
+; CHECK-NEXT: store <2 x double> %60, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %61, <2 x double>* %1, align 16
+; CHECK-NEXT: store <2 x double> %62, <2 x double>* %2, align 16
+; CHECK-NEXT: store <2 x double> %63, <2 x double>* %3, align 16
+; CHECK-NEXT: store <2 x double> %64, <2 x double>* %4, align 16
+; CHECK-NEXT: store <2 x double> %65, <2 x double>* %5, align 16
+; CHECK-NEXT: store <2 x double> %66, <2 x double>* %6, align 16
+; CHECK-NEXT: store <2 x double> %67, <2 x double>* %7, align 16
+; CHECK-NEXT: store <2 x double> %68, <2 x double>* %8, align 16
+; CHECK-NEXT: ret <2 x double> %59
+; CHECK-NEXT: }
+
+define <20 x double> @fcmp_une_on_20xdouble(<20 x double>, <20 x double>, <20 x double>, <20 x double>) {
+entry:
+ %4 = fcmp une <20 x double> %0, %1
+ %5 = select <20 x i1> %4, <20 x double> %2, <20 x double> %3
+ ret <20 x double> %5
+}
+; CHECK-LABEL: define <2 x double> @fcmp_une_on_20xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
+; CHECK: entry:
+; CHECK-NEXT: %49 = fcmp une <2 x double> %9, %19
+; CHECK-NEXT: %50 = fcmp une <2 x double> %10, %20
+; CHECK-NEXT: %51 = fcmp une <2 x double> %11, %21
+; CHECK-NEXT: %52 = fcmp une <2 x double> %12, %22
+; CHECK-NEXT: %53 = fcmp une <2 x double> %13, %23
+; CHECK-NEXT: %54 = fcmp une <2 x double> %14, %24
+; CHECK-NEXT: %55 = fcmp une <2 x double> %15, %25
+; CHECK-NEXT: %56 = fcmp une <2 x double> %16, %26
+; CHECK-NEXT: %57 = fcmp une <2 x double> %17, %27
+; CHECK-NEXT: %58 = fcmp une <2 x double> %18, %28
+; CHECK-NEXT: %59 = select <2 x i1> %49, <2 x double> %29, <2 x double> %39
+; CHECK-NEXT: %60 = select <2 x i1> %50, <2 x double> %30, <2 x double> %40
+; CHECK-NEXT: %61 = select <2 x i1> %51, <2 x double> %31, <2 x double> %41
+; CHECK-NEXT: %62 = select <2 x i1> %52, <2 x double> %32, <2 x double> %42
+; CHECK-NEXT: %63 = select <2 x i1> %53, <2 x double> %33, <2 x double> %43
+; CHECK-NEXT: %64 = select <2 x i1> %54, <2 x double> %34, <2 x double> %44
+; CHECK-NEXT: %65 = select <2 x i1> %55, <2 x double> %35, <2 x double> %45
+; CHECK-NEXT: %66 = select <2 x i1> %56, <2 x double> %36, <2 x double> %46
+; CHECK-NEXT: %67 = select <2 x i1> %57, <2 x double> %37, <2 x double> %47
+; CHECK-NEXT: %68 = select <2 x i1> %58, <2 x double> %38, <2 x double> %48
+; CHECK-NEXT: store <2 x double> %60, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %61, <2 x double>* %1, align 16
+; CHECK-NEXT: store <2 x double> %62, <2 x double>* %2, align 16
+; CHECK-NEXT: store <2 x double> %63, <2 x double>* %3, align 16
+; CHECK-NEXT: store <2 x double> %64, <2 x double>* %4, align 16
+; CHECK-NEXT: store <2 x double> %65, <2 x double>* %5, align 16
+; CHECK-NEXT: store <2 x double> %66, <2 x double>* %6, align 16
+; CHECK-NEXT: store <2 x double> %67, <2 x double>* %7, align 16
+; CHECK-NEXT: store <2 x double> %68, <2 x double>* %8, align 16
+; CHECK-NEXT: ret <2 x double> %59
+; CHECK-NEXT: }
+
+define <20 x double> @fcmp_ogt_on_20xdouble(<20 x double>, <20 x double>, <20 x double>, <20 x double>) {
+entry:
+ %4 = fcmp ogt <20 x double> %0, %1
+ %5 = select <20 x i1> %4, <20 x double> %2, <20 x double> %3
+ ret <20 x double> %5
+}
+; CHECK-LABEL: define <2 x double> @fcmp_ogt_on_20xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
+; CHECK: entry:
+; CHECK-NEXT: %49 = fcmp ogt <2 x double> %9, %19
+; CHECK-NEXT: %50 = fcmp ogt <2 x double> %10, %20
+; CHECK-NEXT: %51 = fcmp ogt <2 x double> %11, %21
+; CHECK-NEXT: %52 = fcmp ogt <2 x double> %12, %22
+; CHECK-NEXT: %53 = fcmp ogt <2 x double> %13, %23
+; CHECK-NEXT: %54 = fcmp ogt <2 x double> %14, %24
+; CHECK-NEXT: %55 = fcmp ogt <2 x double> %15, %25
+; CHECK-NEXT: %56 = fcmp ogt <2 x double> %16, %26
+; CHECK-NEXT: %57 = fcmp ogt <2 x double> %17, %27
+; CHECK-NEXT: %58 = fcmp ogt <2 x double> %18, %28
+; CHECK-NEXT: %59 = select <2 x i1> %49, <2 x double> %29, <2 x double> %39
+; CHECK-NEXT: %60 = select <2 x i1> %50, <2 x double> %30, <2 x double> %40
+; CHECK-NEXT: %61 = select <2 x i1> %51, <2 x double> %31, <2 x double> %41
+; CHECK-NEXT: %62 = select <2 x i1> %52, <2 x double> %32, <2 x double> %42
+; CHECK-NEXT: %63 = select <2 x i1> %53, <2 x double> %33, <2 x double> %43
+; CHECK-NEXT: %64 = select <2 x i1> %54, <2 x double> %34, <2 x double> %44
+; CHECK-NEXT: %65 = select <2 x i1> %55, <2 x double> %35, <2 x double> %45
+; CHECK-NEXT: %66 = select <2 x i1> %56, <2 x double> %36, <2 x double> %46
+; CHECK-NEXT: %67 = select <2 x i1> %57, <2 x double> %37, <2 x double> %47
+; CHECK-NEXT: %68 = select <2 x i1> %58, <2 x double> %38, <2 x double> %48
+; CHECK-NEXT: store <2 x double> %60, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %61, <2 x double>* %1, align 16
+; CHECK-NEXT: store <2 x double> %62, <2 x double>* %2, align 16
+; CHECK-NEXT: store <2 x double> %63, <2 x double>* %3, align 16
+; CHECK-NEXT: store <2 x double> %64, <2 x double>* %4, align 16
+; CHECK-NEXT: store <2 x double> %65, <2 x double>* %5, align 16
+; CHECK-NEXT: store <2 x double> %66, <2 x double>* %6, align 16
+; CHECK-NEXT: store <2 x double> %67, <2 x double>* %7, align 16
+; CHECK-NEXT: store <2 x double> %68, <2 x double>* %8, align 16
+; CHECK-NEXT: ret <2 x double> %59
+; CHECK-NEXT: }
+
+define <20 x double> @fcmp_ugt_on_20xdouble(<20 x double>, <20 x double>, <20 x double>, <20 x double>) {
+entry:
+ %4 = fcmp ugt <20 x double> %0, %1
+ %5 = select <20 x i1> %4, <20 x double> %2, <20 x double> %3
+ ret <20 x double> %5
+}
+; CHECK-LABEL: define <2 x double> @fcmp_ugt_on_20xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
+; CHECK: entry:
+; CHECK-NEXT: %49 = fcmp ugt <2 x double> %9, %19
+; CHECK-NEXT: %50 = fcmp ugt <2 x double> %10, %20
+; CHECK-NEXT: %51 = fcmp ugt <2 x double> %11, %21
+; CHECK-NEXT: %52 = fcmp ugt <2 x double> %12, %22
+; CHECK-NEXT: %53 = fcmp ugt <2 x double> %13, %23
+; CHECK-NEXT: %54 = fcmp ugt <2 x double> %14, %24
+; CHECK-NEXT: %55 = fcmp ugt <2 x double> %15, %25
+; CHECK-NEXT: %56 = fcmp ugt <2 x double> %16, %26
+; CHECK-NEXT: %57 = fcmp ugt <2 x double> %17, %27
+; CHECK-NEXT: %58 = fcmp ugt <2 x double> %18, %28
+; CHECK-NEXT: %59 = select <2 x i1> %49, <2 x double> %29, <2 x double> %39
+; CHECK-NEXT: %60 = select <2 x i1> %50, <2 x double> %30, <2 x double> %40
+; CHECK-NEXT: %61 = select <2 x i1> %51, <2 x double> %31, <2 x double> %41
+; CHECK-NEXT: %62 = select <2 x i1> %52, <2 x double> %32, <2 x double> %42
+; CHECK-NEXT: %63 = select <2 x i1> %53, <2 x double> %33, <2 x double> %43
+; CHECK-NEXT: %64 = select <2 x i1> %54, <2 x double> %34, <2 x double> %44
+; CHECK-NEXT: %65 = select <2 x i1> %55, <2 x double> %35, <2 x double> %45
+; CHECK-NEXT: %66 = select <2 x i1> %56, <2 x double> %36, <2 x double> %46
+; CHECK-NEXT: %67 = select <2 x i1> %57, <2 x double> %37, <2 x double> %47
+; CHECK-NEXT: %68 = select <2 x i1> %58, <2 x double> %38, <2 x double> %48
+; CHECK-NEXT: store <2 x double> %60, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %61, <2 x double>* %1, align 16
+; CHECK-NEXT: store <2 x double> %62, <2 x double>* %2, align 16
+; CHECK-NEXT: store <2 x double> %63, <2 x double>* %3, align 16
+; CHECK-NEXT: store <2 x double> %64, <2 x double>* %4, align 16
+; CHECK-NEXT: store <2 x double> %65, <2 x double>* %5, align 16
+; CHECK-NEXT: store <2 x double> %66, <2 x double>* %6, align 16
+; CHECK-NEXT: store <2 x double> %67, <2 x double>* %7, align 16
+; CHECK-NEXT: store <2 x double> %68, <2 x double>* %8, align 16
+; CHECK-NEXT: ret <2 x double> %59
+; CHECK-NEXT: }
+
+define <20 x double> @fcmp_oge_on_20xdouble(<20 x double>, <20 x double>, <20 x double>, <20 x double>) {
+entry:
+ %4 = fcmp oge <20 x double> %0, %1
+ %5 = select <20 x i1> %4, <20 x double> %2, <20 x double> %3
+ ret <20 x double> %5
+}
+; CHECK-LABEL: define <2 x double> @fcmp_oge_on_20xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
+; CHECK: entry:
+; CHECK-NEXT: %49 = fcmp oge <2 x double> %9, %19
+; CHECK-NEXT: %50 = fcmp oge <2 x double> %10, %20
+; CHECK-NEXT: %51 = fcmp oge <2 x double> %11, %21
+; CHECK-NEXT: %52 = fcmp oge <2 x double> %12, %22
+; CHECK-NEXT: %53 = fcmp oge <2 x double> %13, %23
+; CHECK-NEXT: %54 = fcmp oge <2 x double> %14, %24
+; CHECK-NEXT: %55 = fcmp oge <2 x double> %15, %25
+; CHECK-NEXT: %56 = fcmp oge <2 x double> %16, %26
+; CHECK-NEXT: %57 = fcmp oge <2 x double> %17, %27
+; CHECK-NEXT: %58 = fcmp oge <2 x double> %18, %28
+; CHECK-NEXT: %59 = select <2 x i1> %49, <2 x double> %29, <2 x double> %39
+; CHECK-NEXT: %60 = select <2 x i1> %50, <2 x double> %30, <2 x double> %40
+; CHECK-NEXT: %61 = select <2 x i1> %51, <2 x double> %31, <2 x double> %41
+; CHECK-NEXT: %62 = select <2 x i1> %52, <2 x double> %32, <2 x double> %42
+; CHECK-NEXT: %63 = select <2 x i1> %53, <2 x double> %33, <2 x double> %43
+; CHECK-NEXT: %64 = select <2 x i1> %54, <2 x double> %34, <2 x double> %44
+; CHECK-NEXT: %65 = select <2 x i1> %55, <2 x double> %35, <2 x double> %45
+; CHECK-NEXT: %66 = select <2 x i1> %56, <2 x double> %36, <2 x double> %46
+; CHECK-NEXT: %67 = select <2 x i1> %57, <2 x double> %37, <2 x double> %47
+; CHECK-NEXT: %68 = select <2 x i1> %58, <2 x double> %38, <2 x double> %48
+; CHECK-NEXT: store <2 x double> %60, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %61, <2 x double>* %1, align 16
+; CHECK-NEXT: store <2 x double> %62, <2 x double>* %2, align 16
+; CHECK-NEXT: store <2 x double> %63, <2 x double>* %3, align 16
+; CHECK-NEXT: store <2 x double> %64, <2 x double>* %4, align 16
+; CHECK-NEXT: store <2 x double> %65, <2 x double>* %5, align 16
+; CHECK-NEXT: store <2 x double> %66, <2 x double>* %6, align 16
+; CHECK-NEXT: store <2 x double> %67, <2 x double>* %7, align 16
+; CHECK-NEXT: store <2 x double> %68, <2 x double>* %8, align 16
+; CHECK-NEXT: ret <2 x double> %59
+; CHECK-NEXT: }
+
+define <20 x double> @fcmp_uge_on_20xdouble(<20 x double>, <20 x double>, <20 x double>, <20 x double>) {
+entry:
+ %4 = fcmp uge <20 x double> %0, %1
+ %5 = select <20 x i1> %4, <20 x double> %2, <20 x double> %3
+ ret <20 x double> %5
+}
+; CHECK-LABEL: define <2 x double> @fcmp_uge_on_20xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
+; CHECK: entry:
+; CHECK-NEXT: %49 = fcmp uge <2 x double> %9, %19
+; CHECK-NEXT: %50 = fcmp uge <2 x double> %10, %20
+; CHECK-NEXT: %51 = fcmp uge <2 x double> %11, %21
+; CHECK-NEXT: %52 = fcmp uge <2 x double> %12, %22
+; CHECK-NEXT: %53 = fcmp uge <2 x double> %13, %23
+; CHECK-NEXT: %54 = fcmp uge <2 x double> %14, %24
+; CHECK-NEXT: %55 = fcmp uge <2 x double> %15, %25
+; CHECK-NEXT: %56 = fcmp uge <2 x double> %16, %26
+; CHECK-NEXT: %57 = fcmp uge <2 x double> %17, %27
+; CHECK-NEXT: %58 = fcmp uge <2 x double> %18, %28
+; CHECK-NEXT: %59 = select <2 x i1> %49, <2 x double> %29, <2 x double> %39
+; CHECK-NEXT: %60 = select <2 x i1> %50, <2 x double> %30, <2 x double> %40
+; CHECK-NEXT: %61 = select <2 x i1> %51, <2 x double> %31, <2 x double> %41
+; CHECK-NEXT: %62 = select <2 x i1> %52, <2 x double> %32, <2 x double> %42
+; CHECK-NEXT: %63 = select <2 x i1> %53, <2 x double> %33, <2 x double> %43
+; CHECK-NEXT: %64 = select <2 x i1> %54, <2 x double> %34, <2 x double> %44
+; CHECK-NEXT: %65 = select <2 x i1> %55, <2 x double> %35, <2 x double> %45
+; CHECK-NEXT: %66 = select <2 x i1> %56, <2 x double> %36, <2 x double> %46
+; CHECK-NEXT: %67 = select <2 x i1> %57, <2 x double> %37, <2 x double> %47
+; CHECK-NEXT: %68 = select <2 x i1> %58, <2 x double> %38, <2 x double> %48
+; CHECK-NEXT: store <2 x double> %60, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %61, <2 x double>* %1, align 16
+; CHECK-NEXT: store <2 x double> %62, <2 x double>* %2, align 16
+; CHECK-NEXT: store <2 x double> %63, <2 x double>* %3, align 16
+; CHECK-NEXT: store <2 x double> %64, <2 x double>* %4, align 16
+; CHECK-NEXT: store <2 x double> %65, <2 x double>* %5, align 16
+; CHECK-NEXT: store <2 x double> %66, <2 x double>* %6, align 16
+; CHECK-NEXT: store <2 x double> %67, <2 x double>* %7, align 16
+; CHECK-NEXT: store <2 x double> %68, <2 x double>* %8, align 16
+; CHECK-NEXT: ret <2 x double> %59
+; CHECK-NEXT: }
+
+define <20 x double> @fcmp_ord_on_20xdouble(<20 x double>, <20 x double>, <20 x double>, <20 x double>) {
+entry:
+ %4 = fcmp ord <20 x double> %0, %1
+ %5 = select <20 x i1> %4, <20 x double> %2, <20 x double> %3
+ ret <20 x double> %5
+}
+; CHECK-LABEL: define <2 x double> @fcmp_ord_on_20xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
+; CHECK: entry:
+; CHECK-NEXT: %49 = fcmp ord <2 x double> %9, %19
+; CHECK-NEXT: %50 = fcmp ord <2 x double> %10, %20
+; CHECK-NEXT: %51 = fcmp ord <2 x double> %11, %21
+; CHECK-NEXT: %52 = fcmp ord <2 x double> %12, %22
+; CHECK-NEXT: %53 = fcmp ord <2 x double> %13, %23
+; CHECK-NEXT: %54 = fcmp ord <2 x double> %14, %24
+; CHECK-NEXT: %55 = fcmp ord <2 x double> %15, %25
+; CHECK-NEXT: %56 = fcmp ord <2 x double> %16, %26
+; CHECK-NEXT: %57 = fcmp ord <2 x double> %17, %27
+; CHECK-NEXT: %58 = fcmp ord <2 x double> %18, %28
+; CHECK-NEXT: %59 = select <2 x i1> %49, <2 x double> %29, <2 x double> %39
+; CHECK-NEXT: %60 = select <2 x i1> %50, <2 x double> %30, <2 x double> %40
+; CHECK-NEXT: %61 = select <2 x i1> %51, <2 x double> %31, <2 x double> %41
+; CHECK-NEXT: %62 = select <2 x i1> %52, <2 x double> %32, <2 x double> %42
+; CHECK-NEXT: %63 = select <2 x i1> %53, <2 x double> %33, <2 x double> %43
+; CHECK-NEXT: %64 = select <2 x i1> %54, <2 x double> %34, <2 x double> %44
+; CHECK-NEXT: %65 = select <2 x i1> %55, <2 x double> %35, <2 x double> %45
+; CHECK-NEXT: %66 = select <2 x i1> %56, <2 x double> %36, <2 x double> %46
+; CHECK-NEXT: %67 = select <2 x i1> %57, <2 x double> %37, <2 x double> %47
+; CHECK-NEXT: %68 = select <2 x i1> %58, <2 x double> %38, <2 x double> %48
+; CHECK-NEXT: store <2 x double> %60, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %61, <2 x double>* %1, align 16
+; CHECK-NEXT: store <2 x double> %62, <2 x double>* %2, align 16
+; CHECK-NEXT: store <2 x double> %63, <2 x double>* %3, align 16
+; CHECK-NEXT: store <2 x double> %64, <2 x double>* %4, align 16
+; CHECK-NEXT: store <2 x double> %65, <2 x double>* %5, align 16
+; CHECK-NEXT: store <2 x double> %66, <2 x double>* %6, align 16
+; CHECK-NEXT: store <2 x double> %67, <2 x double>* %7, align 16
+; CHECK-NEXT: store <2 x double> %68, <2 x double>* %8, align 16
+; CHECK-NEXT: ret <2 x double> %59
+; CHECK-NEXT: }
+
+define <20 x double> @fcmp_uno_on_20xdouble(<20 x double>, <20 x double>, <20 x double>, <20 x double>) {
+entry:
+ %4 = fcmp uno <20 x double> %0, %1
+ %5 = select <20 x i1> %4, <20 x double> %2, <20 x double> %3
+ ret <20 x double> %5
+}
+; CHECK-LABEL: define <2 x double> @fcmp_uno_on_20xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
+; CHECK: entry:
+; CHECK-NEXT: %49 = fcmp uno <2 x double> %9, %19
+; CHECK-NEXT: %50 = fcmp uno <2 x double> %10, %20
+; CHECK-NEXT: %51 = fcmp uno <2 x double> %11, %21
+; CHECK-NEXT: %52 = fcmp uno <2 x double> %12, %22
+; CHECK-NEXT: %53 = fcmp uno <2 x double> %13, %23
+; CHECK-NEXT: %54 = fcmp uno <2 x double> %14, %24
+; CHECK-NEXT: %55 = fcmp uno <2 x double> %15, %25
+; CHECK-NEXT: %56 = fcmp uno <2 x double> %16, %26
+; CHECK-NEXT: %57 = fcmp uno <2 x double> %17, %27
+; CHECK-NEXT: %58 = fcmp uno <2 x double> %18, %28
+; CHECK-NEXT: %59 = select <2 x i1> %49, <2 x double> %29, <2 x double> %39
+; CHECK-NEXT: %60 = select <2 x i1> %50, <2 x double> %30, <2 x double> %40
+; CHECK-NEXT: %61 = select <2 x i1> %51, <2 x double> %31, <2 x double> %41
+; CHECK-NEXT: %62 = select <2 x i1> %52, <2 x double> %32, <2 x double> %42
+; CHECK-NEXT: %63 = select <2 x i1> %53, <2 x double> %33, <2 x double> %43
+; CHECK-NEXT: %64 = select <2 x i1> %54, <2 x double> %34, <2 x double> %44
+; CHECK-NEXT: %65 = select <2 x i1> %55, <2 x double> %35, <2 x double> %45
+; CHECK-NEXT: %66 = select <2 x i1> %56, <2 x double> %36, <2 x double> %46
+; CHECK-NEXT: %67 = select <2 x i1> %57, <2 x double> %37, <2 x double> %47
+; CHECK-NEXT: %68 = select <2 x i1> %58, <2 x double> %38, <2 x double> %48
+; CHECK-NEXT: store <2 x double> %60, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %61, <2 x double>* %1, align 16
+; CHECK-NEXT: store <2 x double> %62, <2 x double>* %2, align 16
+; CHECK-NEXT: store <2 x double> %63, <2 x double>* %3, align 16
+; CHECK-NEXT: store <2 x double> %64, <2 x double>* %4, align 16
+; CHECK-NEXT: store <2 x double> %65, <2 x double>* %5, align 16
+; CHECK-NEXT: store <2 x double> %66, <2 x double>* %6, align 16
+; CHECK-NEXT: store <2 x double> %67, <2 x double>* %7, align 16
+; CHECK-NEXT: store <2 x double> %68, <2 x double>* %8, align 16
+; CHECK-NEXT: ret <2 x double> %59
+; CHECK-NEXT: }
+
+define <2 x i8> @icmp_eq_on_2xi8(<2 x i8>, <2 x i8>, <2 x i8>, <2 x i8>) {
+entry:
+ %4 = icmp eq <2 x i8> %0, %1
+ %5 = select <2 x i1> %4, <2 x i8> %2, <2 x i8> %3
+ ret <2 x i8> %5
+}
+; CHECK-LABEL: define <16 x i8> @icmp_eq_on_2xi8(<16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp eq <16 x i8> %0, %1
+; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
+; CHECK-NEXT: ret <16 x i8> %5
+; CHECK-NEXT: }
+
+define <2 x i8> @icmp_ne_on_2xi8(<2 x i8>, <2 x i8>, <2 x i8>, <2 x i8>) {
+entry:
+ %4 = icmp ne <2 x i8> %0, %1
+ %5 = select <2 x i1> %4, <2 x i8> %2, <2 x i8> %3
+ ret <2 x i8> %5
+}
+; CHECK-LABEL: define <16 x i8> @icmp_ne_on_2xi8(<16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp ne <16 x i8> %0, %1
+; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
+; CHECK-NEXT: ret <16 x i8> %5
+; CHECK-NEXT: }
+
+define <2 x i8> @icmp_sgt_on_2xi8(<2 x i8>, <2 x i8>, <2 x i8>, <2 x i8>) {
+entry:
+ %4 = icmp sgt <2 x i8> %0, %1
+ %5 = select <2 x i1> %4, <2 x i8> %2, <2 x i8> %3
+ ret <2 x i8> %5
+}
+; CHECK-LABEL: define <16 x i8> @icmp_sgt_on_2xi8(<16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp sgt <16 x i8> %0, %1
+; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
+; CHECK-NEXT: ret <16 x i8> %5
+; CHECK-NEXT: }
+
+define <2 x i8> @icmp_ugt_on_2xi8(<2 x i8>, <2 x i8>, <2 x i8>, <2 x i8>) {
+entry:
+ %4 = icmp ugt <2 x i8> %0, %1
+ %5 = select <2 x i1> %4, <2 x i8> %2, <2 x i8> %3
+ ret <2 x i8> %5
+}
+; CHECK-LABEL: define <16 x i8> @icmp_ugt_on_2xi8(<16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp ugt <16 x i8> %0, %1
+; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
+; CHECK-NEXT: ret <16 x i8> %5
+; CHECK-NEXT: }
+
+define <2 x i8> @icmp_sge_on_2xi8(<2 x i8>, <2 x i8>, <2 x i8>, <2 x i8>) {
+entry:
+ %4 = icmp sge <2 x i8> %0, %1
+ %5 = select <2 x i1> %4, <2 x i8> %2, <2 x i8> %3
+ ret <2 x i8> %5
+}
+; CHECK-LABEL: define <16 x i8> @icmp_sge_on_2xi8(<16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp sge <16 x i8> %0, %1
+; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
+; CHECK-NEXT: ret <16 x i8> %5
+; CHECK-NEXT: }
+
+define <2 x i8> @icmp_uge_on_2xi8(<2 x i8>, <2 x i8>, <2 x i8>, <2 x i8>) {
+entry:
+ %4 = icmp uge <2 x i8> %0, %1
+ %5 = select <2 x i1> %4, <2 x i8> %2, <2 x i8> %3
+ ret <2 x i8> %5
+}
+; CHECK-LABEL: define <16 x i8> @icmp_uge_on_2xi8(<16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp uge <16 x i8> %0, %1
+; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
+; CHECK-NEXT: ret <16 x i8> %5
+; CHECK-NEXT: }
+
+define <2 x i8> @icmp_slt_on_2xi8(<2 x i8>, <2 x i8>, <2 x i8>, <2 x i8>) {
+entry:
+ %4 = icmp slt <2 x i8> %0, %1
+ %5 = select <2 x i1> %4, <2 x i8> %2, <2 x i8> %3
+ ret <2 x i8> %5
+}
+; CHECK-LABEL: define <16 x i8> @icmp_slt_on_2xi8(<16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp slt <16 x i8> %0, %1
+; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
+; CHECK-NEXT: ret <16 x i8> %5
+; CHECK-NEXT: }
+
+define <2 x i8> @icmp_ult_on_2xi8(<2 x i8>, <2 x i8>, <2 x i8>, <2 x i8>) {
+entry:
+ %4 = icmp ult <2 x i8> %0, %1
+ %5 = select <2 x i1> %4, <2 x i8> %2, <2 x i8> %3
+ ret <2 x i8> %5
+}
+; CHECK-LABEL: define <16 x i8> @icmp_ult_on_2xi8(<16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp ult <16 x i8> %0, %1
+; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
+; CHECK-NEXT: ret <16 x i8> %5
+; CHECK-NEXT: }
+
+define <2 x i8> @icmp_sle_on_2xi8(<2 x i8>, <2 x i8>, <2 x i8>, <2 x i8>) {
+entry:
+ %4 = icmp sle <2 x i8> %0, %1
+ %5 = select <2 x i1> %4, <2 x i8> %2, <2 x i8> %3
+ ret <2 x i8> %5
+}
+; CHECK-LABEL: define <16 x i8> @icmp_sle_on_2xi8(<16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp sle <16 x i8> %0, %1
+; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
+; CHECK-NEXT: ret <16 x i8> %5
+; CHECK-NEXT: }
+
+define <2 x i8> @icmp_ule_on_2xi8(<2 x i8>, <2 x i8>, <2 x i8>, <2 x i8>) {
+entry:
+ %4 = icmp ule <2 x i8> %0, %1
+ %5 = select <2 x i1> %4, <2 x i8> %2, <2 x i8> %3
+ ret <2 x i8> %5
+}
+; CHECK-LABEL: define <16 x i8> @icmp_ule_on_2xi8(<16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp ule <16 x i8> %0, %1
+; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
+; CHECK-NEXT: ret <16 x i8> %5
+; CHECK-NEXT: }
+
+define <2 x i16> @icmp_eq_on_2xi16(<2 x i16>, <2 x i16>, <2 x i16>, <2 x i16>) {
+entry:
+ %4 = icmp eq <2 x i16> %0, %1
+ %5 = select <2 x i1> %4, <2 x i16> %2, <2 x i16> %3
+ ret <2 x i16> %5
+}
+; CHECK-LABEL: define <8 x i16> @icmp_eq_on_2xi16(<8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp eq <8 x i16> %0, %1
+; CHECK-NEXT: %5 = select <8 x i1> %4, <8 x i16> %2, <8 x i16> %3
+; CHECK-NEXT: ret <8 x i16> %5
+; CHECK-NEXT: }
+
+define <2 x i16> @icmp_ne_on_2xi16(<2 x i16>, <2 x i16>, <2 x i16>, <2 x i16>) {
+entry:
+ %4 = icmp ne <2 x i16> %0, %1
+ %5 = select <2 x i1> %4, <2 x i16> %2, <2 x i16> %3
+ ret <2 x i16> %5
+}
+; CHECK-LABEL: define <8 x i16> @icmp_ne_on_2xi16(<8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp ne <8 x i16> %0, %1
+; CHECK-NEXT: %5 = select <8 x i1> %4, <8 x i16> %2, <8 x i16> %3
+; CHECK-NEXT: ret <8 x i16> %5
+; CHECK-NEXT: }
+
+define <2 x i16> @icmp_sgt_on_2xi16(<2 x i16>, <2 x i16>, <2 x i16>, <2 x i16>) {
+entry:
+ %4 = icmp sgt <2 x i16> %0, %1
+ %5 = select <2 x i1> %4, <2 x i16> %2, <2 x i16> %3
+ ret <2 x i16> %5
+}
+; CHECK-LABEL: define <8 x i16> @icmp_sgt_on_2xi16(<8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp sgt <8 x i16> %0, %1
+; CHECK-NEXT: %5 = select <8 x i1> %4, <8 x i16> %2, <8 x i16> %3
+; CHECK-NEXT: ret <8 x i16> %5
+; CHECK-NEXT: }
+
+define <2 x i16> @icmp_ugt_on_2xi16(<2 x i16>, <2 x i16>, <2 x i16>, <2 x i16>) {
+entry:
+ %4 = icmp ugt <2 x i16> %0, %1
+ %5 = select <2 x i1> %4, <2 x i16> %2, <2 x i16> %3
+ ret <2 x i16> %5
+}
+; CHECK-LABEL: define <8 x i16> @icmp_ugt_on_2xi16(<8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp ugt <8 x i16> %0, %1
+; CHECK-NEXT: %5 = select <8 x i1> %4, <8 x i16> %2, <8 x i16> %3
+; CHECK-NEXT: ret <8 x i16> %5
+; CHECK-NEXT: }
+
+define <2 x i16> @icmp_sge_on_2xi16(<2 x i16>, <2 x i16>, <2 x i16>, <2 x i16>) {
+entry:
+ %4 = icmp sge <2 x i16> %0, %1
+ %5 = select <2 x i1> %4, <2 x i16> %2, <2 x i16> %3
+ ret <2 x i16> %5
+}
+; CHECK-LABEL: define <8 x i16> @icmp_sge_on_2xi16(<8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp sge <8 x i16> %0, %1
+; CHECK-NEXT: %5 = select <8 x i1> %4, <8 x i16> %2, <8 x i16> %3
+; CHECK-NEXT: ret <8 x i16> %5
+; CHECK-NEXT: }
+
+define <2 x i16> @icmp_uge_on_2xi16(<2 x i16>, <2 x i16>, <2 x i16>, <2 x i16>) {
+entry:
+ %4 = icmp uge <2 x i16> %0, %1
+ %5 = select <2 x i1> %4, <2 x i16> %2, <2 x i16> %3
+ ret <2 x i16> %5
+}
+; CHECK-LABEL: define <8 x i16> @icmp_uge_on_2xi16(<8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp uge <8 x i16> %0, %1
+; CHECK-NEXT: %5 = select <8 x i1> %4, <8 x i16> %2, <8 x i16> %3
+; CHECK-NEXT: ret <8 x i16> %5
+; CHECK-NEXT: }
+
+define <2 x i16> @icmp_slt_on_2xi16(<2 x i16>, <2 x i16>, <2 x i16>, <2 x i16>) {
+entry:
+ %4 = icmp slt <2 x i16> %0, %1
+ %5 = select <2 x i1> %4, <2 x i16> %2, <2 x i16> %3
+ ret <2 x i16> %5
+}
+; CHECK-LABEL: define <8 x i16> @icmp_slt_on_2xi16(<8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp slt <8 x i16> %0, %1
+; CHECK-NEXT: %5 = select <8 x i1> %4, <8 x i16> %2, <8 x i16> %3
+; CHECK-NEXT: ret <8 x i16> %5
+; CHECK-NEXT: }
+
+define <2 x i16> @icmp_ult_on_2xi16(<2 x i16>, <2 x i16>, <2 x i16>, <2 x i16>) {
+entry:
+ %4 = icmp ult <2 x i16> %0, %1
+ %5 = select <2 x i1> %4, <2 x i16> %2, <2 x i16> %3
+ ret <2 x i16> %5
+}
+; CHECK-LABEL: define <8 x i16> @icmp_ult_on_2xi16(<8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp ult <8 x i16> %0, %1
+; CHECK-NEXT: %5 = select <8 x i1> %4, <8 x i16> %2, <8 x i16> %3
+; CHECK-NEXT: ret <8 x i16> %5
+; CHECK-NEXT: }
+
+define <2 x i16> @icmp_sle_on_2xi16(<2 x i16>, <2 x i16>, <2 x i16>, <2 x i16>) {
+entry:
+ %4 = icmp sle <2 x i16> %0, %1
+ %5 = select <2 x i1> %4, <2 x i16> %2, <2 x i16> %3
+ ret <2 x i16> %5
+}
+; CHECK-LABEL: define <8 x i16> @icmp_sle_on_2xi16(<8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp sle <8 x i16> %0, %1
+; CHECK-NEXT: %5 = select <8 x i1> %4, <8 x i16> %2, <8 x i16> %3
+; CHECK-NEXT: ret <8 x i16> %5
+; CHECK-NEXT: }
+
+define <2 x i16> @icmp_ule_on_2xi16(<2 x i16>, <2 x i16>, <2 x i16>, <2 x i16>) {
+entry:
+ %4 = icmp ule <2 x i16> %0, %1
+ %5 = select <2 x i1> %4, <2 x i16> %2, <2 x i16> %3
+ ret <2 x i16> %5
+}
+; CHECK-LABEL: define <8 x i16> @icmp_ule_on_2xi16(<8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp ule <8 x i16> %0, %1
+; CHECK-NEXT: %5 = select <8 x i1> %4, <8 x i16> %2, <8 x i16> %3
+; CHECK-NEXT: ret <8 x i16> %5
+; CHECK-NEXT: }
+
+define <2 x i32> @icmp_eq_on_2xi32(<2 x i32>, <2 x i32>, <2 x i32>, <2 x i32>) {
+entry:
+ %4 = icmp eq <2 x i32> %0, %1
+ %5 = select <2 x i1> %4, <2 x i32> %2, <2 x i32> %3
+ ret <2 x i32> %5
+}
+; CHECK-LABEL: define <4 x i32> @icmp_eq_on_2xi32(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp eq <4 x i32> %0, %1
+; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x i32> %2, <4 x i32> %3
+; CHECK-NEXT: ret <4 x i32> %5
+; CHECK-NEXT: }
+
+define <2 x i32> @icmp_ne_on_2xi32(<2 x i32>, <2 x i32>, <2 x i32>, <2 x i32>) {
+entry:
+ %4 = icmp ne <2 x i32> %0, %1
+ %5 = select <2 x i1> %4, <2 x i32> %2, <2 x i32> %3
+ ret <2 x i32> %5
+}
+; CHECK-LABEL: define <4 x i32> @icmp_ne_on_2xi32(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp ne <4 x i32> %0, %1
+; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x i32> %2, <4 x i32> %3
+; CHECK-NEXT: ret <4 x i32> %5
+; CHECK-NEXT: }
+
+define <2 x i32> @icmp_sgt_on_2xi32(<2 x i32>, <2 x i32>, <2 x i32>, <2 x i32>) {
+entry:
+ %4 = icmp sgt <2 x i32> %0, %1
+ %5 = select <2 x i1> %4, <2 x i32> %2, <2 x i32> %3
+ ret <2 x i32> %5
+}
+; CHECK-LABEL: define <4 x i32> @icmp_sgt_on_2xi32(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp sgt <4 x i32> %0, %1
+; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x i32> %2, <4 x i32> %3
+; CHECK-NEXT: ret <4 x i32> %5
+; CHECK-NEXT: }
+
+define <2 x i32> @icmp_ugt_on_2xi32(<2 x i32>, <2 x i32>, <2 x i32>, <2 x i32>) {
+entry:
+ %4 = icmp ugt <2 x i32> %0, %1
+ %5 = select <2 x i1> %4, <2 x i32> %2, <2 x i32> %3
+ ret <2 x i32> %5
+}
+; CHECK-LABEL: define <4 x i32> @icmp_ugt_on_2xi32(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp ugt <4 x i32> %0, %1
+; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x i32> %2, <4 x i32> %3
+; CHECK-NEXT: ret <4 x i32> %5
+; CHECK-NEXT: }
+
+define <2 x i32> @icmp_sge_on_2xi32(<2 x i32>, <2 x i32>, <2 x i32>, <2 x i32>) {
+entry:
+ %4 = icmp sge <2 x i32> %0, %1
+ %5 = select <2 x i1> %4, <2 x i32> %2, <2 x i32> %3
+ ret <2 x i32> %5
+}
+; CHECK-LABEL: define <4 x i32> @icmp_sge_on_2xi32(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp sge <4 x i32> %0, %1
+; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x i32> %2, <4 x i32> %3
+; CHECK-NEXT: ret <4 x i32> %5
+; CHECK-NEXT: }
+
+define <2 x i32> @icmp_uge_on_2xi32(<2 x i32>, <2 x i32>, <2 x i32>, <2 x i32>) {
+entry:
+ %4 = icmp uge <2 x i32> %0, %1
+ %5 = select <2 x i1> %4, <2 x i32> %2, <2 x i32> %3
+ ret <2 x i32> %5
+}
+; CHECK-LABEL: define <4 x i32> @icmp_uge_on_2xi32(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp uge <4 x i32> %0, %1
+; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x i32> %2, <4 x i32> %3
+; CHECK-NEXT: ret <4 x i32> %5
+; CHECK-NEXT: }
+
+define <2 x i32> @icmp_slt_on_2xi32(<2 x i32>, <2 x i32>, <2 x i32>, <2 x i32>) {
+entry:
+ %4 = icmp slt <2 x i32> %0, %1
+ %5 = select <2 x i1> %4, <2 x i32> %2, <2 x i32> %3
+ ret <2 x i32> %5
+}
+; CHECK-LABEL: define <4 x i32> @icmp_slt_on_2xi32(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp slt <4 x i32> %0, %1
+; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x i32> %2, <4 x i32> %3
+; CHECK-NEXT: ret <4 x i32> %5
+; CHECK-NEXT: }
+
+define <2 x i32> @icmp_ult_on_2xi32(<2 x i32>, <2 x i32>, <2 x i32>, <2 x i32>) {
+entry:
+ %4 = icmp ult <2 x i32> %0, %1
+ %5 = select <2 x i1> %4, <2 x i32> %2, <2 x i32> %3
+ ret <2 x i32> %5
+}
+; CHECK-LABEL: define <4 x i32> @icmp_ult_on_2xi32(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp ult <4 x i32> %0, %1
+; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x i32> %2, <4 x i32> %3
+; CHECK-NEXT: ret <4 x i32> %5
+; CHECK-NEXT: }
+
+define <2 x i32> @icmp_sle_on_2xi32(<2 x i32>, <2 x i32>, <2 x i32>, <2 x i32>) {
+entry:
+ %4 = icmp sle <2 x i32> %0, %1
+ %5 = select <2 x i1> %4, <2 x i32> %2, <2 x i32> %3
+ ret <2 x i32> %5
+}
+; CHECK-LABEL: define <4 x i32> @icmp_sle_on_2xi32(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp sle <4 x i32> %0, %1
+; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x i32> %2, <4 x i32> %3
+; CHECK-NEXT: ret <4 x i32> %5
+; CHECK-NEXT: }
+
+define <2 x i32> @icmp_ule_on_2xi32(<2 x i32>, <2 x i32>, <2 x i32>, <2 x i32>) {
+entry:
+ %4 = icmp ule <2 x i32> %0, %1
+ %5 = select <2 x i1> %4, <2 x i32> %2, <2 x i32> %3
+ ret <2 x i32> %5
+}
+; CHECK-LABEL: define <4 x i32> @icmp_ule_on_2xi32(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp ule <4 x i32> %0, %1
+; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x i32> %2, <4 x i32> %3
+; CHECK-NEXT: ret <4 x i32> %5
+; CHECK-NEXT: }
+
+define <2 x i64> @icmp_eq_on_2xi64(<2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
+entry:
+ %4 = icmp eq <2 x i64> %0, %1
+ %5 = select <2 x i1> %4, <2 x i64> %2, <2 x i64> %3
+ ret <2 x i64> %5
+}
+; CHECK-LABEL: define <2 x i64> @icmp_eq_on_2xi64(<2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp eq <2 x i64> %0, %1
+; CHECK-NEXT: %5 = select <2 x i1> %4, <2 x i64> %2, <2 x i64> %3
+; CHECK-NEXT: ret <2 x i64> %5
+; CHECK-NEXT: }
+
+define <2 x i64> @icmp_ne_on_2xi64(<2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
+entry:
+ %4 = icmp ne <2 x i64> %0, %1
+ %5 = select <2 x i1> %4, <2 x i64> %2, <2 x i64> %3
+ ret <2 x i64> %5
+}
+; CHECK-LABEL: define <2 x i64> @icmp_ne_on_2xi64(<2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp ne <2 x i64> %0, %1
+; CHECK-NEXT: %5 = select <2 x i1> %4, <2 x i64> %2, <2 x i64> %3
+; CHECK-NEXT: ret <2 x i64> %5
+; CHECK-NEXT: }
+
+define <2 x i64> @icmp_sgt_on_2xi64(<2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
+entry:
+ %4 = icmp sgt <2 x i64> %0, %1
+ %5 = select <2 x i1> %4, <2 x i64> %2, <2 x i64> %3
+ ret <2 x i64> %5
+}
+; CHECK-LABEL: define <2 x i64> @icmp_sgt_on_2xi64(<2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp sgt <2 x i64> %0, %1
+; CHECK-NEXT: %5 = select <2 x i1> %4, <2 x i64> %2, <2 x i64> %3
+; CHECK-NEXT: ret <2 x i64> %5
+; CHECK-NEXT: }
+
+define <2 x i64> @icmp_ugt_on_2xi64(<2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
+entry:
+ %4 = icmp ugt <2 x i64> %0, %1
+ %5 = select <2 x i1> %4, <2 x i64> %2, <2 x i64> %3
+ ret <2 x i64> %5
+}
+; CHECK-LABEL: define <2 x i64> @icmp_ugt_on_2xi64(<2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp ugt <2 x i64> %0, %1
+; CHECK-NEXT: %5 = select <2 x i1> %4, <2 x i64> %2, <2 x i64> %3
+; CHECK-NEXT: ret <2 x i64> %5
+; CHECK-NEXT: }
+
+define <2 x i64> @icmp_sge_on_2xi64(<2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
+entry:
+ %4 = icmp sge <2 x i64> %0, %1
+ %5 = select <2 x i1> %4, <2 x i64> %2, <2 x i64> %3
+ ret <2 x i64> %5
+}
+; CHECK-LABEL: define <2 x i64> @icmp_sge_on_2xi64(<2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp sge <2 x i64> %0, %1
+; CHECK-NEXT: %5 = select <2 x i1> %4, <2 x i64> %2, <2 x i64> %3
+; CHECK-NEXT: ret <2 x i64> %5
+; CHECK-NEXT: }
+
+define <2 x i64> @icmp_uge_on_2xi64(<2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
+entry:
+ %4 = icmp uge <2 x i64> %0, %1
+ %5 = select <2 x i1> %4, <2 x i64> %2, <2 x i64> %3
+ ret <2 x i64> %5
+}
+; CHECK-LABEL: define <2 x i64> @icmp_uge_on_2xi64(<2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp uge <2 x i64> %0, %1
+; CHECK-NEXT: %5 = select <2 x i1> %4, <2 x i64> %2, <2 x i64> %3
+; CHECK-NEXT: ret <2 x i64> %5
+; CHECK-NEXT: }
+
+define <2 x i64> @icmp_slt_on_2xi64(<2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
+entry:
+ %4 = icmp slt <2 x i64> %0, %1
+ %5 = select <2 x i1> %4, <2 x i64> %2, <2 x i64> %3
+ ret <2 x i64> %5
+}
+; CHECK-LABEL: define <2 x i64> @icmp_slt_on_2xi64(<2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp slt <2 x i64> %0, %1
+; CHECK-NEXT: %5 = select <2 x i1> %4, <2 x i64> %2, <2 x i64> %3
+; CHECK-NEXT: ret <2 x i64> %5
+; CHECK-NEXT: }
+
+define <2 x i64> @icmp_ult_on_2xi64(<2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
+entry:
+ %4 = icmp ult <2 x i64> %0, %1
+ %5 = select <2 x i1> %4, <2 x i64> %2, <2 x i64> %3
+ ret <2 x i64> %5
+}
+; CHECK-LABEL: define <2 x i64> @icmp_ult_on_2xi64(<2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp ult <2 x i64> %0, %1
+; CHECK-NEXT: %5 = select <2 x i1> %4, <2 x i64> %2, <2 x i64> %3
+; CHECK-NEXT: ret <2 x i64> %5
+; CHECK-NEXT: }
+
+define <2 x i64> @icmp_sle_on_2xi64(<2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
+entry:
+ %4 = icmp sle <2 x i64> %0, %1
+ %5 = select <2 x i1> %4, <2 x i64> %2, <2 x i64> %3
+ ret <2 x i64> %5
+}
+; CHECK-LABEL: define <2 x i64> @icmp_sle_on_2xi64(<2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp sle <2 x i64> %0, %1
+; CHECK-NEXT: %5 = select <2 x i1> %4, <2 x i64> %2, <2 x i64> %3
+; CHECK-NEXT: ret <2 x i64> %5
+; CHECK-NEXT: }
+
+define <2 x i64> @icmp_ule_on_2xi64(<2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
+entry:
+ %4 = icmp ule <2 x i64> %0, %1
+ %5 = select <2 x i1> %4, <2 x i64> %2, <2 x i64> %3
+ ret <2 x i64> %5
+}
+; CHECK-LABEL: define <2 x i64> @icmp_ule_on_2xi64(<2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp ule <2 x i64> %0, %1
+; CHECK-NEXT: %5 = select <2 x i1> %4, <2 x i64> %2, <2 x i64> %3
+; CHECK-NEXT: ret <2 x i64> %5
+; CHECK-NEXT: }
+
+define <2 x i8*> @icmp_eq_on_2xi8ptr(<2 x i8*>, <2 x i8*>, <2 x i8*>, <2 x i8*>) {
+entry:
+ %4 = icmp eq <2 x i8*> %0, %1
+ %5 = select <2 x i1> %4, <2 x i8*> %2, <2 x i8*> %3
+ ret <2 x i8*> %5
+}
+; CHECK-LABEL: define <4 x i8*> @icmp_eq_on_2xi8ptr(<4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp eq <4 x i8*> %0, %1
+; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x i8*> %2, <4 x i8*> %3
+; CHECK-NEXT: ret <4 x i8*> %5
+; CHECK-NEXT: }
+
+define <2 x i8*> @icmp_ne_on_2xi8ptr(<2 x i8*>, <2 x i8*>, <2 x i8*>, <2 x i8*>) {
+entry:
+ %4 = icmp ne <2 x i8*> %0, %1
+ %5 = select <2 x i1> %4, <2 x i8*> %2, <2 x i8*> %3
+ ret <2 x i8*> %5
+}
+; CHECK-LABEL: define <4 x i8*> @icmp_ne_on_2xi8ptr(<4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp ne <4 x i8*> %0, %1
+; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x i8*> %2, <4 x i8*> %3
+; CHECK-NEXT: ret <4 x i8*> %5
+; CHECK-NEXT: }
+
+define <2 x i8*> @icmp_sgt_on_2xi8ptr(<2 x i8*>, <2 x i8*>, <2 x i8*>, <2 x i8*>) {
+entry:
+ %4 = icmp sgt <2 x i8*> %0, %1
+ %5 = select <2 x i1> %4, <2 x i8*> %2, <2 x i8*> %3
+ ret <2 x i8*> %5
+}
+; CHECK-LABEL: define <4 x i8*> @icmp_sgt_on_2xi8ptr(<4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp sgt <4 x i8*> %0, %1
+; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x i8*> %2, <4 x i8*> %3
+; CHECK-NEXT: ret <4 x i8*> %5
+; CHECK-NEXT: }
+
+define <2 x i8*> @icmp_ugt_on_2xi8ptr(<2 x i8*>, <2 x i8*>, <2 x i8*>, <2 x i8*>) {
+entry:
+ %4 = icmp ugt <2 x i8*> %0, %1
+ %5 = select <2 x i1> %4, <2 x i8*> %2, <2 x i8*> %3
+ ret <2 x i8*> %5
+}
+; CHECK-LABEL: define <4 x i8*> @icmp_ugt_on_2xi8ptr(<4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp ugt <4 x i8*> %0, %1
+; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x i8*> %2, <4 x i8*> %3
+; CHECK-NEXT: ret <4 x i8*> %5
+; CHECK-NEXT: }
+
+define <2 x i8*> @icmp_sge_on_2xi8ptr(<2 x i8*>, <2 x i8*>, <2 x i8*>, <2 x i8*>) {
+entry:
+ %4 = icmp sge <2 x i8*> %0, %1
+ %5 = select <2 x i1> %4, <2 x i8*> %2, <2 x i8*> %3
+ ret <2 x i8*> %5
+}
+; CHECK-LABEL: define <4 x i8*> @icmp_sge_on_2xi8ptr(<4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp sge <4 x i8*> %0, %1
+; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x i8*> %2, <4 x i8*> %3
+; CHECK-NEXT: ret <4 x i8*> %5
+; CHECK-NEXT: }
+
+define <2 x i8*> @icmp_uge_on_2xi8ptr(<2 x i8*>, <2 x i8*>, <2 x i8*>, <2 x i8*>) {
+entry:
+ %4 = icmp uge <2 x i8*> %0, %1
+ %5 = select <2 x i1> %4, <2 x i8*> %2, <2 x i8*> %3
+ ret <2 x i8*> %5
+}
+; CHECK-LABEL: define <4 x i8*> @icmp_uge_on_2xi8ptr(<4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp uge <4 x i8*> %0, %1
+; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x i8*> %2, <4 x i8*> %3
+; CHECK-NEXT: ret <4 x i8*> %5
+; CHECK-NEXT: }
+
+define <2 x i8*> @icmp_slt_on_2xi8ptr(<2 x i8*>, <2 x i8*>, <2 x i8*>, <2 x i8*>) {
+entry:
+ %4 = icmp slt <2 x i8*> %0, %1
+ %5 = select <2 x i1> %4, <2 x i8*> %2, <2 x i8*> %3
+ ret <2 x i8*> %5
+}
+; CHECK-LABEL: define <4 x i8*> @icmp_slt_on_2xi8ptr(<4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp slt <4 x i8*> %0, %1
+; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x i8*> %2, <4 x i8*> %3
+; CHECK-NEXT: ret <4 x i8*> %5
+; CHECK-NEXT: }
+
+define <2 x i8*> @icmp_ult_on_2xi8ptr(<2 x i8*>, <2 x i8*>, <2 x i8*>, <2 x i8*>) {
+entry:
+ %4 = icmp ult <2 x i8*> %0, %1
+ %5 = select <2 x i1> %4, <2 x i8*> %2, <2 x i8*> %3
+ ret <2 x i8*> %5
+}
+; CHECK-LABEL: define <4 x i8*> @icmp_ult_on_2xi8ptr(<4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp ult <4 x i8*> %0, %1
+; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x i8*> %2, <4 x i8*> %3
+; CHECK-NEXT: ret <4 x i8*> %5
+; CHECK-NEXT: }
+
+define <2 x i8*> @icmp_sle_on_2xi8ptr(<2 x i8*>, <2 x i8*>, <2 x i8*>, <2 x i8*>) {
+entry:
+ %4 = icmp sle <2 x i8*> %0, %1
+ %5 = select <2 x i1> %4, <2 x i8*> %2, <2 x i8*> %3
+ ret <2 x i8*> %5
+}
+; CHECK-LABEL: define <4 x i8*> @icmp_sle_on_2xi8ptr(<4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp sle <4 x i8*> %0, %1
+; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x i8*> %2, <4 x i8*> %3
+; CHECK-NEXT: ret <4 x i8*> %5
+; CHECK-NEXT: }
+
+define <2 x i8*> @icmp_ule_on_2xi8ptr(<2 x i8*>, <2 x i8*>, <2 x i8*>, <2 x i8*>) {
+entry:
+ %4 = icmp ule <2 x i8*> %0, %1
+ %5 = select <2 x i1> %4, <2 x i8*> %2, <2 x i8*> %3
+ ret <2 x i8*> %5
+}
+; CHECK-LABEL: define <4 x i8*> @icmp_ule_on_2xi8ptr(<4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp ule <4 x i8*> %0, %1
+; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x i8*> %2, <4 x i8*> %3
+; CHECK-NEXT: ret <4 x i8*> %5
+; CHECK-NEXT: }
+
+define <4 x i8> @icmp_eq_on_4xi8(<4 x i8>, <4 x i8>, <4 x i8>, <4 x i8>) {
+entry:
+ %4 = icmp eq <4 x i8> %0, %1
+ %5 = select <4 x i1> %4, <4 x i8> %2, <4 x i8> %3
+ ret <4 x i8> %5
+}
+; CHECK-LABEL: define <16 x i8> @icmp_eq_on_4xi8(<16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp eq <16 x i8> %0, %1
+; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
+; CHECK-NEXT: ret <16 x i8> %5
+; CHECK-NEXT: }
+
+define <4 x i8> @icmp_ne_on_4xi8(<4 x i8>, <4 x i8>, <4 x i8>, <4 x i8>) {
+entry:
+ %4 = icmp ne <4 x i8> %0, %1
+ %5 = select <4 x i1> %4, <4 x i8> %2, <4 x i8> %3
+ ret <4 x i8> %5
+}
+; CHECK-LABEL: define <16 x i8> @icmp_ne_on_4xi8(<16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp ne <16 x i8> %0, %1
+; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
+; CHECK-NEXT: ret <16 x i8> %5
+; CHECK-NEXT: }
+
+define <4 x i8> @icmp_sgt_on_4xi8(<4 x i8>, <4 x i8>, <4 x i8>, <4 x i8>) {
+entry:
+ %4 = icmp sgt <4 x i8> %0, %1
+ %5 = select <4 x i1> %4, <4 x i8> %2, <4 x i8> %3
+ ret <4 x i8> %5
+}
+; CHECK-LABEL: define <16 x i8> @icmp_sgt_on_4xi8(<16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp sgt <16 x i8> %0, %1
+; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
+; CHECK-NEXT: ret <16 x i8> %5
+; CHECK-NEXT: }
+
+define <4 x i8> @icmp_ugt_on_4xi8(<4 x i8>, <4 x i8>, <4 x i8>, <4 x i8>) {
+entry:
+ %4 = icmp ugt <4 x i8> %0, %1
+ %5 = select <4 x i1> %4, <4 x i8> %2, <4 x i8> %3
+ ret <4 x i8> %5
+}
+; CHECK-LABEL: define <16 x i8> @icmp_ugt_on_4xi8(<16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp ugt <16 x i8> %0, %1
+; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
+; CHECK-NEXT: ret <16 x i8> %5
+; CHECK-NEXT: }
+
+define <4 x i8> @icmp_sge_on_4xi8(<4 x i8>, <4 x i8>, <4 x i8>, <4 x i8>) {
+entry:
+ %4 = icmp sge <4 x i8> %0, %1
+ %5 = select <4 x i1> %4, <4 x i8> %2, <4 x i8> %3
+ ret <4 x i8> %5
+}
+; CHECK-LABEL: define <16 x i8> @icmp_sge_on_4xi8(<16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp sge <16 x i8> %0, %1
+; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
+; CHECK-NEXT: ret <16 x i8> %5
+; CHECK-NEXT: }
+
+define <4 x i8> @icmp_uge_on_4xi8(<4 x i8>, <4 x i8>, <4 x i8>, <4 x i8>) {
+entry:
+ %4 = icmp uge <4 x i8> %0, %1
+ %5 = select <4 x i1> %4, <4 x i8> %2, <4 x i8> %3
+ ret <4 x i8> %5
+}
+; CHECK-LABEL: define <16 x i8> @icmp_uge_on_4xi8(<16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp uge <16 x i8> %0, %1
+; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
+; CHECK-NEXT: ret <16 x i8> %5
+; CHECK-NEXT: }
+
+define <4 x i8> @icmp_slt_on_4xi8(<4 x i8>, <4 x i8>, <4 x i8>, <4 x i8>) {
+entry:
+ %4 = icmp slt <4 x i8> %0, %1
+ %5 = select <4 x i1> %4, <4 x i8> %2, <4 x i8> %3
+ ret <4 x i8> %5
+}
+; CHECK-LABEL: define <16 x i8> @icmp_slt_on_4xi8(<16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp slt <16 x i8> %0, %1
+; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
+; CHECK-NEXT: ret <16 x i8> %5
+; CHECK-NEXT: }
+
+define <4 x i8> @icmp_ult_on_4xi8(<4 x i8>, <4 x i8>, <4 x i8>, <4 x i8>) {
+entry:
+ %4 = icmp ult <4 x i8> %0, %1
+ %5 = select <4 x i1> %4, <4 x i8> %2, <4 x i8> %3
+ ret <4 x i8> %5
+}
+; CHECK-LABEL: define <16 x i8> @icmp_ult_on_4xi8(<16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp ult <16 x i8> %0, %1
+; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
+; CHECK-NEXT: ret <16 x i8> %5
+; CHECK-NEXT: }
+
+define <4 x i8> @icmp_sle_on_4xi8(<4 x i8>, <4 x i8>, <4 x i8>, <4 x i8>) {
+entry:
+ %4 = icmp sle <4 x i8> %0, %1
+ %5 = select <4 x i1> %4, <4 x i8> %2, <4 x i8> %3
+ ret <4 x i8> %5
+}
+; CHECK-LABEL: define <16 x i8> @icmp_sle_on_4xi8(<16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp sle <16 x i8> %0, %1
+; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
+; CHECK-NEXT: ret <16 x i8> %5
+; CHECK-NEXT: }
+
+define <4 x i8> @icmp_ule_on_4xi8(<4 x i8>, <4 x i8>, <4 x i8>, <4 x i8>) {
+entry:
+ %4 = icmp ule <4 x i8> %0, %1
+ %5 = select <4 x i1> %4, <4 x i8> %2, <4 x i8> %3
+ ret <4 x i8> %5
+}
+; CHECK-LABEL: define <16 x i8> @icmp_ule_on_4xi8(<16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp ule <16 x i8> %0, %1
+; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
+; CHECK-NEXT: ret <16 x i8> %5
+; CHECK-NEXT: }
+
+define <4 x i16> @icmp_eq_on_4xi16(<4 x i16>, <4 x i16>, <4 x i16>, <4 x i16>) {
+entry:
+ %4 = icmp eq <4 x i16> %0, %1
+ %5 = select <4 x i1> %4, <4 x i16> %2, <4 x i16> %3
+ ret <4 x i16> %5
+}
+; CHECK-LABEL: define <8 x i16> @icmp_eq_on_4xi16(<8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp eq <8 x i16> %0, %1
+; CHECK-NEXT: %5 = select <8 x i1> %4, <8 x i16> %2, <8 x i16> %3
+; CHECK-NEXT: ret <8 x i16> %5
+; CHECK-NEXT: }
+
+define <4 x i16> @icmp_ne_on_4xi16(<4 x i16>, <4 x i16>, <4 x i16>, <4 x i16>) {
+entry:
+ %4 = icmp ne <4 x i16> %0, %1
+ %5 = select <4 x i1> %4, <4 x i16> %2, <4 x i16> %3
+ ret <4 x i16> %5
+}
+; CHECK-LABEL: define <8 x i16> @icmp_ne_on_4xi16(<8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp ne <8 x i16> %0, %1
+; CHECK-NEXT: %5 = select <8 x i1> %4, <8 x i16> %2, <8 x i16> %3
+; CHECK-NEXT: ret <8 x i16> %5
+; CHECK-NEXT: }
+
+define <4 x i16> @icmp_sgt_on_4xi16(<4 x i16>, <4 x i16>, <4 x i16>, <4 x i16>) {
+entry:
+ %4 = icmp sgt <4 x i16> %0, %1
+ %5 = select <4 x i1> %4, <4 x i16> %2, <4 x i16> %3
+ ret <4 x i16> %5
+}
+; CHECK-LABEL: define <8 x i16> @icmp_sgt_on_4xi16(<8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp sgt <8 x i16> %0, %1
+; CHECK-NEXT: %5 = select <8 x i1> %4, <8 x i16> %2, <8 x i16> %3
+; CHECK-NEXT: ret <8 x i16> %5
+; CHECK-NEXT: }
+
+define <4 x i16> @icmp_ugt_on_4xi16(<4 x i16>, <4 x i16>, <4 x i16>, <4 x i16>) {
+entry:
+ %4 = icmp ugt <4 x i16> %0, %1
+ %5 = select <4 x i1> %4, <4 x i16> %2, <4 x i16> %3
+ ret <4 x i16> %5
+}
+; CHECK-LABEL: define <8 x i16> @icmp_ugt_on_4xi16(<8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp ugt <8 x i16> %0, %1
+; CHECK-NEXT: %5 = select <8 x i1> %4, <8 x i16> %2, <8 x i16> %3
+; CHECK-NEXT: ret <8 x i16> %5
+; CHECK-NEXT: }
+
+define <4 x i16> @icmp_sge_on_4xi16(<4 x i16>, <4 x i16>, <4 x i16>, <4 x i16>) {
+entry:
+ %4 = icmp sge <4 x i16> %0, %1
+ %5 = select <4 x i1> %4, <4 x i16> %2, <4 x i16> %3
+ ret <4 x i16> %5
+}
+; CHECK-LABEL: define <8 x i16> @icmp_sge_on_4xi16(<8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp sge <8 x i16> %0, %1
+; CHECK-NEXT: %5 = select <8 x i1> %4, <8 x i16> %2, <8 x i16> %3
+; CHECK-NEXT: ret <8 x i16> %5
+; CHECK-NEXT: }
+
+define <4 x i16> @icmp_uge_on_4xi16(<4 x i16>, <4 x i16>, <4 x i16>, <4 x i16>) {
+entry:
+ %4 = icmp uge <4 x i16> %0, %1
+ %5 = select <4 x i1> %4, <4 x i16> %2, <4 x i16> %3
+ ret <4 x i16> %5
+}
+; CHECK-LABEL: define <8 x i16> @icmp_uge_on_4xi16(<8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp uge <8 x i16> %0, %1
+; CHECK-NEXT: %5 = select <8 x i1> %4, <8 x i16> %2, <8 x i16> %3
+; CHECK-NEXT: ret <8 x i16> %5
+; CHECK-NEXT: }
+
+define <4 x i16> @icmp_slt_on_4xi16(<4 x i16>, <4 x i16>, <4 x i16>, <4 x i16>) {
+entry:
+ %4 = icmp slt <4 x i16> %0, %1
+ %5 = select <4 x i1> %4, <4 x i16> %2, <4 x i16> %3
+ ret <4 x i16> %5
+}
+; CHECK-LABEL: define <8 x i16> @icmp_slt_on_4xi16(<8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp slt <8 x i16> %0, %1
+; CHECK-NEXT: %5 = select <8 x i1> %4, <8 x i16> %2, <8 x i16> %3
+; CHECK-NEXT: ret <8 x i16> %5
+; CHECK-NEXT: }
+
+define <4 x i16> @icmp_ult_on_4xi16(<4 x i16>, <4 x i16>, <4 x i16>, <4 x i16>) {
+entry:
+ %4 = icmp ult <4 x i16> %0, %1
+ %5 = select <4 x i1> %4, <4 x i16> %2, <4 x i16> %3
+ ret <4 x i16> %5
+}
+; CHECK-LABEL: define <8 x i16> @icmp_ult_on_4xi16(<8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp ult <8 x i16> %0, %1
+; CHECK-NEXT: %5 = select <8 x i1> %4, <8 x i16> %2, <8 x i16> %3
+; CHECK-NEXT: ret <8 x i16> %5
+; CHECK-NEXT: }
+
+define <4 x i16> @icmp_sle_on_4xi16(<4 x i16>, <4 x i16>, <4 x i16>, <4 x i16>) {
+entry:
+ %4 = icmp sle <4 x i16> %0, %1
+ %5 = select <4 x i1> %4, <4 x i16> %2, <4 x i16> %3
+ ret <4 x i16> %5
+}
+; CHECK-LABEL: define <8 x i16> @icmp_sle_on_4xi16(<8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp sle <8 x i16> %0, %1
+; CHECK-NEXT: %5 = select <8 x i1> %4, <8 x i16> %2, <8 x i16> %3
+; CHECK-NEXT: ret <8 x i16> %5
+; CHECK-NEXT: }
+
+define <4 x i16> @icmp_ule_on_4xi16(<4 x i16>, <4 x i16>, <4 x i16>, <4 x i16>) {
+entry:
+ %4 = icmp ule <4 x i16> %0, %1
+ %5 = select <4 x i1> %4, <4 x i16> %2, <4 x i16> %3
+ ret <4 x i16> %5
+}
+; CHECK-LABEL: define <8 x i16> @icmp_ule_on_4xi16(<8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp ule <8 x i16> %0, %1
+; CHECK-NEXT: %5 = select <8 x i1> %4, <8 x i16> %2, <8 x i16> %3
+; CHECK-NEXT: ret <8 x i16> %5
+; CHECK-NEXT: }
+
+define <4 x i32> @icmp_eq_on_4xi32(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
+entry:
+ %4 = icmp eq <4 x i32> %0, %1
+ %5 = select <4 x i1> %4, <4 x i32> %2, <4 x i32> %3
+ ret <4 x i32> %5
+}
+; CHECK-LABEL: define <4 x i32> @icmp_eq_on_4xi32(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp eq <4 x i32> %0, %1
+; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x i32> %2, <4 x i32> %3
+; CHECK-NEXT: ret <4 x i32> %5
+; CHECK-NEXT: }
+
+define <4 x i32> @icmp_ne_on_4xi32(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
+entry:
+ %4 = icmp ne <4 x i32> %0, %1
+ %5 = select <4 x i1> %4, <4 x i32> %2, <4 x i32> %3
+ ret <4 x i32> %5
+}
+; CHECK-LABEL: define <4 x i32> @icmp_ne_on_4xi32(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp ne <4 x i32> %0, %1
+; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x i32> %2, <4 x i32> %3
+; CHECK-NEXT: ret <4 x i32> %5
+; CHECK-NEXT: }
+
+define <4 x i32> @icmp_sgt_on_4xi32(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
+entry:
+ %4 = icmp sgt <4 x i32> %0, %1
+ %5 = select <4 x i1> %4, <4 x i32> %2, <4 x i32> %3
+ ret <4 x i32> %5
+}
+; CHECK-LABEL: define <4 x i32> @icmp_sgt_on_4xi32(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp sgt <4 x i32> %0, %1
+; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x i32> %2, <4 x i32> %3
+; CHECK-NEXT: ret <4 x i32> %5
+; CHECK-NEXT: }
+
+define <4 x i32> @icmp_ugt_on_4xi32(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
+entry:
+ %4 = icmp ugt <4 x i32> %0, %1
+ %5 = select <4 x i1> %4, <4 x i32> %2, <4 x i32> %3
+ ret <4 x i32> %5
+}
+; CHECK-LABEL: define <4 x i32> @icmp_ugt_on_4xi32(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp ugt <4 x i32> %0, %1
+; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x i32> %2, <4 x i32> %3
+; CHECK-NEXT: ret <4 x i32> %5
+; CHECK-NEXT: }
+
+define <4 x i32> @icmp_sge_on_4xi32(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
+entry:
+ %4 = icmp sge <4 x i32> %0, %1
+ %5 = select <4 x i1> %4, <4 x i32> %2, <4 x i32> %3
+ ret <4 x i32> %5
+}
+; CHECK-LABEL: define <4 x i32> @icmp_sge_on_4xi32(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp sge <4 x i32> %0, %1
+; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x i32> %2, <4 x i32> %3
+; CHECK-NEXT: ret <4 x i32> %5
+; CHECK-NEXT: }
+
+define <4 x i32> @icmp_uge_on_4xi32(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
+entry:
+ %4 = icmp uge <4 x i32> %0, %1
+ %5 = select <4 x i1> %4, <4 x i32> %2, <4 x i32> %3
+ ret <4 x i32> %5
+}
+; CHECK-LABEL: define <4 x i32> @icmp_uge_on_4xi32(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp uge <4 x i32> %0, %1
+; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x i32> %2, <4 x i32> %3
+; CHECK-NEXT: ret <4 x i32> %5
+; CHECK-NEXT: }
+
+define <4 x i32> @icmp_slt_on_4xi32(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
+entry:
+ %4 = icmp slt <4 x i32> %0, %1
+ %5 = select <4 x i1> %4, <4 x i32> %2, <4 x i32> %3
+ ret <4 x i32> %5
+}
+; CHECK-LABEL: define <4 x i32> @icmp_slt_on_4xi32(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp slt <4 x i32> %0, %1
+; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x i32> %2, <4 x i32> %3
+; CHECK-NEXT: ret <4 x i32> %5
+; CHECK-NEXT: }
+
+define <4 x i32> @icmp_ult_on_4xi32(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
+entry:
+ %4 = icmp ult <4 x i32> %0, %1
+ %5 = select <4 x i1> %4, <4 x i32> %2, <4 x i32> %3
+ ret <4 x i32> %5
+}
+; CHECK-LABEL: define <4 x i32> @icmp_ult_on_4xi32(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp ult <4 x i32> %0, %1
+; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x i32> %2, <4 x i32> %3
+; CHECK-NEXT: ret <4 x i32> %5
+; CHECK-NEXT: }
+
+define <4 x i32> @icmp_sle_on_4xi32(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
+entry:
+ %4 = icmp sle <4 x i32> %0, %1
+ %5 = select <4 x i1> %4, <4 x i32> %2, <4 x i32> %3
+ ret <4 x i32> %5
+}
+; CHECK-LABEL: define <4 x i32> @icmp_sle_on_4xi32(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp sle <4 x i32> %0, %1
+; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x i32> %2, <4 x i32> %3
+; CHECK-NEXT: ret <4 x i32> %5
+; CHECK-NEXT: }
+
+define <4 x i32> @icmp_ule_on_4xi32(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
+entry:
+ %4 = icmp ule <4 x i32> %0, %1
+ %5 = select <4 x i1> %4, <4 x i32> %2, <4 x i32> %3
+ ret <4 x i32> %5
+}
+; CHECK-LABEL: define <4 x i32> @icmp_ule_on_4xi32(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp ule <4 x i32> %0, %1
+; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x i32> %2, <4 x i32> %3
+; CHECK-NEXT: ret <4 x i32> %5
+; CHECK-NEXT: }
+
+define <4 x i64> @icmp_eq_on_4xi64(<4 x i64>, <4 x i64>, <4 x i64>, <4 x i64>) {
+entry:
+ %4 = icmp eq <4 x i64> %0, %1
+ %5 = select <4 x i1> %4, <4 x i64> %2, <4 x i64> %3
+ ret <4 x i64> %5
+}
+; CHECK-LABEL: define <2 x i64> @icmp_eq_on_4xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = icmp eq <2 x i64> %1, %3
+; CHECK-NEXT: %10 = icmp eq <2 x i64> %2, %4
+; CHECK-NEXT: %11 = select <2 x i1> %9, <2 x i64> %5, <2 x i64> %7
+; CHECK-NEXT: %12 = select <2 x i1> %10, <2 x i64> %6, <2 x i64> %8
+; CHECK-NEXT: store <2 x i64> %12, <2 x i64>* %0, align 16
+; CHECK-NEXT: ret <2 x i64> %11
+; CHECK-NEXT: }
+
+define <4 x i64> @icmp_ne_on_4xi64(<4 x i64>, <4 x i64>, <4 x i64>, <4 x i64>) {
+entry:
+ %4 = icmp ne <4 x i64> %0, %1
+ %5 = select <4 x i1> %4, <4 x i64> %2, <4 x i64> %3
+ ret <4 x i64> %5
+}
+; CHECK-LABEL: define <2 x i64> @icmp_ne_on_4xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = icmp ne <2 x i64> %1, %3
+; CHECK-NEXT: %10 = icmp ne <2 x i64> %2, %4
+; CHECK-NEXT: %11 = select <2 x i1> %9, <2 x i64> %5, <2 x i64> %7
+; CHECK-NEXT: %12 = select <2 x i1> %10, <2 x i64> %6, <2 x i64> %8
+; CHECK-NEXT: store <2 x i64> %12, <2 x i64>* %0, align 16
+; CHECK-NEXT: ret <2 x i64> %11
+; CHECK-NEXT: }
+
+define <4 x i64> @icmp_sgt_on_4xi64(<4 x i64>, <4 x i64>, <4 x i64>, <4 x i64>) {
+entry:
+ %4 = icmp sgt <4 x i64> %0, %1
+ %5 = select <4 x i1> %4, <4 x i64> %2, <4 x i64> %3
+ ret <4 x i64> %5
+}
+; CHECK-LABEL: define <2 x i64> @icmp_sgt_on_4xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = icmp sgt <2 x i64> %1, %3
+; CHECK-NEXT: %10 = icmp sgt <2 x i64> %2, %4
+; CHECK-NEXT: %11 = select <2 x i1> %9, <2 x i64> %5, <2 x i64> %7
+; CHECK-NEXT: %12 = select <2 x i1> %10, <2 x i64> %6, <2 x i64> %8
+; CHECK-NEXT: store <2 x i64> %12, <2 x i64>* %0, align 16
+; CHECK-NEXT: ret <2 x i64> %11
+; CHECK-NEXT: }
+
+define <4 x i64> @icmp_ugt_on_4xi64(<4 x i64>, <4 x i64>, <4 x i64>, <4 x i64>) {
+entry:
+ %4 = icmp ugt <4 x i64> %0, %1
+ %5 = select <4 x i1> %4, <4 x i64> %2, <4 x i64> %3
+ ret <4 x i64> %5
+}
+; CHECK-LABEL: define <2 x i64> @icmp_ugt_on_4xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = icmp ugt <2 x i64> %1, %3
+; CHECK-NEXT: %10 = icmp ugt <2 x i64> %2, %4
+; CHECK-NEXT: %11 = select <2 x i1> %9, <2 x i64> %5, <2 x i64> %7
+; CHECK-NEXT: %12 = select <2 x i1> %10, <2 x i64> %6, <2 x i64> %8
+; CHECK-NEXT: store <2 x i64> %12, <2 x i64>* %0, align 16
+; CHECK-NEXT: ret <2 x i64> %11
+; CHECK-NEXT: }
+
+define <4 x i64> @icmp_sge_on_4xi64(<4 x i64>, <4 x i64>, <4 x i64>, <4 x i64>) {
+entry:
+ %4 = icmp sge <4 x i64> %0, %1
+ %5 = select <4 x i1> %4, <4 x i64> %2, <4 x i64> %3
+ ret <4 x i64> %5
+}
+; CHECK-LABEL: define <2 x i64> @icmp_sge_on_4xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = icmp sge <2 x i64> %1, %3
+; CHECK-NEXT: %10 = icmp sge <2 x i64> %2, %4
+; CHECK-NEXT: %11 = select <2 x i1> %9, <2 x i64> %5, <2 x i64> %7
+; CHECK-NEXT: %12 = select <2 x i1> %10, <2 x i64> %6, <2 x i64> %8
+; CHECK-NEXT: store <2 x i64> %12, <2 x i64>* %0, align 16
+; CHECK-NEXT: ret <2 x i64> %11
+; CHECK-NEXT: }
+
+define <4 x i64> @icmp_uge_on_4xi64(<4 x i64>, <4 x i64>, <4 x i64>, <4 x i64>) {
+entry:
+ %4 = icmp uge <4 x i64> %0, %1
+ %5 = select <4 x i1> %4, <4 x i64> %2, <4 x i64> %3
+ ret <4 x i64> %5
+}
+; CHECK-LABEL: define <2 x i64> @icmp_uge_on_4xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = icmp uge <2 x i64> %1, %3
+; CHECK-NEXT: %10 = icmp uge <2 x i64> %2, %4
+; CHECK-NEXT: %11 = select <2 x i1> %9, <2 x i64> %5, <2 x i64> %7
+; CHECK-NEXT: %12 = select <2 x i1> %10, <2 x i64> %6, <2 x i64> %8
+; CHECK-NEXT: store <2 x i64> %12, <2 x i64>* %0, align 16
+; CHECK-NEXT: ret <2 x i64> %11
+; CHECK-NEXT: }
+
+define <4 x i64> @icmp_slt_on_4xi64(<4 x i64>, <4 x i64>, <4 x i64>, <4 x i64>) {
+entry:
+ %4 = icmp slt <4 x i64> %0, %1
+ %5 = select <4 x i1> %4, <4 x i64> %2, <4 x i64> %3
+ ret <4 x i64> %5
+}
+; CHECK-LABEL: define <2 x i64> @icmp_slt_on_4xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = icmp slt <2 x i64> %1, %3
+; CHECK-NEXT: %10 = icmp slt <2 x i64> %2, %4
+; CHECK-NEXT: %11 = select <2 x i1> %9, <2 x i64> %5, <2 x i64> %7
+; CHECK-NEXT: %12 = select <2 x i1> %10, <2 x i64> %6, <2 x i64> %8
+; CHECK-NEXT: store <2 x i64> %12, <2 x i64>* %0, align 16
+; CHECK-NEXT: ret <2 x i64> %11
+; CHECK-NEXT: }
+
+define <4 x i64> @icmp_ult_on_4xi64(<4 x i64>, <4 x i64>, <4 x i64>, <4 x i64>) {
+entry:
+ %4 = icmp ult <4 x i64> %0, %1
+ %5 = select <4 x i1> %4, <4 x i64> %2, <4 x i64> %3
+ ret <4 x i64> %5
+}
+; CHECK-LABEL: define <2 x i64> @icmp_ult_on_4xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = icmp ult <2 x i64> %1, %3
+; CHECK-NEXT: %10 = icmp ult <2 x i64> %2, %4
+; CHECK-NEXT: %11 = select <2 x i1> %9, <2 x i64> %5, <2 x i64> %7
+; CHECK-NEXT: %12 = select <2 x i1> %10, <2 x i64> %6, <2 x i64> %8
+; CHECK-NEXT: store <2 x i64> %12, <2 x i64>* %0, align 16
+; CHECK-NEXT: ret <2 x i64> %11
+; CHECK-NEXT: }
+
+define <4 x i64> @icmp_sle_on_4xi64(<4 x i64>, <4 x i64>, <4 x i64>, <4 x i64>) {
+entry:
+ %4 = icmp sle <4 x i64> %0, %1
+ %5 = select <4 x i1> %4, <4 x i64> %2, <4 x i64> %3
+ ret <4 x i64> %5
+}
+; CHECK-LABEL: define <2 x i64> @icmp_sle_on_4xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = icmp sle <2 x i64> %1, %3
+; CHECK-NEXT: %10 = icmp sle <2 x i64> %2, %4
+; CHECK-NEXT: %11 = select <2 x i1> %9, <2 x i64> %5, <2 x i64> %7
+; CHECK-NEXT: %12 = select <2 x i1> %10, <2 x i64> %6, <2 x i64> %8
+; CHECK-NEXT: store <2 x i64> %12, <2 x i64>* %0, align 16
+; CHECK-NEXT: ret <2 x i64> %11
+; CHECK-NEXT: }
+
+define <4 x i64> @icmp_ule_on_4xi64(<4 x i64>, <4 x i64>, <4 x i64>, <4 x i64>) {
+entry:
+ %4 = icmp ule <4 x i64> %0, %1
+ %5 = select <4 x i1> %4, <4 x i64> %2, <4 x i64> %3
+ ret <4 x i64> %5
+}
+; CHECK-LABEL: define <2 x i64> @icmp_ule_on_4xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = icmp ule <2 x i64> %1, %3
+; CHECK-NEXT: %10 = icmp ule <2 x i64> %2, %4
+; CHECK-NEXT: %11 = select <2 x i1> %9, <2 x i64> %5, <2 x i64> %7
+; CHECK-NEXT: %12 = select <2 x i1> %10, <2 x i64> %6, <2 x i64> %8
+; CHECK-NEXT: store <2 x i64> %12, <2 x i64>* %0, align 16
+; CHECK-NEXT: ret <2 x i64> %11
+; CHECK-NEXT: }
+
+define <4 x i8*> @icmp_eq_on_4xi8ptr(<4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
+entry:
+ %4 = icmp eq <4 x i8*> %0, %1
+ %5 = select <4 x i1> %4, <4 x i8*> %2, <4 x i8*> %3
+ ret <4 x i8*> %5
+}
+; CHECK-LABEL: define <4 x i8*> @icmp_eq_on_4xi8ptr(<4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp eq <4 x i8*> %0, %1
+; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x i8*> %2, <4 x i8*> %3
+; CHECK-NEXT: ret <4 x i8*> %5
+; CHECK-NEXT: }
+
+define <4 x i8*> @icmp_ne_on_4xi8ptr(<4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
+entry:
+ %4 = icmp ne <4 x i8*> %0, %1
+ %5 = select <4 x i1> %4, <4 x i8*> %2, <4 x i8*> %3
+ ret <4 x i8*> %5
+}
+; CHECK-LABEL: define <4 x i8*> @icmp_ne_on_4xi8ptr(<4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp ne <4 x i8*> %0, %1
+; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x i8*> %2, <4 x i8*> %3
+; CHECK-NEXT: ret <4 x i8*> %5
+; CHECK-NEXT: }
+
+define <4 x i8*> @icmp_sgt_on_4xi8ptr(<4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
+entry:
+ %4 = icmp sgt <4 x i8*> %0, %1
+ %5 = select <4 x i1> %4, <4 x i8*> %2, <4 x i8*> %3
+ ret <4 x i8*> %5
+}
+; CHECK-LABEL: define <4 x i8*> @icmp_sgt_on_4xi8ptr(<4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp sgt <4 x i8*> %0, %1
+; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x i8*> %2, <4 x i8*> %3
+; CHECK-NEXT: ret <4 x i8*> %5
+; CHECK-NEXT: }
+
+define <4 x i8*> @icmp_ugt_on_4xi8ptr(<4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
+entry:
+ %4 = icmp ugt <4 x i8*> %0, %1
+ %5 = select <4 x i1> %4, <4 x i8*> %2, <4 x i8*> %3
+ ret <4 x i8*> %5
+}
+; CHECK-LABEL: define <4 x i8*> @icmp_ugt_on_4xi8ptr(<4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp ugt <4 x i8*> %0, %1
+; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x i8*> %2, <4 x i8*> %3
+; CHECK-NEXT: ret <4 x i8*> %5
+; CHECK-NEXT: }
+
+define <4 x i8*> @icmp_sge_on_4xi8ptr(<4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
+entry:
+ %4 = icmp sge <4 x i8*> %0, %1
+ %5 = select <4 x i1> %4, <4 x i8*> %2, <4 x i8*> %3
+ ret <4 x i8*> %5
+}
+; CHECK-LABEL: define <4 x i8*> @icmp_sge_on_4xi8ptr(<4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp sge <4 x i8*> %0, %1
+; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x i8*> %2, <4 x i8*> %3
+; CHECK-NEXT: ret <4 x i8*> %5
+; CHECK-NEXT: }
+
+define <4 x i8*> @icmp_uge_on_4xi8ptr(<4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
+entry:
+ %4 = icmp uge <4 x i8*> %0, %1
+ %5 = select <4 x i1> %4, <4 x i8*> %2, <4 x i8*> %3
+ ret <4 x i8*> %5
+}
+; CHECK-LABEL: define <4 x i8*> @icmp_uge_on_4xi8ptr(<4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp uge <4 x i8*> %0, %1
+; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x i8*> %2, <4 x i8*> %3
+; CHECK-NEXT: ret <4 x i8*> %5
+; CHECK-NEXT: }
+
+define <4 x i8*> @icmp_slt_on_4xi8ptr(<4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
+entry:
+ %4 = icmp slt <4 x i8*> %0, %1
+ %5 = select <4 x i1> %4, <4 x i8*> %2, <4 x i8*> %3
+ ret <4 x i8*> %5
+}
+; CHECK-LABEL: define <4 x i8*> @icmp_slt_on_4xi8ptr(<4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp slt <4 x i8*> %0, %1
+; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x i8*> %2, <4 x i8*> %3
+; CHECK-NEXT: ret <4 x i8*> %5
+; CHECK-NEXT: }
+
+define <4 x i8*> @icmp_ult_on_4xi8ptr(<4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
+entry:
+ %4 = icmp ult <4 x i8*> %0, %1
+ %5 = select <4 x i1> %4, <4 x i8*> %2, <4 x i8*> %3
+ ret <4 x i8*> %5
+}
+; CHECK-LABEL: define <4 x i8*> @icmp_ult_on_4xi8ptr(<4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp ult <4 x i8*> %0, %1
+; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x i8*> %2, <4 x i8*> %3
+; CHECK-NEXT: ret <4 x i8*> %5
+; CHECK-NEXT: }
+
+define <4 x i8*> @icmp_sle_on_4xi8ptr(<4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
+entry:
+ %4 = icmp sle <4 x i8*> %0, %1
+ %5 = select <4 x i1> %4, <4 x i8*> %2, <4 x i8*> %3
+ ret <4 x i8*> %5
+}
+; CHECK-LABEL: define <4 x i8*> @icmp_sle_on_4xi8ptr(<4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp sle <4 x i8*> %0, %1
+; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x i8*> %2, <4 x i8*> %3
+; CHECK-NEXT: ret <4 x i8*> %5
+; CHECK-NEXT: }
+
+define <4 x i8*> @icmp_ule_on_4xi8ptr(<4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
+entry:
+ %4 = icmp ule <4 x i8*> %0, %1
+ %5 = select <4 x i1> %4, <4 x i8*> %2, <4 x i8*> %3
+ ret <4 x i8*> %5
+}
+; CHECK-LABEL: define <4 x i8*> @icmp_ule_on_4xi8ptr(<4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp ule <4 x i8*> %0, %1
+; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x i8*> %2, <4 x i8*> %3
+; CHECK-NEXT: ret <4 x i8*> %5
+; CHECK-NEXT: }
+
+define <6 x i8> @icmp_eq_on_6xi8(<6 x i8>, <6 x i8>, <6 x i8>, <6 x i8>) {
+entry:
+ %4 = icmp eq <6 x i8> %0, %1
+ %5 = select <6 x i1> %4, <6 x i8> %2, <6 x i8> %3
+ ret <6 x i8> %5
+}
+; CHECK-LABEL: define <16 x i8> @icmp_eq_on_6xi8(<16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp eq <16 x i8> %0, %1
+; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
+; CHECK-NEXT: ret <16 x i8> %5
+; CHECK-NEXT: }
+
+define <6 x i8> @icmp_ne_on_6xi8(<6 x i8>, <6 x i8>, <6 x i8>, <6 x i8>) {
+entry:
+ %4 = icmp ne <6 x i8> %0, %1
+ %5 = select <6 x i1> %4, <6 x i8> %2, <6 x i8> %3
+ ret <6 x i8> %5
+}
+; CHECK-LABEL: define <16 x i8> @icmp_ne_on_6xi8(<16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp ne <16 x i8> %0, %1
+; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
+; CHECK-NEXT: ret <16 x i8> %5
+; CHECK-NEXT: }
+
+define <6 x i8> @icmp_sgt_on_6xi8(<6 x i8>, <6 x i8>, <6 x i8>, <6 x i8>) {
+entry:
+ %4 = icmp sgt <6 x i8> %0, %1
+ %5 = select <6 x i1> %4, <6 x i8> %2, <6 x i8> %3
+ ret <6 x i8> %5
+}
+; CHECK-LABEL: define <16 x i8> @icmp_sgt_on_6xi8(<16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp sgt <16 x i8> %0, %1
+; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
+; CHECK-NEXT: ret <16 x i8> %5
+; CHECK-NEXT: }
+
+define <6 x i8> @icmp_ugt_on_6xi8(<6 x i8>, <6 x i8>, <6 x i8>, <6 x i8>) {
+entry:
+ %4 = icmp ugt <6 x i8> %0, %1
+ %5 = select <6 x i1> %4, <6 x i8> %2, <6 x i8> %3
+ ret <6 x i8> %5
+}
+; CHECK-LABEL: define <16 x i8> @icmp_ugt_on_6xi8(<16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp ugt <16 x i8> %0, %1
+; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
+; CHECK-NEXT: ret <16 x i8> %5
+; CHECK-NEXT: }
+
+define <6 x i8> @icmp_sge_on_6xi8(<6 x i8>, <6 x i8>, <6 x i8>, <6 x i8>) {
+entry:
+ %4 = icmp sge <6 x i8> %0, %1
+ %5 = select <6 x i1> %4, <6 x i8> %2, <6 x i8> %3
+ ret <6 x i8> %5
+}
+; CHECK-LABEL: define <16 x i8> @icmp_sge_on_6xi8(<16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp sge <16 x i8> %0, %1
+; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
+; CHECK-NEXT: ret <16 x i8> %5
+; CHECK-NEXT: }
+
+define <6 x i8> @icmp_uge_on_6xi8(<6 x i8>, <6 x i8>, <6 x i8>, <6 x i8>) {
+entry:
+ %4 = icmp uge <6 x i8> %0, %1
+ %5 = select <6 x i1> %4, <6 x i8> %2, <6 x i8> %3
+ ret <6 x i8> %5
+}
+; CHECK-LABEL: define <16 x i8> @icmp_uge_on_6xi8(<16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp uge <16 x i8> %0, %1
+; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
+; CHECK-NEXT: ret <16 x i8> %5
+; CHECK-NEXT: }
+
+define <6 x i8> @icmp_slt_on_6xi8(<6 x i8>, <6 x i8>, <6 x i8>, <6 x i8>) {
+entry:
+ %4 = icmp slt <6 x i8> %0, %1
+ %5 = select <6 x i1> %4, <6 x i8> %2, <6 x i8> %3
+ ret <6 x i8> %5
+}
+; CHECK-LABEL: define <16 x i8> @icmp_slt_on_6xi8(<16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp slt <16 x i8> %0, %1
+; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
+; CHECK-NEXT: ret <16 x i8> %5
+; CHECK-NEXT: }
+
+define <6 x i8> @icmp_ult_on_6xi8(<6 x i8>, <6 x i8>, <6 x i8>, <6 x i8>) {
+entry:
+ %4 = icmp ult <6 x i8> %0, %1
+ %5 = select <6 x i1> %4, <6 x i8> %2, <6 x i8> %3
+ ret <6 x i8> %5
+}
+; CHECK-LABEL: define <16 x i8> @icmp_ult_on_6xi8(<16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp ult <16 x i8> %0, %1
+; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
+; CHECK-NEXT: ret <16 x i8> %5
+; CHECK-NEXT: }
+
+define <6 x i8> @icmp_sle_on_6xi8(<6 x i8>, <6 x i8>, <6 x i8>, <6 x i8>) {
+entry:
+ %4 = icmp sle <6 x i8> %0, %1
+ %5 = select <6 x i1> %4, <6 x i8> %2, <6 x i8> %3
+ ret <6 x i8> %5
+}
+; CHECK-LABEL: define <16 x i8> @icmp_sle_on_6xi8(<16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp sle <16 x i8> %0, %1
+; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
+; CHECK-NEXT: ret <16 x i8> %5
+; CHECK-NEXT: }
+
+define <6 x i8> @icmp_ule_on_6xi8(<6 x i8>, <6 x i8>, <6 x i8>, <6 x i8>) {
+entry:
+ %4 = icmp ule <6 x i8> %0, %1
+ %5 = select <6 x i1> %4, <6 x i8> %2, <6 x i8> %3
+ ret <6 x i8> %5
+}
+; CHECK-LABEL: define <16 x i8> @icmp_ule_on_6xi8(<16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp ule <16 x i8> %0, %1
+; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
+; CHECK-NEXT: ret <16 x i8> %5
+; CHECK-NEXT: }
+
+define <6 x i16> @icmp_eq_on_6xi16(<6 x i16>, <6 x i16>, <6 x i16>, <6 x i16>) {
+entry:
+ %4 = icmp eq <6 x i16> %0, %1
+ %5 = select <6 x i1> %4, <6 x i16> %2, <6 x i16> %3
+ ret <6 x i16> %5
+}
+; CHECK-LABEL: define <8 x i16> @icmp_eq_on_6xi16(<8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp eq <8 x i16> %0, %1
+; CHECK-NEXT: %5 = select <8 x i1> %4, <8 x i16> %2, <8 x i16> %3
+; CHECK-NEXT: ret <8 x i16> %5
+; CHECK-NEXT: }
+
+define <6 x i16> @icmp_ne_on_6xi16(<6 x i16>, <6 x i16>, <6 x i16>, <6 x i16>) {
+entry:
+ %4 = icmp ne <6 x i16> %0, %1
+ %5 = select <6 x i1> %4, <6 x i16> %2, <6 x i16> %3
+ ret <6 x i16> %5
+}
+; CHECK-LABEL: define <8 x i16> @icmp_ne_on_6xi16(<8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp ne <8 x i16> %0, %1
+; CHECK-NEXT: %5 = select <8 x i1> %4, <8 x i16> %2, <8 x i16> %3
+; CHECK-NEXT: ret <8 x i16> %5
+; CHECK-NEXT: }
+
+define <6 x i16> @icmp_sgt_on_6xi16(<6 x i16>, <6 x i16>, <6 x i16>, <6 x i16>) {
+entry:
+ %4 = icmp sgt <6 x i16> %0, %1
+ %5 = select <6 x i1> %4, <6 x i16> %2, <6 x i16> %3
+ ret <6 x i16> %5
+}
+; CHECK-LABEL: define <8 x i16> @icmp_sgt_on_6xi16(<8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp sgt <8 x i16> %0, %1
+; CHECK-NEXT: %5 = select <8 x i1> %4, <8 x i16> %2, <8 x i16> %3
+; CHECK-NEXT: ret <8 x i16> %5
+; CHECK-NEXT: }
+
+define <6 x i16> @icmp_ugt_on_6xi16(<6 x i16>, <6 x i16>, <6 x i16>, <6 x i16>) {
+entry:
+ %4 = icmp ugt <6 x i16> %0, %1
+ %5 = select <6 x i1> %4, <6 x i16> %2, <6 x i16> %3
+ ret <6 x i16> %5
+}
+; CHECK-LABEL: define <8 x i16> @icmp_ugt_on_6xi16(<8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp ugt <8 x i16> %0, %1
+; CHECK-NEXT: %5 = select <8 x i1> %4, <8 x i16> %2, <8 x i16> %3
+; CHECK-NEXT: ret <8 x i16> %5
+; CHECK-NEXT: }
+
+define <6 x i16> @icmp_sge_on_6xi16(<6 x i16>, <6 x i16>, <6 x i16>, <6 x i16>) {
+entry:
+ %4 = icmp sge <6 x i16> %0, %1
+ %5 = select <6 x i1> %4, <6 x i16> %2, <6 x i16> %3
+ ret <6 x i16> %5
+}
+; CHECK-LABEL: define <8 x i16> @icmp_sge_on_6xi16(<8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp sge <8 x i16> %0, %1
+; CHECK-NEXT: %5 = select <8 x i1> %4, <8 x i16> %2, <8 x i16> %3
+; CHECK-NEXT: ret <8 x i16> %5
+; CHECK-NEXT: }
+
+define <6 x i16> @icmp_uge_on_6xi16(<6 x i16>, <6 x i16>, <6 x i16>, <6 x i16>) {
+entry:
+ %4 = icmp uge <6 x i16> %0, %1
+ %5 = select <6 x i1> %4, <6 x i16> %2, <6 x i16> %3
+ ret <6 x i16> %5
+}
+; CHECK-LABEL: define <8 x i16> @icmp_uge_on_6xi16(<8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp uge <8 x i16> %0, %1
+; CHECK-NEXT: %5 = select <8 x i1> %4, <8 x i16> %2, <8 x i16> %3
+; CHECK-NEXT: ret <8 x i16> %5
+; CHECK-NEXT: }
+
+define <6 x i16> @icmp_slt_on_6xi16(<6 x i16>, <6 x i16>, <6 x i16>, <6 x i16>) {
+entry:
+ %4 = icmp slt <6 x i16> %0, %1
+ %5 = select <6 x i1> %4, <6 x i16> %2, <6 x i16> %3
+ ret <6 x i16> %5
+}
+; CHECK-LABEL: define <8 x i16> @icmp_slt_on_6xi16(<8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp slt <8 x i16> %0, %1
+; CHECK-NEXT: %5 = select <8 x i1> %4, <8 x i16> %2, <8 x i16> %3
+; CHECK-NEXT: ret <8 x i16> %5
+; CHECK-NEXT: }
+
+define <6 x i16> @icmp_ult_on_6xi16(<6 x i16>, <6 x i16>, <6 x i16>, <6 x i16>) {
+entry:
+ %4 = icmp ult <6 x i16> %0, %1
+ %5 = select <6 x i1> %4, <6 x i16> %2, <6 x i16> %3
+ ret <6 x i16> %5
+}
+; CHECK-LABEL: define <8 x i16> @icmp_ult_on_6xi16(<8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp ult <8 x i16> %0, %1
+; CHECK-NEXT: %5 = select <8 x i1> %4, <8 x i16> %2, <8 x i16> %3
+; CHECK-NEXT: ret <8 x i16> %5
+; CHECK-NEXT: }
+
+define <6 x i16> @icmp_sle_on_6xi16(<6 x i16>, <6 x i16>, <6 x i16>, <6 x i16>) {
+entry:
+ %4 = icmp sle <6 x i16> %0, %1
+ %5 = select <6 x i1> %4, <6 x i16> %2, <6 x i16> %3
+ ret <6 x i16> %5
+}
+; CHECK-LABEL: define <8 x i16> @icmp_sle_on_6xi16(<8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp sle <8 x i16> %0, %1
+; CHECK-NEXT: %5 = select <8 x i1> %4, <8 x i16> %2, <8 x i16> %3
+; CHECK-NEXT: ret <8 x i16> %5
+; CHECK-NEXT: }
+
+define <6 x i16> @icmp_ule_on_6xi16(<6 x i16>, <6 x i16>, <6 x i16>, <6 x i16>) {
+entry:
+ %4 = icmp ule <6 x i16> %0, %1
+ %5 = select <6 x i1> %4, <6 x i16> %2, <6 x i16> %3
+ ret <6 x i16> %5
+}
+; CHECK-LABEL: define <8 x i16> @icmp_ule_on_6xi16(<8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp ule <8 x i16> %0, %1
+; CHECK-NEXT: %5 = select <8 x i1> %4, <8 x i16> %2, <8 x i16> %3
+; CHECK-NEXT: ret <8 x i16> %5
+; CHECK-NEXT: }
+
+define <6 x i32> @icmp_eq_on_6xi32(<6 x i32>, <6 x i32>, <6 x i32>, <6 x i32>) {
+entry:
+ %4 = icmp eq <6 x i32> %0, %1
+ %5 = select <6 x i1> %4, <6 x i32> %2, <6 x i32> %3
+ ret <6 x i32> %5
+}
+; CHECK-LABEL: define <4 x i32> @icmp_eq_on_6xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = icmp eq <4 x i32> %1, %3
+; CHECK-NEXT: %10 = icmp eq <4 x i32> %2, %4
+; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x i32> %5, <4 x i32> %7
+; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x i32> %6, <4 x i32> %8
+; CHECK-NEXT: store <4 x i32> %12, <4 x i32>* %0, align 16
+; CHECK-NEXT: ret <4 x i32> %11
+; CHECK-NEXT: }
+
+define <6 x i32> @icmp_ne_on_6xi32(<6 x i32>, <6 x i32>, <6 x i32>, <6 x i32>) {
+entry:
+ %4 = icmp ne <6 x i32> %0, %1
+ %5 = select <6 x i1> %4, <6 x i32> %2, <6 x i32> %3
+ ret <6 x i32> %5
+}
+; CHECK-LABEL: define <4 x i32> @icmp_ne_on_6xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = icmp ne <4 x i32> %1, %3
+; CHECK-NEXT: %10 = icmp ne <4 x i32> %2, %4
+; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x i32> %5, <4 x i32> %7
+; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x i32> %6, <4 x i32> %8
+; CHECK-NEXT: store <4 x i32> %12, <4 x i32>* %0, align 16
+; CHECK-NEXT: ret <4 x i32> %11
+; CHECK-NEXT: }
+
+define <6 x i32> @icmp_sgt_on_6xi32(<6 x i32>, <6 x i32>, <6 x i32>, <6 x i32>) {
+entry:
+ %4 = icmp sgt <6 x i32> %0, %1
+ %5 = select <6 x i1> %4, <6 x i32> %2, <6 x i32> %3
+ ret <6 x i32> %5
+}
+; CHECK-LABEL: define <4 x i32> @icmp_sgt_on_6xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = icmp sgt <4 x i32> %1, %3
+; CHECK-NEXT: %10 = icmp sgt <4 x i32> %2, %4
+; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x i32> %5, <4 x i32> %7
+; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x i32> %6, <4 x i32> %8
+; CHECK-NEXT: store <4 x i32> %12, <4 x i32>* %0, align 16
+; CHECK-NEXT: ret <4 x i32> %11
+; CHECK-NEXT: }
+
+define <6 x i32> @icmp_ugt_on_6xi32(<6 x i32>, <6 x i32>, <6 x i32>, <6 x i32>) {
+entry:
+ %4 = icmp ugt <6 x i32> %0, %1
+ %5 = select <6 x i1> %4, <6 x i32> %2, <6 x i32> %3
+ ret <6 x i32> %5
+}
+; CHECK-LABEL: define <4 x i32> @icmp_ugt_on_6xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = icmp ugt <4 x i32> %1, %3
+; CHECK-NEXT: %10 = icmp ugt <4 x i32> %2, %4
+; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x i32> %5, <4 x i32> %7
+; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x i32> %6, <4 x i32> %8
+; CHECK-NEXT: store <4 x i32> %12, <4 x i32>* %0, align 16
+; CHECK-NEXT: ret <4 x i32> %11
+; CHECK-NEXT: }
+
+define <6 x i32> @icmp_sge_on_6xi32(<6 x i32>, <6 x i32>, <6 x i32>, <6 x i32>) {
+entry:
+ %4 = icmp sge <6 x i32> %0, %1
+ %5 = select <6 x i1> %4, <6 x i32> %2, <6 x i32> %3
+ ret <6 x i32> %5
+}
+; CHECK-LABEL: define <4 x i32> @icmp_sge_on_6xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = icmp sge <4 x i32> %1, %3
+; CHECK-NEXT: %10 = icmp sge <4 x i32> %2, %4
+; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x i32> %5, <4 x i32> %7
+; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x i32> %6, <4 x i32> %8
+; CHECK-NEXT: store <4 x i32> %12, <4 x i32>* %0, align 16
+; CHECK-NEXT: ret <4 x i32> %11
+; CHECK-NEXT: }
+
+define <6 x i32> @icmp_uge_on_6xi32(<6 x i32>, <6 x i32>, <6 x i32>, <6 x i32>) {
+entry:
+ %4 = icmp uge <6 x i32> %0, %1
+ %5 = select <6 x i1> %4, <6 x i32> %2, <6 x i32> %3
+ ret <6 x i32> %5
+}
+; CHECK-LABEL: define <4 x i32> @icmp_uge_on_6xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = icmp uge <4 x i32> %1, %3
+; CHECK-NEXT: %10 = icmp uge <4 x i32> %2, %4
+; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x i32> %5, <4 x i32> %7
+; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x i32> %6, <4 x i32> %8
+; CHECK-NEXT: store <4 x i32> %12, <4 x i32>* %0, align 16
+; CHECK-NEXT: ret <4 x i32> %11
+; CHECK-NEXT: }
+
+define <6 x i32> @icmp_slt_on_6xi32(<6 x i32>, <6 x i32>, <6 x i32>, <6 x i32>) {
+entry:
+ %4 = icmp slt <6 x i32> %0, %1
+ %5 = select <6 x i1> %4, <6 x i32> %2, <6 x i32> %3
+ ret <6 x i32> %5
+}
+; CHECK-LABEL: define <4 x i32> @icmp_slt_on_6xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = icmp slt <4 x i32> %1, %3
+; CHECK-NEXT: %10 = icmp slt <4 x i32> %2, %4
+; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x i32> %5, <4 x i32> %7
+; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x i32> %6, <4 x i32> %8
+; CHECK-NEXT: store <4 x i32> %12, <4 x i32>* %0, align 16
+; CHECK-NEXT: ret <4 x i32> %11
+; CHECK-NEXT: }
+
+define <6 x i32> @icmp_ult_on_6xi32(<6 x i32>, <6 x i32>, <6 x i32>, <6 x i32>) {
+entry:
+ %4 = icmp ult <6 x i32> %0, %1
+ %5 = select <6 x i1> %4, <6 x i32> %2, <6 x i32> %3
+ ret <6 x i32> %5
+}
+; CHECK-LABEL: define <4 x i32> @icmp_ult_on_6xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = icmp ult <4 x i32> %1, %3
+; CHECK-NEXT: %10 = icmp ult <4 x i32> %2, %4
+; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x i32> %5, <4 x i32> %7
+; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x i32> %6, <4 x i32> %8
+; CHECK-NEXT: store <4 x i32> %12, <4 x i32>* %0, align 16
+; CHECK-NEXT: ret <4 x i32> %11
+; CHECK-NEXT: }
+
+define <6 x i32> @icmp_sle_on_6xi32(<6 x i32>, <6 x i32>, <6 x i32>, <6 x i32>) {
+entry:
+ %4 = icmp sle <6 x i32> %0, %1
+ %5 = select <6 x i1> %4, <6 x i32> %2, <6 x i32> %3
+ ret <6 x i32> %5
+}
+; CHECK-LABEL: define <4 x i32> @icmp_sle_on_6xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = icmp sle <4 x i32> %1, %3
+; CHECK-NEXT: %10 = icmp sle <4 x i32> %2, %4
+; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x i32> %5, <4 x i32> %7
+; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x i32> %6, <4 x i32> %8
+; CHECK-NEXT: store <4 x i32> %12, <4 x i32>* %0, align 16
+; CHECK-NEXT: ret <4 x i32> %11
+; CHECK-NEXT: }
+
+define <6 x i32> @icmp_ule_on_6xi32(<6 x i32>, <6 x i32>, <6 x i32>, <6 x i32>) {
+entry:
+ %4 = icmp ule <6 x i32> %0, %1
+ %5 = select <6 x i1> %4, <6 x i32> %2, <6 x i32> %3
+ ret <6 x i32> %5
+}
+; CHECK-LABEL: define <4 x i32> @icmp_ule_on_6xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = icmp ule <4 x i32> %1, %3
+; CHECK-NEXT: %10 = icmp ule <4 x i32> %2, %4
+; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x i32> %5, <4 x i32> %7
+; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x i32> %6, <4 x i32> %8
+; CHECK-NEXT: store <4 x i32> %12, <4 x i32>* %0, align 16
+; CHECK-NEXT: ret <4 x i32> %11
+; CHECK-NEXT: }
+
+define <6 x i64> @icmp_eq_on_6xi64(<6 x i64>, <6 x i64>, <6 x i64>, <6 x i64>) {
+entry:
+ %4 = icmp eq <6 x i64> %0, %1
+ %5 = select <6 x i1> %4, <6 x i64> %2, <6 x i64> %3
+ ret <6 x i64> %5
+}
+; CHECK-LABEL: define <2 x i64> @icmp_eq_on_6xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
+; CHECK: entry:
+; CHECK-NEXT: %14 = icmp eq <2 x i64> %2, %5
+; CHECK-NEXT: %15 = icmp eq <2 x i64> %3, %6
+; CHECK-NEXT: %16 = icmp eq <2 x i64> %4, %7
+; CHECK-NEXT: %17 = select <2 x i1> %14, <2 x i64> %8, <2 x i64> %11
+; CHECK-NEXT: %18 = select <2 x i1> %15, <2 x i64> %9, <2 x i64> %12
+; CHECK-NEXT: %19 = select <2 x i1> %16, <2 x i64> %10, <2 x i64> %13
+; CHECK-NEXT: store <2 x i64> %18, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %19, <2 x i64>* %1, align 16
+; CHECK-NEXT: ret <2 x i64> %17
+; CHECK-NEXT: }
+
+define <6 x i64> @icmp_ne_on_6xi64(<6 x i64>, <6 x i64>, <6 x i64>, <6 x i64>) {
+entry:
+ %4 = icmp ne <6 x i64> %0, %1
+ %5 = select <6 x i1> %4, <6 x i64> %2, <6 x i64> %3
+ ret <6 x i64> %5
+}
+; CHECK-LABEL: define <2 x i64> @icmp_ne_on_6xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
+; CHECK: entry:
+; CHECK-NEXT: %14 = icmp ne <2 x i64> %2, %5
+; CHECK-NEXT: %15 = icmp ne <2 x i64> %3, %6
+; CHECK-NEXT: %16 = icmp ne <2 x i64> %4, %7
+; CHECK-NEXT: %17 = select <2 x i1> %14, <2 x i64> %8, <2 x i64> %11
+; CHECK-NEXT: %18 = select <2 x i1> %15, <2 x i64> %9, <2 x i64> %12
+; CHECK-NEXT: %19 = select <2 x i1> %16, <2 x i64> %10, <2 x i64> %13
+; CHECK-NEXT: store <2 x i64> %18, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %19, <2 x i64>* %1, align 16
+; CHECK-NEXT: ret <2 x i64> %17
+; CHECK-NEXT: }
+
+define <6 x i64> @icmp_sgt_on_6xi64(<6 x i64>, <6 x i64>, <6 x i64>, <6 x i64>) {
+entry:
+ %4 = icmp sgt <6 x i64> %0, %1
+ %5 = select <6 x i1> %4, <6 x i64> %2, <6 x i64> %3
+ ret <6 x i64> %5
+}
+; CHECK-LABEL: define <2 x i64> @icmp_sgt_on_6xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
+; CHECK: entry:
+; CHECK-NEXT: %14 = icmp sgt <2 x i64> %2, %5
+; CHECK-NEXT: %15 = icmp sgt <2 x i64> %3, %6
+; CHECK-NEXT: %16 = icmp sgt <2 x i64> %4, %7
+; CHECK-NEXT: %17 = select <2 x i1> %14, <2 x i64> %8, <2 x i64> %11
+; CHECK-NEXT: %18 = select <2 x i1> %15, <2 x i64> %9, <2 x i64> %12
+; CHECK-NEXT: %19 = select <2 x i1> %16, <2 x i64> %10, <2 x i64> %13
+; CHECK-NEXT: store <2 x i64> %18, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %19, <2 x i64>* %1, align 16
+; CHECK-NEXT: ret <2 x i64> %17
+; CHECK-NEXT: }
+
+define <6 x i64> @icmp_ugt_on_6xi64(<6 x i64>, <6 x i64>, <6 x i64>, <6 x i64>) {
+entry:
+ %4 = icmp ugt <6 x i64> %0, %1
+ %5 = select <6 x i1> %4, <6 x i64> %2, <6 x i64> %3
+ ret <6 x i64> %5
+}
+; CHECK-LABEL: define <2 x i64> @icmp_ugt_on_6xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
+; CHECK: entry:
+; CHECK-NEXT: %14 = icmp ugt <2 x i64> %2, %5
+; CHECK-NEXT: %15 = icmp ugt <2 x i64> %3, %6
+; CHECK-NEXT: %16 = icmp ugt <2 x i64> %4, %7
+; CHECK-NEXT: %17 = select <2 x i1> %14, <2 x i64> %8, <2 x i64> %11
+; CHECK-NEXT: %18 = select <2 x i1> %15, <2 x i64> %9, <2 x i64> %12
+; CHECK-NEXT: %19 = select <2 x i1> %16, <2 x i64> %10, <2 x i64> %13
+; CHECK-NEXT: store <2 x i64> %18, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %19, <2 x i64>* %1, align 16
+; CHECK-NEXT: ret <2 x i64> %17
+; CHECK-NEXT: }
+
+define <6 x i64> @icmp_sge_on_6xi64(<6 x i64>, <6 x i64>, <6 x i64>, <6 x i64>) {
+entry:
+ %4 = icmp sge <6 x i64> %0, %1
+ %5 = select <6 x i1> %4, <6 x i64> %2, <6 x i64> %3
+ ret <6 x i64> %5
+}
+; CHECK-LABEL: define <2 x i64> @icmp_sge_on_6xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
+; CHECK: entry:
+; CHECK-NEXT: %14 = icmp sge <2 x i64> %2, %5
+; CHECK-NEXT: %15 = icmp sge <2 x i64> %3, %6
+; CHECK-NEXT: %16 = icmp sge <2 x i64> %4, %7
+; CHECK-NEXT: %17 = select <2 x i1> %14, <2 x i64> %8, <2 x i64> %11
+; CHECK-NEXT: %18 = select <2 x i1> %15, <2 x i64> %9, <2 x i64> %12
+; CHECK-NEXT: %19 = select <2 x i1> %16, <2 x i64> %10, <2 x i64> %13
+; CHECK-NEXT: store <2 x i64> %18, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %19, <2 x i64>* %1, align 16
+; CHECK-NEXT: ret <2 x i64> %17
+; CHECK-NEXT: }
+
+define <6 x i64> @icmp_uge_on_6xi64(<6 x i64>, <6 x i64>, <6 x i64>, <6 x i64>) {
+entry:
+ %4 = icmp uge <6 x i64> %0, %1
+ %5 = select <6 x i1> %4, <6 x i64> %2, <6 x i64> %3
+ ret <6 x i64> %5
+}
+; CHECK-LABEL: define <2 x i64> @icmp_uge_on_6xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
+; CHECK: entry:
+; CHECK-NEXT: %14 = icmp uge <2 x i64> %2, %5
+; CHECK-NEXT: %15 = icmp uge <2 x i64> %3, %6
+; CHECK-NEXT: %16 = icmp uge <2 x i64> %4, %7
+; CHECK-NEXT: %17 = select <2 x i1> %14, <2 x i64> %8, <2 x i64> %11
+; CHECK-NEXT: %18 = select <2 x i1> %15, <2 x i64> %9, <2 x i64> %12
+; CHECK-NEXT: %19 = select <2 x i1> %16, <2 x i64> %10, <2 x i64> %13
+; CHECK-NEXT: store <2 x i64> %18, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %19, <2 x i64>* %1, align 16
+; CHECK-NEXT: ret <2 x i64> %17
+; CHECK-NEXT: }
+
+define <6 x i64> @icmp_slt_on_6xi64(<6 x i64>, <6 x i64>, <6 x i64>, <6 x i64>) {
+entry:
+ %4 = icmp slt <6 x i64> %0, %1
+ %5 = select <6 x i1> %4, <6 x i64> %2, <6 x i64> %3
+ ret <6 x i64> %5
+}
+; CHECK-LABEL: define <2 x i64> @icmp_slt_on_6xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
+; CHECK: entry:
+; CHECK-NEXT: %14 = icmp slt <2 x i64> %2, %5
+; CHECK-NEXT: %15 = icmp slt <2 x i64> %3, %6
+; CHECK-NEXT: %16 = icmp slt <2 x i64> %4, %7
+; CHECK-NEXT: %17 = select <2 x i1> %14, <2 x i64> %8, <2 x i64> %11
+; CHECK-NEXT: %18 = select <2 x i1> %15, <2 x i64> %9, <2 x i64> %12
+; CHECK-NEXT: %19 = select <2 x i1> %16, <2 x i64> %10, <2 x i64> %13
+; CHECK-NEXT: store <2 x i64> %18, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %19, <2 x i64>* %1, align 16
+; CHECK-NEXT: ret <2 x i64> %17
+; CHECK-NEXT: }
+
+define <6 x i64> @icmp_ult_on_6xi64(<6 x i64>, <6 x i64>, <6 x i64>, <6 x i64>) {
+entry:
+ %4 = icmp ult <6 x i64> %0, %1
+ %5 = select <6 x i1> %4, <6 x i64> %2, <6 x i64> %3
+ ret <6 x i64> %5
+}
+; CHECK-LABEL: define <2 x i64> @icmp_ult_on_6xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
+; CHECK: entry:
+; CHECK-NEXT: %14 = icmp ult <2 x i64> %2, %5
+; CHECK-NEXT: %15 = icmp ult <2 x i64> %3, %6
+; CHECK-NEXT: %16 = icmp ult <2 x i64> %4, %7
+; CHECK-NEXT: %17 = select <2 x i1> %14, <2 x i64> %8, <2 x i64> %11
+; CHECK-NEXT: %18 = select <2 x i1> %15, <2 x i64> %9, <2 x i64> %12
+; CHECK-NEXT: %19 = select <2 x i1> %16, <2 x i64> %10, <2 x i64> %13
+; CHECK-NEXT: store <2 x i64> %18, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %19, <2 x i64>* %1, align 16
+; CHECK-NEXT: ret <2 x i64> %17
+; CHECK-NEXT: }
+
+define <6 x i64> @icmp_sle_on_6xi64(<6 x i64>, <6 x i64>, <6 x i64>, <6 x i64>) {
+entry:
+ %4 = icmp sle <6 x i64> %0, %1
+ %5 = select <6 x i1> %4, <6 x i64> %2, <6 x i64> %3
+ ret <6 x i64> %5
+}
+; CHECK-LABEL: define <2 x i64> @icmp_sle_on_6xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
+; CHECK: entry:
+; CHECK-NEXT: %14 = icmp sle <2 x i64> %2, %5
+; CHECK-NEXT: %15 = icmp sle <2 x i64> %3, %6
+; CHECK-NEXT: %16 = icmp sle <2 x i64> %4, %7
+; CHECK-NEXT: %17 = select <2 x i1> %14, <2 x i64> %8, <2 x i64> %11
+; CHECK-NEXT: %18 = select <2 x i1> %15, <2 x i64> %9, <2 x i64> %12
+; CHECK-NEXT: %19 = select <2 x i1> %16, <2 x i64> %10, <2 x i64> %13
+; CHECK-NEXT: store <2 x i64> %18, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %19, <2 x i64>* %1, align 16
+; CHECK-NEXT: ret <2 x i64> %17
+; CHECK-NEXT: }
+
+define <6 x i64> @icmp_ule_on_6xi64(<6 x i64>, <6 x i64>, <6 x i64>, <6 x i64>) {
+entry:
+ %4 = icmp ule <6 x i64> %0, %1
+ %5 = select <6 x i1> %4, <6 x i64> %2, <6 x i64> %3
+ ret <6 x i64> %5
+}
+; CHECK-LABEL: define <2 x i64> @icmp_ule_on_6xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
+; CHECK: entry:
+; CHECK-NEXT: %14 = icmp ule <2 x i64> %2, %5
+; CHECK-NEXT: %15 = icmp ule <2 x i64> %3, %6
+; CHECK-NEXT: %16 = icmp ule <2 x i64> %4, %7
+; CHECK-NEXT: %17 = select <2 x i1> %14, <2 x i64> %8, <2 x i64> %11
+; CHECK-NEXT: %18 = select <2 x i1> %15, <2 x i64> %9, <2 x i64> %12
+; CHECK-NEXT: %19 = select <2 x i1> %16, <2 x i64> %10, <2 x i64> %13
+; CHECK-NEXT: store <2 x i64> %18, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %19, <2 x i64>* %1, align 16
+; CHECK-NEXT: ret <2 x i64> %17
+; CHECK-NEXT: }
+
+define <6 x i8*> @icmp_eq_on_6xi8ptr(<6 x i8*>, <6 x i8*>, <6 x i8*>, <6 x i8*>) {
+entry:
+ %4 = icmp eq <6 x i8*> %0, %1
+ %5 = select <6 x i1> %4, <6 x i8*> %2, <6 x i8*> %3
+ ret <6 x i8*> %5
+}
+; CHECK-LABEL: define <4 x i8*> @icmp_eq_on_6xi8ptr(<4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = icmp eq <4 x i8*> %1, %3
+; CHECK-NEXT: %10 = icmp eq <4 x i8*> %2, %4
+; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x i8*> %5, <4 x i8*> %7
+; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x i8*> %6, <4 x i8*> %8
+; CHECK-NEXT: store <4 x i8*> %12, <4 x i8*>* %0, align 16
+; CHECK-NEXT: ret <4 x i8*> %11
+; CHECK-NEXT: }
+
+define <6 x i8*> @icmp_ne_on_6xi8ptr(<6 x i8*>, <6 x i8*>, <6 x i8*>, <6 x i8*>) {
+entry:
+ %4 = icmp ne <6 x i8*> %0, %1
+ %5 = select <6 x i1> %4, <6 x i8*> %2, <6 x i8*> %3
+ ret <6 x i8*> %5
+}
+; CHECK-LABEL: define <4 x i8*> @icmp_ne_on_6xi8ptr(<4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = icmp ne <4 x i8*> %1, %3
+; CHECK-NEXT: %10 = icmp ne <4 x i8*> %2, %4
+; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x i8*> %5, <4 x i8*> %7
+; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x i8*> %6, <4 x i8*> %8
+; CHECK-NEXT: store <4 x i8*> %12, <4 x i8*>* %0, align 16
+; CHECK-NEXT: ret <4 x i8*> %11
+; CHECK-NEXT: }
+
+define <6 x i8*> @icmp_sgt_on_6xi8ptr(<6 x i8*>, <6 x i8*>, <6 x i8*>, <6 x i8*>) {
+entry:
+ %4 = icmp sgt <6 x i8*> %0, %1
+ %5 = select <6 x i1> %4, <6 x i8*> %2, <6 x i8*> %3
+ ret <6 x i8*> %5
+}
+; CHECK-LABEL: define <4 x i8*> @icmp_sgt_on_6xi8ptr(<4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = icmp sgt <4 x i8*> %1, %3
+; CHECK-NEXT: %10 = icmp sgt <4 x i8*> %2, %4
+; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x i8*> %5, <4 x i8*> %7
+; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x i8*> %6, <4 x i8*> %8
+; CHECK-NEXT: store <4 x i8*> %12, <4 x i8*>* %0, align 16
+; CHECK-NEXT: ret <4 x i8*> %11
+; CHECK-NEXT: }
+
+define <6 x i8*> @icmp_ugt_on_6xi8ptr(<6 x i8*>, <6 x i8*>, <6 x i8*>, <6 x i8*>) {
+entry:
+ %4 = icmp ugt <6 x i8*> %0, %1
+ %5 = select <6 x i1> %4, <6 x i8*> %2, <6 x i8*> %3
+ ret <6 x i8*> %5
+}
+; CHECK-LABEL: define <4 x i8*> @icmp_ugt_on_6xi8ptr(<4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = icmp ugt <4 x i8*> %1, %3
+; CHECK-NEXT: %10 = icmp ugt <4 x i8*> %2, %4
+; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x i8*> %5, <4 x i8*> %7
+; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x i8*> %6, <4 x i8*> %8
+; CHECK-NEXT: store <4 x i8*> %12, <4 x i8*>* %0, align 16
+; CHECK-NEXT: ret <4 x i8*> %11
+; CHECK-NEXT: }
+
+define <6 x i8*> @icmp_sge_on_6xi8ptr(<6 x i8*>, <6 x i8*>, <6 x i8*>, <6 x i8*>) {
+entry:
+ %4 = icmp sge <6 x i8*> %0, %1
+ %5 = select <6 x i1> %4, <6 x i8*> %2, <6 x i8*> %3
+ ret <6 x i8*> %5
+}
+; CHECK-LABEL: define <4 x i8*> @icmp_sge_on_6xi8ptr(<4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = icmp sge <4 x i8*> %1, %3
+; CHECK-NEXT: %10 = icmp sge <4 x i8*> %2, %4
+; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x i8*> %5, <4 x i8*> %7
+; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x i8*> %6, <4 x i8*> %8
+; CHECK-NEXT: store <4 x i8*> %12, <4 x i8*>* %0, align 16
+; CHECK-NEXT: ret <4 x i8*> %11
+; CHECK-NEXT: }
+
+define <6 x i8*> @icmp_uge_on_6xi8ptr(<6 x i8*>, <6 x i8*>, <6 x i8*>, <6 x i8*>) {
+entry:
+ %4 = icmp uge <6 x i8*> %0, %1
+ %5 = select <6 x i1> %4, <6 x i8*> %2, <6 x i8*> %3
+ ret <6 x i8*> %5
+}
+; CHECK-LABEL: define <4 x i8*> @icmp_uge_on_6xi8ptr(<4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = icmp uge <4 x i8*> %1, %3
+; CHECK-NEXT: %10 = icmp uge <4 x i8*> %2, %4
+; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x i8*> %5, <4 x i8*> %7
+; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x i8*> %6, <4 x i8*> %8
+; CHECK-NEXT: store <4 x i8*> %12, <4 x i8*>* %0, align 16
+; CHECK-NEXT: ret <4 x i8*> %11
+; CHECK-NEXT: }
+
+define <6 x i8*> @icmp_slt_on_6xi8ptr(<6 x i8*>, <6 x i8*>, <6 x i8*>, <6 x i8*>) {
+entry:
+ %4 = icmp slt <6 x i8*> %0, %1
+ %5 = select <6 x i1> %4, <6 x i8*> %2, <6 x i8*> %3
+ ret <6 x i8*> %5
+}
+; CHECK-LABEL: define <4 x i8*> @icmp_slt_on_6xi8ptr(<4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = icmp slt <4 x i8*> %1, %3
+; CHECK-NEXT: %10 = icmp slt <4 x i8*> %2, %4
+; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x i8*> %5, <4 x i8*> %7
+; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x i8*> %6, <4 x i8*> %8
+; CHECK-NEXT: store <4 x i8*> %12, <4 x i8*>* %0, align 16
+; CHECK-NEXT: ret <4 x i8*> %11
+; CHECK-NEXT: }
+
+define <6 x i8*> @icmp_ult_on_6xi8ptr(<6 x i8*>, <6 x i8*>, <6 x i8*>, <6 x i8*>) {
+entry:
+ %4 = icmp ult <6 x i8*> %0, %1
+ %5 = select <6 x i1> %4, <6 x i8*> %2, <6 x i8*> %3
+ ret <6 x i8*> %5
+}
+; CHECK-LABEL: define <4 x i8*> @icmp_ult_on_6xi8ptr(<4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = icmp ult <4 x i8*> %1, %3
+; CHECK-NEXT: %10 = icmp ult <4 x i8*> %2, %4
+; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x i8*> %5, <4 x i8*> %7
+; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x i8*> %6, <4 x i8*> %8
+; CHECK-NEXT: store <4 x i8*> %12, <4 x i8*>* %0, align 16
+; CHECK-NEXT: ret <4 x i8*> %11
+; CHECK-NEXT: }
+
+define <6 x i8*> @icmp_sle_on_6xi8ptr(<6 x i8*>, <6 x i8*>, <6 x i8*>, <6 x i8*>) {
+entry:
+ %4 = icmp sle <6 x i8*> %0, %1
+ %5 = select <6 x i1> %4, <6 x i8*> %2, <6 x i8*> %3
+ ret <6 x i8*> %5
+}
+; CHECK-LABEL: define <4 x i8*> @icmp_sle_on_6xi8ptr(<4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = icmp sle <4 x i8*> %1, %3
+; CHECK-NEXT: %10 = icmp sle <4 x i8*> %2, %4
+; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x i8*> %5, <4 x i8*> %7
+; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x i8*> %6, <4 x i8*> %8
+; CHECK-NEXT: store <4 x i8*> %12, <4 x i8*>* %0, align 16
+; CHECK-NEXT: ret <4 x i8*> %11
+; CHECK-NEXT: }
+
+define <6 x i8*> @icmp_ule_on_6xi8ptr(<6 x i8*>, <6 x i8*>, <6 x i8*>, <6 x i8*>) {
+entry:
+ %4 = icmp ule <6 x i8*> %0, %1
+ %5 = select <6 x i1> %4, <6 x i8*> %2, <6 x i8*> %3
+ ret <6 x i8*> %5
+}
+; CHECK-LABEL: define <4 x i8*> @icmp_ule_on_6xi8ptr(<4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = icmp ule <4 x i8*> %1, %3
+; CHECK-NEXT: %10 = icmp ule <4 x i8*> %2, %4
+; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x i8*> %5, <4 x i8*> %7
+; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x i8*> %6, <4 x i8*> %8
+; CHECK-NEXT: store <4 x i8*> %12, <4 x i8*>* %0, align 16
+; CHECK-NEXT: ret <4 x i8*> %11
+; CHECK-NEXT: }
+
+define <8 x i8> @icmp_eq_on_8xi8(<8 x i8>, <8 x i8>, <8 x i8>, <8 x i8>) {
+entry:
+ %4 = icmp eq <8 x i8> %0, %1
+ %5 = select <8 x i1> %4, <8 x i8> %2, <8 x i8> %3
+ ret <8 x i8> %5
+}
+; CHECK-LABEL: define <16 x i8> @icmp_eq_on_8xi8(<16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp eq <16 x i8> %0, %1
+; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
+; CHECK-NEXT: ret <16 x i8> %5
+; CHECK-NEXT: }
+
+define <8 x i8> @icmp_ne_on_8xi8(<8 x i8>, <8 x i8>, <8 x i8>, <8 x i8>) {
+entry:
+ %4 = icmp ne <8 x i8> %0, %1
+ %5 = select <8 x i1> %4, <8 x i8> %2, <8 x i8> %3
+ ret <8 x i8> %5
+}
+; CHECK-LABEL: define <16 x i8> @icmp_ne_on_8xi8(<16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp ne <16 x i8> %0, %1
+; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
+; CHECK-NEXT: ret <16 x i8> %5
+; CHECK-NEXT: }
+
+define <8 x i8> @icmp_sgt_on_8xi8(<8 x i8>, <8 x i8>, <8 x i8>, <8 x i8>) {
+entry:
+ %4 = icmp sgt <8 x i8> %0, %1
+ %5 = select <8 x i1> %4, <8 x i8> %2, <8 x i8> %3
+ ret <8 x i8> %5
+}
+; CHECK-LABEL: define <16 x i8> @icmp_sgt_on_8xi8(<16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp sgt <16 x i8> %0, %1
+; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
+; CHECK-NEXT: ret <16 x i8> %5
+; CHECK-NEXT: }
+
+define <8 x i8> @icmp_ugt_on_8xi8(<8 x i8>, <8 x i8>, <8 x i8>, <8 x i8>) {
+entry:
+ %4 = icmp ugt <8 x i8> %0, %1
+ %5 = select <8 x i1> %4, <8 x i8> %2, <8 x i8> %3
+ ret <8 x i8> %5
+}
+; CHECK-LABEL: define <16 x i8> @icmp_ugt_on_8xi8(<16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp ugt <16 x i8> %0, %1
+; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
+; CHECK-NEXT: ret <16 x i8> %5
+; CHECK-NEXT: }
+
+define <8 x i8> @icmp_sge_on_8xi8(<8 x i8>, <8 x i8>, <8 x i8>, <8 x i8>) {
+entry:
+ %4 = icmp sge <8 x i8> %0, %1
+ %5 = select <8 x i1> %4, <8 x i8> %2, <8 x i8> %3
+ ret <8 x i8> %5
+}
+; CHECK-LABEL: define <16 x i8> @icmp_sge_on_8xi8(<16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp sge <16 x i8> %0, %1
+; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
+; CHECK-NEXT: ret <16 x i8> %5
+; CHECK-NEXT: }
+
+define <8 x i8> @icmp_uge_on_8xi8(<8 x i8>, <8 x i8>, <8 x i8>, <8 x i8>) {
+entry:
+ %4 = icmp uge <8 x i8> %0, %1
+ %5 = select <8 x i1> %4, <8 x i8> %2, <8 x i8> %3
+ ret <8 x i8> %5
+}
+; CHECK-LABEL: define <16 x i8> @icmp_uge_on_8xi8(<16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp uge <16 x i8> %0, %1
+; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
+; CHECK-NEXT: ret <16 x i8> %5
+; CHECK-NEXT: }
+
+define <8 x i8> @icmp_slt_on_8xi8(<8 x i8>, <8 x i8>, <8 x i8>, <8 x i8>) {
+entry:
+ %4 = icmp slt <8 x i8> %0, %1
+ %5 = select <8 x i1> %4, <8 x i8> %2, <8 x i8> %3
+ ret <8 x i8> %5
+}
+; CHECK-LABEL: define <16 x i8> @icmp_slt_on_8xi8(<16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp slt <16 x i8> %0, %1
+; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
+; CHECK-NEXT: ret <16 x i8> %5
+; CHECK-NEXT: }
+
+define <8 x i8> @icmp_ult_on_8xi8(<8 x i8>, <8 x i8>, <8 x i8>, <8 x i8>) {
+entry:
+ %4 = icmp ult <8 x i8> %0, %1
+ %5 = select <8 x i1> %4, <8 x i8> %2, <8 x i8> %3
+ ret <8 x i8> %5
+}
+; CHECK-LABEL: define <16 x i8> @icmp_ult_on_8xi8(<16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp ult <16 x i8> %0, %1
+; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
+; CHECK-NEXT: ret <16 x i8> %5
+; CHECK-NEXT: }
+
+define <8 x i8> @icmp_sle_on_8xi8(<8 x i8>, <8 x i8>, <8 x i8>, <8 x i8>) {
+entry:
+ %4 = icmp sle <8 x i8> %0, %1
+ %5 = select <8 x i1> %4, <8 x i8> %2, <8 x i8> %3
+ ret <8 x i8> %5
+}
+; CHECK-LABEL: define <16 x i8> @icmp_sle_on_8xi8(<16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp sle <16 x i8> %0, %1
+; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
+; CHECK-NEXT: ret <16 x i8> %5
+; CHECK-NEXT: }
+
+define <8 x i8> @icmp_ule_on_8xi8(<8 x i8>, <8 x i8>, <8 x i8>, <8 x i8>) {
+entry:
+ %4 = icmp ule <8 x i8> %0, %1
+ %5 = select <8 x i1> %4, <8 x i8> %2, <8 x i8> %3
+ ret <8 x i8> %5
+}
+; CHECK-LABEL: define <16 x i8> @icmp_ule_on_8xi8(<16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp ule <16 x i8> %0, %1
+; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
+; CHECK-NEXT: ret <16 x i8> %5
+; CHECK-NEXT: }
+
+define <8 x i16> @icmp_eq_on_8xi16(<8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
+entry:
+ %4 = icmp eq <8 x i16> %0, %1
+ %5 = select <8 x i1> %4, <8 x i16> %2, <8 x i16> %3
+ ret <8 x i16> %5
+}
+; CHECK-LABEL: define <8 x i16> @icmp_eq_on_8xi16(<8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp eq <8 x i16> %0, %1
+; CHECK-NEXT: %5 = select <8 x i1> %4, <8 x i16> %2, <8 x i16> %3
+; CHECK-NEXT: ret <8 x i16> %5
+; CHECK-NEXT: }
+
+define <8 x i16> @icmp_ne_on_8xi16(<8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
+entry:
+ %4 = icmp ne <8 x i16> %0, %1
+ %5 = select <8 x i1> %4, <8 x i16> %2, <8 x i16> %3
+ ret <8 x i16> %5
+}
+; CHECK-LABEL: define <8 x i16> @icmp_ne_on_8xi16(<8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp ne <8 x i16> %0, %1
+; CHECK-NEXT: %5 = select <8 x i1> %4, <8 x i16> %2, <8 x i16> %3
+; CHECK-NEXT: ret <8 x i16> %5
+; CHECK-NEXT: }
+
+define <8 x i16> @icmp_sgt_on_8xi16(<8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
+entry:
+ %4 = icmp sgt <8 x i16> %0, %1
+ %5 = select <8 x i1> %4, <8 x i16> %2, <8 x i16> %3
+ ret <8 x i16> %5
+}
+; CHECK-LABEL: define <8 x i16> @icmp_sgt_on_8xi16(<8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp sgt <8 x i16> %0, %1
+; CHECK-NEXT: %5 = select <8 x i1> %4, <8 x i16> %2, <8 x i16> %3
+; CHECK-NEXT: ret <8 x i16> %5
+; CHECK-NEXT: }
+
+define <8 x i16> @icmp_ugt_on_8xi16(<8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
+entry:
+ %4 = icmp ugt <8 x i16> %0, %1
+ %5 = select <8 x i1> %4, <8 x i16> %2, <8 x i16> %3
+ ret <8 x i16> %5
+}
+; CHECK-LABEL: define <8 x i16> @icmp_ugt_on_8xi16(<8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp ugt <8 x i16> %0, %1
+; CHECK-NEXT: %5 = select <8 x i1> %4, <8 x i16> %2, <8 x i16> %3
+; CHECK-NEXT: ret <8 x i16> %5
+; CHECK-NEXT: }
+
+define <8 x i16> @icmp_sge_on_8xi16(<8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
+entry:
+ %4 = icmp sge <8 x i16> %0, %1
+ %5 = select <8 x i1> %4, <8 x i16> %2, <8 x i16> %3
+ ret <8 x i16> %5
+}
+; CHECK-LABEL: define <8 x i16> @icmp_sge_on_8xi16(<8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp sge <8 x i16> %0, %1
+; CHECK-NEXT: %5 = select <8 x i1> %4, <8 x i16> %2, <8 x i16> %3
+; CHECK-NEXT: ret <8 x i16> %5
+; CHECK-NEXT: }
+
+define <8 x i16> @icmp_uge_on_8xi16(<8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
+entry:
+ %4 = icmp uge <8 x i16> %0, %1
+ %5 = select <8 x i1> %4, <8 x i16> %2, <8 x i16> %3
+ ret <8 x i16> %5
+}
+; CHECK-LABEL: define <8 x i16> @icmp_uge_on_8xi16(<8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp uge <8 x i16> %0, %1
+; CHECK-NEXT: %5 = select <8 x i1> %4, <8 x i16> %2, <8 x i16> %3
+; CHECK-NEXT: ret <8 x i16> %5
+; CHECK-NEXT: }
+
+define <8 x i16> @icmp_slt_on_8xi16(<8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
+entry:
+ %4 = icmp slt <8 x i16> %0, %1
+ %5 = select <8 x i1> %4, <8 x i16> %2, <8 x i16> %3
+ ret <8 x i16> %5
+}
+; CHECK-LABEL: define <8 x i16> @icmp_slt_on_8xi16(<8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp slt <8 x i16> %0, %1
+; CHECK-NEXT: %5 = select <8 x i1> %4, <8 x i16> %2, <8 x i16> %3
+; CHECK-NEXT: ret <8 x i16> %5
+; CHECK-NEXT: }
+
+define <8 x i16> @icmp_ult_on_8xi16(<8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
+entry:
+ %4 = icmp ult <8 x i16> %0, %1
+ %5 = select <8 x i1> %4, <8 x i16> %2, <8 x i16> %3
+ ret <8 x i16> %5
+}
+; CHECK-LABEL: define <8 x i16> @icmp_ult_on_8xi16(<8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp ult <8 x i16> %0, %1
+; CHECK-NEXT: %5 = select <8 x i1> %4, <8 x i16> %2, <8 x i16> %3
+; CHECK-NEXT: ret <8 x i16> %5
+; CHECK-NEXT: }
+
+define <8 x i16> @icmp_sle_on_8xi16(<8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
+entry:
+ %4 = icmp sle <8 x i16> %0, %1
+ %5 = select <8 x i1> %4, <8 x i16> %2, <8 x i16> %3
+ ret <8 x i16> %5
+}
+; CHECK-LABEL: define <8 x i16> @icmp_sle_on_8xi16(<8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp sle <8 x i16> %0, %1
+; CHECK-NEXT: %5 = select <8 x i1> %4, <8 x i16> %2, <8 x i16> %3
+; CHECK-NEXT: ret <8 x i16> %5
+; CHECK-NEXT: }
+
+define <8 x i16> @icmp_ule_on_8xi16(<8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
+entry:
+ %4 = icmp ule <8 x i16> %0, %1
+ %5 = select <8 x i1> %4, <8 x i16> %2, <8 x i16> %3
+ ret <8 x i16> %5
+}
+; CHECK-LABEL: define <8 x i16> @icmp_ule_on_8xi16(<8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp ule <8 x i16> %0, %1
+; CHECK-NEXT: %5 = select <8 x i1> %4, <8 x i16> %2, <8 x i16> %3
+; CHECK-NEXT: ret <8 x i16> %5
+; CHECK-NEXT: }
+
+define <8 x i32> @icmp_eq_on_8xi32(<8 x i32>, <8 x i32>, <8 x i32>, <8 x i32>) {
+entry:
+ %4 = icmp eq <8 x i32> %0, %1
+ %5 = select <8 x i1> %4, <8 x i32> %2, <8 x i32> %3
+ ret <8 x i32> %5
+}
+; CHECK-LABEL: define <4 x i32> @icmp_eq_on_8xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = icmp eq <4 x i32> %1, %3
+; CHECK-NEXT: %10 = icmp eq <4 x i32> %2, %4
+; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x i32> %5, <4 x i32> %7
+; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x i32> %6, <4 x i32> %8
+; CHECK-NEXT: store <4 x i32> %12, <4 x i32>* %0, align 16
+; CHECK-NEXT: ret <4 x i32> %11
+; CHECK-NEXT: }
+
+define <8 x i32> @icmp_ne_on_8xi32(<8 x i32>, <8 x i32>, <8 x i32>, <8 x i32>) {
+entry:
+ %4 = icmp ne <8 x i32> %0, %1
+ %5 = select <8 x i1> %4, <8 x i32> %2, <8 x i32> %3
+ ret <8 x i32> %5
+}
+; CHECK-LABEL: define <4 x i32> @icmp_ne_on_8xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = icmp ne <4 x i32> %1, %3
+; CHECK-NEXT: %10 = icmp ne <4 x i32> %2, %4
+; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x i32> %5, <4 x i32> %7
+; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x i32> %6, <4 x i32> %8
+; CHECK-NEXT: store <4 x i32> %12, <4 x i32>* %0, align 16
+; CHECK-NEXT: ret <4 x i32> %11
+; CHECK-NEXT: }
+
+define <8 x i32> @icmp_sgt_on_8xi32(<8 x i32>, <8 x i32>, <8 x i32>, <8 x i32>) {
+entry:
+ %4 = icmp sgt <8 x i32> %0, %1
+ %5 = select <8 x i1> %4, <8 x i32> %2, <8 x i32> %3
+ ret <8 x i32> %5
+}
+; CHECK-LABEL: define <4 x i32> @icmp_sgt_on_8xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = icmp sgt <4 x i32> %1, %3
+; CHECK-NEXT: %10 = icmp sgt <4 x i32> %2, %4
+; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x i32> %5, <4 x i32> %7
+; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x i32> %6, <4 x i32> %8
+; CHECK-NEXT: store <4 x i32> %12, <4 x i32>* %0, align 16
+; CHECK-NEXT: ret <4 x i32> %11
+; CHECK-NEXT: }
+
+define <8 x i32> @icmp_ugt_on_8xi32(<8 x i32>, <8 x i32>, <8 x i32>, <8 x i32>) {
+entry:
+ %4 = icmp ugt <8 x i32> %0, %1
+ %5 = select <8 x i1> %4, <8 x i32> %2, <8 x i32> %3
+ ret <8 x i32> %5
+}
+; CHECK-LABEL: define <4 x i32> @icmp_ugt_on_8xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = icmp ugt <4 x i32> %1, %3
+; CHECK-NEXT: %10 = icmp ugt <4 x i32> %2, %4
+; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x i32> %5, <4 x i32> %7
+; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x i32> %6, <4 x i32> %8
+; CHECK-NEXT: store <4 x i32> %12, <4 x i32>* %0, align 16
+; CHECK-NEXT: ret <4 x i32> %11
+; CHECK-NEXT: }
+
+define <8 x i32> @icmp_sge_on_8xi32(<8 x i32>, <8 x i32>, <8 x i32>, <8 x i32>) {
+entry:
+ %4 = icmp sge <8 x i32> %0, %1
+ %5 = select <8 x i1> %4, <8 x i32> %2, <8 x i32> %3
+ ret <8 x i32> %5
+}
+; CHECK-LABEL: define <4 x i32> @icmp_sge_on_8xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = icmp sge <4 x i32> %1, %3
+; CHECK-NEXT: %10 = icmp sge <4 x i32> %2, %4
+; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x i32> %5, <4 x i32> %7
+; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x i32> %6, <4 x i32> %8
+; CHECK-NEXT: store <4 x i32> %12, <4 x i32>* %0, align 16
+; CHECK-NEXT: ret <4 x i32> %11
+; CHECK-NEXT: }
+
+define <8 x i32> @icmp_uge_on_8xi32(<8 x i32>, <8 x i32>, <8 x i32>, <8 x i32>) {
+entry:
+ %4 = icmp uge <8 x i32> %0, %1
+ %5 = select <8 x i1> %4, <8 x i32> %2, <8 x i32> %3
+ ret <8 x i32> %5
+}
+; CHECK-LABEL: define <4 x i32> @icmp_uge_on_8xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = icmp uge <4 x i32> %1, %3
+; CHECK-NEXT: %10 = icmp uge <4 x i32> %2, %4
+; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x i32> %5, <4 x i32> %7
+; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x i32> %6, <4 x i32> %8
+; CHECK-NEXT: store <4 x i32> %12, <4 x i32>* %0, align 16
+; CHECK-NEXT: ret <4 x i32> %11
+; CHECK-NEXT: }
+
+define <8 x i32> @icmp_slt_on_8xi32(<8 x i32>, <8 x i32>, <8 x i32>, <8 x i32>) {
+entry:
+ %4 = icmp slt <8 x i32> %0, %1
+ %5 = select <8 x i1> %4, <8 x i32> %2, <8 x i32> %3
+ ret <8 x i32> %5
+}
+; CHECK-LABEL: define <4 x i32> @icmp_slt_on_8xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = icmp slt <4 x i32> %1, %3
+; CHECK-NEXT: %10 = icmp slt <4 x i32> %2, %4
+; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x i32> %5, <4 x i32> %7
+; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x i32> %6, <4 x i32> %8
+; CHECK-NEXT: store <4 x i32> %12, <4 x i32>* %0, align 16
+; CHECK-NEXT: ret <4 x i32> %11
+; CHECK-NEXT: }
+
+define <8 x i32> @icmp_ult_on_8xi32(<8 x i32>, <8 x i32>, <8 x i32>, <8 x i32>) {
+entry:
+ %4 = icmp ult <8 x i32> %0, %1
+ %5 = select <8 x i1> %4, <8 x i32> %2, <8 x i32> %3
+ ret <8 x i32> %5
+}
+; CHECK-LABEL: define <4 x i32> @icmp_ult_on_8xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = icmp ult <4 x i32> %1, %3
+; CHECK-NEXT: %10 = icmp ult <4 x i32> %2, %4
+; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x i32> %5, <4 x i32> %7
+; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x i32> %6, <4 x i32> %8
+; CHECK-NEXT: store <4 x i32> %12, <4 x i32>* %0, align 16
+; CHECK-NEXT: ret <4 x i32> %11
+; CHECK-NEXT: }
+
+define <8 x i32> @icmp_sle_on_8xi32(<8 x i32>, <8 x i32>, <8 x i32>, <8 x i32>) {
+entry:
+ %4 = icmp sle <8 x i32> %0, %1
+ %5 = select <8 x i1> %4, <8 x i32> %2, <8 x i32> %3
+ ret <8 x i32> %5
+}
+; CHECK-LABEL: define <4 x i32> @icmp_sle_on_8xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = icmp sle <4 x i32> %1, %3
+; CHECK-NEXT: %10 = icmp sle <4 x i32> %2, %4
+; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x i32> %5, <4 x i32> %7
+; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x i32> %6, <4 x i32> %8
+; CHECK-NEXT: store <4 x i32> %12, <4 x i32>* %0, align 16
+; CHECK-NEXT: ret <4 x i32> %11
+; CHECK-NEXT: }
+
+define <8 x i32> @icmp_ule_on_8xi32(<8 x i32>, <8 x i32>, <8 x i32>, <8 x i32>) {
+entry:
+ %4 = icmp ule <8 x i32> %0, %1
+ %5 = select <8 x i1> %4, <8 x i32> %2, <8 x i32> %3
+ ret <8 x i32> %5
+}
+; CHECK-LABEL: define <4 x i32> @icmp_ule_on_8xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = icmp ule <4 x i32> %1, %3
+; CHECK-NEXT: %10 = icmp ule <4 x i32> %2, %4
+; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x i32> %5, <4 x i32> %7
+; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x i32> %6, <4 x i32> %8
+; CHECK-NEXT: store <4 x i32> %12, <4 x i32>* %0, align 16
+; CHECK-NEXT: ret <4 x i32> %11
+; CHECK-NEXT: }
+
+define <8 x i64> @icmp_eq_on_8xi64(<8 x i64>, <8 x i64>, <8 x i64>, <8 x i64>) {
+entry:
+ %4 = icmp eq <8 x i64> %0, %1
+ %5 = select <8 x i1> %4, <8 x i64> %2, <8 x i64> %3
+ ret <8 x i64> %5
+}
+; CHECK-LABEL: define <2 x i64> @icmp_eq_on_8xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
+; CHECK: entry:
+; CHECK-NEXT: %19 = icmp eq <2 x i64> %3, %7
+; CHECK-NEXT: %20 = icmp eq <2 x i64> %4, %8
+; CHECK-NEXT: %21 = icmp eq <2 x i64> %5, %9
+; CHECK-NEXT: %22 = icmp eq <2 x i64> %6, %10
+; CHECK-NEXT: %23 = select <2 x i1> %19, <2 x i64> %11, <2 x i64> %15
+; CHECK-NEXT: %24 = select <2 x i1> %20, <2 x i64> %12, <2 x i64> %16
+; CHECK-NEXT: %25 = select <2 x i1> %21, <2 x i64> %13, <2 x i64> %17
+; CHECK-NEXT: %26 = select <2 x i1> %22, <2 x i64> %14, <2 x i64> %18
+; CHECK-NEXT: store <2 x i64> %24, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %25, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %26, <2 x i64>* %2, align 16
+; CHECK-NEXT: ret <2 x i64> %23
+; CHECK-NEXT: }
+
+define <8 x i64> @icmp_ne_on_8xi64(<8 x i64>, <8 x i64>, <8 x i64>, <8 x i64>) {
+entry:
+ %4 = icmp ne <8 x i64> %0, %1
+ %5 = select <8 x i1> %4, <8 x i64> %2, <8 x i64> %3
+ ret <8 x i64> %5
+}
+; CHECK-LABEL: define <2 x i64> @icmp_ne_on_8xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
+; CHECK: entry:
+; CHECK-NEXT: %19 = icmp ne <2 x i64> %3, %7
+; CHECK-NEXT: %20 = icmp ne <2 x i64> %4, %8
+; CHECK-NEXT: %21 = icmp ne <2 x i64> %5, %9
+; CHECK-NEXT: %22 = icmp ne <2 x i64> %6, %10
+; CHECK-NEXT: %23 = select <2 x i1> %19, <2 x i64> %11, <2 x i64> %15
+; CHECK-NEXT: %24 = select <2 x i1> %20, <2 x i64> %12, <2 x i64> %16
+; CHECK-NEXT: %25 = select <2 x i1> %21, <2 x i64> %13, <2 x i64> %17
+; CHECK-NEXT: %26 = select <2 x i1> %22, <2 x i64> %14, <2 x i64> %18
+; CHECK-NEXT: store <2 x i64> %24, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %25, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %26, <2 x i64>* %2, align 16
+; CHECK-NEXT: ret <2 x i64> %23
+; CHECK-NEXT: }
+
+define <8 x i64> @icmp_sgt_on_8xi64(<8 x i64>, <8 x i64>, <8 x i64>, <8 x i64>) {
+entry:
+ %4 = icmp sgt <8 x i64> %0, %1
+ %5 = select <8 x i1> %4, <8 x i64> %2, <8 x i64> %3
+ ret <8 x i64> %5
+}
+; CHECK-LABEL: define <2 x i64> @icmp_sgt_on_8xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
+; CHECK: entry:
+; CHECK-NEXT: %19 = icmp sgt <2 x i64> %3, %7
+; CHECK-NEXT: %20 = icmp sgt <2 x i64> %4, %8
+; CHECK-NEXT: %21 = icmp sgt <2 x i64> %5, %9
+; CHECK-NEXT: %22 = icmp sgt <2 x i64> %6, %10
+; CHECK-NEXT: %23 = select <2 x i1> %19, <2 x i64> %11, <2 x i64> %15
+; CHECK-NEXT: %24 = select <2 x i1> %20, <2 x i64> %12, <2 x i64> %16
+; CHECK-NEXT: %25 = select <2 x i1> %21, <2 x i64> %13, <2 x i64> %17
+; CHECK-NEXT: %26 = select <2 x i1> %22, <2 x i64> %14, <2 x i64> %18
+; CHECK-NEXT: store <2 x i64> %24, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %25, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %26, <2 x i64>* %2, align 16
+; CHECK-NEXT: ret <2 x i64> %23
+; CHECK-NEXT: }
+
+define <8 x i64> @icmp_ugt_on_8xi64(<8 x i64>, <8 x i64>, <8 x i64>, <8 x i64>) {
+entry:
+ %4 = icmp ugt <8 x i64> %0, %1
+ %5 = select <8 x i1> %4, <8 x i64> %2, <8 x i64> %3
+ ret <8 x i64> %5
+}
+; CHECK-LABEL: define <2 x i64> @icmp_ugt_on_8xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
+; CHECK: entry:
+; CHECK-NEXT: %19 = icmp ugt <2 x i64> %3, %7
+; CHECK-NEXT: %20 = icmp ugt <2 x i64> %4, %8
+; CHECK-NEXT: %21 = icmp ugt <2 x i64> %5, %9
+; CHECK-NEXT: %22 = icmp ugt <2 x i64> %6, %10
+; CHECK-NEXT: %23 = select <2 x i1> %19, <2 x i64> %11, <2 x i64> %15
+; CHECK-NEXT: %24 = select <2 x i1> %20, <2 x i64> %12, <2 x i64> %16
+; CHECK-NEXT: %25 = select <2 x i1> %21, <2 x i64> %13, <2 x i64> %17
+; CHECK-NEXT: %26 = select <2 x i1> %22, <2 x i64> %14, <2 x i64> %18
+; CHECK-NEXT: store <2 x i64> %24, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %25, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %26, <2 x i64>* %2, align 16
+; CHECK-NEXT: ret <2 x i64> %23
+; CHECK-NEXT: }
+
+define <8 x i64> @icmp_sge_on_8xi64(<8 x i64>, <8 x i64>, <8 x i64>, <8 x i64>) {
+entry:
+ %4 = icmp sge <8 x i64> %0, %1
+ %5 = select <8 x i1> %4, <8 x i64> %2, <8 x i64> %3
+ ret <8 x i64> %5
+}
+; CHECK-LABEL: define <2 x i64> @icmp_sge_on_8xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
+; CHECK: entry:
+; CHECK-NEXT: %19 = icmp sge <2 x i64> %3, %7
+; CHECK-NEXT: %20 = icmp sge <2 x i64> %4, %8
+; CHECK-NEXT: %21 = icmp sge <2 x i64> %5, %9
+; CHECK-NEXT: %22 = icmp sge <2 x i64> %6, %10
+; CHECK-NEXT: %23 = select <2 x i1> %19, <2 x i64> %11, <2 x i64> %15
+; CHECK-NEXT: %24 = select <2 x i1> %20, <2 x i64> %12, <2 x i64> %16
+; CHECK-NEXT: %25 = select <2 x i1> %21, <2 x i64> %13, <2 x i64> %17
+; CHECK-NEXT: %26 = select <2 x i1> %22, <2 x i64> %14, <2 x i64> %18
+; CHECK-NEXT: store <2 x i64> %24, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %25, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %26, <2 x i64>* %2, align 16
+; CHECK-NEXT: ret <2 x i64> %23
+; CHECK-NEXT: }
+
+define <8 x i64> @icmp_uge_on_8xi64(<8 x i64>, <8 x i64>, <8 x i64>, <8 x i64>) {
+entry:
+ %4 = icmp uge <8 x i64> %0, %1
+ %5 = select <8 x i1> %4, <8 x i64> %2, <8 x i64> %3
+ ret <8 x i64> %5
+}
+; CHECK-LABEL: define <2 x i64> @icmp_uge_on_8xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
+; CHECK: entry:
+; CHECK-NEXT: %19 = icmp uge <2 x i64> %3, %7
+; CHECK-NEXT: %20 = icmp uge <2 x i64> %4, %8
+; CHECK-NEXT: %21 = icmp uge <2 x i64> %5, %9
+; CHECK-NEXT: %22 = icmp uge <2 x i64> %6, %10
+; CHECK-NEXT: %23 = select <2 x i1> %19, <2 x i64> %11, <2 x i64> %15
+; CHECK-NEXT: %24 = select <2 x i1> %20, <2 x i64> %12, <2 x i64> %16
+; CHECK-NEXT: %25 = select <2 x i1> %21, <2 x i64> %13, <2 x i64> %17
+; CHECK-NEXT: %26 = select <2 x i1> %22, <2 x i64> %14, <2 x i64> %18
+; CHECK-NEXT: store <2 x i64> %24, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %25, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %26, <2 x i64>* %2, align 16
+; CHECK-NEXT: ret <2 x i64> %23
+; CHECK-NEXT: }
+
+define <8 x i64> @icmp_slt_on_8xi64(<8 x i64>, <8 x i64>, <8 x i64>, <8 x i64>) {
+entry:
+ %4 = icmp slt <8 x i64> %0, %1
+ %5 = select <8 x i1> %4, <8 x i64> %2, <8 x i64> %3
+ ret <8 x i64> %5
+}
+; CHECK-LABEL: define <2 x i64> @icmp_slt_on_8xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
+; CHECK: entry:
+; CHECK-NEXT: %19 = icmp slt <2 x i64> %3, %7
+; CHECK-NEXT: %20 = icmp slt <2 x i64> %4, %8
+; CHECK-NEXT: %21 = icmp slt <2 x i64> %5, %9
+; CHECK-NEXT: %22 = icmp slt <2 x i64> %6, %10
+; CHECK-NEXT: %23 = select <2 x i1> %19, <2 x i64> %11, <2 x i64> %15
+; CHECK-NEXT: %24 = select <2 x i1> %20, <2 x i64> %12, <2 x i64> %16
+; CHECK-NEXT: %25 = select <2 x i1> %21, <2 x i64> %13, <2 x i64> %17
+; CHECK-NEXT: %26 = select <2 x i1> %22, <2 x i64> %14, <2 x i64> %18
+; CHECK-NEXT: store <2 x i64> %24, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %25, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %26, <2 x i64>* %2, align 16
+; CHECK-NEXT: ret <2 x i64> %23
+; CHECK-NEXT: }
+
+define <8 x i64> @icmp_ult_on_8xi64(<8 x i64>, <8 x i64>, <8 x i64>, <8 x i64>) {
+entry:
+ %4 = icmp ult <8 x i64> %0, %1
+ %5 = select <8 x i1> %4, <8 x i64> %2, <8 x i64> %3
+ ret <8 x i64> %5
+}
+; CHECK-LABEL: define <2 x i64> @icmp_ult_on_8xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
+; CHECK: entry:
+; CHECK-NEXT: %19 = icmp ult <2 x i64> %3, %7
+; CHECK-NEXT: %20 = icmp ult <2 x i64> %4, %8
+; CHECK-NEXT: %21 = icmp ult <2 x i64> %5, %9
+; CHECK-NEXT: %22 = icmp ult <2 x i64> %6, %10
+; CHECK-NEXT: %23 = select <2 x i1> %19, <2 x i64> %11, <2 x i64> %15
+; CHECK-NEXT: %24 = select <2 x i1> %20, <2 x i64> %12, <2 x i64> %16
+; CHECK-NEXT: %25 = select <2 x i1> %21, <2 x i64> %13, <2 x i64> %17
+; CHECK-NEXT: %26 = select <2 x i1> %22, <2 x i64> %14, <2 x i64> %18
+; CHECK-NEXT: store <2 x i64> %24, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %25, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %26, <2 x i64>* %2, align 16
+; CHECK-NEXT: ret <2 x i64> %23
+; CHECK-NEXT: }
+
+define <8 x i64> @icmp_sle_on_8xi64(<8 x i64>, <8 x i64>, <8 x i64>, <8 x i64>) {
+entry:
+ %4 = icmp sle <8 x i64> %0, %1
+ %5 = select <8 x i1> %4, <8 x i64> %2, <8 x i64> %3
+ ret <8 x i64> %5
+}
+; CHECK-LABEL: define <2 x i64> @icmp_sle_on_8xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
+; CHECK: entry:
+; CHECK-NEXT: %19 = icmp sle <2 x i64> %3, %7
+; CHECK-NEXT: %20 = icmp sle <2 x i64> %4, %8
+; CHECK-NEXT: %21 = icmp sle <2 x i64> %5, %9
+; CHECK-NEXT: %22 = icmp sle <2 x i64> %6, %10
+; CHECK-NEXT: %23 = select <2 x i1> %19, <2 x i64> %11, <2 x i64> %15
+; CHECK-NEXT: %24 = select <2 x i1> %20, <2 x i64> %12, <2 x i64> %16
+; CHECK-NEXT: %25 = select <2 x i1> %21, <2 x i64> %13, <2 x i64> %17
+; CHECK-NEXT: %26 = select <2 x i1> %22, <2 x i64> %14, <2 x i64> %18
+; CHECK-NEXT: store <2 x i64> %24, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %25, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %26, <2 x i64>* %2, align 16
+; CHECK-NEXT: ret <2 x i64> %23
+; CHECK-NEXT: }
+
+define <8 x i64> @icmp_ule_on_8xi64(<8 x i64>, <8 x i64>, <8 x i64>, <8 x i64>) {
+entry:
+ %4 = icmp ule <8 x i64> %0, %1
+ %5 = select <8 x i1> %4, <8 x i64> %2, <8 x i64> %3
+ ret <8 x i64> %5
+}
+; CHECK-LABEL: define <2 x i64> @icmp_ule_on_8xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
+; CHECK: entry:
+; CHECK-NEXT: %19 = icmp ule <2 x i64> %3, %7
+; CHECK-NEXT: %20 = icmp ule <2 x i64> %4, %8
+; CHECK-NEXT: %21 = icmp ule <2 x i64> %5, %9
+; CHECK-NEXT: %22 = icmp ule <2 x i64> %6, %10
+; CHECK-NEXT: %23 = select <2 x i1> %19, <2 x i64> %11, <2 x i64> %15
+; CHECK-NEXT: %24 = select <2 x i1> %20, <2 x i64> %12, <2 x i64> %16
+; CHECK-NEXT: %25 = select <2 x i1> %21, <2 x i64> %13, <2 x i64> %17
+; CHECK-NEXT: %26 = select <2 x i1> %22, <2 x i64> %14, <2 x i64> %18
+; CHECK-NEXT: store <2 x i64> %24, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %25, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %26, <2 x i64>* %2, align 16
+; CHECK-NEXT: ret <2 x i64> %23
+; CHECK-NEXT: }
+
+define <8 x i8*> @icmp_eq_on_8xi8ptr(<8 x i8*>, <8 x i8*>, <8 x i8*>, <8 x i8*>) {
+entry:
+ %4 = icmp eq <8 x i8*> %0, %1
+ %5 = select <8 x i1> %4, <8 x i8*> %2, <8 x i8*> %3
+ ret <8 x i8*> %5
+}
+; CHECK-LABEL: define <4 x i8*> @icmp_eq_on_8xi8ptr(<4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = icmp eq <4 x i8*> %1, %3
+; CHECK-NEXT: %10 = icmp eq <4 x i8*> %2, %4
+; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x i8*> %5, <4 x i8*> %7
+; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x i8*> %6, <4 x i8*> %8
+; CHECK-NEXT: store <4 x i8*> %12, <4 x i8*>* %0, align 16
+; CHECK-NEXT: ret <4 x i8*> %11
+; CHECK-NEXT: }
+
+define <8 x i8*> @icmp_ne_on_8xi8ptr(<8 x i8*>, <8 x i8*>, <8 x i8*>, <8 x i8*>) {
+entry:
+ %4 = icmp ne <8 x i8*> %0, %1
+ %5 = select <8 x i1> %4, <8 x i8*> %2, <8 x i8*> %3
+ ret <8 x i8*> %5
+}
+; CHECK-LABEL: define <4 x i8*> @icmp_ne_on_8xi8ptr(<4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = icmp ne <4 x i8*> %1, %3
+; CHECK-NEXT: %10 = icmp ne <4 x i8*> %2, %4
+; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x i8*> %5, <4 x i8*> %7
+; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x i8*> %6, <4 x i8*> %8
+; CHECK-NEXT: store <4 x i8*> %12, <4 x i8*>* %0, align 16
+; CHECK-NEXT: ret <4 x i8*> %11
+; CHECK-NEXT: }
+
+define <8 x i8*> @icmp_sgt_on_8xi8ptr(<8 x i8*>, <8 x i8*>, <8 x i8*>, <8 x i8*>) {
+entry:
+ %4 = icmp sgt <8 x i8*> %0, %1
+ %5 = select <8 x i1> %4, <8 x i8*> %2, <8 x i8*> %3
+ ret <8 x i8*> %5
+}
+; CHECK-LABEL: define <4 x i8*> @icmp_sgt_on_8xi8ptr(<4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = icmp sgt <4 x i8*> %1, %3
+; CHECK-NEXT: %10 = icmp sgt <4 x i8*> %2, %4
+; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x i8*> %5, <4 x i8*> %7
+; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x i8*> %6, <4 x i8*> %8
+; CHECK-NEXT: store <4 x i8*> %12, <4 x i8*>* %0, align 16
+; CHECK-NEXT: ret <4 x i8*> %11
+; CHECK-NEXT: }
+
+define <8 x i8*> @icmp_ugt_on_8xi8ptr(<8 x i8*>, <8 x i8*>, <8 x i8*>, <8 x i8*>) {
+entry:
+ %4 = icmp ugt <8 x i8*> %0, %1
+ %5 = select <8 x i1> %4, <8 x i8*> %2, <8 x i8*> %3
+ ret <8 x i8*> %5
+}
+; CHECK-LABEL: define <4 x i8*> @icmp_ugt_on_8xi8ptr(<4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = icmp ugt <4 x i8*> %1, %3
+; CHECK-NEXT: %10 = icmp ugt <4 x i8*> %2, %4
+; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x i8*> %5, <4 x i8*> %7
+; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x i8*> %6, <4 x i8*> %8
+; CHECK-NEXT: store <4 x i8*> %12, <4 x i8*>* %0, align 16
+; CHECK-NEXT: ret <4 x i8*> %11
+; CHECK-NEXT: }
+
+define <8 x i8*> @icmp_sge_on_8xi8ptr(<8 x i8*>, <8 x i8*>, <8 x i8*>, <8 x i8*>) {
+entry:
+ %4 = icmp sge <8 x i8*> %0, %1
+ %5 = select <8 x i1> %4, <8 x i8*> %2, <8 x i8*> %3
+ ret <8 x i8*> %5
+}
+; CHECK-LABEL: define <4 x i8*> @icmp_sge_on_8xi8ptr(<4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = icmp sge <4 x i8*> %1, %3
+; CHECK-NEXT: %10 = icmp sge <4 x i8*> %2, %4
+; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x i8*> %5, <4 x i8*> %7
+; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x i8*> %6, <4 x i8*> %8
+; CHECK-NEXT: store <4 x i8*> %12, <4 x i8*>* %0, align 16
+; CHECK-NEXT: ret <4 x i8*> %11
+; CHECK-NEXT: }
+
+define <8 x i8*> @icmp_uge_on_8xi8ptr(<8 x i8*>, <8 x i8*>, <8 x i8*>, <8 x i8*>) {
+entry:
+ %4 = icmp uge <8 x i8*> %0, %1
+ %5 = select <8 x i1> %4, <8 x i8*> %2, <8 x i8*> %3
+ ret <8 x i8*> %5
+}
+; CHECK-LABEL: define <4 x i8*> @icmp_uge_on_8xi8ptr(<4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = icmp uge <4 x i8*> %1, %3
+; CHECK-NEXT: %10 = icmp uge <4 x i8*> %2, %4
+; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x i8*> %5, <4 x i8*> %7
+; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x i8*> %6, <4 x i8*> %8
+; CHECK-NEXT: store <4 x i8*> %12, <4 x i8*>* %0, align 16
+; CHECK-NEXT: ret <4 x i8*> %11
+; CHECK-NEXT: }
+
+define <8 x i8*> @icmp_slt_on_8xi8ptr(<8 x i8*>, <8 x i8*>, <8 x i8*>, <8 x i8*>) {
+entry:
+ %4 = icmp slt <8 x i8*> %0, %1
+ %5 = select <8 x i1> %4, <8 x i8*> %2, <8 x i8*> %3
+ ret <8 x i8*> %5
+}
+; CHECK-LABEL: define <4 x i8*> @icmp_slt_on_8xi8ptr(<4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = icmp slt <4 x i8*> %1, %3
+; CHECK-NEXT: %10 = icmp slt <4 x i8*> %2, %4
+; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x i8*> %5, <4 x i8*> %7
+; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x i8*> %6, <4 x i8*> %8
+; CHECK-NEXT: store <4 x i8*> %12, <4 x i8*>* %0, align 16
+; CHECK-NEXT: ret <4 x i8*> %11
+; CHECK-NEXT: }
+
+define <8 x i8*> @icmp_ult_on_8xi8ptr(<8 x i8*>, <8 x i8*>, <8 x i8*>, <8 x i8*>) {
+entry:
+ %4 = icmp ult <8 x i8*> %0, %1
+ %5 = select <8 x i1> %4, <8 x i8*> %2, <8 x i8*> %3
+ ret <8 x i8*> %5
+}
+; CHECK-LABEL: define <4 x i8*> @icmp_ult_on_8xi8ptr(<4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = icmp ult <4 x i8*> %1, %3
+; CHECK-NEXT: %10 = icmp ult <4 x i8*> %2, %4
+; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x i8*> %5, <4 x i8*> %7
+; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x i8*> %6, <4 x i8*> %8
+; CHECK-NEXT: store <4 x i8*> %12, <4 x i8*>* %0, align 16
+; CHECK-NEXT: ret <4 x i8*> %11
+; CHECK-NEXT: }
+
+define <8 x i8*> @icmp_sle_on_8xi8ptr(<8 x i8*>, <8 x i8*>, <8 x i8*>, <8 x i8*>) {
+entry:
+ %4 = icmp sle <8 x i8*> %0, %1
+ %5 = select <8 x i1> %4, <8 x i8*> %2, <8 x i8*> %3
+ ret <8 x i8*> %5
+}
+; CHECK-LABEL: define <4 x i8*> @icmp_sle_on_8xi8ptr(<4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = icmp sle <4 x i8*> %1, %3
+; CHECK-NEXT: %10 = icmp sle <4 x i8*> %2, %4
+; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x i8*> %5, <4 x i8*> %7
+; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x i8*> %6, <4 x i8*> %8
+; CHECK-NEXT: store <4 x i8*> %12, <4 x i8*>* %0, align 16
+; CHECK-NEXT: ret <4 x i8*> %11
+; CHECK-NEXT: }
+
+define <8 x i8*> @icmp_ule_on_8xi8ptr(<8 x i8*>, <8 x i8*>, <8 x i8*>, <8 x i8*>) {
+entry:
+ %4 = icmp ule <8 x i8*> %0, %1
+ %5 = select <8 x i1> %4, <8 x i8*> %2, <8 x i8*> %3
+ ret <8 x i8*> %5
+}
+; CHECK-LABEL: define <4 x i8*> @icmp_ule_on_8xi8ptr(<4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = icmp ule <4 x i8*> %1, %3
+; CHECK-NEXT: %10 = icmp ule <4 x i8*> %2, %4
+; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x i8*> %5, <4 x i8*> %7
+; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x i8*> %6, <4 x i8*> %8
+; CHECK-NEXT: store <4 x i8*> %12, <4 x i8*>* %0, align 16
+; CHECK-NEXT: ret <4 x i8*> %11
+; CHECK-NEXT: }
+
+define <12 x i8> @icmp_eq_on_12xi8(<12 x i8>, <12 x i8>, <12 x i8>, <12 x i8>) {
+entry:
+ %4 = icmp eq <12 x i8> %0, %1
+ %5 = select <12 x i1> %4, <12 x i8> %2, <12 x i8> %3
+ ret <12 x i8> %5
+}
+; CHECK-LABEL: define <16 x i8> @icmp_eq_on_12xi8(<16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp eq <16 x i8> %0, %1
+; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
+; CHECK-NEXT: ret <16 x i8> %5
+; CHECK-NEXT: }
+
+define <12 x i8> @icmp_ne_on_12xi8(<12 x i8>, <12 x i8>, <12 x i8>, <12 x i8>) {
+entry:
+ %4 = icmp ne <12 x i8> %0, %1
+ %5 = select <12 x i1> %4, <12 x i8> %2, <12 x i8> %3
+ ret <12 x i8> %5
+}
+; CHECK-LABEL: define <16 x i8> @icmp_ne_on_12xi8(<16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp ne <16 x i8> %0, %1
+; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
+; CHECK-NEXT: ret <16 x i8> %5
+; CHECK-NEXT: }
+
+define <12 x i8> @icmp_sgt_on_12xi8(<12 x i8>, <12 x i8>, <12 x i8>, <12 x i8>) {
+entry:
+ %4 = icmp sgt <12 x i8> %0, %1
+ %5 = select <12 x i1> %4, <12 x i8> %2, <12 x i8> %3
+ ret <12 x i8> %5
+}
+; CHECK-LABEL: define <16 x i8> @icmp_sgt_on_12xi8(<16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp sgt <16 x i8> %0, %1
+; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
+; CHECK-NEXT: ret <16 x i8> %5
+; CHECK-NEXT: }
+
+define <12 x i8> @icmp_ugt_on_12xi8(<12 x i8>, <12 x i8>, <12 x i8>, <12 x i8>) {
+entry:
+ %4 = icmp ugt <12 x i8> %0, %1
+ %5 = select <12 x i1> %4, <12 x i8> %2, <12 x i8> %3
+ ret <12 x i8> %5
+}
+; CHECK-LABEL: define <16 x i8> @icmp_ugt_on_12xi8(<16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp ugt <16 x i8> %0, %1
+; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
+; CHECK-NEXT: ret <16 x i8> %5
+; CHECK-NEXT: }
+
+define <12 x i8> @icmp_sge_on_12xi8(<12 x i8>, <12 x i8>, <12 x i8>, <12 x i8>) {
+entry:
+ %4 = icmp sge <12 x i8> %0, %1
+ %5 = select <12 x i1> %4, <12 x i8> %2, <12 x i8> %3
+ ret <12 x i8> %5
+}
+; CHECK-LABEL: define <16 x i8> @icmp_sge_on_12xi8(<16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp sge <16 x i8> %0, %1
+; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
+; CHECK-NEXT: ret <16 x i8> %5
+; CHECK-NEXT: }
+
+define <12 x i8> @icmp_uge_on_12xi8(<12 x i8>, <12 x i8>, <12 x i8>, <12 x i8>) {
+entry:
+ %4 = icmp uge <12 x i8> %0, %1
+ %5 = select <12 x i1> %4, <12 x i8> %2, <12 x i8> %3
+ ret <12 x i8> %5
+}
+; CHECK-LABEL: define <16 x i8> @icmp_uge_on_12xi8(<16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp uge <16 x i8> %0, %1
+; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
+; CHECK-NEXT: ret <16 x i8> %5
+; CHECK-NEXT: }
+
+define <12 x i8> @icmp_slt_on_12xi8(<12 x i8>, <12 x i8>, <12 x i8>, <12 x i8>) {
+entry:
+ %4 = icmp slt <12 x i8> %0, %1
+ %5 = select <12 x i1> %4, <12 x i8> %2, <12 x i8> %3
+ ret <12 x i8> %5
+}
+; CHECK-LABEL: define <16 x i8> @icmp_slt_on_12xi8(<16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp slt <16 x i8> %0, %1
+; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
+; CHECK-NEXT: ret <16 x i8> %5
+; CHECK-NEXT: }
+
+define <12 x i8> @icmp_ult_on_12xi8(<12 x i8>, <12 x i8>, <12 x i8>, <12 x i8>) {
+entry:
+ %4 = icmp ult <12 x i8> %0, %1
+ %5 = select <12 x i1> %4, <12 x i8> %2, <12 x i8> %3
+ ret <12 x i8> %5
+}
+; CHECK-LABEL: define <16 x i8> @icmp_ult_on_12xi8(<16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp ult <16 x i8> %0, %1
+; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
+; CHECK-NEXT: ret <16 x i8> %5
+; CHECK-NEXT: }
+
+define <12 x i8> @icmp_sle_on_12xi8(<12 x i8>, <12 x i8>, <12 x i8>, <12 x i8>) {
+entry:
+ %4 = icmp sle <12 x i8> %0, %1
+ %5 = select <12 x i1> %4, <12 x i8> %2, <12 x i8> %3
+ ret <12 x i8> %5
+}
+; CHECK-LABEL: define <16 x i8> @icmp_sle_on_12xi8(<16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp sle <16 x i8> %0, %1
+; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
+; CHECK-NEXT: ret <16 x i8> %5
+; CHECK-NEXT: }
+
+define <12 x i8> @icmp_ule_on_12xi8(<12 x i8>, <12 x i8>, <12 x i8>, <12 x i8>) {
+entry:
+ %4 = icmp ule <12 x i8> %0, %1
+ %5 = select <12 x i1> %4, <12 x i8> %2, <12 x i8> %3
+ ret <12 x i8> %5
+}
+; CHECK-LABEL: define <16 x i8> @icmp_ule_on_12xi8(<16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp ule <16 x i8> %0, %1
+; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
+; CHECK-NEXT: ret <16 x i8> %5
+; CHECK-NEXT: }
+
+define <12 x i16> @icmp_eq_on_12xi16(<12 x i16>, <12 x i16>, <12 x i16>, <12 x i16>) {
+entry:
+ %4 = icmp eq <12 x i16> %0, %1
+ %5 = select <12 x i1> %4, <12 x i16> %2, <12 x i16> %3
+ ret <12 x i16> %5
+}
+; CHECK-LABEL: define <8 x i16> @icmp_eq_on_12xi16(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = icmp eq <8 x i16> %1, %3
+; CHECK-NEXT: %10 = icmp eq <8 x i16> %2, %4
+; CHECK-NEXT: %11 = select <8 x i1> %9, <8 x i16> %5, <8 x i16> %7
+; CHECK-NEXT: %12 = select <8 x i1> %10, <8 x i16> %6, <8 x i16> %8
+; CHECK-NEXT: store <8 x i16> %12, <8 x i16>* %0, align 16
+; CHECK-NEXT: ret <8 x i16> %11
+; CHECK-NEXT: }
+
+define <12 x i16> @icmp_ne_on_12xi16(<12 x i16>, <12 x i16>, <12 x i16>, <12 x i16>) {
+entry:
+ %4 = icmp ne <12 x i16> %0, %1
+ %5 = select <12 x i1> %4, <12 x i16> %2, <12 x i16> %3
+ ret <12 x i16> %5
+}
+; CHECK-LABEL: define <8 x i16> @icmp_ne_on_12xi16(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = icmp ne <8 x i16> %1, %3
+; CHECK-NEXT: %10 = icmp ne <8 x i16> %2, %4
+; CHECK-NEXT: %11 = select <8 x i1> %9, <8 x i16> %5, <8 x i16> %7
+; CHECK-NEXT: %12 = select <8 x i1> %10, <8 x i16> %6, <8 x i16> %8
+; CHECK-NEXT: store <8 x i16> %12, <8 x i16>* %0, align 16
+; CHECK-NEXT: ret <8 x i16> %11
+; CHECK-NEXT: }
+
+define <12 x i16> @icmp_sgt_on_12xi16(<12 x i16>, <12 x i16>, <12 x i16>, <12 x i16>) {
+entry:
+ %4 = icmp sgt <12 x i16> %0, %1
+ %5 = select <12 x i1> %4, <12 x i16> %2, <12 x i16> %3
+ ret <12 x i16> %5
+}
+; CHECK-LABEL: define <8 x i16> @icmp_sgt_on_12xi16(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = icmp sgt <8 x i16> %1, %3
+; CHECK-NEXT: %10 = icmp sgt <8 x i16> %2, %4
+; CHECK-NEXT: %11 = select <8 x i1> %9, <8 x i16> %5, <8 x i16> %7
+; CHECK-NEXT: %12 = select <8 x i1> %10, <8 x i16> %6, <8 x i16> %8
+; CHECK-NEXT: store <8 x i16> %12, <8 x i16>* %0, align 16
+; CHECK-NEXT: ret <8 x i16> %11
+; CHECK-NEXT: }
+
+define <12 x i16> @icmp_ugt_on_12xi16(<12 x i16>, <12 x i16>, <12 x i16>, <12 x i16>) {
+entry:
+ %4 = icmp ugt <12 x i16> %0, %1
+ %5 = select <12 x i1> %4, <12 x i16> %2, <12 x i16> %3
+ ret <12 x i16> %5
+}
+; CHECK-LABEL: define <8 x i16> @icmp_ugt_on_12xi16(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = icmp ugt <8 x i16> %1, %3
+; CHECK-NEXT: %10 = icmp ugt <8 x i16> %2, %4
+; CHECK-NEXT: %11 = select <8 x i1> %9, <8 x i16> %5, <8 x i16> %7
+; CHECK-NEXT: %12 = select <8 x i1> %10, <8 x i16> %6, <8 x i16> %8
+; CHECK-NEXT: store <8 x i16> %12, <8 x i16>* %0, align 16
+; CHECK-NEXT: ret <8 x i16> %11
+; CHECK-NEXT: }
+
+define <12 x i16> @icmp_sge_on_12xi16(<12 x i16>, <12 x i16>, <12 x i16>, <12 x i16>) {
+entry:
+ %4 = icmp sge <12 x i16> %0, %1
+ %5 = select <12 x i1> %4, <12 x i16> %2, <12 x i16> %3
+ ret <12 x i16> %5
+}
+; CHECK-LABEL: define <8 x i16> @icmp_sge_on_12xi16(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = icmp sge <8 x i16> %1, %3
+; CHECK-NEXT: %10 = icmp sge <8 x i16> %2, %4
+; CHECK-NEXT: %11 = select <8 x i1> %9, <8 x i16> %5, <8 x i16> %7
+; CHECK-NEXT: %12 = select <8 x i1> %10, <8 x i16> %6, <8 x i16> %8
+; CHECK-NEXT: store <8 x i16> %12, <8 x i16>* %0, align 16
+; CHECK-NEXT: ret <8 x i16> %11
+; CHECK-NEXT: }
+
+define <12 x i16> @icmp_uge_on_12xi16(<12 x i16>, <12 x i16>, <12 x i16>, <12 x i16>) {
+entry:
+ %4 = icmp uge <12 x i16> %0, %1
+ %5 = select <12 x i1> %4, <12 x i16> %2, <12 x i16> %3
+ ret <12 x i16> %5
+}
+; CHECK-LABEL: define <8 x i16> @icmp_uge_on_12xi16(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = icmp uge <8 x i16> %1, %3
+; CHECK-NEXT: %10 = icmp uge <8 x i16> %2, %4
+; CHECK-NEXT: %11 = select <8 x i1> %9, <8 x i16> %5, <8 x i16> %7
+; CHECK-NEXT: %12 = select <8 x i1> %10, <8 x i16> %6, <8 x i16> %8
+; CHECK-NEXT: store <8 x i16> %12, <8 x i16>* %0, align 16
+; CHECK-NEXT: ret <8 x i16> %11
+; CHECK-NEXT: }
+
+define <12 x i16> @icmp_slt_on_12xi16(<12 x i16>, <12 x i16>, <12 x i16>, <12 x i16>) {
+entry:
+ %4 = icmp slt <12 x i16> %0, %1
+ %5 = select <12 x i1> %4, <12 x i16> %2, <12 x i16> %3
+ ret <12 x i16> %5
+}
+; CHECK-LABEL: define <8 x i16> @icmp_slt_on_12xi16(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = icmp slt <8 x i16> %1, %3
+; CHECK-NEXT: %10 = icmp slt <8 x i16> %2, %4
+; CHECK-NEXT: %11 = select <8 x i1> %9, <8 x i16> %5, <8 x i16> %7
+; CHECK-NEXT: %12 = select <8 x i1> %10, <8 x i16> %6, <8 x i16> %8
+; CHECK-NEXT: store <8 x i16> %12, <8 x i16>* %0, align 16
+; CHECK-NEXT: ret <8 x i16> %11
+; CHECK-NEXT: }
+
+define <12 x i16> @icmp_ult_on_12xi16(<12 x i16>, <12 x i16>, <12 x i16>, <12 x i16>) {
+entry:
+ %4 = icmp ult <12 x i16> %0, %1
+ %5 = select <12 x i1> %4, <12 x i16> %2, <12 x i16> %3
+ ret <12 x i16> %5
+}
+; CHECK-LABEL: define <8 x i16> @icmp_ult_on_12xi16(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = icmp ult <8 x i16> %1, %3
+; CHECK-NEXT: %10 = icmp ult <8 x i16> %2, %4
+; CHECK-NEXT: %11 = select <8 x i1> %9, <8 x i16> %5, <8 x i16> %7
+; CHECK-NEXT: %12 = select <8 x i1> %10, <8 x i16> %6, <8 x i16> %8
+; CHECK-NEXT: store <8 x i16> %12, <8 x i16>* %0, align 16
+; CHECK-NEXT: ret <8 x i16> %11
+; CHECK-NEXT: }
+
+define <12 x i16> @icmp_sle_on_12xi16(<12 x i16>, <12 x i16>, <12 x i16>, <12 x i16>) {
+entry:
+ %4 = icmp sle <12 x i16> %0, %1
+ %5 = select <12 x i1> %4, <12 x i16> %2, <12 x i16> %3
+ ret <12 x i16> %5
+}
+; CHECK-LABEL: define <8 x i16> @icmp_sle_on_12xi16(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = icmp sle <8 x i16> %1, %3
+; CHECK-NEXT: %10 = icmp sle <8 x i16> %2, %4
+; CHECK-NEXT: %11 = select <8 x i1> %9, <8 x i16> %5, <8 x i16> %7
+; CHECK-NEXT: %12 = select <8 x i1> %10, <8 x i16> %6, <8 x i16> %8
+; CHECK-NEXT: store <8 x i16> %12, <8 x i16>* %0, align 16
+; CHECK-NEXT: ret <8 x i16> %11
+; CHECK-NEXT: }
+
+define <12 x i16> @icmp_ule_on_12xi16(<12 x i16>, <12 x i16>, <12 x i16>, <12 x i16>) {
+entry:
+ %4 = icmp ule <12 x i16> %0, %1
+ %5 = select <12 x i1> %4, <12 x i16> %2, <12 x i16> %3
+ ret <12 x i16> %5
+}
+; CHECK-LABEL: define <8 x i16> @icmp_ule_on_12xi16(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = icmp ule <8 x i16> %1, %3
+; CHECK-NEXT: %10 = icmp ule <8 x i16> %2, %4
+; CHECK-NEXT: %11 = select <8 x i1> %9, <8 x i16> %5, <8 x i16> %7
+; CHECK-NEXT: %12 = select <8 x i1> %10, <8 x i16> %6, <8 x i16> %8
+; CHECK-NEXT: store <8 x i16> %12, <8 x i16>* %0, align 16
+; CHECK-NEXT: ret <8 x i16> %11
+; CHECK-NEXT: }
+
+define <12 x i32> @icmp_eq_on_12xi32(<12 x i32>, <12 x i32>, <12 x i32>, <12 x i32>) {
+entry:
+ %4 = icmp eq <12 x i32> %0, %1
+ %5 = select <12 x i1> %4, <12 x i32> %2, <12 x i32> %3
+ ret <12 x i32> %5
+}
+; CHECK-LABEL: define <4 x i32> @icmp_eq_on_12xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
+; CHECK: entry:
+; CHECK-NEXT: %14 = icmp eq <4 x i32> %2, %5
+; CHECK-NEXT: %15 = icmp eq <4 x i32> %3, %6
+; CHECK-NEXT: %16 = icmp eq <4 x i32> %4, %7
+; CHECK-NEXT: %17 = select <4 x i1> %14, <4 x i32> %8, <4 x i32> %11
+; CHECK-NEXT: %18 = select <4 x i1> %15, <4 x i32> %9, <4 x i32> %12
+; CHECK-NEXT: %19 = select <4 x i1> %16, <4 x i32> %10, <4 x i32> %13
+; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %0, align 16
+; CHECK-NEXT: store <4 x i32> %19, <4 x i32>* %1, align 16
+; CHECK-NEXT: ret <4 x i32> %17
+; CHECK-NEXT: }
+
+define <12 x i32> @icmp_ne_on_12xi32(<12 x i32>, <12 x i32>, <12 x i32>, <12 x i32>) {
+entry:
+ %4 = icmp ne <12 x i32> %0, %1
+ %5 = select <12 x i1> %4, <12 x i32> %2, <12 x i32> %3
+ ret <12 x i32> %5
+}
+; CHECK-LABEL: define <4 x i32> @icmp_ne_on_12xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
+; CHECK: entry:
+; CHECK-NEXT: %14 = icmp ne <4 x i32> %2, %5
+; CHECK-NEXT: %15 = icmp ne <4 x i32> %3, %6
+; CHECK-NEXT: %16 = icmp ne <4 x i32> %4, %7
+; CHECK-NEXT: %17 = select <4 x i1> %14, <4 x i32> %8, <4 x i32> %11
+; CHECK-NEXT: %18 = select <4 x i1> %15, <4 x i32> %9, <4 x i32> %12
+; CHECK-NEXT: %19 = select <4 x i1> %16, <4 x i32> %10, <4 x i32> %13
+; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %0, align 16
+; CHECK-NEXT: store <4 x i32> %19, <4 x i32>* %1, align 16
+; CHECK-NEXT: ret <4 x i32> %17
+; CHECK-NEXT: }
+
+define <12 x i32> @icmp_sgt_on_12xi32(<12 x i32>, <12 x i32>, <12 x i32>, <12 x i32>) {
+entry:
+ %4 = icmp sgt <12 x i32> %0, %1
+ %5 = select <12 x i1> %4, <12 x i32> %2, <12 x i32> %3
+ ret <12 x i32> %5
+}
+; CHECK-LABEL: define <4 x i32> @icmp_sgt_on_12xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
+; CHECK: entry:
+; CHECK-NEXT: %14 = icmp sgt <4 x i32> %2, %5
+; CHECK-NEXT: %15 = icmp sgt <4 x i32> %3, %6
+; CHECK-NEXT: %16 = icmp sgt <4 x i32> %4, %7
+; CHECK-NEXT: %17 = select <4 x i1> %14, <4 x i32> %8, <4 x i32> %11
+; CHECK-NEXT: %18 = select <4 x i1> %15, <4 x i32> %9, <4 x i32> %12
+; CHECK-NEXT: %19 = select <4 x i1> %16, <4 x i32> %10, <4 x i32> %13
+; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %0, align 16
+; CHECK-NEXT: store <4 x i32> %19, <4 x i32>* %1, align 16
+; CHECK-NEXT: ret <4 x i32> %17
+; CHECK-NEXT: }
+
+define <12 x i32> @icmp_ugt_on_12xi32(<12 x i32>, <12 x i32>, <12 x i32>, <12 x i32>) {
+entry:
+ %4 = icmp ugt <12 x i32> %0, %1
+ %5 = select <12 x i1> %4, <12 x i32> %2, <12 x i32> %3
+ ret <12 x i32> %5
+}
+; CHECK-LABEL: define <4 x i32> @icmp_ugt_on_12xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
+; CHECK: entry:
+; CHECK-NEXT: %14 = icmp ugt <4 x i32> %2, %5
+; CHECK-NEXT: %15 = icmp ugt <4 x i32> %3, %6
+; CHECK-NEXT: %16 = icmp ugt <4 x i32> %4, %7
+; CHECK-NEXT: %17 = select <4 x i1> %14, <4 x i32> %8, <4 x i32> %11
+; CHECK-NEXT: %18 = select <4 x i1> %15, <4 x i32> %9, <4 x i32> %12
+; CHECK-NEXT: %19 = select <4 x i1> %16, <4 x i32> %10, <4 x i32> %13
+; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %0, align 16
+; CHECK-NEXT: store <4 x i32> %19, <4 x i32>* %1, align 16
+; CHECK-NEXT: ret <4 x i32> %17
+; CHECK-NEXT: }
+
+define <12 x i32> @icmp_sge_on_12xi32(<12 x i32>, <12 x i32>, <12 x i32>, <12 x i32>) {
+entry:
+ %4 = icmp sge <12 x i32> %0, %1
+ %5 = select <12 x i1> %4, <12 x i32> %2, <12 x i32> %3
+ ret <12 x i32> %5
+}
+; CHECK-LABEL: define <4 x i32> @icmp_sge_on_12xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
+; CHECK: entry:
+; CHECK-NEXT: %14 = icmp sge <4 x i32> %2, %5
+; CHECK-NEXT: %15 = icmp sge <4 x i32> %3, %6
+; CHECK-NEXT: %16 = icmp sge <4 x i32> %4, %7
+; CHECK-NEXT: %17 = select <4 x i1> %14, <4 x i32> %8, <4 x i32> %11
+; CHECK-NEXT: %18 = select <4 x i1> %15, <4 x i32> %9, <4 x i32> %12
+; CHECK-NEXT: %19 = select <4 x i1> %16, <4 x i32> %10, <4 x i32> %13
+; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %0, align 16
+; CHECK-NEXT: store <4 x i32> %19, <4 x i32>* %1, align 16
+; CHECK-NEXT: ret <4 x i32> %17
+; CHECK-NEXT: }
+
+define <12 x i32> @icmp_uge_on_12xi32(<12 x i32>, <12 x i32>, <12 x i32>, <12 x i32>) {
+entry:
+ %4 = icmp uge <12 x i32> %0, %1
+ %5 = select <12 x i1> %4, <12 x i32> %2, <12 x i32> %3
+ ret <12 x i32> %5
+}
+; CHECK-LABEL: define <4 x i32> @icmp_uge_on_12xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
+; CHECK: entry:
+; CHECK-NEXT: %14 = icmp uge <4 x i32> %2, %5
+; CHECK-NEXT: %15 = icmp uge <4 x i32> %3, %6
+; CHECK-NEXT: %16 = icmp uge <4 x i32> %4, %7
+; CHECK-NEXT: %17 = select <4 x i1> %14, <4 x i32> %8, <4 x i32> %11
+; CHECK-NEXT: %18 = select <4 x i1> %15, <4 x i32> %9, <4 x i32> %12
+; CHECK-NEXT: %19 = select <4 x i1> %16, <4 x i32> %10, <4 x i32> %13
+; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %0, align 16
+; CHECK-NEXT: store <4 x i32> %19, <4 x i32>* %1, align 16
+; CHECK-NEXT: ret <4 x i32> %17
+; CHECK-NEXT: }
+
+define <12 x i32> @icmp_slt_on_12xi32(<12 x i32>, <12 x i32>, <12 x i32>, <12 x i32>) {
+entry:
+ %4 = icmp slt <12 x i32> %0, %1
+ %5 = select <12 x i1> %4, <12 x i32> %2, <12 x i32> %3
+ ret <12 x i32> %5
+}
+; CHECK-LABEL: define <4 x i32> @icmp_slt_on_12xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
+; CHECK: entry:
+; CHECK-NEXT: %14 = icmp slt <4 x i32> %2, %5
+; CHECK-NEXT: %15 = icmp slt <4 x i32> %3, %6
+; CHECK-NEXT: %16 = icmp slt <4 x i32> %4, %7
+; CHECK-NEXT: %17 = select <4 x i1> %14, <4 x i32> %8, <4 x i32> %11
+; CHECK-NEXT: %18 = select <4 x i1> %15, <4 x i32> %9, <4 x i32> %12
+; CHECK-NEXT: %19 = select <4 x i1> %16, <4 x i32> %10, <4 x i32> %13
+; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %0, align 16
+; CHECK-NEXT: store <4 x i32> %19, <4 x i32>* %1, align 16
+; CHECK-NEXT: ret <4 x i32> %17
+; CHECK-NEXT: }
+
+define <12 x i32> @icmp_ult_on_12xi32(<12 x i32>, <12 x i32>, <12 x i32>, <12 x i32>) {
+entry:
+ %4 = icmp ult <12 x i32> %0, %1
+ %5 = select <12 x i1> %4, <12 x i32> %2, <12 x i32> %3
+ ret <12 x i32> %5
+}
+; CHECK-LABEL: define <4 x i32> @icmp_ult_on_12xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
+; CHECK: entry:
+; CHECK-NEXT: %14 = icmp ult <4 x i32> %2, %5
+; CHECK-NEXT: %15 = icmp ult <4 x i32> %3, %6
+; CHECK-NEXT: %16 = icmp ult <4 x i32> %4, %7
+; CHECK-NEXT: %17 = select <4 x i1> %14, <4 x i32> %8, <4 x i32> %11
+; CHECK-NEXT: %18 = select <4 x i1> %15, <4 x i32> %9, <4 x i32> %12
+; CHECK-NEXT: %19 = select <4 x i1> %16, <4 x i32> %10, <4 x i32> %13
+; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %0, align 16
+; CHECK-NEXT: store <4 x i32> %19, <4 x i32>* %1, align 16
+; CHECK-NEXT: ret <4 x i32> %17
+; CHECK-NEXT: }
+
+define <12 x i32> @icmp_sle_on_12xi32(<12 x i32>, <12 x i32>, <12 x i32>, <12 x i32>) {
+entry:
+ %4 = icmp sle <12 x i32> %0, %1
+ %5 = select <12 x i1> %4, <12 x i32> %2, <12 x i32> %3
+ ret <12 x i32> %5
+}
+; CHECK-LABEL: define <4 x i32> @icmp_sle_on_12xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
+; CHECK: entry:
+; CHECK-NEXT: %14 = icmp sle <4 x i32> %2, %5
+; CHECK-NEXT: %15 = icmp sle <4 x i32> %3, %6
+; CHECK-NEXT: %16 = icmp sle <4 x i32> %4, %7
+; CHECK-NEXT: %17 = select <4 x i1> %14, <4 x i32> %8, <4 x i32> %11
+; CHECK-NEXT: %18 = select <4 x i1> %15, <4 x i32> %9, <4 x i32> %12
+; CHECK-NEXT: %19 = select <4 x i1> %16, <4 x i32> %10, <4 x i32> %13
+; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %0, align 16
+; CHECK-NEXT: store <4 x i32> %19, <4 x i32>* %1, align 16
+; CHECK-NEXT: ret <4 x i32> %17
+; CHECK-NEXT: }
+
+define <12 x i32> @icmp_ule_on_12xi32(<12 x i32>, <12 x i32>, <12 x i32>, <12 x i32>) {
+entry:
+ %4 = icmp ule <12 x i32> %0, %1
+ %5 = select <12 x i1> %4, <12 x i32> %2, <12 x i32> %3
+ ret <12 x i32> %5
+}
+; CHECK-LABEL: define <4 x i32> @icmp_ule_on_12xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
+; CHECK: entry:
+; CHECK-NEXT: %14 = icmp ule <4 x i32> %2, %5
+; CHECK-NEXT: %15 = icmp ule <4 x i32> %3, %6
+; CHECK-NEXT: %16 = icmp ule <4 x i32> %4, %7
+; CHECK-NEXT: %17 = select <4 x i1> %14, <4 x i32> %8, <4 x i32> %11
+; CHECK-NEXT: %18 = select <4 x i1> %15, <4 x i32> %9, <4 x i32> %12
+; CHECK-NEXT: %19 = select <4 x i1> %16, <4 x i32> %10, <4 x i32> %13
+; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %0, align 16
+; CHECK-NEXT: store <4 x i32> %19, <4 x i32>* %1, align 16
+; CHECK-NEXT: ret <4 x i32> %17
+; CHECK-NEXT: }
+
+define <12 x i64> @icmp_eq_on_12xi64(<12 x i64>, <12 x i64>, <12 x i64>, <12 x i64>) {
+entry:
+ %4 = icmp eq <12 x i64> %0, %1
+ %5 = select <12 x i1> %4, <12 x i64> %2, <12 x i64> %3
+ ret <12 x i64> %5
+}
+; CHECK-LABEL: define <2 x i64> @icmp_eq_on_12xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
+; CHECK: entry:
+; CHECK-NEXT: %29 = icmp eq <2 x i64> %5, %11
+; CHECK-NEXT: %30 = icmp eq <2 x i64> %6, %12
+; CHECK-NEXT: %31 = icmp eq <2 x i64> %7, %13
+; CHECK-NEXT: %32 = icmp eq <2 x i64> %8, %14
+; CHECK-NEXT: %33 = icmp eq <2 x i64> %9, %15
+; CHECK-NEXT: %34 = icmp eq <2 x i64> %10, %16
+; CHECK-NEXT: %35 = select <2 x i1> %29, <2 x i64> %17, <2 x i64> %23
+; CHECK-NEXT: %36 = select <2 x i1> %30, <2 x i64> %18, <2 x i64> %24
+; CHECK-NEXT: %37 = select <2 x i1> %31, <2 x i64> %19, <2 x i64> %25
+; CHECK-NEXT: %38 = select <2 x i1> %32, <2 x i64> %20, <2 x i64> %26
+; CHECK-NEXT: %39 = select <2 x i1> %33, <2 x i64> %21, <2 x i64> %27
+; CHECK-NEXT: %40 = select <2 x i1> %34, <2 x i64> %22, <2 x i64> %28
+; CHECK-NEXT: store <2 x i64> %36, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %37, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %38, <2 x i64>* %2, align 16
+; CHECK-NEXT: store <2 x i64> %39, <2 x i64>* %3, align 16
+; CHECK-NEXT: store <2 x i64> %40, <2 x i64>* %4, align 16
+; CHECK-NEXT: ret <2 x i64> %35
+; CHECK-NEXT: }
+
+define <12 x i64> @icmp_ne_on_12xi64(<12 x i64>, <12 x i64>, <12 x i64>, <12 x i64>) {
+entry:
+ %4 = icmp ne <12 x i64> %0, %1
+ %5 = select <12 x i1> %4, <12 x i64> %2, <12 x i64> %3
+ ret <12 x i64> %5
+}
+; CHECK-LABEL: define <2 x i64> @icmp_ne_on_12xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
+; CHECK: entry:
+; CHECK-NEXT: %29 = icmp ne <2 x i64> %5, %11
+; CHECK-NEXT: %30 = icmp ne <2 x i64> %6, %12
+; CHECK-NEXT: %31 = icmp ne <2 x i64> %7, %13
+; CHECK-NEXT: %32 = icmp ne <2 x i64> %8, %14
+; CHECK-NEXT: %33 = icmp ne <2 x i64> %9, %15
+; CHECK-NEXT: %34 = icmp ne <2 x i64> %10, %16
+; CHECK-NEXT: %35 = select <2 x i1> %29, <2 x i64> %17, <2 x i64> %23
+; CHECK-NEXT: %36 = select <2 x i1> %30, <2 x i64> %18, <2 x i64> %24
+; CHECK-NEXT: %37 = select <2 x i1> %31, <2 x i64> %19, <2 x i64> %25
+; CHECK-NEXT: %38 = select <2 x i1> %32, <2 x i64> %20, <2 x i64> %26
+; CHECK-NEXT: %39 = select <2 x i1> %33, <2 x i64> %21, <2 x i64> %27
+; CHECK-NEXT: %40 = select <2 x i1> %34, <2 x i64> %22, <2 x i64> %28
+; CHECK-NEXT: store <2 x i64> %36, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %37, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %38, <2 x i64>* %2, align 16
+; CHECK-NEXT: store <2 x i64> %39, <2 x i64>* %3, align 16
+; CHECK-NEXT: store <2 x i64> %40, <2 x i64>* %4, align 16
+; CHECK-NEXT: ret <2 x i64> %35
+; CHECK-NEXT: }
+
+define <12 x i64> @icmp_sgt_on_12xi64(<12 x i64>, <12 x i64>, <12 x i64>, <12 x i64>) {
+entry:
+ %4 = icmp sgt <12 x i64> %0, %1
+ %5 = select <12 x i1> %4, <12 x i64> %2, <12 x i64> %3
+ ret <12 x i64> %5
+}
+; CHECK-LABEL: define <2 x i64> @icmp_sgt_on_12xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
+; CHECK: entry:
+; CHECK-NEXT: %29 = icmp sgt <2 x i64> %5, %11
+; CHECK-NEXT: %30 = icmp sgt <2 x i64> %6, %12
+; CHECK-NEXT: %31 = icmp sgt <2 x i64> %7, %13
+; CHECK-NEXT: %32 = icmp sgt <2 x i64> %8, %14
+; CHECK-NEXT: %33 = icmp sgt <2 x i64> %9, %15
+; CHECK-NEXT: %34 = icmp sgt <2 x i64> %10, %16
+; CHECK-NEXT: %35 = select <2 x i1> %29, <2 x i64> %17, <2 x i64> %23
+; CHECK-NEXT: %36 = select <2 x i1> %30, <2 x i64> %18, <2 x i64> %24
+; CHECK-NEXT: %37 = select <2 x i1> %31, <2 x i64> %19, <2 x i64> %25
+; CHECK-NEXT: %38 = select <2 x i1> %32, <2 x i64> %20, <2 x i64> %26
+; CHECK-NEXT: %39 = select <2 x i1> %33, <2 x i64> %21, <2 x i64> %27
+; CHECK-NEXT: %40 = select <2 x i1> %34, <2 x i64> %22, <2 x i64> %28
+; CHECK-NEXT: store <2 x i64> %36, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %37, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %38, <2 x i64>* %2, align 16
+; CHECK-NEXT: store <2 x i64> %39, <2 x i64>* %3, align 16
+; CHECK-NEXT: store <2 x i64> %40, <2 x i64>* %4, align 16
+; CHECK-NEXT: ret <2 x i64> %35
+; CHECK-NEXT: }
+
+define <12 x i64> @icmp_ugt_on_12xi64(<12 x i64>, <12 x i64>, <12 x i64>, <12 x i64>) {
+entry:
+ %4 = icmp ugt <12 x i64> %0, %1
+ %5 = select <12 x i1> %4, <12 x i64> %2, <12 x i64> %3
+ ret <12 x i64> %5
+}
+; CHECK-LABEL: define <2 x i64> @icmp_ugt_on_12xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
+; CHECK: entry:
+; CHECK-NEXT: %29 = icmp ugt <2 x i64> %5, %11
+; CHECK-NEXT: %30 = icmp ugt <2 x i64> %6, %12
+; CHECK-NEXT: %31 = icmp ugt <2 x i64> %7, %13
+; CHECK-NEXT: %32 = icmp ugt <2 x i64> %8, %14
+; CHECK-NEXT: %33 = icmp ugt <2 x i64> %9, %15
+; CHECK-NEXT: %34 = icmp ugt <2 x i64> %10, %16
+; CHECK-NEXT: %35 = select <2 x i1> %29, <2 x i64> %17, <2 x i64> %23
+; CHECK-NEXT: %36 = select <2 x i1> %30, <2 x i64> %18, <2 x i64> %24
+; CHECK-NEXT: %37 = select <2 x i1> %31, <2 x i64> %19, <2 x i64> %25
+; CHECK-NEXT: %38 = select <2 x i1> %32, <2 x i64> %20, <2 x i64> %26
+; CHECK-NEXT: %39 = select <2 x i1> %33, <2 x i64> %21, <2 x i64> %27
+; CHECK-NEXT: %40 = select <2 x i1> %34, <2 x i64> %22, <2 x i64> %28
+; CHECK-NEXT: store <2 x i64> %36, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %37, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %38, <2 x i64>* %2, align 16
+; CHECK-NEXT: store <2 x i64> %39, <2 x i64>* %3, align 16
+; CHECK-NEXT: store <2 x i64> %40, <2 x i64>* %4, align 16
+; CHECK-NEXT: ret <2 x i64> %35
+; CHECK-NEXT: }
+
+define <12 x i64> @icmp_sge_on_12xi64(<12 x i64>, <12 x i64>, <12 x i64>, <12 x i64>) {
+entry:
+ %4 = icmp sge <12 x i64> %0, %1
+ %5 = select <12 x i1> %4, <12 x i64> %2, <12 x i64> %3
+ ret <12 x i64> %5
+}
+; CHECK-LABEL: define <2 x i64> @icmp_sge_on_12xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
+; CHECK: entry:
+; CHECK-NEXT: %29 = icmp sge <2 x i64> %5, %11
+; CHECK-NEXT: %30 = icmp sge <2 x i64> %6, %12
+; CHECK-NEXT: %31 = icmp sge <2 x i64> %7, %13
+; CHECK-NEXT: %32 = icmp sge <2 x i64> %8, %14
+; CHECK-NEXT: %33 = icmp sge <2 x i64> %9, %15
+; CHECK-NEXT: %34 = icmp sge <2 x i64> %10, %16
+; CHECK-NEXT: %35 = select <2 x i1> %29, <2 x i64> %17, <2 x i64> %23
+; CHECK-NEXT: %36 = select <2 x i1> %30, <2 x i64> %18, <2 x i64> %24
+; CHECK-NEXT: %37 = select <2 x i1> %31, <2 x i64> %19, <2 x i64> %25
+; CHECK-NEXT: %38 = select <2 x i1> %32, <2 x i64> %20, <2 x i64> %26
+; CHECK-NEXT: %39 = select <2 x i1> %33, <2 x i64> %21, <2 x i64> %27
+; CHECK-NEXT: %40 = select <2 x i1> %34, <2 x i64> %22, <2 x i64> %28
+; CHECK-NEXT: store <2 x i64> %36, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %37, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %38, <2 x i64>* %2, align 16
+; CHECK-NEXT: store <2 x i64> %39, <2 x i64>* %3, align 16
+; CHECK-NEXT: store <2 x i64> %40, <2 x i64>* %4, align 16
+; CHECK-NEXT: ret <2 x i64> %35
+; CHECK-NEXT: }
+
+define <12 x i64> @icmp_uge_on_12xi64(<12 x i64>, <12 x i64>, <12 x i64>, <12 x i64>) {
+entry:
+ %4 = icmp uge <12 x i64> %0, %1
+ %5 = select <12 x i1> %4, <12 x i64> %2, <12 x i64> %3
+ ret <12 x i64> %5
+}
+; CHECK-LABEL: define <2 x i64> @icmp_uge_on_12xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
+; CHECK: entry:
+; CHECK-NEXT: %29 = icmp uge <2 x i64> %5, %11
+; CHECK-NEXT: %30 = icmp uge <2 x i64> %6, %12
+; CHECK-NEXT: %31 = icmp uge <2 x i64> %7, %13
+; CHECK-NEXT: %32 = icmp uge <2 x i64> %8, %14
+; CHECK-NEXT: %33 = icmp uge <2 x i64> %9, %15
+; CHECK-NEXT: %34 = icmp uge <2 x i64> %10, %16
+; CHECK-NEXT: %35 = select <2 x i1> %29, <2 x i64> %17, <2 x i64> %23
+; CHECK-NEXT: %36 = select <2 x i1> %30, <2 x i64> %18, <2 x i64> %24
+; CHECK-NEXT: %37 = select <2 x i1> %31, <2 x i64> %19, <2 x i64> %25
+; CHECK-NEXT: %38 = select <2 x i1> %32, <2 x i64> %20, <2 x i64> %26
+; CHECK-NEXT: %39 = select <2 x i1> %33, <2 x i64> %21, <2 x i64> %27
+; CHECK-NEXT: %40 = select <2 x i1> %34, <2 x i64> %22, <2 x i64> %28
+; CHECK-NEXT: store <2 x i64> %36, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %37, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %38, <2 x i64>* %2, align 16
+; CHECK-NEXT: store <2 x i64> %39, <2 x i64>* %3, align 16
+; CHECK-NEXT: store <2 x i64> %40, <2 x i64>* %4, align 16
+; CHECK-NEXT: ret <2 x i64> %35
+; CHECK-NEXT: }
+
+define <12 x i64> @icmp_slt_on_12xi64(<12 x i64>, <12 x i64>, <12 x i64>, <12 x i64>) {
+entry:
+ %4 = icmp slt <12 x i64> %0, %1
+ %5 = select <12 x i1> %4, <12 x i64> %2, <12 x i64> %3
+ ret <12 x i64> %5
+}
+; CHECK-LABEL: define <2 x i64> @icmp_slt_on_12xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
+; CHECK: entry:
+; CHECK-NEXT: %29 = icmp slt <2 x i64> %5, %11
+; CHECK-NEXT: %30 = icmp slt <2 x i64> %6, %12
+; CHECK-NEXT: %31 = icmp slt <2 x i64> %7, %13
+; CHECK-NEXT: %32 = icmp slt <2 x i64> %8, %14
+; CHECK-NEXT: %33 = icmp slt <2 x i64> %9, %15
+; CHECK-NEXT: %34 = icmp slt <2 x i64> %10, %16
+; CHECK-NEXT: %35 = select <2 x i1> %29, <2 x i64> %17, <2 x i64> %23
+; CHECK-NEXT: %36 = select <2 x i1> %30, <2 x i64> %18, <2 x i64> %24
+; CHECK-NEXT: %37 = select <2 x i1> %31, <2 x i64> %19, <2 x i64> %25
+; CHECK-NEXT: %38 = select <2 x i1> %32, <2 x i64> %20, <2 x i64> %26
+; CHECK-NEXT: %39 = select <2 x i1> %33, <2 x i64> %21, <2 x i64> %27
+; CHECK-NEXT: %40 = select <2 x i1> %34, <2 x i64> %22, <2 x i64> %28
+; CHECK-NEXT: store <2 x i64> %36, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %37, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %38, <2 x i64>* %2, align 16
+; CHECK-NEXT: store <2 x i64> %39, <2 x i64>* %3, align 16
+; CHECK-NEXT: store <2 x i64> %40, <2 x i64>* %4, align 16
+; CHECK-NEXT: ret <2 x i64> %35
+; CHECK-NEXT: }
+
+define <12 x i64> @icmp_ult_on_12xi64(<12 x i64>, <12 x i64>, <12 x i64>, <12 x i64>) {
+entry:
+ %4 = icmp ult <12 x i64> %0, %1
+ %5 = select <12 x i1> %4, <12 x i64> %2, <12 x i64> %3
+ ret <12 x i64> %5
+}
+; CHECK-LABEL: define <2 x i64> @icmp_ult_on_12xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
+; CHECK: entry:
+; CHECK-NEXT: %29 = icmp ult <2 x i64> %5, %11
+; CHECK-NEXT: %30 = icmp ult <2 x i64> %6, %12
+; CHECK-NEXT: %31 = icmp ult <2 x i64> %7, %13
+; CHECK-NEXT: %32 = icmp ult <2 x i64> %8, %14
+; CHECK-NEXT: %33 = icmp ult <2 x i64> %9, %15
+; CHECK-NEXT: %34 = icmp ult <2 x i64> %10, %16
+; CHECK-NEXT: %35 = select <2 x i1> %29, <2 x i64> %17, <2 x i64> %23
+; CHECK-NEXT: %36 = select <2 x i1> %30, <2 x i64> %18, <2 x i64> %24
+; CHECK-NEXT: %37 = select <2 x i1> %31, <2 x i64> %19, <2 x i64> %25
+; CHECK-NEXT: %38 = select <2 x i1> %32, <2 x i64> %20, <2 x i64> %26
+; CHECK-NEXT: %39 = select <2 x i1> %33, <2 x i64> %21, <2 x i64> %27
+; CHECK-NEXT: %40 = select <2 x i1> %34, <2 x i64> %22, <2 x i64> %28
+; CHECK-NEXT: store <2 x i64> %36, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %37, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %38, <2 x i64>* %2, align 16
+; CHECK-NEXT: store <2 x i64> %39, <2 x i64>* %3, align 16
+; CHECK-NEXT: store <2 x i64> %40, <2 x i64>* %4, align 16
+; CHECK-NEXT: ret <2 x i64> %35
+; CHECK-NEXT: }
+
+define <12 x i64> @icmp_sle_on_12xi64(<12 x i64>, <12 x i64>, <12 x i64>, <12 x i64>) {
+entry:
+ %4 = icmp sle <12 x i64> %0, %1
+ %5 = select <12 x i1> %4, <12 x i64> %2, <12 x i64> %3
+ ret <12 x i64> %5
+}
+; CHECK-LABEL: define <2 x i64> @icmp_sle_on_12xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
+; CHECK: entry:
+; CHECK-NEXT: %29 = icmp sle <2 x i64> %5, %11
+; CHECK-NEXT: %30 = icmp sle <2 x i64> %6, %12
+; CHECK-NEXT: %31 = icmp sle <2 x i64> %7, %13
+; CHECK-NEXT: %32 = icmp sle <2 x i64> %8, %14
+; CHECK-NEXT: %33 = icmp sle <2 x i64> %9, %15
+; CHECK-NEXT: %34 = icmp sle <2 x i64> %10, %16
+; CHECK-NEXT: %35 = select <2 x i1> %29, <2 x i64> %17, <2 x i64> %23
+; CHECK-NEXT: %36 = select <2 x i1> %30, <2 x i64> %18, <2 x i64> %24
+; CHECK-NEXT: %37 = select <2 x i1> %31, <2 x i64> %19, <2 x i64> %25
+; CHECK-NEXT: %38 = select <2 x i1> %32, <2 x i64> %20, <2 x i64> %26
+; CHECK-NEXT: %39 = select <2 x i1> %33, <2 x i64> %21, <2 x i64> %27
+; CHECK-NEXT: %40 = select <2 x i1> %34, <2 x i64> %22, <2 x i64> %28
+; CHECK-NEXT: store <2 x i64> %36, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %37, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %38, <2 x i64>* %2, align 16
+; CHECK-NEXT: store <2 x i64> %39, <2 x i64>* %3, align 16
+; CHECK-NEXT: store <2 x i64> %40, <2 x i64>* %4, align 16
+; CHECK-NEXT: ret <2 x i64> %35
+; CHECK-NEXT: }
+
+define <12 x i64> @icmp_ule_on_12xi64(<12 x i64>, <12 x i64>, <12 x i64>, <12 x i64>) {
+entry:
+ %4 = icmp ule <12 x i64> %0, %1
+ %5 = select <12 x i1> %4, <12 x i64> %2, <12 x i64> %3
+ ret <12 x i64> %5
+}
+; CHECK-LABEL: define <2 x i64> @icmp_ule_on_12xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
+; CHECK: entry:
+; CHECK-NEXT: %29 = icmp ule <2 x i64> %5, %11
+; CHECK-NEXT: %30 = icmp ule <2 x i64> %6, %12
+; CHECK-NEXT: %31 = icmp ule <2 x i64> %7, %13
+; CHECK-NEXT: %32 = icmp ule <2 x i64> %8, %14
+; CHECK-NEXT: %33 = icmp ule <2 x i64> %9, %15
+; CHECK-NEXT: %34 = icmp ule <2 x i64> %10, %16
+; CHECK-NEXT: %35 = select <2 x i1> %29, <2 x i64> %17, <2 x i64> %23
+; CHECK-NEXT: %36 = select <2 x i1> %30, <2 x i64> %18, <2 x i64> %24
+; CHECK-NEXT: %37 = select <2 x i1> %31, <2 x i64> %19, <2 x i64> %25
+; CHECK-NEXT: %38 = select <2 x i1> %32, <2 x i64> %20, <2 x i64> %26
+; CHECK-NEXT: %39 = select <2 x i1> %33, <2 x i64> %21, <2 x i64> %27
+; CHECK-NEXT: %40 = select <2 x i1> %34, <2 x i64> %22, <2 x i64> %28
+; CHECK-NEXT: store <2 x i64> %36, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %37, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %38, <2 x i64>* %2, align 16
+; CHECK-NEXT: store <2 x i64> %39, <2 x i64>* %3, align 16
+; CHECK-NEXT: store <2 x i64> %40, <2 x i64>* %4, align 16
+; CHECK-NEXT: ret <2 x i64> %35
+; CHECK-NEXT: }
+
+define <12 x i8*> @icmp_eq_on_12xi8ptr(<12 x i8*>, <12 x i8*>, <12 x i8*>, <12 x i8*>) {
+entry:
+ %4 = icmp eq <12 x i8*> %0, %1
+ %5 = select <12 x i1> %4, <12 x i8*> %2, <12 x i8*> %3
+ ret <12 x i8*> %5
+}
+; CHECK-LABEL: define <4 x i8*> @icmp_eq_on_12xi8ptr(<4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
+; CHECK: entry:
+; CHECK-NEXT: %14 = icmp eq <4 x i8*> %2, %5
+; CHECK-NEXT: %15 = icmp eq <4 x i8*> %3, %6
+; CHECK-NEXT: %16 = icmp eq <4 x i8*> %4, %7
+; CHECK-NEXT: %17 = select <4 x i1> %14, <4 x i8*> %8, <4 x i8*> %11
+; CHECK-NEXT: %18 = select <4 x i1> %15, <4 x i8*> %9, <4 x i8*> %12
+; CHECK-NEXT: %19 = select <4 x i1> %16, <4 x i8*> %10, <4 x i8*> %13
+; CHECK-NEXT: store <4 x i8*> %18, <4 x i8*>* %0, align 16
+; CHECK-NEXT: store <4 x i8*> %19, <4 x i8*>* %1, align 16
+; CHECK-NEXT: ret <4 x i8*> %17
+; CHECK-NEXT: }
+
+define <12 x i8*> @icmp_ne_on_12xi8ptr(<12 x i8*>, <12 x i8*>, <12 x i8*>, <12 x i8*>) {
+entry:
+ %4 = icmp ne <12 x i8*> %0, %1
+ %5 = select <12 x i1> %4, <12 x i8*> %2, <12 x i8*> %3
+ ret <12 x i8*> %5
+}
+; CHECK-LABEL: define <4 x i8*> @icmp_ne_on_12xi8ptr(<4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
+; CHECK: entry:
+; CHECK-NEXT: %14 = icmp ne <4 x i8*> %2, %5
+; CHECK-NEXT: %15 = icmp ne <4 x i8*> %3, %6
+; CHECK-NEXT: %16 = icmp ne <4 x i8*> %4, %7
+; CHECK-NEXT: %17 = select <4 x i1> %14, <4 x i8*> %8, <4 x i8*> %11
+; CHECK-NEXT: %18 = select <4 x i1> %15, <4 x i8*> %9, <4 x i8*> %12
+; CHECK-NEXT: %19 = select <4 x i1> %16, <4 x i8*> %10, <4 x i8*> %13
+; CHECK-NEXT: store <4 x i8*> %18, <4 x i8*>* %0, align 16
+; CHECK-NEXT: store <4 x i8*> %19, <4 x i8*>* %1, align 16
+; CHECK-NEXT: ret <4 x i8*> %17
+; CHECK-NEXT: }
+
+define <12 x i8*> @icmp_sgt_on_12xi8ptr(<12 x i8*>, <12 x i8*>, <12 x i8*>, <12 x i8*>) {
+entry:
+ %4 = icmp sgt <12 x i8*> %0, %1
+ %5 = select <12 x i1> %4, <12 x i8*> %2, <12 x i8*> %3
+ ret <12 x i8*> %5
+}
+; CHECK-LABEL: define <4 x i8*> @icmp_sgt_on_12xi8ptr(<4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
+; CHECK: entry:
+; CHECK-NEXT: %14 = icmp sgt <4 x i8*> %2, %5
+; CHECK-NEXT: %15 = icmp sgt <4 x i8*> %3, %6
+; CHECK-NEXT: %16 = icmp sgt <4 x i8*> %4, %7
+; CHECK-NEXT: %17 = select <4 x i1> %14, <4 x i8*> %8, <4 x i8*> %11
+; CHECK-NEXT: %18 = select <4 x i1> %15, <4 x i8*> %9, <4 x i8*> %12
+; CHECK-NEXT: %19 = select <4 x i1> %16, <4 x i8*> %10, <4 x i8*> %13
+; CHECK-NEXT: store <4 x i8*> %18, <4 x i8*>* %0, align 16
+; CHECK-NEXT: store <4 x i8*> %19, <4 x i8*>* %1, align 16
+; CHECK-NEXT: ret <4 x i8*> %17
+; CHECK-NEXT: }
+
+define <12 x i8*> @icmp_ugt_on_12xi8ptr(<12 x i8*>, <12 x i8*>, <12 x i8*>, <12 x i8*>) {
+entry:
+ %4 = icmp ugt <12 x i8*> %0, %1
+ %5 = select <12 x i1> %4, <12 x i8*> %2, <12 x i8*> %3
+ ret <12 x i8*> %5
+}
+; CHECK-LABEL: define <4 x i8*> @icmp_ugt_on_12xi8ptr(<4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
+; CHECK: entry:
+; CHECK-NEXT: %14 = icmp ugt <4 x i8*> %2, %5
+; CHECK-NEXT: %15 = icmp ugt <4 x i8*> %3, %6
+; CHECK-NEXT: %16 = icmp ugt <4 x i8*> %4, %7
+; CHECK-NEXT: %17 = select <4 x i1> %14, <4 x i8*> %8, <4 x i8*> %11
+; CHECK-NEXT: %18 = select <4 x i1> %15, <4 x i8*> %9, <4 x i8*> %12
+; CHECK-NEXT: %19 = select <4 x i1> %16, <4 x i8*> %10, <4 x i8*> %13
+; CHECK-NEXT: store <4 x i8*> %18, <4 x i8*>* %0, align 16
+; CHECK-NEXT: store <4 x i8*> %19, <4 x i8*>* %1, align 16
+; CHECK-NEXT: ret <4 x i8*> %17
+; CHECK-NEXT: }
+
+define <12 x i8*> @icmp_sge_on_12xi8ptr(<12 x i8*>, <12 x i8*>, <12 x i8*>, <12 x i8*>) {
+entry:
+ %4 = icmp sge <12 x i8*> %0, %1
+ %5 = select <12 x i1> %4, <12 x i8*> %2, <12 x i8*> %3
+ ret <12 x i8*> %5
+}
+; CHECK-LABEL: define <4 x i8*> @icmp_sge_on_12xi8ptr(<4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
+; CHECK: entry:
+; CHECK-NEXT: %14 = icmp sge <4 x i8*> %2, %5
+; CHECK-NEXT: %15 = icmp sge <4 x i8*> %3, %6
+; CHECK-NEXT: %16 = icmp sge <4 x i8*> %4, %7
+; CHECK-NEXT: %17 = select <4 x i1> %14, <4 x i8*> %8, <4 x i8*> %11
+; CHECK-NEXT: %18 = select <4 x i1> %15, <4 x i8*> %9, <4 x i8*> %12
+; CHECK-NEXT: %19 = select <4 x i1> %16, <4 x i8*> %10, <4 x i8*> %13
+; CHECK-NEXT: store <4 x i8*> %18, <4 x i8*>* %0, align 16
+; CHECK-NEXT: store <4 x i8*> %19, <4 x i8*>* %1, align 16
+; CHECK-NEXT: ret <4 x i8*> %17
+; CHECK-NEXT: }
+
+define <12 x i8*> @icmp_uge_on_12xi8ptr(<12 x i8*>, <12 x i8*>, <12 x i8*>, <12 x i8*>) {
+entry:
+ %4 = icmp uge <12 x i8*> %0, %1
+ %5 = select <12 x i1> %4, <12 x i8*> %2, <12 x i8*> %3
+ ret <12 x i8*> %5
+}
+; CHECK-LABEL: define <4 x i8*> @icmp_uge_on_12xi8ptr(<4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
+; CHECK: entry:
+; CHECK-NEXT: %14 = icmp uge <4 x i8*> %2, %5
+; CHECK-NEXT: %15 = icmp uge <4 x i8*> %3, %6
+; CHECK-NEXT: %16 = icmp uge <4 x i8*> %4, %7
+; CHECK-NEXT: %17 = select <4 x i1> %14, <4 x i8*> %8, <4 x i8*> %11
+; CHECK-NEXT: %18 = select <4 x i1> %15, <4 x i8*> %9, <4 x i8*> %12
+; CHECK-NEXT: %19 = select <4 x i1> %16, <4 x i8*> %10, <4 x i8*> %13
+; CHECK-NEXT: store <4 x i8*> %18, <4 x i8*>* %0, align 16
+; CHECK-NEXT: store <4 x i8*> %19, <4 x i8*>* %1, align 16
+; CHECK-NEXT: ret <4 x i8*> %17
+; CHECK-NEXT: }
+
+define <12 x i8*> @icmp_slt_on_12xi8ptr(<12 x i8*>, <12 x i8*>, <12 x i8*>, <12 x i8*>) {
+entry:
+ %4 = icmp slt <12 x i8*> %0, %1
+ %5 = select <12 x i1> %4, <12 x i8*> %2, <12 x i8*> %3
+ ret <12 x i8*> %5
+}
+; CHECK-LABEL: define <4 x i8*> @icmp_slt_on_12xi8ptr(<4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
+; CHECK: entry:
+; CHECK-NEXT: %14 = icmp slt <4 x i8*> %2, %5
+; CHECK-NEXT: %15 = icmp slt <4 x i8*> %3, %6
+; CHECK-NEXT: %16 = icmp slt <4 x i8*> %4, %7
+; CHECK-NEXT: %17 = select <4 x i1> %14, <4 x i8*> %8, <4 x i8*> %11
+; CHECK-NEXT: %18 = select <4 x i1> %15, <4 x i8*> %9, <4 x i8*> %12
+; CHECK-NEXT: %19 = select <4 x i1> %16, <4 x i8*> %10, <4 x i8*> %13
+; CHECK-NEXT: store <4 x i8*> %18, <4 x i8*>* %0, align 16
+; CHECK-NEXT: store <4 x i8*> %19, <4 x i8*>* %1, align 16
+; CHECK-NEXT: ret <4 x i8*> %17
+; CHECK-NEXT: }
+
+define <12 x i8*> @icmp_ult_on_12xi8ptr(<12 x i8*>, <12 x i8*>, <12 x i8*>, <12 x i8*>) {
+entry:
+ %4 = icmp ult <12 x i8*> %0, %1
+ %5 = select <12 x i1> %4, <12 x i8*> %2, <12 x i8*> %3
+ ret <12 x i8*> %5
+}
+; CHECK-LABEL: define <4 x i8*> @icmp_ult_on_12xi8ptr(<4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
+; CHECK: entry:
+; CHECK-NEXT: %14 = icmp ult <4 x i8*> %2, %5
+; CHECK-NEXT: %15 = icmp ult <4 x i8*> %3, %6
+; CHECK-NEXT: %16 = icmp ult <4 x i8*> %4, %7
+; CHECK-NEXT: %17 = select <4 x i1> %14, <4 x i8*> %8, <4 x i8*> %11
+; CHECK-NEXT: %18 = select <4 x i1> %15, <4 x i8*> %9, <4 x i8*> %12
+; CHECK-NEXT: %19 = select <4 x i1> %16, <4 x i8*> %10, <4 x i8*> %13
+; CHECK-NEXT: store <4 x i8*> %18, <4 x i8*>* %0, align 16
+; CHECK-NEXT: store <4 x i8*> %19, <4 x i8*>* %1, align 16
+; CHECK-NEXT: ret <4 x i8*> %17
+; CHECK-NEXT: }
+
+define <12 x i8*> @icmp_sle_on_12xi8ptr(<12 x i8*>, <12 x i8*>, <12 x i8*>, <12 x i8*>) {
+entry:
+ %4 = icmp sle <12 x i8*> %0, %1
+ %5 = select <12 x i1> %4, <12 x i8*> %2, <12 x i8*> %3
+ ret <12 x i8*> %5
+}
+; CHECK-LABEL: define <4 x i8*> @icmp_sle_on_12xi8ptr(<4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
+; CHECK: entry:
+; CHECK-NEXT: %14 = icmp sle <4 x i8*> %2, %5
+; CHECK-NEXT: %15 = icmp sle <4 x i8*> %3, %6
+; CHECK-NEXT: %16 = icmp sle <4 x i8*> %4, %7
+; CHECK-NEXT: %17 = select <4 x i1> %14, <4 x i8*> %8, <4 x i8*> %11
+; CHECK-NEXT: %18 = select <4 x i1> %15, <4 x i8*> %9, <4 x i8*> %12
+; CHECK-NEXT: %19 = select <4 x i1> %16, <4 x i8*> %10, <4 x i8*> %13
+; CHECK-NEXT: store <4 x i8*> %18, <4 x i8*>* %0, align 16
+; CHECK-NEXT: store <4 x i8*> %19, <4 x i8*>* %1, align 16
+; CHECK-NEXT: ret <4 x i8*> %17
+; CHECK-NEXT: }
+
+define <12 x i8*> @icmp_ule_on_12xi8ptr(<12 x i8*>, <12 x i8*>, <12 x i8*>, <12 x i8*>) {
+entry:
+ %4 = icmp ule <12 x i8*> %0, %1
+ %5 = select <12 x i1> %4, <12 x i8*> %2, <12 x i8*> %3
+ ret <12 x i8*> %5
+}
+; CHECK-LABEL: define <4 x i8*> @icmp_ule_on_12xi8ptr(<4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
+; CHECK: entry:
+; CHECK-NEXT: %14 = icmp ule <4 x i8*> %2, %5
+; CHECK-NEXT: %15 = icmp ule <4 x i8*> %3, %6
+; CHECK-NEXT: %16 = icmp ule <4 x i8*> %4, %7
+; CHECK-NEXT: %17 = select <4 x i1> %14, <4 x i8*> %8, <4 x i8*> %11
+; CHECK-NEXT: %18 = select <4 x i1> %15, <4 x i8*> %9, <4 x i8*> %12
+; CHECK-NEXT: %19 = select <4 x i1> %16, <4 x i8*> %10, <4 x i8*> %13
+; CHECK-NEXT: store <4 x i8*> %18, <4 x i8*>* %0, align 16
+; CHECK-NEXT: store <4 x i8*> %19, <4 x i8*>* %1, align 16
+; CHECK-NEXT: ret <4 x i8*> %17
+; CHECK-NEXT: }
+
+define <16 x i8> @icmp_eq_on_16xi8(<16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>) {
+entry:
+ %4 = icmp eq <16 x i8> %0, %1
+ %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
+ ret <16 x i8> %5
+}
+; CHECK-LABEL: define <16 x i8> @icmp_eq_on_16xi8(<16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp eq <16 x i8> %0, %1
+; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
+; CHECK-NEXT: ret <16 x i8> %5
+; CHECK-NEXT: }
+
+define <16 x i8> @icmp_ne_on_16xi8(<16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>) {
+entry:
+ %4 = icmp ne <16 x i8> %0, %1
+ %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
+ ret <16 x i8> %5
+}
+; CHECK-LABEL: define <16 x i8> @icmp_ne_on_16xi8(<16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp ne <16 x i8> %0, %1
+; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
+; CHECK-NEXT: ret <16 x i8> %5
+; CHECK-NEXT: }
+
+define <16 x i8> @icmp_sgt_on_16xi8(<16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>) {
+entry:
+ %4 = icmp sgt <16 x i8> %0, %1
+ %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
+ ret <16 x i8> %5
+}
+; CHECK-LABEL: define <16 x i8> @icmp_sgt_on_16xi8(<16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp sgt <16 x i8> %0, %1
+; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
+; CHECK-NEXT: ret <16 x i8> %5
+; CHECK-NEXT: }
+
+define <16 x i8> @icmp_ugt_on_16xi8(<16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>) {
+entry:
+ %4 = icmp ugt <16 x i8> %0, %1
+ %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
+ ret <16 x i8> %5
+}
+; CHECK-LABEL: define <16 x i8> @icmp_ugt_on_16xi8(<16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp ugt <16 x i8> %0, %1
+; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
+; CHECK-NEXT: ret <16 x i8> %5
+; CHECK-NEXT: }
+
+define <16 x i8> @icmp_sge_on_16xi8(<16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>) {
+entry:
+ %4 = icmp sge <16 x i8> %0, %1
+ %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
+ ret <16 x i8> %5
+}
+; CHECK-LABEL: define <16 x i8> @icmp_sge_on_16xi8(<16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp sge <16 x i8> %0, %1
+; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
+; CHECK-NEXT: ret <16 x i8> %5
+; CHECK-NEXT: }
+
+define <16 x i8> @icmp_uge_on_16xi8(<16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>) {
+entry:
+ %4 = icmp uge <16 x i8> %0, %1
+ %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
+ ret <16 x i8> %5
+}
+; CHECK-LABEL: define <16 x i8> @icmp_uge_on_16xi8(<16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp uge <16 x i8> %0, %1
+; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
+; CHECK-NEXT: ret <16 x i8> %5
+; CHECK-NEXT: }
+
+define <16 x i8> @icmp_slt_on_16xi8(<16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>) {
+entry:
+ %4 = icmp slt <16 x i8> %0, %1
+ %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
+ ret <16 x i8> %5
+}
+; CHECK-LABEL: define <16 x i8> @icmp_slt_on_16xi8(<16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp slt <16 x i8> %0, %1
+; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
+; CHECK-NEXT: ret <16 x i8> %5
+; CHECK-NEXT: }
+
+define <16 x i8> @icmp_ult_on_16xi8(<16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>) {
+entry:
+ %4 = icmp ult <16 x i8> %0, %1
+ %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
+ ret <16 x i8> %5
+}
+; CHECK-LABEL: define <16 x i8> @icmp_ult_on_16xi8(<16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp ult <16 x i8> %0, %1
+; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
+; CHECK-NEXT: ret <16 x i8> %5
+; CHECK-NEXT: }
+
+define <16 x i8> @icmp_sle_on_16xi8(<16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>) {
+entry:
+ %4 = icmp sle <16 x i8> %0, %1
+ %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
+ ret <16 x i8> %5
+}
+; CHECK-LABEL: define <16 x i8> @icmp_sle_on_16xi8(<16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp sle <16 x i8> %0, %1
+; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
+; CHECK-NEXT: ret <16 x i8> %5
+; CHECK-NEXT: }
+
+define <16 x i8> @icmp_ule_on_16xi8(<16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>) {
+entry:
+ %4 = icmp ule <16 x i8> %0, %1
+ %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
+ ret <16 x i8> %5
+}
+; CHECK-LABEL: define <16 x i8> @icmp_ule_on_16xi8(<16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>) {
+; CHECK: entry:
+; CHECK-NEXT: %4 = icmp ule <16 x i8> %0, %1
+; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
+; CHECK-NEXT: ret <16 x i8> %5
+; CHECK-NEXT: }
+
+define <16 x i16> @icmp_eq_on_16xi16(<16 x i16>, <16 x i16>, <16 x i16>, <16 x i16>) {
+entry:
+ %4 = icmp eq <16 x i16> %0, %1
+ %5 = select <16 x i1> %4, <16 x i16> %2, <16 x i16> %3
+ ret <16 x i16> %5
+}
+; CHECK-LABEL: define <8 x i16> @icmp_eq_on_16xi16(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = icmp eq <8 x i16> %1, %3
+; CHECK-NEXT: %10 = icmp eq <8 x i16> %2, %4
+; CHECK-NEXT: %11 = select <8 x i1> %9, <8 x i16> %5, <8 x i16> %7
+; CHECK-NEXT: %12 = select <8 x i1> %10, <8 x i16> %6, <8 x i16> %8
+; CHECK-NEXT: store <8 x i16> %12, <8 x i16>* %0, align 16
+; CHECK-NEXT: ret <8 x i16> %11
+; CHECK-NEXT: }
+
+define <16 x i16> @icmp_ne_on_16xi16(<16 x i16>, <16 x i16>, <16 x i16>, <16 x i16>) {
+entry:
+ %4 = icmp ne <16 x i16> %0, %1
+ %5 = select <16 x i1> %4, <16 x i16> %2, <16 x i16> %3
+ ret <16 x i16> %5
+}
+; CHECK-LABEL: define <8 x i16> @icmp_ne_on_16xi16(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = icmp ne <8 x i16> %1, %3
+; CHECK-NEXT: %10 = icmp ne <8 x i16> %2, %4
+; CHECK-NEXT: %11 = select <8 x i1> %9, <8 x i16> %5, <8 x i16> %7
+; CHECK-NEXT: %12 = select <8 x i1> %10, <8 x i16> %6, <8 x i16> %8
+; CHECK-NEXT: store <8 x i16> %12, <8 x i16>* %0, align 16
+; CHECK-NEXT: ret <8 x i16> %11
+; CHECK-NEXT: }
+
+define <16 x i16> @icmp_sgt_on_16xi16(<16 x i16>, <16 x i16>, <16 x i16>, <16 x i16>) {
+entry:
+ %4 = icmp sgt <16 x i16> %0, %1
+ %5 = select <16 x i1> %4, <16 x i16> %2, <16 x i16> %3
+ ret <16 x i16> %5
+}
+; CHECK-LABEL: define <8 x i16> @icmp_sgt_on_16xi16(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = icmp sgt <8 x i16> %1, %3
+; CHECK-NEXT: %10 = icmp sgt <8 x i16> %2, %4
+; CHECK-NEXT: %11 = select <8 x i1> %9, <8 x i16> %5, <8 x i16> %7
+; CHECK-NEXT: %12 = select <8 x i1> %10, <8 x i16> %6, <8 x i16> %8
+; CHECK-NEXT: store <8 x i16> %12, <8 x i16>* %0, align 16
+; CHECK-NEXT: ret <8 x i16> %11
+; CHECK-NEXT: }
+
+define <16 x i16> @icmp_ugt_on_16xi16(<16 x i16>, <16 x i16>, <16 x i16>, <16 x i16>) {
+entry:
+ %4 = icmp ugt <16 x i16> %0, %1
+ %5 = select <16 x i1> %4, <16 x i16> %2, <16 x i16> %3
+ ret <16 x i16> %5
+}
+; CHECK-LABEL: define <8 x i16> @icmp_ugt_on_16xi16(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = icmp ugt <8 x i16> %1, %3
+; CHECK-NEXT: %10 = icmp ugt <8 x i16> %2, %4
+; CHECK-NEXT: %11 = select <8 x i1> %9, <8 x i16> %5, <8 x i16> %7
+; CHECK-NEXT: %12 = select <8 x i1> %10, <8 x i16> %6, <8 x i16> %8
+; CHECK-NEXT: store <8 x i16> %12, <8 x i16>* %0, align 16
+; CHECK-NEXT: ret <8 x i16> %11
+; CHECK-NEXT: }
+
+define <16 x i16> @icmp_sge_on_16xi16(<16 x i16>, <16 x i16>, <16 x i16>, <16 x i16>) {
+entry:
+ %4 = icmp sge <16 x i16> %0, %1
+ %5 = select <16 x i1> %4, <16 x i16> %2, <16 x i16> %3
+ ret <16 x i16> %5
+}
+; CHECK-LABEL: define <8 x i16> @icmp_sge_on_16xi16(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = icmp sge <8 x i16> %1, %3
+; CHECK-NEXT: %10 = icmp sge <8 x i16> %2, %4
+; CHECK-NEXT: %11 = select <8 x i1> %9, <8 x i16> %5, <8 x i16> %7
+; CHECK-NEXT: %12 = select <8 x i1> %10, <8 x i16> %6, <8 x i16> %8
+; CHECK-NEXT: store <8 x i16> %12, <8 x i16>* %0, align 16
+; CHECK-NEXT: ret <8 x i16> %11
+; CHECK-NEXT: }
+
+define <16 x i16> @icmp_uge_on_16xi16(<16 x i16>, <16 x i16>, <16 x i16>, <16 x i16>) {
+entry:
+ %4 = icmp uge <16 x i16> %0, %1
+ %5 = select <16 x i1> %4, <16 x i16> %2, <16 x i16> %3
+ ret <16 x i16> %5
+}
+; CHECK-LABEL: define <8 x i16> @icmp_uge_on_16xi16(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = icmp uge <8 x i16> %1, %3
+; CHECK-NEXT: %10 = icmp uge <8 x i16> %2, %4
+; CHECK-NEXT: %11 = select <8 x i1> %9, <8 x i16> %5, <8 x i16> %7
+; CHECK-NEXT: %12 = select <8 x i1> %10, <8 x i16> %6, <8 x i16> %8
+; CHECK-NEXT: store <8 x i16> %12, <8 x i16>* %0, align 16
+; CHECK-NEXT: ret <8 x i16> %11
+; CHECK-NEXT: }
+
+define <16 x i16> @icmp_slt_on_16xi16(<16 x i16>, <16 x i16>, <16 x i16>, <16 x i16>) {
+entry:
+ %4 = icmp slt <16 x i16> %0, %1
+ %5 = select <16 x i1> %4, <16 x i16> %2, <16 x i16> %3
+ ret <16 x i16> %5
+}
+; CHECK-LABEL: define <8 x i16> @icmp_slt_on_16xi16(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = icmp slt <8 x i16> %1, %3
+; CHECK-NEXT: %10 = icmp slt <8 x i16> %2, %4
+; CHECK-NEXT: %11 = select <8 x i1> %9, <8 x i16> %5, <8 x i16> %7
+; CHECK-NEXT: %12 = select <8 x i1> %10, <8 x i16> %6, <8 x i16> %8
+; CHECK-NEXT: store <8 x i16> %12, <8 x i16>* %0, align 16
+; CHECK-NEXT: ret <8 x i16> %11
+; CHECK-NEXT: }
+
+define <16 x i16> @icmp_ult_on_16xi16(<16 x i16>, <16 x i16>, <16 x i16>, <16 x i16>) {
+entry:
+ %4 = icmp ult <16 x i16> %0, %1
+ %5 = select <16 x i1> %4, <16 x i16> %2, <16 x i16> %3
+ ret <16 x i16> %5
+}
+; CHECK-LABEL: define <8 x i16> @icmp_ult_on_16xi16(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = icmp ult <8 x i16> %1, %3
+; CHECK-NEXT: %10 = icmp ult <8 x i16> %2, %4
+; CHECK-NEXT: %11 = select <8 x i1> %9, <8 x i16> %5, <8 x i16> %7
+; CHECK-NEXT: %12 = select <8 x i1> %10, <8 x i16> %6, <8 x i16> %8
+; CHECK-NEXT: store <8 x i16> %12, <8 x i16>* %0, align 16
+; CHECK-NEXT: ret <8 x i16> %11
+; CHECK-NEXT: }
+
+define <16 x i16> @icmp_sle_on_16xi16(<16 x i16>, <16 x i16>, <16 x i16>, <16 x i16>) {
+entry:
+ %4 = icmp sle <16 x i16> %0, %1
+ %5 = select <16 x i1> %4, <16 x i16> %2, <16 x i16> %3
+ ret <16 x i16> %5
+}
+; CHECK-LABEL: define <8 x i16> @icmp_sle_on_16xi16(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = icmp sle <8 x i16> %1, %3
+; CHECK-NEXT: %10 = icmp sle <8 x i16> %2, %4
+; CHECK-NEXT: %11 = select <8 x i1> %9, <8 x i16> %5, <8 x i16> %7
+; CHECK-NEXT: %12 = select <8 x i1> %10, <8 x i16> %6, <8 x i16> %8
+; CHECK-NEXT: store <8 x i16> %12, <8 x i16>* %0, align 16
+; CHECK-NEXT: ret <8 x i16> %11
+; CHECK-NEXT: }
+
+define <16 x i16> @icmp_ule_on_16xi16(<16 x i16>, <16 x i16>, <16 x i16>, <16 x i16>) {
+entry:
+ %4 = icmp ule <16 x i16> %0, %1
+ %5 = select <16 x i1> %4, <16 x i16> %2, <16 x i16> %3
+ ret <16 x i16> %5
+}
+; CHECK-LABEL: define <8 x i16> @icmp_ule_on_16xi16(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = icmp ule <8 x i16> %1, %3
+; CHECK-NEXT: %10 = icmp ule <8 x i16> %2, %4
+; CHECK-NEXT: %11 = select <8 x i1> %9, <8 x i16> %5, <8 x i16> %7
+; CHECK-NEXT: %12 = select <8 x i1> %10, <8 x i16> %6, <8 x i16> %8
+; CHECK-NEXT: store <8 x i16> %12, <8 x i16>* %0, align 16
+; CHECK-NEXT: ret <8 x i16> %11
+; CHECK-NEXT: }
+
+define <16 x i32> @icmp_eq_on_16xi32(<16 x i32>, <16 x i32>, <16 x i32>, <16 x i32>) {
+entry:
+ %4 = icmp eq <16 x i32> %0, %1
+ %5 = select <16 x i1> %4, <16 x i32> %2, <16 x i32> %3
+ ret <16 x i32> %5
+}
+; CHECK-LABEL: define <4 x i32> @icmp_eq_on_16xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
+; CHECK: entry:
+; CHECK-NEXT: %19 = icmp eq <4 x i32> %3, %7
+; CHECK-NEXT: %20 = icmp eq <4 x i32> %4, %8
+; CHECK-NEXT: %21 = icmp eq <4 x i32> %5, %9
+; CHECK-NEXT: %22 = icmp eq <4 x i32> %6, %10
+; CHECK-NEXT: %23 = select <4 x i1> %19, <4 x i32> %11, <4 x i32> %15
+; CHECK-NEXT: %24 = select <4 x i1> %20, <4 x i32> %12, <4 x i32> %16
+; CHECK-NEXT: %25 = select <4 x i1> %21, <4 x i32> %13, <4 x i32> %17
+; CHECK-NEXT: %26 = select <4 x i1> %22, <4 x i32> %14, <4 x i32> %18
+; CHECK-NEXT: store <4 x i32> %24, <4 x i32>* %0, align 16
+; CHECK-NEXT: store <4 x i32> %25, <4 x i32>* %1, align 16
+; CHECK-NEXT: store <4 x i32> %26, <4 x i32>* %2, align 16
+; CHECK-NEXT: ret <4 x i32> %23
+; CHECK-NEXT: }
+
+define <16 x i32> @icmp_ne_on_16xi32(<16 x i32>, <16 x i32>, <16 x i32>, <16 x i32>) {
+entry:
+ %4 = icmp ne <16 x i32> %0, %1
+ %5 = select <16 x i1> %4, <16 x i32> %2, <16 x i32> %3
+ ret <16 x i32> %5
+}
+; CHECK-LABEL: define <4 x i32> @icmp_ne_on_16xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
+; CHECK: entry:
+; CHECK-NEXT: %19 = icmp ne <4 x i32> %3, %7
+; CHECK-NEXT: %20 = icmp ne <4 x i32> %4, %8
+; CHECK-NEXT: %21 = icmp ne <4 x i32> %5, %9
+; CHECK-NEXT: %22 = icmp ne <4 x i32> %6, %10
+; CHECK-NEXT: %23 = select <4 x i1> %19, <4 x i32> %11, <4 x i32> %15
+; CHECK-NEXT: %24 = select <4 x i1> %20, <4 x i32> %12, <4 x i32> %16
+; CHECK-NEXT: %25 = select <4 x i1> %21, <4 x i32> %13, <4 x i32> %17
+; CHECK-NEXT: %26 = select <4 x i1> %22, <4 x i32> %14, <4 x i32> %18
+; CHECK-NEXT: store <4 x i32> %24, <4 x i32>* %0, align 16
+; CHECK-NEXT: store <4 x i32> %25, <4 x i32>* %1, align 16
+; CHECK-NEXT: store <4 x i32> %26, <4 x i32>* %2, align 16
+; CHECK-NEXT: ret <4 x i32> %23
+; CHECK-NEXT: }
+
+define <16 x i32> @icmp_sgt_on_16xi32(<16 x i32>, <16 x i32>, <16 x i32>, <16 x i32>) {
+entry:
+ %4 = icmp sgt <16 x i32> %0, %1
+ %5 = select <16 x i1> %4, <16 x i32> %2, <16 x i32> %3
+ ret <16 x i32> %5
+}
+; CHECK-LABEL: define <4 x i32> @icmp_sgt_on_16xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
+; CHECK: entry:
+; CHECK-NEXT: %19 = icmp sgt <4 x i32> %3, %7
+; CHECK-NEXT: %20 = icmp sgt <4 x i32> %4, %8
+; CHECK-NEXT: %21 = icmp sgt <4 x i32> %5, %9
+; CHECK-NEXT: %22 = icmp sgt <4 x i32> %6, %10
+; CHECK-NEXT: %23 = select <4 x i1> %19, <4 x i32> %11, <4 x i32> %15
+; CHECK-NEXT: %24 = select <4 x i1> %20, <4 x i32> %12, <4 x i32> %16
+; CHECK-NEXT: %25 = select <4 x i1> %21, <4 x i32> %13, <4 x i32> %17
+; CHECK-NEXT: %26 = select <4 x i1> %22, <4 x i32> %14, <4 x i32> %18
+; CHECK-NEXT: store <4 x i32> %24, <4 x i32>* %0, align 16
+; CHECK-NEXT: store <4 x i32> %25, <4 x i32>* %1, align 16
+; CHECK-NEXT: store <4 x i32> %26, <4 x i32>* %2, align 16
+; CHECK-NEXT: ret <4 x i32> %23
+; CHECK-NEXT: }
+
+define <16 x i32> @icmp_ugt_on_16xi32(<16 x i32>, <16 x i32>, <16 x i32>, <16 x i32>) {
+entry:
+ %4 = icmp ugt <16 x i32> %0, %1
+ %5 = select <16 x i1> %4, <16 x i32> %2, <16 x i32> %3
+ ret <16 x i32> %5
+}
+; CHECK-LABEL: define <4 x i32> @icmp_ugt_on_16xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
+; CHECK: entry:
+; CHECK-NEXT: %19 = icmp ugt <4 x i32> %3, %7
+; CHECK-NEXT: %20 = icmp ugt <4 x i32> %4, %8
+; CHECK-NEXT: %21 = icmp ugt <4 x i32> %5, %9
+; CHECK-NEXT: %22 = icmp ugt <4 x i32> %6, %10
+; CHECK-NEXT: %23 = select <4 x i1> %19, <4 x i32> %11, <4 x i32> %15
+; CHECK-NEXT: %24 = select <4 x i1> %20, <4 x i32> %12, <4 x i32> %16
+; CHECK-NEXT: %25 = select <4 x i1> %21, <4 x i32> %13, <4 x i32> %17
+; CHECK-NEXT: %26 = select <4 x i1> %22, <4 x i32> %14, <4 x i32> %18
+; CHECK-NEXT: store <4 x i32> %24, <4 x i32>* %0, align 16
+; CHECK-NEXT: store <4 x i32> %25, <4 x i32>* %1, align 16
+; CHECK-NEXT: store <4 x i32> %26, <4 x i32>* %2, align 16
+; CHECK-NEXT: ret <4 x i32> %23
+; CHECK-NEXT: }
+
+define <16 x i32> @icmp_sge_on_16xi32(<16 x i32>, <16 x i32>, <16 x i32>, <16 x i32>) {
+entry:
+ %4 = icmp sge <16 x i32> %0, %1
+ %5 = select <16 x i1> %4, <16 x i32> %2, <16 x i32> %3
+ ret <16 x i32> %5
+}
+; CHECK-LABEL: define <4 x i32> @icmp_sge_on_16xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
+; CHECK: entry:
+; CHECK-NEXT: %19 = icmp sge <4 x i32> %3, %7
+; CHECK-NEXT: %20 = icmp sge <4 x i32> %4, %8
+; CHECK-NEXT: %21 = icmp sge <4 x i32> %5, %9
+; CHECK-NEXT: %22 = icmp sge <4 x i32> %6, %10
+; CHECK-NEXT: %23 = select <4 x i1> %19, <4 x i32> %11, <4 x i32> %15
+; CHECK-NEXT: %24 = select <4 x i1> %20, <4 x i32> %12, <4 x i32> %16
+; CHECK-NEXT: %25 = select <4 x i1> %21, <4 x i32> %13, <4 x i32> %17
+; CHECK-NEXT: %26 = select <4 x i1> %22, <4 x i32> %14, <4 x i32> %18
+; CHECK-NEXT: store <4 x i32> %24, <4 x i32>* %0, align 16
+; CHECK-NEXT: store <4 x i32> %25, <4 x i32>* %1, align 16
+; CHECK-NEXT: store <4 x i32> %26, <4 x i32>* %2, align 16
+; CHECK-NEXT: ret <4 x i32> %23
+; CHECK-NEXT: }
+
+define <16 x i32> @icmp_uge_on_16xi32(<16 x i32>, <16 x i32>, <16 x i32>, <16 x i32>) {
+entry:
+ %4 = icmp uge <16 x i32> %0, %1
+ %5 = select <16 x i1> %4, <16 x i32> %2, <16 x i32> %3
+ ret <16 x i32> %5
+}
+; CHECK-LABEL: define <4 x i32> @icmp_uge_on_16xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
+; CHECK: entry:
+; CHECK-NEXT: %19 = icmp uge <4 x i32> %3, %7
+; CHECK-NEXT: %20 = icmp uge <4 x i32> %4, %8
+; CHECK-NEXT: %21 = icmp uge <4 x i32> %5, %9
+; CHECK-NEXT: %22 = icmp uge <4 x i32> %6, %10
+; CHECK-NEXT: %23 = select <4 x i1> %19, <4 x i32> %11, <4 x i32> %15
+; CHECK-NEXT: %24 = select <4 x i1> %20, <4 x i32> %12, <4 x i32> %16
+; CHECK-NEXT: %25 = select <4 x i1> %21, <4 x i32> %13, <4 x i32> %17
+; CHECK-NEXT: %26 = select <4 x i1> %22, <4 x i32> %14, <4 x i32> %18
+; CHECK-NEXT: store <4 x i32> %24, <4 x i32>* %0, align 16
+; CHECK-NEXT: store <4 x i32> %25, <4 x i32>* %1, align 16
+; CHECK-NEXT: store <4 x i32> %26, <4 x i32>* %2, align 16
+; CHECK-NEXT: ret <4 x i32> %23
+; CHECK-NEXT: }
+
+define <16 x i32> @icmp_slt_on_16xi32(<16 x i32>, <16 x i32>, <16 x i32>, <16 x i32>) {
+entry:
+ %4 = icmp slt <16 x i32> %0, %1
+ %5 = select <16 x i1> %4, <16 x i32> %2, <16 x i32> %3
+ ret <16 x i32> %5
+}
+; CHECK-LABEL: define <4 x i32> @icmp_slt_on_16xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
+; CHECK: entry:
+; CHECK-NEXT: %19 = icmp slt <4 x i32> %3, %7
+; CHECK-NEXT: %20 = icmp slt <4 x i32> %4, %8
+; CHECK-NEXT: %21 = icmp slt <4 x i32> %5, %9
+; CHECK-NEXT: %22 = icmp slt <4 x i32> %6, %10
+; CHECK-NEXT: %23 = select <4 x i1> %19, <4 x i32> %11, <4 x i32> %15
+; CHECK-NEXT: %24 = select <4 x i1> %20, <4 x i32> %12, <4 x i32> %16
+; CHECK-NEXT: %25 = select <4 x i1> %21, <4 x i32> %13, <4 x i32> %17
+; CHECK-NEXT: %26 = select <4 x i1> %22, <4 x i32> %14, <4 x i32> %18
+; CHECK-NEXT: store <4 x i32> %24, <4 x i32>* %0, align 16
+; CHECK-NEXT: store <4 x i32> %25, <4 x i32>* %1, align 16
+; CHECK-NEXT: store <4 x i32> %26, <4 x i32>* %2, align 16
+; CHECK-NEXT: ret <4 x i32> %23
+; CHECK-NEXT: }
+
+define <16 x i32> @icmp_ult_on_16xi32(<16 x i32>, <16 x i32>, <16 x i32>, <16 x i32>) {
+entry:
+ %4 = icmp ult <16 x i32> %0, %1
+ %5 = select <16 x i1> %4, <16 x i32> %2, <16 x i32> %3
+ ret <16 x i32> %5
+}
+; CHECK-LABEL: define <4 x i32> @icmp_ult_on_16xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
+; CHECK: entry:
+; CHECK-NEXT: %19 = icmp ult <4 x i32> %3, %7
+; CHECK-NEXT: %20 = icmp ult <4 x i32> %4, %8
+; CHECK-NEXT: %21 = icmp ult <4 x i32> %5, %9
+; CHECK-NEXT: %22 = icmp ult <4 x i32> %6, %10
+; CHECK-NEXT: %23 = select <4 x i1> %19, <4 x i32> %11, <4 x i32> %15
+; CHECK-NEXT: %24 = select <4 x i1> %20, <4 x i32> %12, <4 x i32> %16
+; CHECK-NEXT: %25 = select <4 x i1> %21, <4 x i32> %13, <4 x i32> %17
+; CHECK-NEXT: %26 = select <4 x i1> %22, <4 x i32> %14, <4 x i32> %18
+; CHECK-NEXT: store <4 x i32> %24, <4 x i32>* %0, align 16
+; CHECK-NEXT: store <4 x i32> %25, <4 x i32>* %1, align 16
+; CHECK-NEXT: store <4 x i32> %26, <4 x i32>* %2, align 16
+; CHECK-NEXT: ret <4 x i32> %23
+; CHECK-NEXT: }
+
+define <16 x i32> @icmp_sle_on_16xi32(<16 x i32>, <16 x i32>, <16 x i32>, <16 x i32>) {
+entry:
+ %4 = icmp sle <16 x i32> %0, %1
+ %5 = select <16 x i1> %4, <16 x i32> %2, <16 x i32> %3
+ ret <16 x i32> %5
+}
+; CHECK-LABEL: define <4 x i32> @icmp_sle_on_16xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
+; CHECK: entry:
+; CHECK-NEXT: %19 = icmp sle <4 x i32> %3, %7
+; CHECK-NEXT: %20 = icmp sle <4 x i32> %4, %8
+; CHECK-NEXT: %21 = icmp sle <4 x i32> %5, %9
+; CHECK-NEXT: %22 = icmp sle <4 x i32> %6, %10
+; CHECK-NEXT: %23 = select <4 x i1> %19, <4 x i32> %11, <4 x i32> %15
+; CHECK-NEXT: %24 = select <4 x i1> %20, <4 x i32> %12, <4 x i32> %16
+; CHECK-NEXT: %25 = select <4 x i1> %21, <4 x i32> %13, <4 x i32> %17
+; CHECK-NEXT: %26 = select <4 x i1> %22, <4 x i32> %14, <4 x i32> %18
+; CHECK-NEXT: store <4 x i32> %24, <4 x i32>* %0, align 16
+; CHECK-NEXT: store <4 x i32> %25, <4 x i32>* %1, align 16
+; CHECK-NEXT: store <4 x i32> %26, <4 x i32>* %2, align 16
+; CHECK-NEXT: ret <4 x i32> %23
+; CHECK-NEXT: }
+
+define <16 x i32> @icmp_ule_on_16xi32(<16 x i32>, <16 x i32>, <16 x i32>, <16 x i32>) {
+entry:
+ %4 = icmp ule <16 x i32> %0, %1
+ %5 = select <16 x i1> %4, <16 x i32> %2, <16 x i32> %3
+ ret <16 x i32> %5
+}
+; CHECK-LABEL: define <4 x i32> @icmp_ule_on_16xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
+; CHECK: entry:
+; CHECK-NEXT: %19 = icmp ule <4 x i32> %3, %7
+; CHECK-NEXT: %20 = icmp ule <4 x i32> %4, %8
+; CHECK-NEXT: %21 = icmp ule <4 x i32> %5, %9
+; CHECK-NEXT: %22 = icmp ule <4 x i32> %6, %10
+; CHECK-NEXT: %23 = select <4 x i1> %19, <4 x i32> %11, <4 x i32> %15
+; CHECK-NEXT: %24 = select <4 x i1> %20, <4 x i32> %12, <4 x i32> %16
+; CHECK-NEXT: %25 = select <4 x i1> %21, <4 x i32> %13, <4 x i32> %17
+; CHECK-NEXT: %26 = select <4 x i1> %22, <4 x i32> %14, <4 x i32> %18
+; CHECK-NEXT: store <4 x i32> %24, <4 x i32>* %0, align 16
+; CHECK-NEXT: store <4 x i32> %25, <4 x i32>* %1, align 16
+; CHECK-NEXT: store <4 x i32> %26, <4 x i32>* %2, align 16
+; CHECK-NEXT: ret <4 x i32> %23
+; CHECK-NEXT: }
+
+define <16 x i64> @icmp_eq_on_16xi64(<16 x i64>, <16 x i64>, <16 x i64>, <16 x i64>) {
+entry:
+ %4 = icmp eq <16 x i64> %0, %1
+ %5 = select <16 x i1> %4, <16 x i64> %2, <16 x i64> %3
+ ret <16 x i64> %5
+}
+; CHECK-LABEL: define <2 x i64> @icmp_eq_on_16xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
+; CHECK: entry:
+; CHECK-NEXT: %39 = icmp eq <2 x i64> %7, %15
+; CHECK-NEXT: %40 = icmp eq <2 x i64> %8, %16
+; CHECK-NEXT: %41 = icmp eq <2 x i64> %9, %17
+; CHECK-NEXT: %42 = icmp eq <2 x i64> %10, %18
+; CHECK-NEXT: %43 = icmp eq <2 x i64> %11, %19
+; CHECK-NEXT: %44 = icmp eq <2 x i64> %12, %20
+; CHECK-NEXT: %45 = icmp eq <2 x i64> %13, %21
+; CHECK-NEXT: %46 = icmp eq <2 x i64> %14, %22
+; CHECK-NEXT: %47 = select <2 x i1> %39, <2 x i64> %23, <2 x i64> %31
+; CHECK-NEXT: %48 = select <2 x i1> %40, <2 x i64> %24, <2 x i64> %32
+; CHECK-NEXT: %49 = select <2 x i1> %41, <2 x i64> %25, <2 x i64> %33
+; CHECK-NEXT: %50 = select <2 x i1> %42, <2 x i64> %26, <2 x i64> %34
+; CHECK-NEXT: %51 = select <2 x i1> %43, <2 x i64> %27, <2 x i64> %35
+; CHECK-NEXT: %52 = select <2 x i1> %44, <2 x i64> %28, <2 x i64> %36
+; CHECK-NEXT: %53 = select <2 x i1> %45, <2 x i64> %29, <2 x i64> %37
+; CHECK-NEXT: %54 = select <2 x i1> %46, <2 x i64> %30, <2 x i64> %38
+; CHECK-NEXT: store <2 x i64> %48, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %49, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %50, <2 x i64>* %2, align 16
+; CHECK-NEXT: store <2 x i64> %51, <2 x i64>* %3, align 16
+; CHECK-NEXT: store <2 x i64> %52, <2 x i64>* %4, align 16
+; CHECK-NEXT: store <2 x i64> %53, <2 x i64>* %5, align 16
+; CHECK-NEXT: store <2 x i64> %54, <2 x i64>* %6, align 16
+; CHECK-NEXT: ret <2 x i64> %47
+; CHECK-NEXT: }
+
+define <16 x i64> @icmp_ne_on_16xi64(<16 x i64>, <16 x i64>, <16 x i64>, <16 x i64>) {
+entry:
+ %4 = icmp ne <16 x i64> %0, %1
+ %5 = select <16 x i1> %4, <16 x i64> %2, <16 x i64> %3
+ ret <16 x i64> %5
+}
+; CHECK-LABEL: define <2 x i64> @icmp_ne_on_16xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
+; CHECK: entry:
+; CHECK-NEXT: %39 = icmp ne <2 x i64> %7, %15
+; CHECK-NEXT: %40 = icmp ne <2 x i64> %8, %16
+; CHECK-NEXT: %41 = icmp ne <2 x i64> %9, %17
+; CHECK-NEXT: %42 = icmp ne <2 x i64> %10, %18
+; CHECK-NEXT: %43 = icmp ne <2 x i64> %11, %19
+; CHECK-NEXT: %44 = icmp ne <2 x i64> %12, %20
+; CHECK-NEXT: %45 = icmp ne <2 x i64> %13, %21
+; CHECK-NEXT: %46 = icmp ne <2 x i64> %14, %22
+; CHECK-NEXT: %47 = select <2 x i1> %39, <2 x i64> %23, <2 x i64> %31
+; CHECK-NEXT: %48 = select <2 x i1> %40, <2 x i64> %24, <2 x i64> %32
+; CHECK-NEXT: %49 = select <2 x i1> %41, <2 x i64> %25, <2 x i64> %33
+; CHECK-NEXT: %50 = select <2 x i1> %42, <2 x i64> %26, <2 x i64> %34
+; CHECK-NEXT: %51 = select <2 x i1> %43, <2 x i64> %27, <2 x i64> %35
+; CHECK-NEXT: %52 = select <2 x i1> %44, <2 x i64> %28, <2 x i64> %36
+; CHECK-NEXT: %53 = select <2 x i1> %45, <2 x i64> %29, <2 x i64> %37
+; CHECK-NEXT: %54 = select <2 x i1> %46, <2 x i64> %30, <2 x i64> %38
+; CHECK-NEXT: store <2 x i64> %48, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %49, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %50, <2 x i64>* %2, align 16
+; CHECK-NEXT: store <2 x i64> %51, <2 x i64>* %3, align 16
+; CHECK-NEXT: store <2 x i64> %52, <2 x i64>* %4, align 16
+; CHECK-NEXT: store <2 x i64> %53, <2 x i64>* %5, align 16
+; CHECK-NEXT: store <2 x i64> %54, <2 x i64>* %6, align 16
+; CHECK-NEXT: ret <2 x i64> %47
+; CHECK-NEXT: }
+
+define <16 x i64> @icmp_sgt_on_16xi64(<16 x i64>, <16 x i64>, <16 x i64>, <16 x i64>) {
+entry:
+ %4 = icmp sgt <16 x i64> %0, %1
+ %5 = select <16 x i1> %4, <16 x i64> %2, <16 x i64> %3
+ ret <16 x i64> %5
+}
+; CHECK-LABEL: define <2 x i64> @icmp_sgt_on_16xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
+; CHECK: entry:
+; CHECK-NEXT: %39 = icmp sgt <2 x i64> %7, %15
+; CHECK-NEXT: %40 = icmp sgt <2 x i64> %8, %16
+; CHECK-NEXT: %41 = icmp sgt <2 x i64> %9, %17
+; CHECK-NEXT: %42 = icmp sgt <2 x i64> %10, %18
+; CHECK-NEXT: %43 = icmp sgt <2 x i64> %11, %19
+; CHECK-NEXT: %44 = icmp sgt <2 x i64> %12, %20
+; CHECK-NEXT: %45 = icmp sgt <2 x i64> %13, %21
+; CHECK-NEXT: %46 = icmp sgt <2 x i64> %14, %22
+; CHECK-NEXT: %47 = select <2 x i1> %39, <2 x i64> %23, <2 x i64> %31
+; CHECK-NEXT: %48 = select <2 x i1> %40, <2 x i64> %24, <2 x i64> %32
+; CHECK-NEXT: %49 = select <2 x i1> %41, <2 x i64> %25, <2 x i64> %33
+; CHECK-NEXT: %50 = select <2 x i1> %42, <2 x i64> %26, <2 x i64> %34
+; CHECK-NEXT: %51 = select <2 x i1> %43, <2 x i64> %27, <2 x i64> %35
+; CHECK-NEXT: %52 = select <2 x i1> %44, <2 x i64> %28, <2 x i64> %36
+; CHECK-NEXT: %53 = select <2 x i1> %45, <2 x i64> %29, <2 x i64> %37
+; CHECK-NEXT: %54 = select <2 x i1> %46, <2 x i64> %30, <2 x i64> %38
+; CHECK-NEXT: store <2 x i64> %48, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %49, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %50, <2 x i64>* %2, align 16
+; CHECK-NEXT: store <2 x i64> %51, <2 x i64>* %3, align 16
+; CHECK-NEXT: store <2 x i64> %52, <2 x i64>* %4, align 16
+; CHECK-NEXT: store <2 x i64> %53, <2 x i64>* %5, align 16
+; CHECK-NEXT: store <2 x i64> %54, <2 x i64>* %6, align 16
+; CHECK-NEXT: ret <2 x i64> %47
+; CHECK-NEXT: }
+
+define <16 x i64> @icmp_ugt_on_16xi64(<16 x i64>, <16 x i64>, <16 x i64>, <16 x i64>) {
+entry:
+ %4 = icmp ugt <16 x i64> %0, %1
+ %5 = select <16 x i1> %4, <16 x i64> %2, <16 x i64> %3
+ ret <16 x i64> %5
+}
+; CHECK-LABEL: define <2 x i64> @icmp_ugt_on_16xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
+; CHECK: entry:
+; CHECK-NEXT: %39 = icmp ugt <2 x i64> %7, %15
+; CHECK-NEXT: %40 = icmp ugt <2 x i64> %8, %16
+; CHECK-NEXT: %41 = icmp ugt <2 x i64> %9, %17
+; CHECK-NEXT: %42 = icmp ugt <2 x i64> %10, %18
+; CHECK-NEXT: %43 = icmp ugt <2 x i64> %11, %19
+; CHECK-NEXT: %44 = icmp ugt <2 x i64> %12, %20
+; CHECK-NEXT: %45 = icmp ugt <2 x i64> %13, %21
+; CHECK-NEXT: %46 = icmp ugt <2 x i64> %14, %22
+; CHECK-NEXT: %47 = select <2 x i1> %39, <2 x i64> %23, <2 x i64> %31
+; CHECK-NEXT: %48 = select <2 x i1> %40, <2 x i64> %24, <2 x i64> %32
+; CHECK-NEXT: %49 = select <2 x i1> %41, <2 x i64> %25, <2 x i64> %33
+; CHECK-NEXT: %50 = select <2 x i1> %42, <2 x i64> %26, <2 x i64> %34
+; CHECK-NEXT: %51 = select <2 x i1> %43, <2 x i64> %27, <2 x i64> %35
+; CHECK-NEXT: %52 = select <2 x i1> %44, <2 x i64> %28, <2 x i64> %36
+; CHECK-NEXT: %53 = select <2 x i1> %45, <2 x i64> %29, <2 x i64> %37
+; CHECK-NEXT: %54 = select <2 x i1> %46, <2 x i64> %30, <2 x i64> %38
+; CHECK-NEXT: store <2 x i64> %48, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %49, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %50, <2 x i64>* %2, align 16
+; CHECK-NEXT: store <2 x i64> %51, <2 x i64>* %3, align 16
+; CHECK-NEXT: store <2 x i64> %52, <2 x i64>* %4, align 16
+; CHECK-NEXT: store <2 x i64> %53, <2 x i64>* %5, align 16
+; CHECK-NEXT: store <2 x i64> %54, <2 x i64>* %6, align 16
+; CHECK-NEXT: ret <2 x i64> %47
+; CHECK-NEXT: }
+
+define <16 x i64> @icmp_sge_on_16xi64(<16 x i64>, <16 x i64>, <16 x i64>, <16 x i64>) {
+entry:
+ %4 = icmp sge <16 x i64> %0, %1
+ %5 = select <16 x i1> %4, <16 x i64> %2, <16 x i64> %3
+ ret <16 x i64> %5
+}
+; CHECK-LABEL: define <2 x i64> @icmp_sge_on_16xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
+; CHECK: entry:
+; CHECK-NEXT: %39 = icmp sge <2 x i64> %7, %15
+; CHECK-NEXT: %40 = icmp sge <2 x i64> %8, %16
+; CHECK-NEXT: %41 = icmp sge <2 x i64> %9, %17
+; CHECK-NEXT: %42 = icmp sge <2 x i64> %10, %18
+; CHECK-NEXT: %43 = icmp sge <2 x i64> %11, %19
+; CHECK-NEXT: %44 = icmp sge <2 x i64> %12, %20
+; CHECK-NEXT: %45 = icmp sge <2 x i64> %13, %21
+; CHECK-NEXT: %46 = icmp sge <2 x i64> %14, %22
+; CHECK-NEXT: %47 = select <2 x i1> %39, <2 x i64> %23, <2 x i64> %31
+; CHECK-NEXT: %48 = select <2 x i1> %40, <2 x i64> %24, <2 x i64> %32
+; CHECK-NEXT: %49 = select <2 x i1> %41, <2 x i64> %25, <2 x i64> %33
+; CHECK-NEXT: %50 = select <2 x i1> %42, <2 x i64> %26, <2 x i64> %34
+; CHECK-NEXT: %51 = select <2 x i1> %43, <2 x i64> %27, <2 x i64> %35
+; CHECK-NEXT: %52 = select <2 x i1> %44, <2 x i64> %28, <2 x i64> %36
+; CHECK-NEXT: %53 = select <2 x i1> %45, <2 x i64> %29, <2 x i64> %37
+; CHECK-NEXT: %54 = select <2 x i1> %46, <2 x i64> %30, <2 x i64> %38
+; CHECK-NEXT: store <2 x i64> %48, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %49, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %50, <2 x i64>* %2, align 16
+; CHECK-NEXT: store <2 x i64> %51, <2 x i64>* %3, align 16
+; CHECK-NEXT: store <2 x i64> %52, <2 x i64>* %4, align 16
+; CHECK-NEXT: store <2 x i64> %53, <2 x i64>* %5, align 16
+; CHECK-NEXT: store <2 x i64> %54, <2 x i64>* %6, align 16
+; CHECK-NEXT: ret <2 x i64> %47
+; CHECK-NEXT: }
+
+define <16 x i64> @icmp_uge_on_16xi64(<16 x i64>, <16 x i64>, <16 x i64>, <16 x i64>) {
+entry:
+ %4 = icmp uge <16 x i64> %0, %1
+ %5 = select <16 x i1> %4, <16 x i64> %2, <16 x i64> %3
+ ret <16 x i64> %5
+}
+; CHECK-LABEL: define <2 x i64> @icmp_uge_on_16xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
+; CHECK: entry:
+; CHECK-NEXT: %39 = icmp uge <2 x i64> %7, %15
+; CHECK-NEXT: %40 = icmp uge <2 x i64> %8, %16
+; CHECK-NEXT: %41 = icmp uge <2 x i64> %9, %17
+; CHECK-NEXT: %42 = icmp uge <2 x i64> %10, %18
+; CHECK-NEXT: %43 = icmp uge <2 x i64> %11, %19
+; CHECK-NEXT: %44 = icmp uge <2 x i64> %12, %20
+; CHECK-NEXT: %45 = icmp uge <2 x i64> %13, %21
+; CHECK-NEXT: %46 = icmp uge <2 x i64> %14, %22
+; CHECK-NEXT: %47 = select <2 x i1> %39, <2 x i64> %23, <2 x i64> %31
+; CHECK-NEXT: %48 = select <2 x i1> %40, <2 x i64> %24, <2 x i64> %32
+; CHECK-NEXT: %49 = select <2 x i1> %41, <2 x i64> %25, <2 x i64> %33
+; CHECK-NEXT: %50 = select <2 x i1> %42, <2 x i64> %26, <2 x i64> %34
+; CHECK-NEXT: %51 = select <2 x i1> %43, <2 x i64> %27, <2 x i64> %35
+; CHECK-NEXT: %52 = select <2 x i1> %44, <2 x i64> %28, <2 x i64> %36
+; CHECK-NEXT: %53 = select <2 x i1> %45, <2 x i64> %29, <2 x i64> %37
+; CHECK-NEXT: %54 = select <2 x i1> %46, <2 x i64> %30, <2 x i64> %38
+; CHECK-NEXT: store <2 x i64> %48, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %49, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %50, <2 x i64>* %2, align 16
+; CHECK-NEXT: store <2 x i64> %51, <2 x i64>* %3, align 16
+; CHECK-NEXT: store <2 x i64> %52, <2 x i64>* %4, align 16
+; CHECK-NEXT: store <2 x i64> %53, <2 x i64>* %5, align 16
+; CHECK-NEXT: store <2 x i64> %54, <2 x i64>* %6, align 16
+; CHECK-NEXT: ret <2 x i64> %47
+; CHECK-NEXT: }
+
+define <16 x i64> @icmp_slt_on_16xi64(<16 x i64>, <16 x i64>, <16 x i64>, <16 x i64>) {
+entry:
+ %4 = icmp slt <16 x i64> %0, %1
+ %5 = select <16 x i1> %4, <16 x i64> %2, <16 x i64> %3
+ ret <16 x i64> %5
+}
+; CHECK-LABEL: define <2 x i64> @icmp_slt_on_16xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
+; CHECK: entry:
+; CHECK-NEXT: %39 = icmp slt <2 x i64> %7, %15
+; CHECK-NEXT: %40 = icmp slt <2 x i64> %8, %16
+; CHECK-NEXT: %41 = icmp slt <2 x i64> %9, %17
+; CHECK-NEXT: %42 = icmp slt <2 x i64> %10, %18
+; CHECK-NEXT: %43 = icmp slt <2 x i64> %11, %19
+; CHECK-NEXT: %44 = icmp slt <2 x i64> %12, %20
+; CHECK-NEXT: %45 = icmp slt <2 x i64> %13, %21
+; CHECK-NEXT: %46 = icmp slt <2 x i64> %14, %22
+; CHECK-NEXT: %47 = select <2 x i1> %39, <2 x i64> %23, <2 x i64> %31
+; CHECK-NEXT: %48 = select <2 x i1> %40, <2 x i64> %24, <2 x i64> %32
+; CHECK-NEXT: %49 = select <2 x i1> %41, <2 x i64> %25, <2 x i64> %33
+; CHECK-NEXT: %50 = select <2 x i1> %42, <2 x i64> %26, <2 x i64> %34
+; CHECK-NEXT: %51 = select <2 x i1> %43, <2 x i64> %27, <2 x i64> %35
+; CHECK-NEXT: %52 = select <2 x i1> %44, <2 x i64> %28, <2 x i64> %36
+; CHECK-NEXT: %53 = select <2 x i1> %45, <2 x i64> %29, <2 x i64> %37
+; CHECK-NEXT: %54 = select <2 x i1> %46, <2 x i64> %30, <2 x i64> %38
+; CHECK-NEXT: store <2 x i64> %48, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %49, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %50, <2 x i64>* %2, align 16
+; CHECK-NEXT: store <2 x i64> %51, <2 x i64>* %3, align 16
+; CHECK-NEXT: store <2 x i64> %52, <2 x i64>* %4, align 16
+; CHECK-NEXT: store <2 x i64> %53, <2 x i64>* %5, align 16
+; CHECK-NEXT: store <2 x i64> %54, <2 x i64>* %6, align 16
+; CHECK-NEXT: ret <2 x i64> %47
+; CHECK-NEXT: }
+
+define <16 x i64> @icmp_ult_on_16xi64(<16 x i64>, <16 x i64>, <16 x i64>, <16 x i64>) {
+entry:
+ %4 = icmp ult <16 x i64> %0, %1
+ %5 = select <16 x i1> %4, <16 x i64> %2, <16 x i64> %3
+ ret <16 x i64> %5
+}
+; CHECK-LABEL: define <2 x i64> @icmp_ult_on_16xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
+; CHECK: entry:
+; CHECK-NEXT: %39 = icmp ult <2 x i64> %7, %15
+; CHECK-NEXT: %40 = icmp ult <2 x i64> %8, %16
+; CHECK-NEXT: %41 = icmp ult <2 x i64> %9, %17
+; CHECK-NEXT: %42 = icmp ult <2 x i64> %10, %18
+; CHECK-NEXT: %43 = icmp ult <2 x i64> %11, %19
+; CHECK-NEXT: %44 = icmp ult <2 x i64> %12, %20
+; CHECK-NEXT: %45 = icmp ult <2 x i64> %13, %21
+; CHECK-NEXT: %46 = icmp ult <2 x i64> %14, %22
+; CHECK-NEXT: %47 = select <2 x i1> %39, <2 x i64> %23, <2 x i64> %31
+; CHECK-NEXT: %48 = select <2 x i1> %40, <2 x i64> %24, <2 x i64> %32
+; CHECK-NEXT: %49 = select <2 x i1> %41, <2 x i64> %25, <2 x i64> %33
+; CHECK-NEXT: %50 = select <2 x i1> %42, <2 x i64> %26, <2 x i64> %34
+; CHECK-NEXT: %51 = select <2 x i1> %43, <2 x i64> %27, <2 x i64> %35
+; CHECK-NEXT: %52 = select <2 x i1> %44, <2 x i64> %28, <2 x i64> %36
+; CHECK-NEXT: %53 = select <2 x i1> %45, <2 x i64> %29, <2 x i64> %37
+; CHECK-NEXT: %54 = select <2 x i1> %46, <2 x i64> %30, <2 x i64> %38
+; CHECK-NEXT: store <2 x i64> %48, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %49, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %50, <2 x i64>* %2, align 16
+; CHECK-NEXT: store <2 x i64> %51, <2 x i64>* %3, align 16
+; CHECK-NEXT: store <2 x i64> %52, <2 x i64>* %4, align 16
+; CHECK-NEXT: store <2 x i64> %53, <2 x i64>* %5, align 16
+; CHECK-NEXT: store <2 x i64> %54, <2 x i64>* %6, align 16
+; CHECK-NEXT: ret <2 x i64> %47
+; CHECK-NEXT: }
+
+define <16 x i64> @icmp_sle_on_16xi64(<16 x i64>, <16 x i64>, <16 x i64>, <16 x i64>) {
+entry:
+ %4 = icmp sle <16 x i64> %0, %1
+ %5 = select <16 x i1> %4, <16 x i64> %2, <16 x i64> %3
+ ret <16 x i64> %5
+}
+; CHECK-LABEL: define <2 x i64> @icmp_sle_on_16xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
+; CHECK: entry:
+; CHECK-NEXT: %39 = icmp sle <2 x i64> %7, %15
+; CHECK-NEXT: %40 = icmp sle <2 x i64> %8, %16
+; CHECK-NEXT: %41 = icmp sle <2 x i64> %9, %17
+; CHECK-NEXT: %42 = icmp sle <2 x i64> %10, %18
+; CHECK-NEXT: %43 = icmp sle <2 x i64> %11, %19
+; CHECK-NEXT: %44 = icmp sle <2 x i64> %12, %20
+; CHECK-NEXT: %45 = icmp sle <2 x i64> %13, %21
+; CHECK-NEXT: %46 = icmp sle <2 x i64> %14, %22
+; CHECK-NEXT: %47 = select <2 x i1> %39, <2 x i64> %23, <2 x i64> %31
+; CHECK-NEXT: %48 = select <2 x i1> %40, <2 x i64> %24, <2 x i64> %32
+; CHECK-NEXT: %49 = select <2 x i1> %41, <2 x i64> %25, <2 x i64> %33
+; CHECK-NEXT: %50 = select <2 x i1> %42, <2 x i64> %26, <2 x i64> %34
+; CHECK-NEXT: %51 = select <2 x i1> %43, <2 x i64> %27, <2 x i64> %35
+; CHECK-NEXT: %52 = select <2 x i1> %44, <2 x i64> %28, <2 x i64> %36
+; CHECK-NEXT: %53 = select <2 x i1> %45, <2 x i64> %29, <2 x i64> %37
+; CHECK-NEXT: %54 = select <2 x i1> %46, <2 x i64> %30, <2 x i64> %38
+; CHECK-NEXT: store <2 x i64> %48, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %49, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %50, <2 x i64>* %2, align 16
+; CHECK-NEXT: store <2 x i64> %51, <2 x i64>* %3, align 16
+; CHECK-NEXT: store <2 x i64> %52, <2 x i64>* %4, align 16
+; CHECK-NEXT: store <2 x i64> %53, <2 x i64>* %5, align 16
+; CHECK-NEXT: store <2 x i64> %54, <2 x i64>* %6, align 16
+; CHECK-NEXT: ret <2 x i64> %47
+; CHECK-NEXT: }
+
+define <16 x i64> @icmp_ule_on_16xi64(<16 x i64>, <16 x i64>, <16 x i64>, <16 x i64>) {
+entry:
+ %4 = icmp ule <16 x i64> %0, %1
+ %5 = select <16 x i1> %4, <16 x i64> %2, <16 x i64> %3
+ ret <16 x i64> %5
+}
+; CHECK-LABEL: define <2 x i64> @icmp_ule_on_16xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
+; CHECK: entry:
+; CHECK-NEXT: %39 = icmp ule <2 x i64> %7, %15
+; CHECK-NEXT: %40 = icmp ule <2 x i64> %8, %16
+; CHECK-NEXT: %41 = icmp ule <2 x i64> %9, %17
+; CHECK-NEXT: %42 = icmp ule <2 x i64> %10, %18
+; CHECK-NEXT: %43 = icmp ule <2 x i64> %11, %19
+; CHECK-NEXT: %44 = icmp ule <2 x i64> %12, %20
+; CHECK-NEXT: %45 = icmp ule <2 x i64> %13, %21
+; CHECK-NEXT: %46 = icmp ule <2 x i64> %14, %22
+; CHECK-NEXT: %47 = select <2 x i1> %39, <2 x i64> %23, <2 x i64> %31
+; CHECK-NEXT: %48 = select <2 x i1> %40, <2 x i64> %24, <2 x i64> %32
+; CHECK-NEXT: %49 = select <2 x i1> %41, <2 x i64> %25, <2 x i64> %33
+; CHECK-NEXT: %50 = select <2 x i1> %42, <2 x i64> %26, <2 x i64> %34
+; CHECK-NEXT: %51 = select <2 x i1> %43, <2 x i64> %27, <2 x i64> %35
+; CHECK-NEXT: %52 = select <2 x i1> %44, <2 x i64> %28, <2 x i64> %36
+; CHECK-NEXT: %53 = select <2 x i1> %45, <2 x i64> %29, <2 x i64> %37
+; CHECK-NEXT: %54 = select <2 x i1> %46, <2 x i64> %30, <2 x i64> %38
+; CHECK-NEXT: store <2 x i64> %48, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %49, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %50, <2 x i64>* %2, align 16
+; CHECK-NEXT: store <2 x i64> %51, <2 x i64>* %3, align 16
+; CHECK-NEXT: store <2 x i64> %52, <2 x i64>* %4, align 16
+; CHECK-NEXT: store <2 x i64> %53, <2 x i64>* %5, align 16
+; CHECK-NEXT: store <2 x i64> %54, <2 x i64>* %6, align 16
+; CHECK-NEXT: ret <2 x i64> %47
+; CHECK-NEXT: }
+
+define <16 x i8*> @icmp_eq_on_16xi8ptr(<16 x i8*>, <16 x i8*>, <16 x i8*>, <16 x i8*>) {
+entry:
+ %4 = icmp eq <16 x i8*> %0, %1
+ %5 = select <16 x i1> %4, <16 x i8*> %2, <16 x i8*> %3
+ ret <16 x i8*> %5
+}
+; CHECK-LABEL: define <4 x i8*> @icmp_eq_on_16xi8ptr(<4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
+; CHECK: entry:
+; CHECK-NEXT: %19 = icmp eq <4 x i8*> %3, %7
+; CHECK-NEXT: %20 = icmp eq <4 x i8*> %4, %8
+; CHECK-NEXT: %21 = icmp eq <4 x i8*> %5, %9
+; CHECK-NEXT: %22 = icmp eq <4 x i8*> %6, %10
+; CHECK-NEXT: %23 = select <4 x i1> %19, <4 x i8*> %11, <4 x i8*> %15
+; CHECK-NEXT: %24 = select <4 x i1> %20, <4 x i8*> %12, <4 x i8*> %16
+; CHECK-NEXT: %25 = select <4 x i1> %21, <4 x i8*> %13, <4 x i8*> %17
+; CHECK-NEXT: %26 = select <4 x i1> %22, <4 x i8*> %14, <4 x i8*> %18
+; CHECK-NEXT: store <4 x i8*> %24, <4 x i8*>* %0, align 16
+; CHECK-NEXT: store <4 x i8*> %25, <4 x i8*>* %1, align 16
+; CHECK-NEXT: store <4 x i8*> %26, <4 x i8*>* %2, align 16
+; CHECK-NEXT: ret <4 x i8*> %23
+; CHECK-NEXT: }
+
+define <16 x i8*> @icmp_ne_on_16xi8ptr(<16 x i8*>, <16 x i8*>, <16 x i8*>, <16 x i8*>) {
+entry:
+ %4 = icmp ne <16 x i8*> %0, %1
+ %5 = select <16 x i1> %4, <16 x i8*> %2, <16 x i8*> %3
+ ret <16 x i8*> %5
+}
+; CHECK-LABEL: define <4 x i8*> @icmp_ne_on_16xi8ptr(<4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
+; CHECK: entry:
+; CHECK-NEXT: %19 = icmp ne <4 x i8*> %3, %7
+; CHECK-NEXT: %20 = icmp ne <4 x i8*> %4, %8
+; CHECK-NEXT: %21 = icmp ne <4 x i8*> %5, %9
+; CHECK-NEXT: %22 = icmp ne <4 x i8*> %6, %10
+; CHECK-NEXT: %23 = select <4 x i1> %19, <4 x i8*> %11, <4 x i8*> %15
+; CHECK-NEXT: %24 = select <4 x i1> %20, <4 x i8*> %12, <4 x i8*> %16
+; CHECK-NEXT: %25 = select <4 x i1> %21, <4 x i8*> %13, <4 x i8*> %17
+; CHECK-NEXT: %26 = select <4 x i1> %22, <4 x i8*> %14, <4 x i8*> %18
+; CHECK-NEXT: store <4 x i8*> %24, <4 x i8*>* %0, align 16
+; CHECK-NEXT: store <4 x i8*> %25, <4 x i8*>* %1, align 16
+; CHECK-NEXT: store <4 x i8*> %26, <4 x i8*>* %2, align 16
+; CHECK-NEXT: ret <4 x i8*> %23
+; CHECK-NEXT: }
+
+define <16 x i8*> @icmp_sgt_on_16xi8ptr(<16 x i8*>, <16 x i8*>, <16 x i8*>, <16 x i8*>) {
+entry:
+ %4 = icmp sgt <16 x i8*> %0, %1
+ %5 = select <16 x i1> %4, <16 x i8*> %2, <16 x i8*> %3
+ ret <16 x i8*> %5
+}
+; CHECK-LABEL: define <4 x i8*> @icmp_sgt_on_16xi8ptr(<4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
+; CHECK: entry:
+; CHECK-NEXT: %19 = icmp sgt <4 x i8*> %3, %7
+; CHECK-NEXT: %20 = icmp sgt <4 x i8*> %4, %8
+; CHECK-NEXT: %21 = icmp sgt <4 x i8*> %5, %9
+; CHECK-NEXT: %22 = icmp sgt <4 x i8*> %6, %10
+; CHECK-NEXT: %23 = select <4 x i1> %19, <4 x i8*> %11, <4 x i8*> %15
+; CHECK-NEXT: %24 = select <4 x i1> %20, <4 x i8*> %12, <4 x i8*> %16
+; CHECK-NEXT: %25 = select <4 x i1> %21, <4 x i8*> %13, <4 x i8*> %17
+; CHECK-NEXT: %26 = select <4 x i1> %22, <4 x i8*> %14, <4 x i8*> %18
+; CHECK-NEXT: store <4 x i8*> %24, <4 x i8*>* %0, align 16
+; CHECK-NEXT: store <4 x i8*> %25, <4 x i8*>* %1, align 16
+; CHECK-NEXT: store <4 x i8*> %26, <4 x i8*>* %2, align 16
+; CHECK-NEXT: ret <4 x i8*> %23
+; CHECK-NEXT: }
+
+define <16 x i8*> @icmp_ugt_on_16xi8ptr(<16 x i8*>, <16 x i8*>, <16 x i8*>, <16 x i8*>) {
+entry:
+ %4 = icmp ugt <16 x i8*> %0, %1
+ %5 = select <16 x i1> %4, <16 x i8*> %2, <16 x i8*> %3
+ ret <16 x i8*> %5
+}
+; CHECK-LABEL: define <4 x i8*> @icmp_ugt_on_16xi8ptr(<4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
+; CHECK: entry:
+; CHECK-NEXT: %19 = icmp ugt <4 x i8*> %3, %7
+; CHECK-NEXT: %20 = icmp ugt <4 x i8*> %4, %8
+; CHECK-NEXT: %21 = icmp ugt <4 x i8*> %5, %9
+; CHECK-NEXT: %22 = icmp ugt <4 x i8*> %6, %10
+; CHECK-NEXT: %23 = select <4 x i1> %19, <4 x i8*> %11, <4 x i8*> %15
+; CHECK-NEXT: %24 = select <4 x i1> %20, <4 x i8*> %12, <4 x i8*> %16
+; CHECK-NEXT: %25 = select <4 x i1> %21, <4 x i8*> %13, <4 x i8*> %17
+; CHECK-NEXT: %26 = select <4 x i1> %22, <4 x i8*> %14, <4 x i8*> %18
+; CHECK-NEXT: store <4 x i8*> %24, <4 x i8*>* %0, align 16
+; CHECK-NEXT: store <4 x i8*> %25, <4 x i8*>* %1, align 16
+; CHECK-NEXT: store <4 x i8*> %26, <4 x i8*>* %2, align 16
+; CHECK-NEXT: ret <4 x i8*> %23
+; CHECK-NEXT: }
+
+define <16 x i8*> @icmp_sge_on_16xi8ptr(<16 x i8*>, <16 x i8*>, <16 x i8*>, <16 x i8*>) {
+entry:
+ %4 = icmp sge <16 x i8*> %0, %1
+ %5 = select <16 x i1> %4, <16 x i8*> %2, <16 x i8*> %3
+ ret <16 x i8*> %5
+}
+; CHECK-LABEL: define <4 x i8*> @icmp_sge_on_16xi8ptr(<4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
+; CHECK: entry:
+; CHECK-NEXT: %19 = icmp sge <4 x i8*> %3, %7
+; CHECK-NEXT: %20 = icmp sge <4 x i8*> %4, %8
+; CHECK-NEXT: %21 = icmp sge <4 x i8*> %5, %9
+; CHECK-NEXT: %22 = icmp sge <4 x i8*> %6, %10
+; CHECK-NEXT: %23 = select <4 x i1> %19, <4 x i8*> %11, <4 x i8*> %15
+; CHECK-NEXT: %24 = select <4 x i1> %20, <4 x i8*> %12, <4 x i8*> %16
+; CHECK-NEXT: %25 = select <4 x i1> %21, <4 x i8*> %13, <4 x i8*> %17
+; CHECK-NEXT: %26 = select <4 x i1> %22, <4 x i8*> %14, <4 x i8*> %18
+; CHECK-NEXT: store <4 x i8*> %24, <4 x i8*>* %0, align 16
+; CHECK-NEXT: store <4 x i8*> %25, <4 x i8*>* %1, align 16
+; CHECK-NEXT: store <4 x i8*> %26, <4 x i8*>* %2, align 16
+; CHECK-NEXT: ret <4 x i8*> %23
+; CHECK-NEXT: }
+
+define <16 x i8*> @icmp_uge_on_16xi8ptr(<16 x i8*>, <16 x i8*>, <16 x i8*>, <16 x i8*>) {
+entry:
+ %4 = icmp uge <16 x i8*> %0, %1
+ %5 = select <16 x i1> %4, <16 x i8*> %2, <16 x i8*> %3
+ ret <16 x i8*> %5
+}
+; CHECK-LABEL: define <4 x i8*> @icmp_uge_on_16xi8ptr(<4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
+; CHECK: entry:
+; CHECK-NEXT: %19 = icmp uge <4 x i8*> %3, %7
+; CHECK-NEXT: %20 = icmp uge <4 x i8*> %4, %8
+; CHECK-NEXT: %21 = icmp uge <4 x i8*> %5, %9
+; CHECK-NEXT: %22 = icmp uge <4 x i8*> %6, %10
+; CHECK-NEXT: %23 = select <4 x i1> %19, <4 x i8*> %11, <4 x i8*> %15
+; CHECK-NEXT: %24 = select <4 x i1> %20, <4 x i8*> %12, <4 x i8*> %16
+; CHECK-NEXT: %25 = select <4 x i1> %21, <4 x i8*> %13, <4 x i8*> %17
+; CHECK-NEXT: %26 = select <4 x i1> %22, <4 x i8*> %14, <4 x i8*> %18
+; CHECK-NEXT: store <4 x i8*> %24, <4 x i8*>* %0, align 16
+; CHECK-NEXT: store <4 x i8*> %25, <4 x i8*>* %1, align 16
+; CHECK-NEXT: store <4 x i8*> %26, <4 x i8*>* %2, align 16
+; CHECK-NEXT: ret <4 x i8*> %23
+; CHECK-NEXT: }
+
+define <16 x i8*> @icmp_slt_on_16xi8ptr(<16 x i8*>, <16 x i8*>, <16 x i8*>, <16 x i8*>) {
+entry:
+ %4 = icmp slt <16 x i8*> %0, %1
+ %5 = select <16 x i1> %4, <16 x i8*> %2, <16 x i8*> %3
+ ret <16 x i8*> %5
+}
+; CHECK-LABEL: define <4 x i8*> @icmp_slt_on_16xi8ptr(<4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
+; CHECK: entry:
+; CHECK-NEXT: %19 = icmp slt <4 x i8*> %3, %7
+; CHECK-NEXT: %20 = icmp slt <4 x i8*> %4, %8
+; CHECK-NEXT: %21 = icmp slt <4 x i8*> %5, %9
+; CHECK-NEXT: %22 = icmp slt <4 x i8*> %6, %10
+; CHECK-NEXT: %23 = select <4 x i1> %19, <4 x i8*> %11, <4 x i8*> %15
+; CHECK-NEXT: %24 = select <4 x i1> %20, <4 x i8*> %12, <4 x i8*> %16
+; CHECK-NEXT: %25 = select <4 x i1> %21, <4 x i8*> %13, <4 x i8*> %17
+; CHECK-NEXT: %26 = select <4 x i1> %22, <4 x i8*> %14, <4 x i8*> %18
+; CHECK-NEXT: store <4 x i8*> %24, <4 x i8*>* %0, align 16
+; CHECK-NEXT: store <4 x i8*> %25, <4 x i8*>* %1, align 16
+; CHECK-NEXT: store <4 x i8*> %26, <4 x i8*>* %2, align 16
+; CHECK-NEXT: ret <4 x i8*> %23
+; CHECK-NEXT: }
+
+define <16 x i8*> @icmp_ult_on_16xi8ptr(<16 x i8*>, <16 x i8*>, <16 x i8*>, <16 x i8*>) {
+entry:
+ %4 = icmp ult <16 x i8*> %0, %1
+ %5 = select <16 x i1> %4, <16 x i8*> %2, <16 x i8*> %3
+ ret <16 x i8*> %5
+}
+; CHECK-LABEL: define <4 x i8*> @icmp_ult_on_16xi8ptr(<4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
+; CHECK: entry:
+; CHECK-NEXT: %19 = icmp ult <4 x i8*> %3, %7
+; CHECK-NEXT: %20 = icmp ult <4 x i8*> %4, %8
+; CHECK-NEXT: %21 = icmp ult <4 x i8*> %5, %9
+; CHECK-NEXT: %22 = icmp ult <4 x i8*> %6, %10
+; CHECK-NEXT: %23 = select <4 x i1> %19, <4 x i8*> %11, <4 x i8*> %15
+; CHECK-NEXT: %24 = select <4 x i1> %20, <4 x i8*> %12, <4 x i8*> %16
+; CHECK-NEXT: %25 = select <4 x i1> %21, <4 x i8*> %13, <4 x i8*> %17
+; CHECK-NEXT: %26 = select <4 x i1> %22, <4 x i8*> %14, <4 x i8*> %18
+; CHECK-NEXT: store <4 x i8*> %24, <4 x i8*>* %0, align 16
+; CHECK-NEXT: store <4 x i8*> %25, <4 x i8*>* %1, align 16
+; CHECK-NEXT: store <4 x i8*> %26, <4 x i8*>* %2, align 16
+; CHECK-NEXT: ret <4 x i8*> %23
+; CHECK-NEXT: }
+
+define <16 x i8*> @icmp_sle_on_16xi8ptr(<16 x i8*>, <16 x i8*>, <16 x i8*>, <16 x i8*>) {
+entry:
+ %4 = icmp sle <16 x i8*> %0, %1
+ %5 = select <16 x i1> %4, <16 x i8*> %2, <16 x i8*> %3
+ ret <16 x i8*> %5
+}
+; CHECK-LABEL: define <4 x i8*> @icmp_sle_on_16xi8ptr(<4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
+; CHECK: entry:
+; CHECK-NEXT: %19 = icmp sle <4 x i8*> %3, %7
+; CHECK-NEXT: %20 = icmp sle <4 x i8*> %4, %8
+; CHECK-NEXT: %21 = icmp sle <4 x i8*> %5, %9
+; CHECK-NEXT: %22 = icmp sle <4 x i8*> %6, %10
+; CHECK-NEXT: %23 = select <4 x i1> %19, <4 x i8*> %11, <4 x i8*> %15
+; CHECK-NEXT: %24 = select <4 x i1> %20, <4 x i8*> %12, <4 x i8*> %16
+; CHECK-NEXT: %25 = select <4 x i1> %21, <4 x i8*> %13, <4 x i8*> %17
+; CHECK-NEXT: %26 = select <4 x i1> %22, <4 x i8*> %14, <4 x i8*> %18
+; CHECK-NEXT: store <4 x i8*> %24, <4 x i8*>* %0, align 16
+; CHECK-NEXT: store <4 x i8*> %25, <4 x i8*>* %1, align 16
+; CHECK-NEXT: store <4 x i8*> %26, <4 x i8*>* %2, align 16
+; CHECK-NEXT: ret <4 x i8*> %23
+; CHECK-NEXT: }
+
+define <16 x i8*> @icmp_ule_on_16xi8ptr(<16 x i8*>, <16 x i8*>, <16 x i8*>, <16 x i8*>) {
+entry:
+ %4 = icmp ule <16 x i8*> %0, %1
+ %5 = select <16 x i1> %4, <16 x i8*> %2, <16 x i8*> %3
+ ret <16 x i8*> %5
+}
+; CHECK-LABEL: define <4 x i8*> @icmp_ule_on_16xi8ptr(<4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
+; CHECK: entry:
+; CHECK-NEXT: %19 = icmp ule <4 x i8*> %3, %7
+; CHECK-NEXT: %20 = icmp ule <4 x i8*> %4, %8
+; CHECK-NEXT: %21 = icmp ule <4 x i8*> %5, %9
+; CHECK-NEXT: %22 = icmp ule <4 x i8*> %6, %10
+; CHECK-NEXT: %23 = select <4 x i1> %19, <4 x i8*> %11, <4 x i8*> %15
+; CHECK-NEXT: %24 = select <4 x i1> %20, <4 x i8*> %12, <4 x i8*> %16
+; CHECK-NEXT: %25 = select <4 x i1> %21, <4 x i8*> %13, <4 x i8*> %17
+; CHECK-NEXT: %26 = select <4 x i1> %22, <4 x i8*> %14, <4 x i8*> %18
+; CHECK-NEXT: store <4 x i8*> %24, <4 x i8*>* %0, align 16
+; CHECK-NEXT: store <4 x i8*> %25, <4 x i8*>* %1, align 16
+; CHECK-NEXT: store <4 x i8*> %26, <4 x i8*>* %2, align 16
+; CHECK-NEXT: ret <4 x i8*> %23
+; CHECK-NEXT: }
+
+define <20 x i8> @icmp_eq_on_20xi8(<20 x i8>, <20 x i8>, <20 x i8>, <20 x i8>) {
+entry:
+ %4 = icmp eq <20 x i8> %0, %1
+ %5 = select <20 x i1> %4, <20 x i8> %2, <20 x i8> %3
+ ret <20 x i8> %5
+}
+; CHECK-LABEL: define <16 x i8> @icmp_eq_on_20xi8(<16 x i8>* nocapture nonnull dereferenceable(16), <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = icmp eq <16 x i8> %1, %3
+; CHECK-NEXT: %10 = icmp eq <16 x i8> %2, %4
+; CHECK-NEXT: %11 = select <16 x i1> %9, <16 x i8> %5, <16 x i8> %7
+; CHECK-NEXT: %12 = select <16 x i1> %10, <16 x i8> %6, <16 x i8> %8
+; CHECK-NEXT: store <16 x i8> %12, <16 x i8>* %0, align 16
+; CHECK-NEXT: ret <16 x i8> %11
+; CHECK-NEXT: }
+
+define <20 x i8> @icmp_ne_on_20xi8(<20 x i8>, <20 x i8>, <20 x i8>, <20 x i8>) {
+entry:
+ %4 = icmp ne <20 x i8> %0, %1
+ %5 = select <20 x i1> %4, <20 x i8> %2, <20 x i8> %3
+ ret <20 x i8> %5
+}
+; CHECK-LABEL: define <16 x i8> @icmp_ne_on_20xi8(<16 x i8>* nocapture nonnull dereferenceable(16), <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = icmp ne <16 x i8> %1, %3
+; CHECK-NEXT: %10 = icmp ne <16 x i8> %2, %4
+; CHECK-NEXT: %11 = select <16 x i1> %9, <16 x i8> %5, <16 x i8> %7
+; CHECK-NEXT: %12 = select <16 x i1> %10, <16 x i8> %6, <16 x i8> %8
+; CHECK-NEXT: store <16 x i8> %12, <16 x i8>* %0, align 16
+; CHECK-NEXT: ret <16 x i8> %11
+; CHECK-NEXT: }
+
+define <20 x i8> @icmp_sgt_on_20xi8(<20 x i8>, <20 x i8>, <20 x i8>, <20 x i8>) {
+entry:
+ %4 = icmp sgt <20 x i8> %0, %1
+ %5 = select <20 x i1> %4, <20 x i8> %2, <20 x i8> %3
+ ret <20 x i8> %5
+}
+; CHECK-LABEL: define <16 x i8> @icmp_sgt_on_20xi8(<16 x i8>* nocapture nonnull dereferenceable(16), <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = icmp sgt <16 x i8> %1, %3
+; CHECK-NEXT: %10 = icmp sgt <16 x i8> %2, %4
+; CHECK-NEXT: %11 = select <16 x i1> %9, <16 x i8> %5, <16 x i8> %7
+; CHECK-NEXT: %12 = select <16 x i1> %10, <16 x i8> %6, <16 x i8> %8
+; CHECK-NEXT: store <16 x i8> %12, <16 x i8>* %0, align 16
+; CHECK-NEXT: ret <16 x i8> %11
+; CHECK-NEXT: }
+
+define <20 x i8> @icmp_ugt_on_20xi8(<20 x i8>, <20 x i8>, <20 x i8>, <20 x i8>) {
+entry:
+ %4 = icmp ugt <20 x i8> %0, %1
+ %5 = select <20 x i1> %4, <20 x i8> %2, <20 x i8> %3
+ ret <20 x i8> %5
+}
+; CHECK-LABEL: define <16 x i8> @icmp_ugt_on_20xi8(<16 x i8>* nocapture nonnull dereferenceable(16), <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = icmp ugt <16 x i8> %1, %3
+; CHECK-NEXT: %10 = icmp ugt <16 x i8> %2, %4
+; CHECK-NEXT: %11 = select <16 x i1> %9, <16 x i8> %5, <16 x i8> %7
+; CHECK-NEXT: %12 = select <16 x i1> %10, <16 x i8> %6, <16 x i8> %8
+; CHECK-NEXT: store <16 x i8> %12, <16 x i8>* %0, align 16
+; CHECK-NEXT: ret <16 x i8> %11
+; CHECK-NEXT: }
+
+define <20 x i8> @icmp_sge_on_20xi8(<20 x i8>, <20 x i8>, <20 x i8>, <20 x i8>) {
+entry:
+ %4 = icmp sge <20 x i8> %0, %1
+ %5 = select <20 x i1> %4, <20 x i8> %2, <20 x i8> %3
+ ret <20 x i8> %5
+}
+; CHECK-LABEL: define <16 x i8> @icmp_sge_on_20xi8(<16 x i8>* nocapture nonnull dereferenceable(16), <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = icmp sge <16 x i8> %1, %3
+; CHECK-NEXT: %10 = icmp sge <16 x i8> %2, %4
+; CHECK-NEXT: %11 = select <16 x i1> %9, <16 x i8> %5, <16 x i8> %7
+; CHECK-NEXT: %12 = select <16 x i1> %10, <16 x i8> %6, <16 x i8> %8
+; CHECK-NEXT: store <16 x i8> %12, <16 x i8>* %0, align 16
+; CHECK-NEXT: ret <16 x i8> %11
+; CHECK-NEXT: }
+
+define <20 x i8> @icmp_uge_on_20xi8(<20 x i8>, <20 x i8>, <20 x i8>, <20 x i8>) {
+entry:
+ %4 = icmp uge <20 x i8> %0, %1
+ %5 = select <20 x i1> %4, <20 x i8> %2, <20 x i8> %3
+ ret <20 x i8> %5
+}
+; CHECK-LABEL: define <16 x i8> @icmp_uge_on_20xi8(<16 x i8>* nocapture nonnull dereferenceable(16), <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = icmp uge <16 x i8> %1, %3
+; CHECK-NEXT: %10 = icmp uge <16 x i8> %2, %4
+; CHECK-NEXT: %11 = select <16 x i1> %9, <16 x i8> %5, <16 x i8> %7
+; CHECK-NEXT: %12 = select <16 x i1> %10, <16 x i8> %6, <16 x i8> %8
+; CHECK-NEXT: store <16 x i8> %12, <16 x i8>* %0, align 16
+; CHECK-NEXT: ret <16 x i8> %11
+; CHECK-NEXT: }
+
+define <20 x i8> @icmp_slt_on_20xi8(<20 x i8>, <20 x i8>, <20 x i8>, <20 x i8>) {
+entry:
+ %4 = icmp slt <20 x i8> %0, %1
+ %5 = select <20 x i1> %4, <20 x i8> %2, <20 x i8> %3
+ ret <20 x i8> %5
+}
+; CHECK-LABEL: define <16 x i8> @icmp_slt_on_20xi8(<16 x i8>* nocapture nonnull dereferenceable(16), <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = icmp slt <16 x i8> %1, %3
+; CHECK-NEXT: %10 = icmp slt <16 x i8> %2, %4
+; CHECK-NEXT: %11 = select <16 x i1> %9, <16 x i8> %5, <16 x i8> %7
+; CHECK-NEXT: %12 = select <16 x i1> %10, <16 x i8> %6, <16 x i8> %8
+; CHECK-NEXT: store <16 x i8> %12, <16 x i8>* %0, align 16
+; CHECK-NEXT: ret <16 x i8> %11
+; CHECK-NEXT: }
+
+define <20 x i8> @icmp_ult_on_20xi8(<20 x i8>, <20 x i8>, <20 x i8>, <20 x i8>) {
+entry:
+ %4 = icmp ult <20 x i8> %0, %1
+ %5 = select <20 x i1> %4, <20 x i8> %2, <20 x i8> %3
+ ret <20 x i8> %5
+}
+; CHECK-LABEL: define <16 x i8> @icmp_ult_on_20xi8(<16 x i8>* nocapture nonnull dereferenceable(16), <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = icmp ult <16 x i8> %1, %3
+; CHECK-NEXT: %10 = icmp ult <16 x i8> %2, %4
+; CHECK-NEXT: %11 = select <16 x i1> %9, <16 x i8> %5, <16 x i8> %7
+; CHECK-NEXT: %12 = select <16 x i1> %10, <16 x i8> %6, <16 x i8> %8
+; CHECK-NEXT: store <16 x i8> %12, <16 x i8>* %0, align 16
+; CHECK-NEXT: ret <16 x i8> %11
+; CHECK-NEXT: }
+
+define <20 x i8> @icmp_sle_on_20xi8(<20 x i8>, <20 x i8>, <20 x i8>, <20 x i8>) {
+entry:
+ %4 = icmp sle <20 x i8> %0, %1
+ %5 = select <20 x i1> %4, <20 x i8> %2, <20 x i8> %3
+ ret <20 x i8> %5
+}
+; CHECK-LABEL: define <16 x i8> @icmp_sle_on_20xi8(<16 x i8>* nocapture nonnull dereferenceable(16), <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = icmp sle <16 x i8> %1, %3
+; CHECK-NEXT: %10 = icmp sle <16 x i8> %2, %4
+; CHECK-NEXT: %11 = select <16 x i1> %9, <16 x i8> %5, <16 x i8> %7
+; CHECK-NEXT: %12 = select <16 x i1> %10, <16 x i8> %6, <16 x i8> %8
+; CHECK-NEXT: store <16 x i8> %12, <16 x i8>* %0, align 16
+; CHECK-NEXT: ret <16 x i8> %11
+; CHECK-NEXT: }
+
+define <20 x i8> @icmp_ule_on_20xi8(<20 x i8>, <20 x i8>, <20 x i8>, <20 x i8>) {
+entry:
+ %4 = icmp ule <20 x i8> %0, %1
+ %5 = select <20 x i1> %4, <20 x i8> %2, <20 x i8> %3
+ ret <20 x i8> %5
+}
+; CHECK-LABEL: define <16 x i8> @icmp_ule_on_20xi8(<16 x i8>* nocapture nonnull dereferenceable(16), <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>) {
+; CHECK: entry:
+; CHECK-NEXT: %9 = icmp ule <16 x i8> %1, %3
+; CHECK-NEXT: %10 = icmp ule <16 x i8> %2, %4
+; CHECK-NEXT: %11 = select <16 x i1> %9, <16 x i8> %5, <16 x i8> %7
+; CHECK-NEXT: %12 = select <16 x i1> %10, <16 x i8> %6, <16 x i8> %8
+; CHECK-NEXT: store <16 x i8> %12, <16 x i8>* %0, align 16
+; CHECK-NEXT: ret <16 x i8> %11
+; CHECK-NEXT: }
+
+define <20 x i16> @icmp_eq_on_20xi16(<20 x i16>, <20 x i16>, <20 x i16>, <20 x i16>) {
+entry:
+ %4 = icmp eq <20 x i16> %0, %1
+ %5 = select <20 x i1> %4, <20 x i16> %2, <20 x i16> %3
+ ret <20 x i16> %5
+}
+; CHECK-LABEL: define <8 x i16> @icmp_eq_on_20xi16(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
+; CHECK: entry:
+; CHECK-NEXT: %14 = icmp eq <8 x i16> %2, %5
+; CHECK-NEXT: %15 = icmp eq <8 x i16> %3, %6
+; CHECK-NEXT: %16 = icmp eq <8 x i16> %4, %7
+; CHECK-NEXT: %17 = select <8 x i1> %14, <8 x i16> %8, <8 x i16> %11
+; CHECK-NEXT: %18 = select <8 x i1> %15, <8 x i16> %9, <8 x i16> %12
+; CHECK-NEXT: %19 = select <8 x i1> %16, <8 x i16> %10, <8 x i16> %13
+; CHECK-NEXT: store <8 x i16> %18, <8 x i16>* %0, align 16
+; CHECK-NEXT: store <8 x i16> %19, <8 x i16>* %1, align 16
+; CHECK-NEXT: ret <8 x i16> %17
+; CHECK-NEXT: }
+
+define <20 x i16> @icmp_ne_on_20xi16(<20 x i16>, <20 x i16>, <20 x i16>, <20 x i16>) {
+entry:
+ %4 = icmp ne <20 x i16> %0, %1
+ %5 = select <20 x i1> %4, <20 x i16> %2, <20 x i16> %3
+ ret <20 x i16> %5
+}
+; CHECK-LABEL: define <8 x i16> @icmp_ne_on_20xi16(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
+; CHECK: entry:
+; CHECK-NEXT: %14 = icmp ne <8 x i16> %2, %5
+; CHECK-NEXT: %15 = icmp ne <8 x i16> %3, %6
+; CHECK-NEXT: %16 = icmp ne <8 x i16> %4, %7
+; CHECK-NEXT: %17 = select <8 x i1> %14, <8 x i16> %8, <8 x i16> %11
+; CHECK-NEXT: %18 = select <8 x i1> %15, <8 x i16> %9, <8 x i16> %12
+; CHECK-NEXT: %19 = select <8 x i1> %16, <8 x i16> %10, <8 x i16> %13
+; CHECK-NEXT: store <8 x i16> %18, <8 x i16>* %0, align 16
+; CHECK-NEXT: store <8 x i16> %19, <8 x i16>* %1, align 16
+; CHECK-NEXT: ret <8 x i16> %17
+; CHECK-NEXT: }
+
+define <20 x i16> @icmp_sgt_on_20xi16(<20 x i16>, <20 x i16>, <20 x i16>, <20 x i16>) {
+entry:
+ %4 = icmp sgt <20 x i16> %0, %1
+ %5 = select <20 x i1> %4, <20 x i16> %2, <20 x i16> %3
+ ret <20 x i16> %5
+}
+; CHECK-LABEL: define <8 x i16> @icmp_sgt_on_20xi16(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
+; CHECK: entry:
+; CHECK-NEXT: %14 = icmp sgt <8 x i16> %2, %5
+; CHECK-NEXT: %15 = icmp sgt <8 x i16> %3, %6
+; CHECK-NEXT: %16 = icmp sgt <8 x i16> %4, %7
+; CHECK-NEXT: %17 = select <8 x i1> %14, <8 x i16> %8, <8 x i16> %11
+; CHECK-NEXT: %18 = select <8 x i1> %15, <8 x i16> %9, <8 x i16> %12
+; CHECK-NEXT: %19 = select <8 x i1> %16, <8 x i16> %10, <8 x i16> %13
+; CHECK-NEXT: store <8 x i16> %18, <8 x i16>* %0, align 16
+; CHECK-NEXT: store <8 x i16> %19, <8 x i16>* %1, align 16
+; CHECK-NEXT: ret <8 x i16> %17
+; CHECK-NEXT: }
+
+define <20 x i16> @icmp_ugt_on_20xi16(<20 x i16>, <20 x i16>, <20 x i16>, <20 x i16>) {
+entry:
+ %4 = icmp ugt <20 x i16> %0, %1
+ %5 = select <20 x i1> %4, <20 x i16> %2, <20 x i16> %3
+ ret <20 x i16> %5
+}
+; CHECK-LABEL: define <8 x i16> @icmp_ugt_on_20xi16(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
+; CHECK: entry:
+; CHECK-NEXT: %14 = icmp ugt <8 x i16> %2, %5
+; CHECK-NEXT: %15 = icmp ugt <8 x i16> %3, %6
+; CHECK-NEXT: %16 = icmp ugt <8 x i16> %4, %7
+; CHECK-NEXT: %17 = select <8 x i1> %14, <8 x i16> %8, <8 x i16> %11
+; CHECK-NEXT: %18 = select <8 x i1> %15, <8 x i16> %9, <8 x i16> %12
+; CHECK-NEXT: %19 = select <8 x i1> %16, <8 x i16> %10, <8 x i16> %13
+; CHECK-NEXT: store <8 x i16> %18, <8 x i16>* %0, align 16
+; CHECK-NEXT: store <8 x i16> %19, <8 x i16>* %1, align 16
+; CHECK-NEXT: ret <8 x i16> %17
+; CHECK-NEXT: }
+
+define <20 x i16> @icmp_sge_on_20xi16(<20 x i16>, <20 x i16>, <20 x i16>, <20 x i16>) {
+entry:
+ %4 = icmp sge <20 x i16> %0, %1
+ %5 = select <20 x i1> %4, <20 x i16> %2, <20 x i16> %3
+ ret <20 x i16> %5
+}
+; CHECK-LABEL: define <8 x i16> @icmp_sge_on_20xi16(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
+; CHECK: entry:
+; CHECK-NEXT: %14 = icmp sge <8 x i16> %2, %5
+; CHECK-NEXT: %15 = icmp sge <8 x i16> %3, %6
+; CHECK-NEXT: %16 = icmp sge <8 x i16> %4, %7
+; CHECK-NEXT: %17 = select <8 x i1> %14, <8 x i16> %8, <8 x i16> %11
+; CHECK-NEXT: %18 = select <8 x i1> %15, <8 x i16> %9, <8 x i16> %12
+; CHECK-NEXT: %19 = select <8 x i1> %16, <8 x i16> %10, <8 x i16> %13
+; CHECK-NEXT: store <8 x i16> %18, <8 x i16>* %0, align 16
+; CHECK-NEXT: store <8 x i16> %19, <8 x i16>* %1, align 16
+; CHECK-NEXT: ret <8 x i16> %17
+; CHECK-NEXT: }
+
+define <20 x i16> @icmp_uge_on_20xi16(<20 x i16>, <20 x i16>, <20 x i16>, <20 x i16>) {
+entry:
+ %4 = icmp uge <20 x i16> %0, %1
+ %5 = select <20 x i1> %4, <20 x i16> %2, <20 x i16> %3
+ ret <20 x i16> %5
+}
+; CHECK-LABEL: define <8 x i16> @icmp_uge_on_20xi16(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
+; CHECK: entry:
+; CHECK-NEXT: %14 = icmp uge <8 x i16> %2, %5
+; CHECK-NEXT: %15 = icmp uge <8 x i16> %3, %6
+; CHECK-NEXT: %16 = icmp uge <8 x i16> %4, %7
+; CHECK-NEXT: %17 = select <8 x i1> %14, <8 x i16> %8, <8 x i16> %11
+; CHECK-NEXT: %18 = select <8 x i1> %15, <8 x i16> %9, <8 x i16> %12
+; CHECK-NEXT: %19 = select <8 x i1> %16, <8 x i16> %10, <8 x i16> %13
+; CHECK-NEXT: store <8 x i16> %18, <8 x i16>* %0, align 16
+; CHECK-NEXT: store <8 x i16> %19, <8 x i16>* %1, align 16
+; CHECK-NEXT: ret <8 x i16> %17
+; CHECK-NEXT: }
+
+define <20 x i16> @icmp_slt_on_20xi16(<20 x i16>, <20 x i16>, <20 x i16>, <20 x i16>) {
+entry:
+ %4 = icmp slt <20 x i16> %0, %1
+ %5 = select <20 x i1> %4, <20 x i16> %2, <20 x i16> %3
+ ret <20 x i16> %5
+}
+; CHECK-LABEL: define <8 x i16> @icmp_slt_on_20xi16(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
+; CHECK: entry:
+; CHECK-NEXT: %14 = icmp slt <8 x i16> %2, %5
+; CHECK-NEXT: %15 = icmp slt <8 x i16> %3, %6
+; CHECK-NEXT: %16 = icmp slt <8 x i16> %4, %7
+; CHECK-NEXT: %17 = select <8 x i1> %14, <8 x i16> %8, <8 x i16> %11
+; CHECK-NEXT: %18 = select <8 x i1> %15, <8 x i16> %9, <8 x i16> %12
+; CHECK-NEXT: %19 = select <8 x i1> %16, <8 x i16> %10, <8 x i16> %13
+; CHECK-NEXT: store <8 x i16> %18, <8 x i16>* %0, align 16
+; CHECK-NEXT: store <8 x i16> %19, <8 x i16>* %1, align 16
+; CHECK-NEXT: ret <8 x i16> %17
+; CHECK-NEXT: }
+
+define <20 x i16> @icmp_ult_on_20xi16(<20 x i16>, <20 x i16>, <20 x i16>, <20 x i16>) {
+entry:
+ %4 = icmp ult <20 x i16> %0, %1
+ %5 = select <20 x i1> %4, <20 x i16> %2, <20 x i16> %3
+ ret <20 x i16> %5
+}
+; CHECK-LABEL: define <8 x i16> @icmp_ult_on_20xi16(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
+; CHECK: entry:
+; CHECK-NEXT: %14 = icmp ult <8 x i16> %2, %5
+; CHECK-NEXT: %15 = icmp ult <8 x i16> %3, %6
+; CHECK-NEXT: %16 = icmp ult <8 x i16> %4, %7
+; CHECK-NEXT: %17 = select <8 x i1> %14, <8 x i16> %8, <8 x i16> %11
+; CHECK-NEXT: %18 = select <8 x i1> %15, <8 x i16> %9, <8 x i16> %12
+; CHECK-NEXT: %19 = select <8 x i1> %16, <8 x i16> %10, <8 x i16> %13
+; CHECK-NEXT: store <8 x i16> %18, <8 x i16>* %0, align 16
+; CHECK-NEXT: store <8 x i16> %19, <8 x i16>* %1, align 16
+; CHECK-NEXT: ret <8 x i16> %17
+; CHECK-NEXT: }
+
+define <20 x i16> @icmp_sle_on_20xi16(<20 x i16>, <20 x i16>, <20 x i16>, <20 x i16>) {
+entry:
+ %4 = icmp sle <20 x i16> %0, %1
+ %5 = select <20 x i1> %4, <20 x i16> %2, <20 x i16> %3
+ ret <20 x i16> %5
+}
+; CHECK-LABEL: define <8 x i16> @icmp_sle_on_20xi16(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
+; CHECK: entry:
+; CHECK-NEXT: %14 = icmp sle <8 x i16> %2, %5
+; CHECK-NEXT: %15 = icmp sle <8 x i16> %3, %6
+; CHECK-NEXT: %16 = icmp sle <8 x i16> %4, %7
+; CHECK-NEXT: %17 = select <8 x i1> %14, <8 x i16> %8, <8 x i16> %11
+; CHECK-NEXT: %18 = select <8 x i1> %15, <8 x i16> %9, <8 x i16> %12
+; CHECK-NEXT: %19 = select <8 x i1> %16, <8 x i16> %10, <8 x i16> %13
+; CHECK-NEXT: store <8 x i16> %18, <8 x i16>* %0, align 16
+; CHECK-NEXT: store <8 x i16> %19, <8 x i16>* %1, align 16
+; CHECK-NEXT: ret <8 x i16> %17
+; CHECK-NEXT: }
+
+define <20 x i16> @icmp_ule_on_20xi16(<20 x i16>, <20 x i16>, <20 x i16>, <20 x i16>) {
+entry:
+ %4 = icmp ule <20 x i16> %0, %1
+ %5 = select <20 x i1> %4, <20 x i16> %2, <20 x i16> %3
+ ret <20 x i16> %5
+}
+; CHECK-LABEL: define <8 x i16> @icmp_ule_on_20xi16(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
+; CHECK: entry:
+; CHECK-NEXT: %14 = icmp ule <8 x i16> %2, %5
+; CHECK-NEXT: %15 = icmp ule <8 x i16> %3, %6
+; CHECK-NEXT: %16 = icmp ule <8 x i16> %4, %7
+; CHECK-NEXT: %17 = select <8 x i1> %14, <8 x i16> %8, <8 x i16> %11
+; CHECK-NEXT: %18 = select <8 x i1> %15, <8 x i16> %9, <8 x i16> %12
+; CHECK-NEXT: %19 = select <8 x i1> %16, <8 x i16> %10, <8 x i16> %13
+; CHECK-NEXT: store <8 x i16> %18, <8 x i16>* %0, align 16
+; CHECK-NEXT: store <8 x i16> %19, <8 x i16>* %1, align 16
+; CHECK-NEXT: ret <8 x i16> %17
+; CHECK-NEXT: }
+
+define <20 x i32> @icmp_eq_on_20xi32(<20 x i32>, <20 x i32>, <20 x i32>, <20 x i32>) {
+entry:
+ %4 = icmp eq <20 x i32> %0, %1
+ %5 = select <20 x i1> %4, <20 x i32> %2, <20 x i32> %3
+ ret <20 x i32> %5
+}
+; CHECK-LABEL: define <4 x i32> @icmp_eq_on_20xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
+; CHECK: entry:
+; CHECK-NEXT: %24 = icmp eq <4 x i32> %4, %9
+; CHECK-NEXT: %25 = icmp eq <4 x i32> %5, %10
+; CHECK-NEXT: %26 = icmp eq <4 x i32> %6, %11
+; CHECK-NEXT: %27 = icmp eq <4 x i32> %7, %12
+; CHECK-NEXT: %28 = icmp eq <4 x i32> %8, %13
+; CHECK-NEXT: %29 = select <4 x i1> %24, <4 x i32> %14, <4 x i32> %19
+; CHECK-NEXT: %30 = select <4 x i1> %25, <4 x i32> %15, <4 x i32> %20
+; CHECK-NEXT: %31 = select <4 x i1> %26, <4 x i32> %16, <4 x i32> %21
+; CHECK-NEXT: %32 = select <4 x i1> %27, <4 x i32> %17, <4 x i32> %22
+; CHECK-NEXT: %33 = select <4 x i1> %28, <4 x i32> %18, <4 x i32> %23
+; CHECK-NEXT: store <4 x i32> %30, <4 x i32>* %0, align 16
+; CHECK-NEXT: store <4 x i32> %31, <4 x i32>* %1, align 16
+; CHECK-NEXT: store <4 x i32> %32, <4 x i32>* %2, align 16
+; CHECK-NEXT: store <4 x i32> %33, <4 x i32>* %3, align 16
+; CHECK-NEXT: ret <4 x i32> %29
+; CHECK-NEXT: }
+
+define <20 x i32> @icmp_ne_on_20xi32(<20 x i32>, <20 x i32>, <20 x i32>, <20 x i32>) {
+entry:
+ %4 = icmp ne <20 x i32> %0, %1
+ %5 = select <20 x i1> %4, <20 x i32> %2, <20 x i32> %3
+ ret <20 x i32> %5
+}
+; CHECK-LABEL: define <4 x i32> @icmp_ne_on_20xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
+; CHECK: entry:
+; CHECK-NEXT: %24 = icmp ne <4 x i32> %4, %9
+; CHECK-NEXT: %25 = icmp ne <4 x i32> %5, %10
+; CHECK-NEXT: %26 = icmp ne <4 x i32> %6, %11
+; CHECK-NEXT: %27 = icmp ne <4 x i32> %7, %12
+; CHECK-NEXT: %28 = icmp ne <4 x i32> %8, %13
+; CHECK-NEXT: %29 = select <4 x i1> %24, <4 x i32> %14, <4 x i32> %19
+; CHECK-NEXT: %30 = select <4 x i1> %25, <4 x i32> %15, <4 x i32> %20
+; CHECK-NEXT: %31 = select <4 x i1> %26, <4 x i32> %16, <4 x i32> %21
+; CHECK-NEXT: %32 = select <4 x i1> %27, <4 x i32> %17, <4 x i32> %22
+; CHECK-NEXT: %33 = select <4 x i1> %28, <4 x i32> %18, <4 x i32> %23
+; CHECK-NEXT: store <4 x i32> %30, <4 x i32>* %0, align 16
+; CHECK-NEXT: store <4 x i32> %31, <4 x i32>* %1, align 16
+; CHECK-NEXT: store <4 x i32> %32, <4 x i32>* %2, align 16
+; CHECK-NEXT: store <4 x i32> %33, <4 x i32>* %3, align 16
+; CHECK-NEXT: ret <4 x i32> %29
+; CHECK-NEXT: }
+
+define <20 x i32> @icmp_sgt_on_20xi32(<20 x i32>, <20 x i32>, <20 x i32>, <20 x i32>) {
+entry:
+ %4 = icmp sgt <20 x i32> %0, %1
+ %5 = select <20 x i1> %4, <20 x i32> %2, <20 x i32> %3
+ ret <20 x i32> %5
+}
+; CHECK-LABEL: define <4 x i32> @icmp_sgt_on_20xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
+; CHECK: entry:
+; CHECK-NEXT: %24 = icmp sgt <4 x i32> %4, %9
+; CHECK-NEXT: %25 = icmp sgt <4 x i32> %5, %10
+; CHECK-NEXT: %26 = icmp sgt <4 x i32> %6, %11
+; CHECK-NEXT: %27 = icmp sgt <4 x i32> %7, %12
+; CHECK-NEXT: %28 = icmp sgt <4 x i32> %8, %13
+; CHECK-NEXT: %29 = select <4 x i1> %24, <4 x i32> %14, <4 x i32> %19
+; CHECK-NEXT: %30 = select <4 x i1> %25, <4 x i32> %15, <4 x i32> %20
+; CHECK-NEXT: %31 = select <4 x i1> %26, <4 x i32> %16, <4 x i32> %21
+; CHECK-NEXT: %32 = select <4 x i1> %27, <4 x i32> %17, <4 x i32> %22
+; CHECK-NEXT: %33 = select <4 x i1> %28, <4 x i32> %18, <4 x i32> %23
+; CHECK-NEXT: store <4 x i32> %30, <4 x i32>* %0, align 16
+; CHECK-NEXT: store <4 x i32> %31, <4 x i32>* %1, align 16
+; CHECK-NEXT: store <4 x i32> %32, <4 x i32>* %2, align 16
+; CHECK-NEXT: store <4 x i32> %33, <4 x i32>* %3, align 16
+; CHECK-NEXT: ret <4 x i32> %29
+; CHECK-NEXT: }
+
+define <20 x i32> @icmp_ugt_on_20xi32(<20 x i32>, <20 x i32>, <20 x i32>, <20 x i32>) {
+entry:
+ %4 = icmp ugt <20 x i32> %0, %1
+ %5 = select <20 x i1> %4, <20 x i32> %2, <20 x i32> %3
+ ret <20 x i32> %5
+}
+; CHECK-LABEL: define <4 x i32> @icmp_ugt_on_20xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
+; CHECK: entry:
+; CHECK-NEXT: %24 = icmp ugt <4 x i32> %4, %9
+; CHECK-NEXT: %25 = icmp ugt <4 x i32> %5, %10
+; CHECK-NEXT: %26 = icmp ugt <4 x i32> %6, %11
+; CHECK-NEXT: %27 = icmp ugt <4 x i32> %7, %12
+; CHECK-NEXT: %28 = icmp ugt <4 x i32> %8, %13
+; CHECK-NEXT: %29 = select <4 x i1> %24, <4 x i32> %14, <4 x i32> %19
+; CHECK-NEXT: %30 = select <4 x i1> %25, <4 x i32> %15, <4 x i32> %20
+; CHECK-NEXT: %31 = select <4 x i1> %26, <4 x i32> %16, <4 x i32> %21
+; CHECK-NEXT: %32 = select <4 x i1> %27, <4 x i32> %17, <4 x i32> %22
+; CHECK-NEXT: %33 = select <4 x i1> %28, <4 x i32> %18, <4 x i32> %23
+; CHECK-NEXT: store <4 x i32> %30, <4 x i32>* %0, align 16
+; CHECK-NEXT: store <4 x i32> %31, <4 x i32>* %1, align 16
+; CHECK-NEXT: store <4 x i32> %32, <4 x i32>* %2, align 16
+; CHECK-NEXT: store <4 x i32> %33, <4 x i32>* %3, align 16
+; CHECK-NEXT: ret <4 x i32> %29
+; CHECK-NEXT: }
+
+define <20 x i32> @icmp_sge_on_20xi32(<20 x i32>, <20 x i32>, <20 x i32>, <20 x i32>) {
+entry:
+ %4 = icmp sge <20 x i32> %0, %1
+ %5 = select <20 x i1> %4, <20 x i32> %2, <20 x i32> %3
+ ret <20 x i32> %5
+}
+; CHECK-LABEL: define <4 x i32> @icmp_sge_on_20xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
+; CHECK: entry:
+; CHECK-NEXT: %24 = icmp sge <4 x i32> %4, %9
+; CHECK-NEXT: %25 = icmp sge <4 x i32> %5, %10
+; CHECK-NEXT: %26 = icmp sge <4 x i32> %6, %11
+; CHECK-NEXT: %27 = icmp sge <4 x i32> %7, %12
+; CHECK-NEXT: %28 = icmp sge <4 x i32> %8, %13
+; CHECK-NEXT: %29 = select <4 x i1> %24, <4 x i32> %14, <4 x i32> %19
+; CHECK-NEXT: %30 = select <4 x i1> %25, <4 x i32> %15, <4 x i32> %20
+; CHECK-NEXT: %31 = select <4 x i1> %26, <4 x i32> %16, <4 x i32> %21
+; CHECK-NEXT: %32 = select <4 x i1> %27, <4 x i32> %17, <4 x i32> %22
+; CHECK-NEXT: %33 = select <4 x i1> %28, <4 x i32> %18, <4 x i32> %23
+; CHECK-NEXT: store <4 x i32> %30, <4 x i32>* %0, align 16
+; CHECK-NEXT: store <4 x i32> %31, <4 x i32>* %1, align 16
+; CHECK-NEXT: store <4 x i32> %32, <4 x i32>* %2, align 16
+; CHECK-NEXT: store <4 x i32> %33, <4 x i32>* %3, align 16
+; CHECK-NEXT: ret <4 x i32> %29
+; CHECK-NEXT: }
+
+define <20 x i32> @icmp_uge_on_20xi32(<20 x i32>, <20 x i32>, <20 x i32>, <20 x i32>) {
+entry:
+ %4 = icmp uge <20 x i32> %0, %1
+ %5 = select <20 x i1> %4, <20 x i32> %2, <20 x i32> %3
+ ret <20 x i32> %5
+}
+; CHECK-LABEL: define <4 x i32> @icmp_uge_on_20xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
+; CHECK: entry:
+; CHECK-NEXT: %24 = icmp uge <4 x i32> %4, %9
+; CHECK-NEXT: %25 = icmp uge <4 x i32> %5, %10
+; CHECK-NEXT: %26 = icmp uge <4 x i32> %6, %11
+; CHECK-NEXT: %27 = icmp uge <4 x i32> %7, %12
+; CHECK-NEXT: %28 = icmp uge <4 x i32> %8, %13
+; CHECK-NEXT: %29 = select <4 x i1> %24, <4 x i32> %14, <4 x i32> %19
+; CHECK-NEXT: %30 = select <4 x i1> %25, <4 x i32> %15, <4 x i32> %20
+; CHECK-NEXT: %31 = select <4 x i1> %26, <4 x i32> %16, <4 x i32> %21
+; CHECK-NEXT: %32 = select <4 x i1> %27, <4 x i32> %17, <4 x i32> %22
+; CHECK-NEXT: %33 = select <4 x i1> %28, <4 x i32> %18, <4 x i32> %23
+; CHECK-NEXT: store <4 x i32> %30, <4 x i32>* %0, align 16
+; CHECK-NEXT: store <4 x i32> %31, <4 x i32>* %1, align 16
+; CHECK-NEXT: store <4 x i32> %32, <4 x i32>* %2, align 16
+; CHECK-NEXT: store <4 x i32> %33, <4 x i32>* %3, align 16
+; CHECK-NEXT: ret <4 x i32> %29
+; CHECK-NEXT: }
+
+define <20 x i32> @icmp_slt_on_20xi32(<20 x i32>, <20 x i32>, <20 x i32>, <20 x i32>) {
+entry:
+ %4 = icmp slt <20 x i32> %0, %1
+ %5 = select <20 x i1> %4, <20 x i32> %2, <20 x i32> %3
+ ret <20 x i32> %5
+}
+; CHECK-LABEL: define <4 x i32> @icmp_slt_on_20xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
+; CHECK: entry:
+; CHECK-NEXT: %24 = icmp slt <4 x i32> %4, %9
+; CHECK-NEXT: %25 = icmp slt <4 x i32> %5, %10
+; CHECK-NEXT: %26 = icmp slt <4 x i32> %6, %11
+; CHECK-NEXT: %27 = icmp slt <4 x i32> %7, %12
+; CHECK-NEXT: %28 = icmp slt <4 x i32> %8, %13
+; CHECK-NEXT: %29 = select <4 x i1> %24, <4 x i32> %14, <4 x i32> %19
+; CHECK-NEXT: %30 = select <4 x i1> %25, <4 x i32> %15, <4 x i32> %20
+; CHECK-NEXT: %31 = select <4 x i1> %26, <4 x i32> %16, <4 x i32> %21
+; CHECK-NEXT: %32 = select <4 x i1> %27, <4 x i32> %17, <4 x i32> %22
+; CHECK-NEXT: %33 = select <4 x i1> %28, <4 x i32> %18, <4 x i32> %23
+; CHECK-NEXT: store <4 x i32> %30, <4 x i32>* %0, align 16
+; CHECK-NEXT: store <4 x i32> %31, <4 x i32>* %1, align 16
+; CHECK-NEXT: store <4 x i32> %32, <4 x i32>* %2, align 16
+; CHECK-NEXT: store <4 x i32> %33, <4 x i32>* %3, align 16
+; CHECK-NEXT: ret <4 x i32> %29
+; CHECK-NEXT: }
+
+define <20 x i32> @icmp_ult_on_20xi32(<20 x i32>, <20 x i32>, <20 x i32>, <20 x i32>) {
+entry:
+ %4 = icmp ult <20 x i32> %0, %1
+ %5 = select <20 x i1> %4, <20 x i32> %2, <20 x i32> %3
+ ret <20 x i32> %5
+}
+; CHECK-LABEL: define <4 x i32> @icmp_ult_on_20xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
+; CHECK: entry:
+; CHECK-NEXT: %24 = icmp ult <4 x i32> %4, %9
+; CHECK-NEXT: %25 = icmp ult <4 x i32> %5, %10
+; CHECK-NEXT: %26 = icmp ult <4 x i32> %6, %11
+; CHECK-NEXT: %27 = icmp ult <4 x i32> %7, %12
+; CHECK-NEXT: %28 = icmp ult <4 x i32> %8, %13
+; CHECK-NEXT: %29 = select <4 x i1> %24, <4 x i32> %14, <4 x i32> %19
+; CHECK-NEXT: %30 = select <4 x i1> %25, <4 x i32> %15, <4 x i32> %20
+; CHECK-NEXT: %31 = select <4 x i1> %26, <4 x i32> %16, <4 x i32> %21
+; CHECK-NEXT: %32 = select <4 x i1> %27, <4 x i32> %17, <4 x i32> %22
+; CHECK-NEXT: %33 = select <4 x i1> %28, <4 x i32> %18, <4 x i32> %23
+; CHECK-NEXT: store <4 x i32> %30, <4 x i32>* %0, align 16
+; CHECK-NEXT: store <4 x i32> %31, <4 x i32>* %1, align 16
+; CHECK-NEXT: store <4 x i32> %32, <4 x i32>* %2, align 16
+; CHECK-NEXT: store <4 x i32> %33, <4 x i32>* %3, align 16
+; CHECK-NEXT: ret <4 x i32> %29
+; CHECK-NEXT: }
+
+define <20 x i32> @icmp_sle_on_20xi32(<20 x i32>, <20 x i32>, <20 x i32>, <20 x i32>) {
+entry:
+ %4 = icmp sle <20 x i32> %0, %1
+ %5 = select <20 x i1> %4, <20 x i32> %2, <20 x i32> %3
+ ret <20 x i32> %5
+}
+; CHECK-LABEL: define <4 x i32> @icmp_sle_on_20xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
+; CHECK: entry:
+; CHECK-NEXT: %24 = icmp sle <4 x i32> %4, %9
+; CHECK-NEXT: %25 = icmp sle <4 x i32> %5, %10
+; CHECK-NEXT: %26 = icmp sle <4 x i32> %6, %11
+; CHECK-NEXT: %27 = icmp sle <4 x i32> %7, %12
+; CHECK-NEXT: %28 = icmp sle <4 x i32> %8, %13
+; CHECK-NEXT: %29 = select <4 x i1> %24, <4 x i32> %14, <4 x i32> %19
+; CHECK-NEXT: %30 = select <4 x i1> %25, <4 x i32> %15, <4 x i32> %20
+; CHECK-NEXT: %31 = select <4 x i1> %26, <4 x i32> %16, <4 x i32> %21
+; CHECK-NEXT: %32 = select <4 x i1> %27, <4 x i32> %17, <4 x i32> %22
+; CHECK-NEXT: %33 = select <4 x i1> %28, <4 x i32> %18, <4 x i32> %23
+; CHECK-NEXT: store <4 x i32> %30, <4 x i32>* %0, align 16
+; CHECK-NEXT: store <4 x i32> %31, <4 x i32>* %1, align 16
+; CHECK-NEXT: store <4 x i32> %32, <4 x i32>* %2, align 16
+; CHECK-NEXT: store <4 x i32> %33, <4 x i32>* %3, align 16
+; CHECK-NEXT: ret <4 x i32> %29
+; CHECK-NEXT: }
+
+define <20 x i32> @icmp_ule_on_20xi32(<20 x i32>, <20 x i32>, <20 x i32>, <20 x i32>) {
+entry:
+ %4 = icmp ule <20 x i32> %0, %1
+ %5 = select <20 x i1> %4, <20 x i32> %2, <20 x i32> %3
+ ret <20 x i32> %5
+}
+; CHECK-LABEL: define <4 x i32> @icmp_ule_on_20xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
+; CHECK: entry:
+; CHECK-NEXT: %24 = icmp ule <4 x i32> %4, %9
+; CHECK-NEXT: %25 = icmp ule <4 x i32> %5, %10
+; CHECK-NEXT: %26 = icmp ule <4 x i32> %6, %11
+; CHECK-NEXT: %27 = icmp ule <4 x i32> %7, %12
+; CHECK-NEXT: %28 = icmp ule <4 x i32> %8, %13
+; CHECK-NEXT: %29 = select <4 x i1> %24, <4 x i32> %14, <4 x i32> %19
+; CHECK-NEXT: %30 = select <4 x i1> %25, <4 x i32> %15, <4 x i32> %20
+; CHECK-NEXT: %31 = select <4 x i1> %26, <4 x i32> %16, <4 x i32> %21
+; CHECK-NEXT: %32 = select <4 x i1> %27, <4 x i32> %17, <4 x i32> %22
+; CHECK-NEXT: %33 = select <4 x i1> %28, <4 x i32> %18, <4 x i32> %23
+; CHECK-NEXT: store <4 x i32> %30, <4 x i32>* %0, align 16
+; CHECK-NEXT: store <4 x i32> %31, <4 x i32>* %1, align 16
+; CHECK-NEXT: store <4 x i32> %32, <4 x i32>* %2, align 16
+; CHECK-NEXT: store <4 x i32> %33, <4 x i32>* %3, align 16
+; CHECK-NEXT: ret <4 x i32> %29
+; CHECK-NEXT: }
+
+define <20 x i64> @icmp_eq_on_20xi64(<20 x i64>, <20 x i64>, <20 x i64>, <20 x i64>) {
+entry:
+ %4 = icmp eq <20 x i64> %0, %1
+ %5 = select <20 x i1> %4, <20 x i64> %2, <20 x i64> %3
+ ret <20 x i64> %5
+}
+; CHECK-LABEL: define <2 x i64> @icmp_eq_on_20xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
+; CHECK: entry:
+; CHECK-NEXT: %49 = icmp eq <2 x i64> %9, %19
+; CHECK-NEXT: %50 = icmp eq <2 x i64> %10, %20
+; CHECK-NEXT: %51 = icmp eq <2 x i64> %11, %21
+; CHECK-NEXT: %52 = icmp eq <2 x i64> %12, %22
+; CHECK-NEXT: %53 = icmp eq <2 x i64> %13, %23
+; CHECK-NEXT: %54 = icmp eq <2 x i64> %14, %24
+; CHECK-NEXT: %55 = icmp eq <2 x i64> %15, %25
+; CHECK-NEXT: %56 = icmp eq <2 x i64> %16, %26
+; CHECK-NEXT: %57 = icmp eq <2 x i64> %17, %27
+; CHECK-NEXT: %58 = icmp eq <2 x i64> %18, %28
+; CHECK-NEXT: %59 = select <2 x i1> %49, <2 x i64> %29, <2 x i64> %39
+; CHECK-NEXT: %60 = select <2 x i1> %50, <2 x i64> %30, <2 x i64> %40
+; CHECK-NEXT: %61 = select <2 x i1> %51, <2 x i64> %31, <2 x i64> %41
+; CHECK-NEXT: %62 = select <2 x i1> %52, <2 x i64> %32, <2 x i64> %42
+; CHECK-NEXT: %63 = select <2 x i1> %53, <2 x i64> %33, <2 x i64> %43
+; CHECK-NEXT: %64 = select <2 x i1> %54, <2 x i64> %34, <2 x i64> %44
+; CHECK-NEXT: %65 = select <2 x i1> %55, <2 x i64> %35, <2 x i64> %45
+; CHECK-NEXT: %66 = select <2 x i1> %56, <2 x i64> %36, <2 x i64> %46
+; CHECK-NEXT: %67 = select <2 x i1> %57, <2 x i64> %37, <2 x i64> %47
+; CHECK-NEXT: %68 = select <2 x i1> %58, <2 x i64> %38, <2 x i64> %48
+; CHECK-NEXT: store <2 x i64> %60, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %61, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %62, <2 x i64>* %2, align 16
+; CHECK-NEXT: store <2 x i64> %63, <2 x i64>* %3, align 16
+; CHECK-NEXT: store <2 x i64> %64, <2 x i64>* %4, align 16
+; CHECK-NEXT: store <2 x i64> %65, <2 x i64>* %5, align 16
+; CHECK-NEXT: store <2 x i64> %66, <2 x i64>* %6, align 16
+; CHECK-NEXT: store <2 x i64> %67, <2 x i64>* %7, align 16
+; CHECK-NEXT: store <2 x i64> %68, <2 x i64>* %8, align 16
+; CHECK-NEXT: ret <2 x i64> %59
+; CHECK-NEXT: }
+
+define <20 x i64> @icmp_ne_on_20xi64(<20 x i64>, <20 x i64>, <20 x i64>, <20 x i64>) {
+entry:
+ %4 = icmp ne <20 x i64> %0, %1
+ %5 = select <20 x i1> %4, <20 x i64> %2, <20 x i64> %3
+ ret <20 x i64> %5
+}
+; CHECK-LABEL: define <2 x i64> @icmp_ne_on_20xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
+; CHECK: entry:
+; CHECK-NEXT: %49 = icmp ne <2 x i64> %9, %19
+; CHECK-NEXT: %50 = icmp ne <2 x i64> %10, %20
+; CHECK-NEXT: %51 = icmp ne <2 x i64> %11, %21
+; CHECK-NEXT: %52 = icmp ne <2 x i64> %12, %22
+; CHECK-NEXT: %53 = icmp ne <2 x i64> %13, %23
+; CHECK-NEXT: %54 = icmp ne <2 x i64> %14, %24
+; CHECK-NEXT: %55 = icmp ne <2 x i64> %15, %25
+; CHECK-NEXT: %56 = icmp ne <2 x i64> %16, %26
+; CHECK-NEXT: %57 = icmp ne <2 x i64> %17, %27
+; CHECK-NEXT: %58 = icmp ne <2 x i64> %18, %28
+; CHECK-NEXT: %59 = select <2 x i1> %49, <2 x i64> %29, <2 x i64> %39
+; CHECK-NEXT: %60 = select <2 x i1> %50, <2 x i64> %30, <2 x i64> %40
+; CHECK-NEXT: %61 = select <2 x i1> %51, <2 x i64> %31, <2 x i64> %41
+; CHECK-NEXT: %62 = select <2 x i1> %52, <2 x i64> %32, <2 x i64> %42
+; CHECK-NEXT: %63 = select <2 x i1> %53, <2 x i64> %33, <2 x i64> %43
+; CHECK-NEXT: %64 = select <2 x i1> %54, <2 x i64> %34, <2 x i64> %44
+; CHECK-NEXT: %65 = select <2 x i1> %55, <2 x i64> %35, <2 x i64> %45
+; CHECK-NEXT: %66 = select <2 x i1> %56, <2 x i64> %36, <2 x i64> %46
+; CHECK-NEXT: %67 = select <2 x i1> %57, <2 x i64> %37, <2 x i64> %47
+; CHECK-NEXT: %68 = select <2 x i1> %58, <2 x i64> %38, <2 x i64> %48
+; CHECK-NEXT: store <2 x i64> %60, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %61, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %62, <2 x i64>* %2, align 16
+; CHECK-NEXT: store <2 x i64> %63, <2 x i64>* %3, align 16
+; CHECK-NEXT: store <2 x i64> %64, <2 x i64>* %4, align 16
+; CHECK-NEXT: store <2 x i64> %65, <2 x i64>* %5, align 16
+; CHECK-NEXT: store <2 x i64> %66, <2 x i64>* %6, align 16
+; CHECK-NEXT: store <2 x i64> %67, <2 x i64>* %7, align 16
+; CHECK-NEXT: store <2 x i64> %68, <2 x i64>* %8, align 16
+; CHECK-NEXT: ret <2 x i64> %59
+; CHECK-NEXT: }
+
+define <20 x i64> @icmp_sgt_on_20xi64(<20 x i64>, <20 x i64>, <20 x i64>, <20 x i64>) {
+entry:
+ %4 = icmp sgt <20 x i64> %0, %1
+ %5 = select <20 x i1> %4, <20 x i64> %2, <20 x i64> %3
+ ret <20 x i64> %5
+}
+; CHECK-LABEL: define <2 x i64> @icmp_sgt_on_20xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
+; CHECK: entry:
+; CHECK-NEXT: %49 = icmp sgt <2 x i64> %9, %19
+; CHECK-NEXT: %50 = icmp sgt <2 x i64> %10, %20
+; CHECK-NEXT: %51 = icmp sgt <2 x i64> %11, %21
+; CHECK-NEXT: %52 = icmp sgt <2 x i64> %12, %22
+; CHECK-NEXT: %53 = icmp sgt <2 x i64> %13, %23
+; CHECK-NEXT: %54 = icmp sgt <2 x i64> %14, %24
+; CHECK-NEXT: %55 = icmp sgt <2 x i64> %15, %25
+; CHECK-NEXT: %56 = icmp sgt <2 x i64> %16, %26
+; CHECK-NEXT: %57 = icmp sgt <2 x i64> %17, %27
+; CHECK-NEXT: %58 = icmp sgt <2 x i64> %18, %28
+; CHECK-NEXT: %59 = select <2 x i1> %49, <2 x i64> %29, <2 x i64> %39
+; CHECK-NEXT: %60 = select <2 x i1> %50, <2 x i64> %30, <2 x i64> %40
+; CHECK-NEXT: %61 = select <2 x i1> %51, <2 x i64> %31, <2 x i64> %41
+; CHECK-NEXT: %62 = select <2 x i1> %52, <2 x i64> %32, <2 x i64> %42
+; CHECK-NEXT: %63 = select <2 x i1> %53, <2 x i64> %33, <2 x i64> %43
+; CHECK-NEXT: %64 = select <2 x i1> %54, <2 x i64> %34, <2 x i64> %44
+; CHECK-NEXT: %65 = select <2 x i1> %55, <2 x i64> %35, <2 x i64> %45
+; CHECK-NEXT: %66 = select <2 x i1> %56, <2 x i64> %36, <2 x i64> %46
+; CHECK-NEXT: %67 = select <2 x i1> %57, <2 x i64> %37, <2 x i64> %47
+; CHECK-NEXT: %68 = select <2 x i1> %58, <2 x i64> %38, <2 x i64> %48
+; CHECK-NEXT: store <2 x i64> %60, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %61, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %62, <2 x i64>* %2, align 16
+; CHECK-NEXT: store <2 x i64> %63, <2 x i64>* %3, align 16
+; CHECK-NEXT: store <2 x i64> %64, <2 x i64>* %4, align 16
+; CHECK-NEXT: store <2 x i64> %65, <2 x i64>* %5, align 16
+; CHECK-NEXT: store <2 x i64> %66, <2 x i64>* %6, align 16
+; CHECK-NEXT: store <2 x i64> %67, <2 x i64>* %7, align 16
+; CHECK-NEXT: store <2 x i64> %68, <2 x i64>* %8, align 16
+; CHECK-NEXT: ret <2 x i64> %59
+; CHECK-NEXT: }
+
+define <20 x i64> @icmp_ugt_on_20xi64(<20 x i64>, <20 x i64>, <20 x i64>, <20 x i64>) {
+entry:
+ %4 = icmp ugt <20 x i64> %0, %1
+ %5 = select <20 x i1> %4, <20 x i64> %2, <20 x i64> %3
+ ret <20 x i64> %5
+}
+; CHECK-LABEL: define <2 x i64> @icmp_ugt_on_20xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
+; CHECK: entry:
+; CHECK-NEXT: %49 = icmp ugt <2 x i64> %9, %19
+; CHECK-NEXT: %50 = icmp ugt <2 x i64> %10, %20
+; CHECK-NEXT: %51 = icmp ugt <2 x i64> %11, %21
+; CHECK-NEXT: %52 = icmp ugt <2 x i64> %12, %22
+; CHECK-NEXT: %53 = icmp ugt <2 x i64> %13, %23
+; CHECK-NEXT: %54 = icmp ugt <2 x i64> %14, %24
+; CHECK-NEXT: %55 = icmp ugt <2 x i64> %15, %25
+; CHECK-NEXT: %56 = icmp ugt <2 x i64> %16, %26
+; CHECK-NEXT: %57 = icmp ugt <2 x i64> %17, %27
+; CHECK-NEXT: %58 = icmp ugt <2 x i64> %18, %28
+; CHECK-NEXT: %59 = select <2 x i1> %49, <2 x i64> %29, <2 x i64> %39
+; CHECK-NEXT: %60 = select <2 x i1> %50, <2 x i64> %30, <2 x i64> %40
+; CHECK-NEXT: %61 = select <2 x i1> %51, <2 x i64> %31, <2 x i64> %41
+; CHECK-NEXT: %62 = select <2 x i1> %52, <2 x i64> %32, <2 x i64> %42
+; CHECK-NEXT: %63 = select <2 x i1> %53, <2 x i64> %33, <2 x i64> %43
+; CHECK-NEXT: %64 = select <2 x i1> %54, <2 x i64> %34, <2 x i64> %44
+; CHECK-NEXT: %65 = select <2 x i1> %55, <2 x i64> %35, <2 x i64> %45
+; CHECK-NEXT: %66 = select <2 x i1> %56, <2 x i64> %36, <2 x i64> %46
+; CHECK-NEXT: %67 = select <2 x i1> %57, <2 x i64> %37, <2 x i64> %47
+; CHECK-NEXT: %68 = select <2 x i1> %58, <2 x i64> %38, <2 x i64> %48
+; CHECK-NEXT: store <2 x i64> %60, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %61, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %62, <2 x i64>* %2, align 16
+; CHECK-NEXT: store <2 x i64> %63, <2 x i64>* %3, align 16
+; CHECK-NEXT: store <2 x i64> %64, <2 x i64>* %4, align 16
+; CHECK-NEXT: store <2 x i64> %65, <2 x i64>* %5, align 16
+; CHECK-NEXT: store <2 x i64> %66, <2 x i64>* %6, align 16
+; CHECK-NEXT: store <2 x i64> %67, <2 x i64>* %7, align 16
+; CHECK-NEXT: store <2 x i64> %68, <2 x i64>* %8, align 16
+; CHECK-NEXT: ret <2 x i64> %59
+; CHECK-NEXT: }
+
+define <20 x i64> @icmp_sge_on_20xi64(<20 x i64>, <20 x i64>, <20 x i64>, <20 x i64>) {
+entry:
+ %4 = icmp sge <20 x i64> %0, %1
+ %5 = select <20 x i1> %4, <20 x i64> %2, <20 x i64> %3
+ ret <20 x i64> %5
+}
+; CHECK-LABEL: define <2 x i64> @icmp_sge_on_20xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
+; CHECK: entry:
+; CHECK-NEXT: %49 = icmp sge <2 x i64> %9, %19
+; CHECK-NEXT: %50 = icmp sge <2 x i64> %10, %20
+; CHECK-NEXT: %51 = icmp sge <2 x i64> %11, %21
+; CHECK-NEXT: %52 = icmp sge <2 x i64> %12, %22
+; CHECK-NEXT: %53 = icmp sge <2 x i64> %13, %23
+; CHECK-NEXT: %54 = icmp sge <2 x i64> %14, %24
+; CHECK-NEXT: %55 = icmp sge <2 x i64> %15, %25
+; CHECK-NEXT: %56 = icmp sge <2 x i64> %16, %26
+; CHECK-NEXT: %57 = icmp sge <2 x i64> %17, %27
+; CHECK-NEXT: %58 = icmp sge <2 x i64> %18, %28
+; CHECK-NEXT: %59 = select <2 x i1> %49, <2 x i64> %29, <2 x i64> %39
+; CHECK-NEXT: %60 = select <2 x i1> %50, <2 x i64> %30, <2 x i64> %40
+; CHECK-NEXT: %61 = select <2 x i1> %51, <2 x i64> %31, <2 x i64> %41
+; CHECK-NEXT: %62 = select <2 x i1> %52, <2 x i64> %32, <2 x i64> %42
+; CHECK-NEXT: %63 = select <2 x i1> %53, <2 x i64> %33, <2 x i64> %43
+; CHECK-NEXT: %64 = select <2 x i1> %54, <2 x i64> %34, <2 x i64> %44
+; CHECK-NEXT: %65 = select <2 x i1> %55, <2 x i64> %35, <2 x i64> %45
+; CHECK-NEXT: %66 = select <2 x i1> %56, <2 x i64> %36, <2 x i64> %46
+; CHECK-NEXT: %67 = select <2 x i1> %57, <2 x i64> %37, <2 x i64> %47
+; CHECK-NEXT: %68 = select <2 x i1> %58, <2 x i64> %38, <2 x i64> %48
+; CHECK-NEXT: store <2 x i64> %60, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %61, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %62, <2 x i64>* %2, align 16
+; CHECK-NEXT: store <2 x i64> %63, <2 x i64>* %3, align 16
+; CHECK-NEXT: store <2 x i64> %64, <2 x i64>* %4, align 16
+; CHECK-NEXT: store <2 x i64> %65, <2 x i64>* %5, align 16
+; CHECK-NEXT: store <2 x i64> %66, <2 x i64>* %6, align 16
+; CHECK-NEXT: store <2 x i64> %67, <2 x i64>* %7, align 16
+; CHECK-NEXT: store <2 x i64> %68, <2 x i64>* %8, align 16
+; CHECK-NEXT: ret <2 x i64> %59
+; CHECK-NEXT: }
+
+define <20 x i64> @icmp_uge_on_20xi64(<20 x i64>, <20 x i64>, <20 x i64>, <20 x i64>) {
+entry:
+ %4 = icmp uge <20 x i64> %0, %1
+ %5 = select <20 x i1> %4, <20 x i64> %2, <20 x i64> %3
+ ret <20 x i64> %5
+}
+; CHECK-LABEL: define <2 x i64> @icmp_uge_on_20xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
+; CHECK: entry:
+; CHECK-NEXT: %49 = icmp uge <2 x i64> %9, %19
+; CHECK-NEXT: %50 = icmp uge <2 x i64> %10, %20
+; CHECK-NEXT: %51 = icmp uge <2 x i64> %11, %21
+; CHECK-NEXT: %52 = icmp uge <2 x i64> %12, %22
+; CHECK-NEXT: %53 = icmp uge <2 x i64> %13, %23
+; CHECK-NEXT: %54 = icmp uge <2 x i64> %14, %24
+; CHECK-NEXT: %55 = icmp uge <2 x i64> %15, %25
+; CHECK-NEXT: %56 = icmp uge <2 x i64> %16, %26
+; CHECK-NEXT: %57 = icmp uge <2 x i64> %17, %27
+; CHECK-NEXT: %58 = icmp uge <2 x i64> %18, %28
+; CHECK-NEXT: %59 = select <2 x i1> %49, <2 x i64> %29, <2 x i64> %39
+; CHECK-NEXT: %60 = select <2 x i1> %50, <2 x i64> %30, <2 x i64> %40
+; CHECK-NEXT: %61 = select <2 x i1> %51, <2 x i64> %31, <2 x i64> %41
+; CHECK-NEXT: %62 = select <2 x i1> %52, <2 x i64> %32, <2 x i64> %42
+; CHECK-NEXT: %63 = select <2 x i1> %53, <2 x i64> %33, <2 x i64> %43
+; CHECK-NEXT: %64 = select <2 x i1> %54, <2 x i64> %34, <2 x i64> %44
+; CHECK-NEXT: %65 = select <2 x i1> %55, <2 x i64> %35, <2 x i64> %45
+; CHECK-NEXT: %66 = select <2 x i1> %56, <2 x i64> %36, <2 x i64> %46
+; CHECK-NEXT: %67 = select <2 x i1> %57, <2 x i64> %37, <2 x i64> %47
+; CHECK-NEXT: %68 = select <2 x i1> %58, <2 x i64> %38, <2 x i64> %48
+; CHECK-NEXT: store <2 x i64> %60, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %61, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %62, <2 x i64>* %2, align 16
+; CHECK-NEXT: store <2 x i64> %63, <2 x i64>* %3, align 16
+; CHECK-NEXT: store <2 x i64> %64, <2 x i64>* %4, align 16
+; CHECK-NEXT: store <2 x i64> %65, <2 x i64>* %5, align 16
+; CHECK-NEXT: store <2 x i64> %66, <2 x i64>* %6, align 16
+; CHECK-NEXT: store <2 x i64> %67, <2 x i64>* %7, align 16
+; CHECK-NEXT: store <2 x i64> %68, <2 x i64>* %8, align 16
+; CHECK-NEXT: ret <2 x i64> %59
+; CHECK-NEXT: }
+
+define <20 x i64> @icmp_slt_on_20xi64(<20 x i64>, <20 x i64>, <20 x i64>, <20 x i64>) {
+entry:
+ %4 = icmp slt <20 x i64> %0, %1
+ %5 = select <20 x i1> %4, <20 x i64> %2, <20 x i64> %3
+ ret <20 x i64> %5
+}
+; CHECK-LABEL: define <2 x i64> @icmp_slt_on_20xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
+; CHECK: entry:
+; CHECK-NEXT: %49 = icmp slt <2 x i64> %9, %19
+; CHECK-NEXT: %50 = icmp slt <2 x i64> %10, %20
+; CHECK-NEXT: %51 = icmp slt <2 x i64> %11, %21
+; CHECK-NEXT: %52 = icmp slt <2 x i64> %12, %22
+; CHECK-NEXT: %53 = icmp slt <2 x i64> %13, %23
+; CHECK-NEXT: %54 = icmp slt <2 x i64> %14, %24
+; CHECK-NEXT: %55 = icmp slt <2 x i64> %15, %25
+; CHECK-NEXT: %56 = icmp slt <2 x i64> %16, %26
+; CHECK-NEXT: %57 = icmp slt <2 x i64> %17, %27
+; CHECK-NEXT: %58 = icmp slt <2 x i64> %18, %28
+; CHECK-NEXT: %59 = select <2 x i1> %49, <2 x i64> %29, <2 x i64> %39
+; CHECK-NEXT: %60 = select <2 x i1> %50, <2 x i64> %30, <2 x i64> %40
+; CHECK-NEXT: %61 = select <2 x i1> %51, <2 x i64> %31, <2 x i64> %41
+; CHECK-NEXT: %62 = select <2 x i1> %52, <2 x i64> %32, <2 x i64> %42
+; CHECK-NEXT: %63 = select <2 x i1> %53, <2 x i64> %33, <2 x i64> %43
+; CHECK-NEXT: %64 = select <2 x i1> %54, <2 x i64> %34, <2 x i64> %44
+; CHECK-NEXT: %65 = select <2 x i1> %55, <2 x i64> %35, <2 x i64> %45
+; CHECK-NEXT: %66 = select <2 x i1> %56, <2 x i64> %36, <2 x i64> %46
+; CHECK-NEXT: %67 = select <2 x i1> %57, <2 x i64> %37, <2 x i64> %47
+; CHECK-NEXT: %68 = select <2 x i1> %58, <2 x i64> %38, <2 x i64> %48
+; CHECK-NEXT: store <2 x i64> %60, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %61, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %62, <2 x i64>* %2, align 16
+; CHECK-NEXT: store <2 x i64> %63, <2 x i64>* %3, align 16
+; CHECK-NEXT: store <2 x i64> %64, <2 x i64>* %4, align 16
+; CHECK-NEXT: store <2 x i64> %65, <2 x i64>* %5, align 16
+; CHECK-NEXT: store <2 x i64> %66, <2 x i64>* %6, align 16
+; CHECK-NEXT: store <2 x i64> %67, <2 x i64>* %7, align 16
+; CHECK-NEXT: store <2 x i64> %68, <2 x i64>* %8, align 16
+; CHECK-NEXT: ret <2 x i64> %59
+; CHECK-NEXT: }
+
+define <20 x i64> @icmp_ult_on_20xi64(<20 x i64>, <20 x i64>, <20 x i64>, <20 x i64>) {
+entry:
+ %4 = icmp ult <20 x i64> %0, %1
+ %5 = select <20 x i1> %4, <20 x i64> %2, <20 x i64> %3
+ ret <20 x i64> %5
+}
+; CHECK-LABEL: define <2 x i64> @icmp_ult_on_20xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
+; CHECK: entry:
+; CHECK-NEXT: %49 = icmp ult <2 x i64> %9, %19
+; CHECK-NEXT: %50 = icmp ult <2 x i64> %10, %20
+; CHECK-NEXT: %51 = icmp ult <2 x i64> %11, %21
+; CHECK-NEXT: %52 = icmp ult <2 x i64> %12, %22
+; CHECK-NEXT: %53 = icmp ult <2 x i64> %13, %23
+; CHECK-NEXT: %54 = icmp ult <2 x i64> %14, %24
+; CHECK-NEXT: %55 = icmp ult <2 x i64> %15, %25
+; CHECK-NEXT: %56 = icmp ult <2 x i64> %16, %26
+; CHECK-NEXT: %57 = icmp ult <2 x i64> %17, %27
+; CHECK-NEXT: %58 = icmp ult <2 x i64> %18, %28
+; CHECK-NEXT: %59 = select <2 x i1> %49, <2 x i64> %29, <2 x i64> %39
+; CHECK-NEXT: %60 = select <2 x i1> %50, <2 x i64> %30, <2 x i64> %40
+; CHECK-NEXT: %61 = select <2 x i1> %51, <2 x i64> %31, <2 x i64> %41
+; CHECK-NEXT: %62 = select <2 x i1> %52, <2 x i64> %32, <2 x i64> %42
+; CHECK-NEXT: %63 = select <2 x i1> %53, <2 x i64> %33, <2 x i64> %43
+; CHECK-NEXT: %64 = select <2 x i1> %54, <2 x i64> %34, <2 x i64> %44
+; CHECK-NEXT: %65 = select <2 x i1> %55, <2 x i64> %35, <2 x i64> %45
+; CHECK-NEXT: %66 = select <2 x i1> %56, <2 x i64> %36, <2 x i64> %46
+; CHECK-NEXT: %67 = select <2 x i1> %57, <2 x i64> %37, <2 x i64> %47
+; CHECK-NEXT: %68 = select <2 x i1> %58, <2 x i64> %38, <2 x i64> %48
+; CHECK-NEXT: store <2 x i64> %60, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %61, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %62, <2 x i64>* %2, align 16
+; CHECK-NEXT: store <2 x i64> %63, <2 x i64>* %3, align 16
+; CHECK-NEXT: store <2 x i64> %64, <2 x i64>* %4, align 16
+; CHECK-NEXT: store <2 x i64> %65, <2 x i64>* %5, align 16
+; CHECK-NEXT: store <2 x i64> %66, <2 x i64>* %6, align 16
+; CHECK-NEXT: store <2 x i64> %67, <2 x i64>* %7, align 16
+; CHECK-NEXT: store <2 x i64> %68, <2 x i64>* %8, align 16
+; CHECK-NEXT: ret <2 x i64> %59
+; CHECK-NEXT: }
+
+define <20 x i64> @icmp_sle_on_20xi64(<20 x i64>, <20 x i64>, <20 x i64>, <20 x i64>) {
+entry:
+ %4 = icmp sle <20 x i64> %0, %1
+ %5 = select <20 x i1> %4, <20 x i64> %2, <20 x i64> %3
+ ret <20 x i64> %5
+}
+; CHECK-LABEL: define <2 x i64> @icmp_sle_on_20xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
+; CHECK: entry:
+; CHECK-NEXT: %49 = icmp sle <2 x i64> %9, %19
+; CHECK-NEXT: %50 = icmp sle <2 x i64> %10, %20
+; CHECK-NEXT: %51 = icmp sle <2 x i64> %11, %21
+; CHECK-NEXT: %52 = icmp sle <2 x i64> %12, %22
+; CHECK-NEXT: %53 = icmp sle <2 x i64> %13, %23
+; CHECK-NEXT: %54 = icmp sle <2 x i64> %14, %24
+; CHECK-NEXT: %55 = icmp sle <2 x i64> %15, %25
+; CHECK-NEXT: %56 = icmp sle <2 x i64> %16, %26
+; CHECK-NEXT: %57 = icmp sle <2 x i64> %17, %27
+; CHECK-NEXT: %58 = icmp sle <2 x i64> %18, %28
+; CHECK-NEXT: %59 = select <2 x i1> %49, <2 x i64> %29, <2 x i64> %39
+; CHECK-NEXT: %60 = select <2 x i1> %50, <2 x i64> %30, <2 x i64> %40
+; CHECK-NEXT: %61 = select <2 x i1> %51, <2 x i64> %31, <2 x i64> %41
+; CHECK-NEXT: %62 = select <2 x i1> %52, <2 x i64> %32, <2 x i64> %42
+; CHECK-NEXT: %63 = select <2 x i1> %53, <2 x i64> %33, <2 x i64> %43
+; CHECK-NEXT: %64 = select <2 x i1> %54, <2 x i64> %34, <2 x i64> %44
+; CHECK-NEXT: %65 = select <2 x i1> %55, <2 x i64> %35, <2 x i64> %45
+; CHECK-NEXT: %66 = select <2 x i1> %56, <2 x i64> %36, <2 x i64> %46
+; CHECK-NEXT: %67 = select <2 x i1> %57, <2 x i64> %37, <2 x i64> %47
+; CHECK-NEXT: %68 = select <2 x i1> %58, <2 x i64> %38, <2 x i64> %48
+; CHECK-NEXT: store <2 x i64> %60, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %61, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %62, <2 x i64>* %2, align 16
+; CHECK-NEXT: store <2 x i64> %63, <2 x i64>* %3, align 16
+; CHECK-NEXT: store <2 x i64> %64, <2 x i64>* %4, align 16
+; CHECK-NEXT: store <2 x i64> %65, <2 x i64>* %5, align 16
+; CHECK-NEXT: store <2 x i64> %66, <2 x i64>* %6, align 16
+; CHECK-NEXT: store <2 x i64> %67, <2 x i64>* %7, align 16
+; CHECK-NEXT: store <2 x i64> %68, <2 x i64>* %8, align 16
+; CHECK-NEXT: ret <2 x i64> %59
+; CHECK-NEXT: }
+
+define <20 x i64> @icmp_ule_on_20xi64(<20 x i64>, <20 x i64>, <20 x i64>, <20 x i64>) {
+entry:
+ %4 = icmp ule <20 x i64> %0, %1
+ %5 = select <20 x i1> %4, <20 x i64> %2, <20 x i64> %3
+ ret <20 x i64> %5
+}
+; CHECK-LABEL: define <2 x i64> @icmp_ule_on_20xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
+; CHECK: entry:
+; CHECK-NEXT: %49 = icmp ule <2 x i64> %9, %19
+; CHECK-NEXT: %50 = icmp ule <2 x i64> %10, %20
+; CHECK-NEXT: %51 = icmp ule <2 x i64> %11, %21
+; CHECK-NEXT: %52 = icmp ule <2 x i64> %12, %22
+; CHECK-NEXT: %53 = icmp ule <2 x i64> %13, %23
+; CHECK-NEXT: %54 = icmp ule <2 x i64> %14, %24
+; CHECK-NEXT: %55 = icmp ule <2 x i64> %15, %25
+; CHECK-NEXT: %56 = icmp ule <2 x i64> %16, %26
+; CHECK-NEXT: %57 = icmp ule <2 x i64> %17, %27
+; CHECK-NEXT: %58 = icmp ule <2 x i64> %18, %28
+; CHECK-NEXT: %59 = select <2 x i1> %49, <2 x i64> %29, <2 x i64> %39
+; CHECK-NEXT: %60 = select <2 x i1> %50, <2 x i64> %30, <2 x i64> %40
+; CHECK-NEXT: %61 = select <2 x i1> %51, <2 x i64> %31, <2 x i64> %41
+; CHECK-NEXT: %62 = select <2 x i1> %52, <2 x i64> %32, <2 x i64> %42
+; CHECK-NEXT: %63 = select <2 x i1> %53, <2 x i64> %33, <2 x i64> %43
+; CHECK-NEXT: %64 = select <2 x i1> %54, <2 x i64> %34, <2 x i64> %44
+; CHECK-NEXT: %65 = select <2 x i1> %55, <2 x i64> %35, <2 x i64> %45
+; CHECK-NEXT: %66 = select <2 x i1> %56, <2 x i64> %36, <2 x i64> %46
+; CHECK-NEXT: %67 = select <2 x i1> %57, <2 x i64> %37, <2 x i64> %47
+; CHECK-NEXT: %68 = select <2 x i1> %58, <2 x i64> %38, <2 x i64> %48
+; CHECK-NEXT: store <2 x i64> %60, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %61, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %62, <2 x i64>* %2, align 16
+; CHECK-NEXT: store <2 x i64> %63, <2 x i64>* %3, align 16
+; CHECK-NEXT: store <2 x i64> %64, <2 x i64>* %4, align 16
+; CHECK-NEXT: store <2 x i64> %65, <2 x i64>* %5, align 16
+; CHECK-NEXT: store <2 x i64> %66, <2 x i64>* %6, align 16
+; CHECK-NEXT: store <2 x i64> %67, <2 x i64>* %7, align 16
+; CHECK-NEXT: store <2 x i64> %68, <2 x i64>* %8, align 16
+; CHECK-NEXT: ret <2 x i64> %59
+; CHECK-NEXT: }
+
+define <20 x i8*> @icmp_eq_on_20xi8ptr(<20 x i8*>, <20 x i8*>, <20 x i8*>, <20 x i8*>) {
+entry:
+ %4 = icmp eq <20 x i8*> %0, %1
+ %5 = select <20 x i1> %4, <20 x i8*> %2, <20 x i8*> %3
+ ret <20 x i8*> %5
+}
+; CHECK-LABEL: define <4 x i8*> @icmp_eq_on_20xi8ptr(<4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
+; CHECK: entry:
+; CHECK-NEXT: %24 = icmp eq <4 x i8*> %4, %9
+; CHECK-NEXT: %25 = icmp eq <4 x i8*> %5, %10
+; CHECK-NEXT: %26 = icmp eq <4 x i8*> %6, %11
+; CHECK-NEXT: %27 = icmp eq <4 x i8*> %7, %12
+; CHECK-NEXT: %28 = icmp eq <4 x i8*> %8, %13
+; CHECK-NEXT: %29 = select <4 x i1> %24, <4 x i8*> %14, <4 x i8*> %19
+; CHECK-NEXT: %30 = select <4 x i1> %25, <4 x i8*> %15, <4 x i8*> %20
+; CHECK-NEXT: %31 = select <4 x i1> %26, <4 x i8*> %16, <4 x i8*> %21
+; CHECK-NEXT: %32 = select <4 x i1> %27, <4 x i8*> %17, <4 x i8*> %22
+; CHECK-NEXT: %33 = select <4 x i1> %28, <4 x i8*> %18, <4 x i8*> %23
+; CHECK-NEXT: store <4 x i8*> %30, <4 x i8*>* %0, align 16
+; CHECK-NEXT: store <4 x i8*> %31, <4 x i8*>* %1, align 16
+; CHECK-NEXT: store <4 x i8*> %32, <4 x i8*>* %2, align 16
+; CHECK-NEXT: store <4 x i8*> %33, <4 x i8*>* %3, align 16
+; CHECK-NEXT: ret <4 x i8*> %29
+; CHECK-NEXT: }
+
+define <20 x i8*> @icmp_ne_on_20xi8ptr(<20 x i8*>, <20 x i8*>, <20 x i8*>, <20 x i8*>) {
+entry:
+ %4 = icmp ne <20 x i8*> %0, %1
+ %5 = select <20 x i1> %4, <20 x i8*> %2, <20 x i8*> %3
+ ret <20 x i8*> %5
+}
+; CHECK-LABEL: define <4 x i8*> @icmp_ne_on_20xi8ptr(<4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
+; CHECK: entry:
+; CHECK-NEXT: %24 = icmp ne <4 x i8*> %4, %9
+; CHECK-NEXT: %25 = icmp ne <4 x i8*> %5, %10
+; CHECK-NEXT: %26 = icmp ne <4 x i8*> %6, %11
+; CHECK-NEXT: %27 = icmp ne <4 x i8*> %7, %12
+; CHECK-NEXT: %28 = icmp ne <4 x i8*> %8, %13
+; CHECK-NEXT: %29 = select <4 x i1> %24, <4 x i8*> %14, <4 x i8*> %19
+; CHECK-NEXT: %30 = select <4 x i1> %25, <4 x i8*> %15, <4 x i8*> %20
+; CHECK-NEXT: %31 = select <4 x i1> %26, <4 x i8*> %16, <4 x i8*> %21
+; CHECK-NEXT: %32 = select <4 x i1> %27, <4 x i8*> %17, <4 x i8*> %22
+; CHECK-NEXT: %33 = select <4 x i1> %28, <4 x i8*> %18, <4 x i8*> %23
+; CHECK-NEXT: store <4 x i8*> %30, <4 x i8*>* %0, align 16
+; CHECK-NEXT: store <4 x i8*> %31, <4 x i8*>* %1, align 16
+; CHECK-NEXT: store <4 x i8*> %32, <4 x i8*>* %2, align 16
+; CHECK-NEXT: store <4 x i8*> %33, <4 x i8*>* %3, align 16
+; CHECK-NEXT: ret <4 x i8*> %29
+; CHECK-NEXT: }
+
+define <20 x i8*> @icmp_sgt_on_20xi8ptr(<20 x i8*>, <20 x i8*>, <20 x i8*>, <20 x i8*>) {
+entry:
+ %4 = icmp sgt <20 x i8*> %0, %1
+ %5 = select <20 x i1> %4, <20 x i8*> %2, <20 x i8*> %3
+ ret <20 x i8*> %5
+}
+; CHECK-LABEL: define <4 x i8*> @icmp_sgt_on_20xi8ptr(<4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
+; CHECK: entry:
+; CHECK-NEXT: %24 = icmp sgt <4 x i8*> %4, %9
+; CHECK-NEXT: %25 = icmp sgt <4 x i8*> %5, %10
+; CHECK-NEXT: %26 = icmp sgt <4 x i8*> %6, %11
+; CHECK-NEXT: %27 = icmp sgt <4 x i8*> %7, %12
+; CHECK-NEXT: %28 = icmp sgt <4 x i8*> %8, %13
+; CHECK-NEXT: %29 = select <4 x i1> %24, <4 x i8*> %14, <4 x i8*> %19
+; CHECK-NEXT: %30 = select <4 x i1> %25, <4 x i8*> %15, <4 x i8*> %20
+; CHECK-NEXT: %31 = select <4 x i1> %26, <4 x i8*> %16, <4 x i8*> %21
+; CHECK-NEXT: %32 = select <4 x i1> %27, <4 x i8*> %17, <4 x i8*> %22
+; CHECK-NEXT: %33 = select <4 x i1> %28, <4 x i8*> %18, <4 x i8*> %23
+; CHECK-NEXT: store <4 x i8*> %30, <4 x i8*>* %0, align 16
+; CHECK-NEXT: store <4 x i8*> %31, <4 x i8*>* %1, align 16
+; CHECK-NEXT: store <4 x i8*> %32, <4 x i8*>* %2, align 16
+; CHECK-NEXT: store <4 x i8*> %33, <4 x i8*>* %3, align 16
+; CHECK-NEXT: ret <4 x i8*> %29
+; CHECK-NEXT: }
+
+define <20 x i8*> @icmp_ugt_on_20xi8ptr(<20 x i8*>, <20 x i8*>, <20 x i8*>, <20 x i8*>) {
+entry:
+ %4 = icmp ugt <20 x i8*> %0, %1
+ %5 = select <20 x i1> %4, <20 x i8*> %2, <20 x i8*> %3
+ ret <20 x i8*> %5
+}
+; CHECK-LABEL: define <4 x i8*> @icmp_ugt_on_20xi8ptr(<4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
+; CHECK: entry:
+; CHECK-NEXT: %24 = icmp ugt <4 x i8*> %4, %9
+; CHECK-NEXT: %25 = icmp ugt <4 x i8*> %5, %10
+; CHECK-NEXT: %26 = icmp ugt <4 x i8*> %6, %11
+; CHECK-NEXT: %27 = icmp ugt <4 x i8*> %7, %12
+; CHECK-NEXT: %28 = icmp ugt <4 x i8*> %8, %13
+; CHECK-NEXT: %29 = select <4 x i1> %24, <4 x i8*> %14, <4 x i8*> %19
+; CHECK-NEXT: %30 = select <4 x i1> %25, <4 x i8*> %15, <4 x i8*> %20
+; CHECK-NEXT: %31 = select <4 x i1> %26, <4 x i8*> %16, <4 x i8*> %21
+; CHECK-NEXT: %32 = select <4 x i1> %27, <4 x i8*> %17, <4 x i8*> %22
+; CHECK-NEXT: %33 = select <4 x i1> %28, <4 x i8*> %18, <4 x i8*> %23
+; CHECK-NEXT: store <4 x i8*> %30, <4 x i8*>* %0, align 16
+; CHECK-NEXT: store <4 x i8*> %31, <4 x i8*>* %1, align 16
+; CHECK-NEXT: store <4 x i8*> %32, <4 x i8*>* %2, align 16
+; CHECK-NEXT: store <4 x i8*> %33, <4 x i8*>* %3, align 16
+; CHECK-NEXT: ret <4 x i8*> %29
+; CHECK-NEXT: }
+
+define <20 x i8*> @icmp_sge_on_20xi8ptr(<20 x i8*>, <20 x i8*>, <20 x i8*>, <20 x i8*>) {
+entry:
+ %4 = icmp sge <20 x i8*> %0, %1
+ %5 = select <20 x i1> %4, <20 x i8*> %2, <20 x i8*> %3
+ ret <20 x i8*> %5
+}
+; CHECK-LABEL: define <4 x i8*> @icmp_sge_on_20xi8ptr(<4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
+; CHECK: entry:
+; CHECK-NEXT: %24 = icmp sge <4 x i8*> %4, %9
+; CHECK-NEXT: %25 = icmp sge <4 x i8*> %5, %10
+; CHECK-NEXT: %26 = icmp sge <4 x i8*> %6, %11
+; CHECK-NEXT: %27 = icmp sge <4 x i8*> %7, %12
+; CHECK-NEXT: %28 = icmp sge <4 x i8*> %8, %13
+; CHECK-NEXT: %29 = select <4 x i1> %24, <4 x i8*> %14, <4 x i8*> %19
+; CHECK-NEXT: %30 = select <4 x i1> %25, <4 x i8*> %15, <4 x i8*> %20
+; CHECK-NEXT: %31 = select <4 x i1> %26, <4 x i8*> %16, <4 x i8*> %21
+; CHECK-NEXT: %32 = select <4 x i1> %27, <4 x i8*> %17, <4 x i8*> %22
+; CHECK-NEXT: %33 = select <4 x i1> %28, <4 x i8*> %18, <4 x i8*> %23
+; CHECK-NEXT: store <4 x i8*> %30, <4 x i8*>* %0, align 16
+; CHECK-NEXT: store <4 x i8*> %31, <4 x i8*>* %1, align 16
+; CHECK-NEXT: store <4 x i8*> %32, <4 x i8*>* %2, align 16
+; CHECK-NEXT: store <4 x i8*> %33, <4 x i8*>* %3, align 16
+; CHECK-NEXT: ret <4 x i8*> %29
+; CHECK-NEXT: }
+
+define <20 x i8*> @icmp_uge_on_20xi8ptr(<20 x i8*>, <20 x i8*>, <20 x i8*>, <20 x i8*>) {
+entry:
+ %4 = icmp uge <20 x i8*> %0, %1
+ %5 = select <20 x i1> %4, <20 x i8*> %2, <20 x i8*> %3
+ ret <20 x i8*> %5
+}
+; CHECK-LABEL: define <4 x i8*> @icmp_uge_on_20xi8ptr(<4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
+; CHECK: entry:
+; CHECK-NEXT: %24 = icmp uge <4 x i8*> %4, %9
+; CHECK-NEXT: %25 = icmp uge <4 x i8*> %5, %10
+; CHECK-NEXT: %26 = icmp uge <4 x i8*> %6, %11
+; CHECK-NEXT: %27 = icmp uge <4 x i8*> %7, %12
+; CHECK-NEXT: %28 = icmp uge <4 x i8*> %8, %13
+; CHECK-NEXT: %29 = select <4 x i1> %24, <4 x i8*> %14, <4 x i8*> %19
+; CHECK-NEXT: %30 = select <4 x i1> %25, <4 x i8*> %15, <4 x i8*> %20
+; CHECK-NEXT: %31 = select <4 x i1> %26, <4 x i8*> %16, <4 x i8*> %21
+; CHECK-NEXT: %32 = select <4 x i1> %27, <4 x i8*> %17, <4 x i8*> %22
+; CHECK-NEXT: %33 = select <4 x i1> %28, <4 x i8*> %18, <4 x i8*> %23
+; CHECK-NEXT: store <4 x i8*> %30, <4 x i8*>* %0, align 16
+; CHECK-NEXT: store <4 x i8*> %31, <4 x i8*>* %1, align 16
+; CHECK-NEXT: store <4 x i8*> %32, <4 x i8*>* %2, align 16
+; CHECK-NEXT: store <4 x i8*> %33, <4 x i8*>* %3, align 16
+; CHECK-NEXT: ret <4 x i8*> %29
+; CHECK-NEXT: }
+
+define <20 x i8*> @icmp_slt_on_20xi8ptr(<20 x i8*>, <20 x i8*>, <20 x i8*>, <20 x i8*>) {
+entry:
+ %4 = icmp slt <20 x i8*> %0, %1
+ %5 = select <20 x i1> %4, <20 x i8*> %2, <20 x i8*> %3
+ ret <20 x i8*> %5
+}
+; CHECK-LABEL: define <4 x i8*> @icmp_slt_on_20xi8ptr(<4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
+; CHECK: entry:
+; CHECK-NEXT: %24 = icmp slt <4 x i8*> %4, %9
+; CHECK-NEXT: %25 = icmp slt <4 x i8*> %5, %10
+; CHECK-NEXT: %26 = icmp slt <4 x i8*> %6, %11
+; CHECK-NEXT: %27 = icmp slt <4 x i8*> %7, %12
+; CHECK-NEXT: %28 = icmp slt <4 x i8*> %8, %13
+; CHECK-NEXT: %29 = select <4 x i1> %24, <4 x i8*> %14, <4 x i8*> %19
+; CHECK-NEXT: %30 = select <4 x i1> %25, <4 x i8*> %15, <4 x i8*> %20
+; CHECK-NEXT: %31 = select <4 x i1> %26, <4 x i8*> %16, <4 x i8*> %21
+; CHECK-NEXT: %32 = select <4 x i1> %27, <4 x i8*> %17, <4 x i8*> %22
+; CHECK-NEXT: %33 = select <4 x i1> %28, <4 x i8*> %18, <4 x i8*> %23
+; CHECK-NEXT: store <4 x i8*> %30, <4 x i8*>* %0, align 16
+; CHECK-NEXT: store <4 x i8*> %31, <4 x i8*>* %1, align 16
+; CHECK-NEXT: store <4 x i8*> %32, <4 x i8*>* %2, align 16
+; CHECK-NEXT: store <4 x i8*> %33, <4 x i8*>* %3, align 16
+; CHECK-NEXT: ret <4 x i8*> %29
+; CHECK-NEXT: }
+
+define <20 x i8*> @icmp_ult_on_20xi8ptr(<20 x i8*>, <20 x i8*>, <20 x i8*>, <20 x i8*>) {
+entry:
+ %4 = icmp ult <20 x i8*> %0, %1
+ %5 = select <20 x i1> %4, <20 x i8*> %2, <20 x i8*> %3
+ ret <20 x i8*> %5
+}
+; CHECK-LABEL: define <4 x i8*> @icmp_ult_on_20xi8ptr(<4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
+; CHECK: entry:
+; CHECK-NEXT: %24 = icmp ult <4 x i8*> %4, %9
+; CHECK-NEXT: %25 = icmp ult <4 x i8*> %5, %10
+; CHECK-NEXT: %26 = icmp ult <4 x i8*> %6, %11
+; CHECK-NEXT: %27 = icmp ult <4 x i8*> %7, %12
+; CHECK-NEXT: %28 = icmp ult <4 x i8*> %8, %13
+; CHECK-NEXT: %29 = select <4 x i1> %24, <4 x i8*> %14, <4 x i8*> %19
+; CHECK-NEXT: %30 = select <4 x i1> %25, <4 x i8*> %15, <4 x i8*> %20
+; CHECK-NEXT: %31 = select <4 x i1> %26, <4 x i8*> %16, <4 x i8*> %21
+; CHECK-NEXT: %32 = select <4 x i1> %27, <4 x i8*> %17, <4 x i8*> %22
+; CHECK-NEXT: %33 = select <4 x i1> %28, <4 x i8*> %18, <4 x i8*> %23
+; CHECK-NEXT: store <4 x i8*> %30, <4 x i8*>* %0, align 16
+; CHECK-NEXT: store <4 x i8*> %31, <4 x i8*>* %1, align 16
+; CHECK-NEXT: store <4 x i8*> %32, <4 x i8*>* %2, align 16
+; CHECK-NEXT: store <4 x i8*> %33, <4 x i8*>* %3, align 16
+; CHECK-NEXT: ret <4 x i8*> %29
+; CHECK-NEXT: }
+
+define <20 x i8*> @icmp_sle_on_20xi8ptr(<20 x i8*>, <20 x i8*>, <20 x i8*>, <20 x i8*>) {
+entry:
+ %4 = icmp sle <20 x i8*> %0, %1
+ %5 = select <20 x i1> %4, <20 x i8*> %2, <20 x i8*> %3
+ ret <20 x i8*> %5
+}
+; CHECK-LABEL: define <4 x i8*> @icmp_sle_on_20xi8ptr(<4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
+; CHECK: entry:
+; CHECK-NEXT: %24 = icmp sle <4 x i8*> %4, %9
+; CHECK-NEXT: %25 = icmp sle <4 x i8*> %5, %10
+; CHECK-NEXT: %26 = icmp sle <4 x i8*> %6, %11
+; CHECK-NEXT: %27 = icmp sle <4 x i8*> %7, %12
+; CHECK-NEXT: %28 = icmp sle <4 x i8*> %8, %13
+; CHECK-NEXT: %29 = select <4 x i1> %24, <4 x i8*> %14, <4 x i8*> %19
+; CHECK-NEXT: %30 = select <4 x i1> %25, <4 x i8*> %15, <4 x i8*> %20
+; CHECK-NEXT: %31 = select <4 x i1> %26, <4 x i8*> %16, <4 x i8*> %21
+; CHECK-NEXT: %32 = select <4 x i1> %27, <4 x i8*> %17, <4 x i8*> %22
+; CHECK-NEXT: %33 = select <4 x i1> %28, <4 x i8*> %18, <4 x i8*> %23
+; CHECK-NEXT: store <4 x i8*> %30, <4 x i8*>* %0, align 16
+; CHECK-NEXT: store <4 x i8*> %31, <4 x i8*>* %1, align 16
+; CHECK-NEXT: store <4 x i8*> %32, <4 x i8*>* %2, align 16
+; CHECK-NEXT: store <4 x i8*> %33, <4 x i8*>* %3, align 16
+; CHECK-NEXT: ret <4 x i8*> %29
+; CHECK-NEXT: }
+
+define <20 x i8*> @icmp_ule_on_20xi8ptr(<20 x i8*>, <20 x i8*>, <20 x i8*>, <20 x i8*>) {
+entry:
+ %4 = icmp ule <20 x i8*> %0, %1
+ %5 = select <20 x i1> %4, <20 x i8*> %2, <20 x i8*> %3
+ ret <20 x i8*> %5
+}
+; CHECK-LABEL: define <4 x i8*> @icmp_ule_on_20xi8ptr(<4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
+; CHECK: entry:
+; CHECK-NEXT: %24 = icmp ule <4 x i8*> %4, %9
+; CHECK-NEXT: %25 = icmp ule <4 x i8*> %5, %10
+; CHECK-NEXT: %26 = icmp ule <4 x i8*> %6, %11
+; CHECK-NEXT: %27 = icmp ule <4 x i8*> %7, %12
+; CHECK-NEXT: %28 = icmp ule <4 x i8*> %8, %13
+; CHECK-NEXT: %29 = select <4 x i1> %24, <4 x i8*> %14, <4 x i8*> %19
+; CHECK-NEXT: %30 = select <4 x i1> %25, <4 x i8*> %15, <4 x i8*> %20
+; CHECK-NEXT: %31 = select <4 x i1> %26, <4 x i8*> %16, <4 x i8*> %21
+; CHECK-NEXT: %32 = select <4 x i1> %27, <4 x i8*> %17, <4 x i8*> %22
+; CHECK-NEXT: %33 = select <4 x i1> %28, <4 x i8*> %18, <4 x i8*> %23
+; CHECK-NEXT: store <4 x i8*> %30, <4 x i8*>* %0, align 16
+; CHECK-NEXT: store <4 x i8*> %31, <4 x i8*>* %1, align 16
+; CHECK-NEXT: store <4 x i8*> %32, <4 x i8*>* %2, align 16
+; CHECK-NEXT: store <4 x i8*> %33, <4 x i8*>* %3, align 16
+; CHECK-NEXT: ret <4 x i8*> %29
+; CHECK-NEXT: }
+
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