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Issue 1423873002: PNaCl: Add a vector type legalization pass. Base URL: https://chromium.googlesource.com/native_client/pnacl-llvm.git@master
Patch Set: Created 5 years, 1 month ago
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1 ; RUN: opt -S -pnacl-vector-canonicalization %s | FileCheck %s
2
3 ; Auto-generated tests for cmp instructions.
4
5 target datalayout = "e-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64 :64:64-p:32:32:32-v128:32:128"
6
7 define <2 x float> @fcmp_true_on_2xfloat(<2 x float>, <2 x float>, <2 x float>, <2 x float>) {
8 entry:
9 %4 = fcmp true <2 x float> %0, %1
10 %5 = select <2 x i1> %4, <2 x float> %2, <2 x float> %3
11 ret <2 x float> %5
12 }
13 ; CHECK-LABEL: define <4 x float> @fcmp_true_on_2xfloat(<4 x float>, <4 x float> , <4 x float>, <4 x float>) {
14 ; CHECK: entry:
15 ; CHECK-NEXT: %4 = fcmp true <4 x float> %0, %1
16 ; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x float> %2, <4 x float> %3
17 ; CHECK-NEXT: ret <4 x float> %5
18 ; CHECK-NEXT: }
19
20 define <2 x float> @fcmp_false_on_2xfloat(<2 x float>, <2 x float>, <2 x float>, <2 x float>) {
21 entry:
22 %4 = fcmp false <2 x float> %0, %1
23 %5 = select <2 x i1> %4, <2 x float> %2, <2 x float> %3
24 ret <2 x float> %5
25 }
26 ; CHECK-LABEL: define <4 x float> @fcmp_false_on_2xfloat(<4 x float>, <4 x float >, <4 x float>, <4 x float>) {
27 ; CHECK: entry:
28 ; CHECK-NEXT: %4 = fcmp false <4 x float> %0, %1
29 ; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x float> %2, <4 x float> %3
30 ; CHECK-NEXT: ret <4 x float> %5
31 ; CHECK-NEXT: }
32
33 define <2 x float> @fcmp_oeq_on_2xfloat(<2 x float>, <2 x float>, <2 x float>, < 2 x float>) {
34 entry:
35 %4 = fcmp oeq <2 x float> %0, %1
36 %5 = select <2 x i1> %4, <2 x float> %2, <2 x float> %3
37 ret <2 x float> %5
38 }
39 ; CHECK-LABEL: define <4 x float> @fcmp_oeq_on_2xfloat(<4 x float>, <4 x float>, <4 x float>, <4 x float>) {
40 ; CHECK: entry:
41 ; CHECK-NEXT: %4 = fcmp oeq <4 x float> %0, %1
42 ; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x float> %2, <4 x float> %3
43 ; CHECK-NEXT: ret <4 x float> %5
44 ; CHECK-NEXT: }
45
46 define <2 x float> @fcmp_ueq_on_2xfloat(<2 x float>, <2 x float>, <2 x float>, < 2 x float>) {
47 entry:
48 %4 = fcmp ueq <2 x float> %0, %1
49 %5 = select <2 x i1> %4, <2 x float> %2, <2 x float> %3
50 ret <2 x float> %5
51 }
52 ; CHECK-LABEL: define <4 x float> @fcmp_ueq_on_2xfloat(<4 x float>, <4 x float>, <4 x float>, <4 x float>) {
53 ; CHECK: entry:
54 ; CHECK-NEXT: %4 = fcmp ueq <4 x float> %0, %1
55 ; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x float> %2, <4 x float> %3
56 ; CHECK-NEXT: ret <4 x float> %5
57 ; CHECK-NEXT: }
58
59 define <2 x float> @fcmp_one_on_2xfloat(<2 x float>, <2 x float>, <2 x float>, < 2 x float>) {
60 entry:
61 %4 = fcmp one <2 x float> %0, %1
62 %5 = select <2 x i1> %4, <2 x float> %2, <2 x float> %3
63 ret <2 x float> %5
64 }
65 ; CHECK-LABEL: define <4 x float> @fcmp_one_on_2xfloat(<4 x float>, <4 x float>, <4 x float>, <4 x float>) {
66 ; CHECK: entry:
67 ; CHECK-NEXT: %4 = fcmp one <4 x float> %0, %1
68 ; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x float> %2, <4 x float> %3
69 ; CHECK-NEXT: ret <4 x float> %5
70 ; CHECK-NEXT: }
71
72 define <2 x float> @fcmp_une_on_2xfloat(<2 x float>, <2 x float>, <2 x float>, < 2 x float>) {
73 entry:
74 %4 = fcmp une <2 x float> %0, %1
75 %5 = select <2 x i1> %4, <2 x float> %2, <2 x float> %3
76 ret <2 x float> %5
77 }
78 ; CHECK-LABEL: define <4 x float> @fcmp_une_on_2xfloat(<4 x float>, <4 x float>, <4 x float>, <4 x float>) {
79 ; CHECK: entry:
80 ; CHECK-NEXT: %4 = fcmp une <4 x float> %0, %1
81 ; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x float> %2, <4 x float> %3
82 ; CHECK-NEXT: ret <4 x float> %5
83 ; CHECK-NEXT: }
84
85 define <2 x float> @fcmp_ogt_on_2xfloat(<2 x float>, <2 x float>, <2 x float>, < 2 x float>) {
86 entry:
87 %4 = fcmp ogt <2 x float> %0, %1
88 %5 = select <2 x i1> %4, <2 x float> %2, <2 x float> %3
89 ret <2 x float> %5
90 }
91 ; CHECK-LABEL: define <4 x float> @fcmp_ogt_on_2xfloat(<4 x float>, <4 x float>, <4 x float>, <4 x float>) {
92 ; CHECK: entry:
93 ; CHECK-NEXT: %4 = fcmp ogt <4 x float> %0, %1
94 ; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x float> %2, <4 x float> %3
95 ; CHECK-NEXT: ret <4 x float> %5
96 ; CHECK-NEXT: }
97
98 define <2 x float> @fcmp_ugt_on_2xfloat(<2 x float>, <2 x float>, <2 x float>, < 2 x float>) {
99 entry:
100 %4 = fcmp ugt <2 x float> %0, %1
101 %5 = select <2 x i1> %4, <2 x float> %2, <2 x float> %3
102 ret <2 x float> %5
103 }
104 ; CHECK-LABEL: define <4 x float> @fcmp_ugt_on_2xfloat(<4 x float>, <4 x float>, <4 x float>, <4 x float>) {
105 ; CHECK: entry:
106 ; CHECK-NEXT: %4 = fcmp ugt <4 x float> %0, %1
107 ; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x float> %2, <4 x float> %3
108 ; CHECK-NEXT: ret <4 x float> %5
109 ; CHECK-NEXT: }
110
111 define <2 x float> @fcmp_oge_on_2xfloat(<2 x float>, <2 x float>, <2 x float>, < 2 x float>) {
112 entry:
113 %4 = fcmp oge <2 x float> %0, %1
114 %5 = select <2 x i1> %4, <2 x float> %2, <2 x float> %3
115 ret <2 x float> %5
116 }
117 ; CHECK-LABEL: define <4 x float> @fcmp_oge_on_2xfloat(<4 x float>, <4 x float>, <4 x float>, <4 x float>) {
118 ; CHECK: entry:
119 ; CHECK-NEXT: %4 = fcmp oge <4 x float> %0, %1
120 ; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x float> %2, <4 x float> %3
121 ; CHECK-NEXT: ret <4 x float> %5
122 ; CHECK-NEXT: }
123
124 define <2 x float> @fcmp_uge_on_2xfloat(<2 x float>, <2 x float>, <2 x float>, < 2 x float>) {
125 entry:
126 %4 = fcmp uge <2 x float> %0, %1
127 %5 = select <2 x i1> %4, <2 x float> %2, <2 x float> %3
128 ret <2 x float> %5
129 }
130 ; CHECK-LABEL: define <4 x float> @fcmp_uge_on_2xfloat(<4 x float>, <4 x float>, <4 x float>, <4 x float>) {
131 ; CHECK: entry:
132 ; CHECK-NEXT: %4 = fcmp uge <4 x float> %0, %1
133 ; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x float> %2, <4 x float> %3
134 ; CHECK-NEXT: ret <4 x float> %5
135 ; CHECK-NEXT: }
136
137 define <2 x float> @fcmp_ord_on_2xfloat(<2 x float>, <2 x float>, <2 x float>, < 2 x float>) {
138 entry:
139 %4 = fcmp ord <2 x float> %0, %1
140 %5 = select <2 x i1> %4, <2 x float> %2, <2 x float> %3
141 ret <2 x float> %5
142 }
143 ; CHECK-LABEL: define <4 x float> @fcmp_ord_on_2xfloat(<4 x float>, <4 x float>, <4 x float>, <4 x float>) {
144 ; CHECK: entry:
145 ; CHECK-NEXT: %4 = fcmp ord <4 x float> %0, %1
146 ; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x float> %2, <4 x float> %3
147 ; CHECK-NEXT: ret <4 x float> %5
148 ; CHECK-NEXT: }
149
150 define <2 x float> @fcmp_uno_on_2xfloat(<2 x float>, <2 x float>, <2 x float>, < 2 x float>) {
151 entry:
152 %4 = fcmp uno <2 x float> %0, %1
153 %5 = select <2 x i1> %4, <2 x float> %2, <2 x float> %3
154 ret <2 x float> %5
155 }
156 ; CHECK-LABEL: define <4 x float> @fcmp_uno_on_2xfloat(<4 x float>, <4 x float>, <4 x float>, <4 x float>) {
157 ; CHECK: entry:
158 ; CHECK-NEXT: %4 = fcmp uno <4 x float> %0, %1
159 ; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x float> %2, <4 x float> %3
160 ; CHECK-NEXT: ret <4 x float> %5
161 ; CHECK-NEXT: }
162
163 define <2 x double> @fcmp_true_on_2xdouble(<2 x double>, <2 x double>, <2 x doub le>, <2 x double>) {
164 entry:
165 %4 = fcmp true <2 x double> %0, %1
166 %5 = select <2 x i1> %4, <2 x double> %2, <2 x double> %3
167 ret <2 x double> %5
168 }
169 ; CHECK-LABEL: define <2 x double> @fcmp_true_on_2xdouble(<2 x double>, <2 x dou ble>, <2 x double>, <2 x double>) {
170 ; CHECK: entry:
171 ; CHECK-NEXT: %4 = fcmp true <2 x double> %0, %1
172 ; CHECK-NEXT: %5 = select <2 x i1> %4, <2 x double> %2, <2 x double> %3
173 ; CHECK-NEXT: ret <2 x double> %5
174 ; CHECK-NEXT: }
175
176 define <2 x double> @fcmp_false_on_2xdouble(<2 x double>, <2 x double>, <2 x dou ble>, <2 x double>) {
177 entry:
178 %4 = fcmp false <2 x double> %0, %1
179 %5 = select <2 x i1> %4, <2 x double> %2, <2 x double> %3
180 ret <2 x double> %5
181 }
182 ; CHECK-LABEL: define <2 x double> @fcmp_false_on_2xdouble(<2 x double>, <2 x do uble>, <2 x double>, <2 x double>) {
183 ; CHECK: entry:
184 ; CHECK-NEXT: %4 = fcmp false <2 x double> %0, %1
185 ; CHECK-NEXT: %5 = select <2 x i1> %4, <2 x double> %2, <2 x double> %3
186 ; CHECK-NEXT: ret <2 x double> %5
187 ; CHECK-NEXT: }
188
189 define <2 x double> @fcmp_oeq_on_2xdouble(<2 x double>, <2 x double>, <2 x doubl e>, <2 x double>) {
190 entry:
191 %4 = fcmp oeq <2 x double> %0, %1
192 %5 = select <2 x i1> %4, <2 x double> %2, <2 x double> %3
193 ret <2 x double> %5
194 }
195 ; CHECK-LABEL: define <2 x double> @fcmp_oeq_on_2xdouble(<2 x double>, <2 x doub le>, <2 x double>, <2 x double>) {
196 ; CHECK: entry:
197 ; CHECK-NEXT: %4 = fcmp oeq <2 x double> %0, %1
198 ; CHECK-NEXT: %5 = select <2 x i1> %4, <2 x double> %2, <2 x double> %3
199 ; CHECK-NEXT: ret <2 x double> %5
200 ; CHECK-NEXT: }
201
202 define <2 x double> @fcmp_ueq_on_2xdouble(<2 x double>, <2 x double>, <2 x doubl e>, <2 x double>) {
203 entry:
204 %4 = fcmp ueq <2 x double> %0, %1
205 %5 = select <2 x i1> %4, <2 x double> %2, <2 x double> %3
206 ret <2 x double> %5
207 }
208 ; CHECK-LABEL: define <2 x double> @fcmp_ueq_on_2xdouble(<2 x double>, <2 x doub le>, <2 x double>, <2 x double>) {
209 ; CHECK: entry:
210 ; CHECK-NEXT: %4 = fcmp ueq <2 x double> %0, %1
211 ; CHECK-NEXT: %5 = select <2 x i1> %4, <2 x double> %2, <2 x double> %3
212 ; CHECK-NEXT: ret <2 x double> %5
213 ; CHECK-NEXT: }
214
215 define <2 x double> @fcmp_one_on_2xdouble(<2 x double>, <2 x double>, <2 x doubl e>, <2 x double>) {
216 entry:
217 %4 = fcmp one <2 x double> %0, %1
218 %5 = select <2 x i1> %4, <2 x double> %2, <2 x double> %3
219 ret <2 x double> %5
220 }
221 ; CHECK-LABEL: define <2 x double> @fcmp_one_on_2xdouble(<2 x double>, <2 x doub le>, <2 x double>, <2 x double>) {
222 ; CHECK: entry:
223 ; CHECK-NEXT: %4 = fcmp one <2 x double> %0, %1
224 ; CHECK-NEXT: %5 = select <2 x i1> %4, <2 x double> %2, <2 x double> %3
225 ; CHECK-NEXT: ret <2 x double> %5
226 ; CHECK-NEXT: }
227
228 define <2 x double> @fcmp_une_on_2xdouble(<2 x double>, <2 x double>, <2 x doubl e>, <2 x double>) {
229 entry:
230 %4 = fcmp une <2 x double> %0, %1
231 %5 = select <2 x i1> %4, <2 x double> %2, <2 x double> %3
232 ret <2 x double> %5
233 }
234 ; CHECK-LABEL: define <2 x double> @fcmp_une_on_2xdouble(<2 x double>, <2 x doub le>, <2 x double>, <2 x double>) {
235 ; CHECK: entry:
236 ; CHECK-NEXT: %4 = fcmp une <2 x double> %0, %1
237 ; CHECK-NEXT: %5 = select <2 x i1> %4, <2 x double> %2, <2 x double> %3
238 ; CHECK-NEXT: ret <2 x double> %5
239 ; CHECK-NEXT: }
240
241 define <2 x double> @fcmp_ogt_on_2xdouble(<2 x double>, <2 x double>, <2 x doubl e>, <2 x double>) {
242 entry:
243 %4 = fcmp ogt <2 x double> %0, %1
244 %5 = select <2 x i1> %4, <2 x double> %2, <2 x double> %3
245 ret <2 x double> %5
246 }
247 ; CHECK-LABEL: define <2 x double> @fcmp_ogt_on_2xdouble(<2 x double>, <2 x doub le>, <2 x double>, <2 x double>) {
248 ; CHECK: entry:
249 ; CHECK-NEXT: %4 = fcmp ogt <2 x double> %0, %1
250 ; CHECK-NEXT: %5 = select <2 x i1> %4, <2 x double> %2, <2 x double> %3
251 ; CHECK-NEXT: ret <2 x double> %5
252 ; CHECK-NEXT: }
253
254 define <2 x double> @fcmp_ugt_on_2xdouble(<2 x double>, <2 x double>, <2 x doubl e>, <2 x double>) {
255 entry:
256 %4 = fcmp ugt <2 x double> %0, %1
257 %5 = select <2 x i1> %4, <2 x double> %2, <2 x double> %3
258 ret <2 x double> %5
259 }
260 ; CHECK-LABEL: define <2 x double> @fcmp_ugt_on_2xdouble(<2 x double>, <2 x doub le>, <2 x double>, <2 x double>) {
261 ; CHECK: entry:
262 ; CHECK-NEXT: %4 = fcmp ugt <2 x double> %0, %1
263 ; CHECK-NEXT: %5 = select <2 x i1> %4, <2 x double> %2, <2 x double> %3
264 ; CHECK-NEXT: ret <2 x double> %5
265 ; CHECK-NEXT: }
266
267 define <2 x double> @fcmp_oge_on_2xdouble(<2 x double>, <2 x double>, <2 x doubl e>, <2 x double>) {
268 entry:
269 %4 = fcmp oge <2 x double> %0, %1
270 %5 = select <2 x i1> %4, <2 x double> %2, <2 x double> %3
271 ret <2 x double> %5
272 }
273 ; CHECK-LABEL: define <2 x double> @fcmp_oge_on_2xdouble(<2 x double>, <2 x doub le>, <2 x double>, <2 x double>) {
274 ; CHECK: entry:
275 ; CHECK-NEXT: %4 = fcmp oge <2 x double> %0, %1
276 ; CHECK-NEXT: %5 = select <2 x i1> %4, <2 x double> %2, <2 x double> %3
277 ; CHECK-NEXT: ret <2 x double> %5
278 ; CHECK-NEXT: }
279
280 define <2 x double> @fcmp_uge_on_2xdouble(<2 x double>, <2 x double>, <2 x doubl e>, <2 x double>) {
281 entry:
282 %4 = fcmp uge <2 x double> %0, %1
283 %5 = select <2 x i1> %4, <2 x double> %2, <2 x double> %3
284 ret <2 x double> %5
285 }
286 ; CHECK-LABEL: define <2 x double> @fcmp_uge_on_2xdouble(<2 x double>, <2 x doub le>, <2 x double>, <2 x double>) {
287 ; CHECK: entry:
288 ; CHECK-NEXT: %4 = fcmp uge <2 x double> %0, %1
289 ; CHECK-NEXT: %5 = select <2 x i1> %4, <2 x double> %2, <2 x double> %3
290 ; CHECK-NEXT: ret <2 x double> %5
291 ; CHECK-NEXT: }
292
293 define <2 x double> @fcmp_ord_on_2xdouble(<2 x double>, <2 x double>, <2 x doubl e>, <2 x double>) {
294 entry:
295 %4 = fcmp ord <2 x double> %0, %1
296 %5 = select <2 x i1> %4, <2 x double> %2, <2 x double> %3
297 ret <2 x double> %5
298 }
299 ; CHECK-LABEL: define <2 x double> @fcmp_ord_on_2xdouble(<2 x double>, <2 x doub le>, <2 x double>, <2 x double>) {
300 ; CHECK: entry:
301 ; CHECK-NEXT: %4 = fcmp ord <2 x double> %0, %1
302 ; CHECK-NEXT: %5 = select <2 x i1> %4, <2 x double> %2, <2 x double> %3
303 ; CHECK-NEXT: ret <2 x double> %5
304 ; CHECK-NEXT: }
305
306 define <2 x double> @fcmp_uno_on_2xdouble(<2 x double>, <2 x double>, <2 x doubl e>, <2 x double>) {
307 entry:
308 %4 = fcmp uno <2 x double> %0, %1
309 %5 = select <2 x i1> %4, <2 x double> %2, <2 x double> %3
310 ret <2 x double> %5
311 }
312 ; CHECK-LABEL: define <2 x double> @fcmp_uno_on_2xdouble(<2 x double>, <2 x doub le>, <2 x double>, <2 x double>) {
313 ; CHECK: entry:
314 ; CHECK-NEXT: %4 = fcmp uno <2 x double> %0, %1
315 ; CHECK-NEXT: %5 = select <2 x i1> %4, <2 x double> %2, <2 x double> %3
316 ; CHECK-NEXT: ret <2 x double> %5
317 ; CHECK-NEXT: }
318
319 define <4 x float> @fcmp_true_on_4xfloat(<4 x float>, <4 x float>, <4 x float>, <4 x float>) {
320 entry:
321 %4 = fcmp true <4 x float> %0, %1
322 %5 = select <4 x i1> %4, <4 x float> %2, <4 x float> %3
323 ret <4 x float> %5
324 }
325 ; CHECK-LABEL: define <4 x float> @fcmp_true_on_4xfloat(<4 x float>, <4 x float> , <4 x float>, <4 x float>) {
326 ; CHECK: entry:
327 ; CHECK-NEXT: %4 = fcmp true <4 x float> %0, %1
328 ; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x float> %2, <4 x float> %3
329 ; CHECK-NEXT: ret <4 x float> %5
330 ; CHECK-NEXT: }
331
332 define <4 x float> @fcmp_false_on_4xfloat(<4 x float>, <4 x float>, <4 x float>, <4 x float>) {
333 entry:
334 %4 = fcmp false <4 x float> %0, %1
335 %5 = select <4 x i1> %4, <4 x float> %2, <4 x float> %3
336 ret <4 x float> %5
337 }
338 ; CHECK-LABEL: define <4 x float> @fcmp_false_on_4xfloat(<4 x float>, <4 x float >, <4 x float>, <4 x float>) {
339 ; CHECK: entry:
340 ; CHECK-NEXT: %4 = fcmp false <4 x float> %0, %1
341 ; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x float> %2, <4 x float> %3
342 ; CHECK-NEXT: ret <4 x float> %5
343 ; CHECK-NEXT: }
344
345 define <4 x float> @fcmp_oeq_on_4xfloat(<4 x float>, <4 x float>, <4 x float>, < 4 x float>) {
346 entry:
347 %4 = fcmp oeq <4 x float> %0, %1
348 %5 = select <4 x i1> %4, <4 x float> %2, <4 x float> %3
349 ret <4 x float> %5
350 }
351 ; CHECK-LABEL: define <4 x float> @fcmp_oeq_on_4xfloat(<4 x float>, <4 x float>, <4 x float>, <4 x float>) {
352 ; CHECK: entry:
353 ; CHECK-NEXT: %4 = fcmp oeq <4 x float> %0, %1
354 ; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x float> %2, <4 x float> %3
355 ; CHECK-NEXT: ret <4 x float> %5
356 ; CHECK-NEXT: }
357
358 define <4 x float> @fcmp_ueq_on_4xfloat(<4 x float>, <4 x float>, <4 x float>, < 4 x float>) {
359 entry:
360 %4 = fcmp ueq <4 x float> %0, %1
361 %5 = select <4 x i1> %4, <4 x float> %2, <4 x float> %3
362 ret <4 x float> %5
363 }
364 ; CHECK-LABEL: define <4 x float> @fcmp_ueq_on_4xfloat(<4 x float>, <4 x float>, <4 x float>, <4 x float>) {
365 ; CHECK: entry:
366 ; CHECK-NEXT: %4 = fcmp ueq <4 x float> %0, %1
367 ; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x float> %2, <4 x float> %3
368 ; CHECK-NEXT: ret <4 x float> %5
369 ; CHECK-NEXT: }
370
371 define <4 x float> @fcmp_one_on_4xfloat(<4 x float>, <4 x float>, <4 x float>, < 4 x float>) {
372 entry:
373 %4 = fcmp one <4 x float> %0, %1
374 %5 = select <4 x i1> %4, <4 x float> %2, <4 x float> %3
375 ret <4 x float> %5
376 }
377 ; CHECK-LABEL: define <4 x float> @fcmp_one_on_4xfloat(<4 x float>, <4 x float>, <4 x float>, <4 x float>) {
378 ; CHECK: entry:
379 ; CHECK-NEXT: %4 = fcmp one <4 x float> %0, %1
380 ; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x float> %2, <4 x float> %3
381 ; CHECK-NEXT: ret <4 x float> %5
382 ; CHECK-NEXT: }
383
384 define <4 x float> @fcmp_une_on_4xfloat(<4 x float>, <4 x float>, <4 x float>, < 4 x float>) {
385 entry:
386 %4 = fcmp une <4 x float> %0, %1
387 %5 = select <4 x i1> %4, <4 x float> %2, <4 x float> %3
388 ret <4 x float> %5
389 }
390 ; CHECK-LABEL: define <4 x float> @fcmp_une_on_4xfloat(<4 x float>, <4 x float>, <4 x float>, <4 x float>) {
391 ; CHECK: entry:
392 ; CHECK-NEXT: %4 = fcmp une <4 x float> %0, %1
393 ; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x float> %2, <4 x float> %3
394 ; CHECK-NEXT: ret <4 x float> %5
395 ; CHECK-NEXT: }
396
397 define <4 x float> @fcmp_ogt_on_4xfloat(<4 x float>, <4 x float>, <4 x float>, < 4 x float>) {
398 entry:
399 %4 = fcmp ogt <4 x float> %0, %1
400 %5 = select <4 x i1> %4, <4 x float> %2, <4 x float> %3
401 ret <4 x float> %5
402 }
403 ; CHECK-LABEL: define <4 x float> @fcmp_ogt_on_4xfloat(<4 x float>, <4 x float>, <4 x float>, <4 x float>) {
404 ; CHECK: entry:
405 ; CHECK-NEXT: %4 = fcmp ogt <4 x float> %0, %1
406 ; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x float> %2, <4 x float> %3
407 ; CHECK-NEXT: ret <4 x float> %5
408 ; CHECK-NEXT: }
409
410 define <4 x float> @fcmp_ugt_on_4xfloat(<4 x float>, <4 x float>, <4 x float>, < 4 x float>) {
411 entry:
412 %4 = fcmp ugt <4 x float> %0, %1
413 %5 = select <4 x i1> %4, <4 x float> %2, <4 x float> %3
414 ret <4 x float> %5
415 }
416 ; CHECK-LABEL: define <4 x float> @fcmp_ugt_on_4xfloat(<4 x float>, <4 x float>, <4 x float>, <4 x float>) {
417 ; CHECK: entry:
418 ; CHECK-NEXT: %4 = fcmp ugt <4 x float> %0, %1
419 ; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x float> %2, <4 x float> %3
420 ; CHECK-NEXT: ret <4 x float> %5
421 ; CHECK-NEXT: }
422
423 define <4 x float> @fcmp_oge_on_4xfloat(<4 x float>, <4 x float>, <4 x float>, < 4 x float>) {
424 entry:
425 %4 = fcmp oge <4 x float> %0, %1
426 %5 = select <4 x i1> %4, <4 x float> %2, <4 x float> %3
427 ret <4 x float> %5
428 }
429 ; CHECK-LABEL: define <4 x float> @fcmp_oge_on_4xfloat(<4 x float>, <4 x float>, <4 x float>, <4 x float>) {
430 ; CHECK: entry:
431 ; CHECK-NEXT: %4 = fcmp oge <4 x float> %0, %1
432 ; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x float> %2, <4 x float> %3
433 ; CHECK-NEXT: ret <4 x float> %5
434 ; CHECK-NEXT: }
435
436 define <4 x float> @fcmp_uge_on_4xfloat(<4 x float>, <4 x float>, <4 x float>, < 4 x float>) {
437 entry:
438 %4 = fcmp uge <4 x float> %0, %1
439 %5 = select <4 x i1> %4, <4 x float> %2, <4 x float> %3
440 ret <4 x float> %5
441 }
442 ; CHECK-LABEL: define <4 x float> @fcmp_uge_on_4xfloat(<4 x float>, <4 x float>, <4 x float>, <4 x float>) {
443 ; CHECK: entry:
444 ; CHECK-NEXT: %4 = fcmp uge <4 x float> %0, %1
445 ; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x float> %2, <4 x float> %3
446 ; CHECK-NEXT: ret <4 x float> %5
447 ; CHECK-NEXT: }
448
449 define <4 x float> @fcmp_ord_on_4xfloat(<4 x float>, <4 x float>, <4 x float>, < 4 x float>) {
450 entry:
451 %4 = fcmp ord <4 x float> %0, %1
452 %5 = select <4 x i1> %4, <4 x float> %2, <4 x float> %3
453 ret <4 x float> %5
454 }
455 ; CHECK-LABEL: define <4 x float> @fcmp_ord_on_4xfloat(<4 x float>, <4 x float>, <4 x float>, <4 x float>) {
456 ; CHECK: entry:
457 ; CHECK-NEXT: %4 = fcmp ord <4 x float> %0, %1
458 ; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x float> %2, <4 x float> %3
459 ; CHECK-NEXT: ret <4 x float> %5
460 ; CHECK-NEXT: }
461
462 define <4 x float> @fcmp_uno_on_4xfloat(<4 x float>, <4 x float>, <4 x float>, < 4 x float>) {
463 entry:
464 %4 = fcmp uno <4 x float> %0, %1
465 %5 = select <4 x i1> %4, <4 x float> %2, <4 x float> %3
466 ret <4 x float> %5
467 }
468 ; CHECK-LABEL: define <4 x float> @fcmp_uno_on_4xfloat(<4 x float>, <4 x float>, <4 x float>, <4 x float>) {
469 ; CHECK: entry:
470 ; CHECK-NEXT: %4 = fcmp uno <4 x float> %0, %1
471 ; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x float> %2, <4 x float> %3
472 ; CHECK-NEXT: ret <4 x float> %5
473 ; CHECK-NEXT: }
474
475 define <4 x double> @fcmp_true_on_4xdouble(<4 x double>, <4 x double>, <4 x doub le>, <4 x double>) {
476 entry:
477 %4 = fcmp true <4 x double> %0, %1
478 %5 = select <4 x i1> %4, <4 x double> %2, <4 x double> %3
479 ret <4 x double> %5
480 }
481 ; CHECK-LABEL: define <2 x double> @fcmp_true_on_4xdouble(<2 x double>* nocaptur e nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x do uble>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
482 ; CHECK: entry:
483 ; CHECK-NEXT: %9 = fcmp true <2 x double> %1, %3
484 ; CHECK-NEXT: %10 = fcmp true <2 x double> %2, %4
485 ; CHECK-NEXT: %11 = select <2 x i1> %9, <2 x double> %5, <2 x double> %7
486 ; CHECK-NEXT: %12 = select <2 x i1> %10, <2 x double> %6, <2 x double> %8
487 ; CHECK-NEXT: store <2 x double> %12, <2 x double>* %0, align 16
488 ; CHECK-NEXT: ret <2 x double> %11
489 ; CHECK-NEXT: }
490
491 define <4 x double> @fcmp_false_on_4xdouble(<4 x double>, <4 x double>, <4 x dou ble>, <4 x double>) {
492 entry:
493 %4 = fcmp false <4 x double> %0, %1
494 %5 = select <4 x i1> %4, <4 x double> %2, <4 x double> %3
495 ret <4 x double> %5
496 }
497 ; CHECK-LABEL: define <2 x double> @fcmp_false_on_4xdouble(<2 x double>* nocaptu re nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x d ouble>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
498 ; CHECK: entry:
499 ; CHECK-NEXT: %9 = fcmp false <2 x double> %1, %3
500 ; CHECK-NEXT: %10 = fcmp false <2 x double> %2, %4
501 ; CHECK-NEXT: %11 = select <2 x i1> %9, <2 x double> %5, <2 x double> %7
502 ; CHECK-NEXT: %12 = select <2 x i1> %10, <2 x double> %6, <2 x double> %8
503 ; CHECK-NEXT: store <2 x double> %12, <2 x double>* %0, align 16
504 ; CHECK-NEXT: ret <2 x double> %11
505 ; CHECK-NEXT: }
506
507 define <4 x double> @fcmp_oeq_on_4xdouble(<4 x double>, <4 x double>, <4 x doubl e>, <4 x double>) {
508 entry:
509 %4 = fcmp oeq <4 x double> %0, %1
510 %5 = select <4 x i1> %4, <4 x double> %2, <4 x double> %3
511 ret <4 x double> %5
512 }
513 ; CHECK-LABEL: define <2 x double> @fcmp_oeq_on_4xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x dou ble>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
514 ; CHECK: entry:
515 ; CHECK-NEXT: %9 = fcmp oeq <2 x double> %1, %3
516 ; CHECK-NEXT: %10 = fcmp oeq <2 x double> %2, %4
517 ; CHECK-NEXT: %11 = select <2 x i1> %9, <2 x double> %5, <2 x double> %7
518 ; CHECK-NEXT: %12 = select <2 x i1> %10, <2 x double> %6, <2 x double> %8
519 ; CHECK-NEXT: store <2 x double> %12, <2 x double>* %0, align 16
520 ; CHECK-NEXT: ret <2 x double> %11
521 ; CHECK-NEXT: }
522
523 define <4 x double> @fcmp_ueq_on_4xdouble(<4 x double>, <4 x double>, <4 x doubl e>, <4 x double>) {
524 entry:
525 %4 = fcmp ueq <4 x double> %0, %1
526 %5 = select <4 x i1> %4, <4 x double> %2, <4 x double> %3
527 ret <4 x double> %5
528 }
529 ; CHECK-LABEL: define <2 x double> @fcmp_ueq_on_4xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x dou ble>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
530 ; CHECK: entry:
531 ; CHECK-NEXT: %9 = fcmp ueq <2 x double> %1, %3
532 ; CHECK-NEXT: %10 = fcmp ueq <2 x double> %2, %4
533 ; CHECK-NEXT: %11 = select <2 x i1> %9, <2 x double> %5, <2 x double> %7
534 ; CHECK-NEXT: %12 = select <2 x i1> %10, <2 x double> %6, <2 x double> %8
535 ; CHECK-NEXT: store <2 x double> %12, <2 x double>* %0, align 16
536 ; CHECK-NEXT: ret <2 x double> %11
537 ; CHECK-NEXT: }
538
539 define <4 x double> @fcmp_one_on_4xdouble(<4 x double>, <4 x double>, <4 x doubl e>, <4 x double>) {
540 entry:
541 %4 = fcmp one <4 x double> %0, %1
542 %5 = select <4 x i1> %4, <4 x double> %2, <4 x double> %3
543 ret <4 x double> %5
544 }
545 ; CHECK-LABEL: define <2 x double> @fcmp_one_on_4xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x dou ble>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
546 ; CHECK: entry:
547 ; CHECK-NEXT: %9 = fcmp one <2 x double> %1, %3
548 ; CHECK-NEXT: %10 = fcmp one <2 x double> %2, %4
549 ; CHECK-NEXT: %11 = select <2 x i1> %9, <2 x double> %5, <2 x double> %7
550 ; CHECK-NEXT: %12 = select <2 x i1> %10, <2 x double> %6, <2 x double> %8
551 ; CHECK-NEXT: store <2 x double> %12, <2 x double>* %0, align 16
552 ; CHECK-NEXT: ret <2 x double> %11
553 ; CHECK-NEXT: }
554
555 define <4 x double> @fcmp_une_on_4xdouble(<4 x double>, <4 x double>, <4 x doubl e>, <4 x double>) {
556 entry:
557 %4 = fcmp une <4 x double> %0, %1
558 %5 = select <4 x i1> %4, <4 x double> %2, <4 x double> %3
559 ret <4 x double> %5
560 }
561 ; CHECK-LABEL: define <2 x double> @fcmp_une_on_4xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x dou ble>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
562 ; CHECK: entry:
563 ; CHECK-NEXT: %9 = fcmp une <2 x double> %1, %3
564 ; CHECK-NEXT: %10 = fcmp une <2 x double> %2, %4
565 ; CHECK-NEXT: %11 = select <2 x i1> %9, <2 x double> %5, <2 x double> %7
566 ; CHECK-NEXT: %12 = select <2 x i1> %10, <2 x double> %6, <2 x double> %8
567 ; CHECK-NEXT: store <2 x double> %12, <2 x double>* %0, align 16
568 ; CHECK-NEXT: ret <2 x double> %11
569 ; CHECK-NEXT: }
570
571 define <4 x double> @fcmp_ogt_on_4xdouble(<4 x double>, <4 x double>, <4 x doubl e>, <4 x double>) {
572 entry:
573 %4 = fcmp ogt <4 x double> %0, %1
574 %5 = select <4 x i1> %4, <4 x double> %2, <4 x double> %3
575 ret <4 x double> %5
576 }
577 ; CHECK-LABEL: define <2 x double> @fcmp_ogt_on_4xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x dou ble>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
578 ; CHECK: entry:
579 ; CHECK-NEXT: %9 = fcmp ogt <2 x double> %1, %3
580 ; CHECK-NEXT: %10 = fcmp ogt <2 x double> %2, %4
581 ; CHECK-NEXT: %11 = select <2 x i1> %9, <2 x double> %5, <2 x double> %7
582 ; CHECK-NEXT: %12 = select <2 x i1> %10, <2 x double> %6, <2 x double> %8
583 ; CHECK-NEXT: store <2 x double> %12, <2 x double>* %0, align 16
584 ; CHECK-NEXT: ret <2 x double> %11
585 ; CHECK-NEXT: }
586
587 define <4 x double> @fcmp_ugt_on_4xdouble(<4 x double>, <4 x double>, <4 x doubl e>, <4 x double>) {
588 entry:
589 %4 = fcmp ugt <4 x double> %0, %1
590 %5 = select <4 x i1> %4, <4 x double> %2, <4 x double> %3
591 ret <4 x double> %5
592 }
593 ; CHECK-LABEL: define <2 x double> @fcmp_ugt_on_4xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x dou ble>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
594 ; CHECK: entry:
595 ; CHECK-NEXT: %9 = fcmp ugt <2 x double> %1, %3
596 ; CHECK-NEXT: %10 = fcmp ugt <2 x double> %2, %4
597 ; CHECK-NEXT: %11 = select <2 x i1> %9, <2 x double> %5, <2 x double> %7
598 ; CHECK-NEXT: %12 = select <2 x i1> %10, <2 x double> %6, <2 x double> %8
599 ; CHECK-NEXT: store <2 x double> %12, <2 x double>* %0, align 16
600 ; CHECK-NEXT: ret <2 x double> %11
601 ; CHECK-NEXT: }
602
603 define <4 x double> @fcmp_oge_on_4xdouble(<4 x double>, <4 x double>, <4 x doubl e>, <4 x double>) {
604 entry:
605 %4 = fcmp oge <4 x double> %0, %1
606 %5 = select <4 x i1> %4, <4 x double> %2, <4 x double> %3
607 ret <4 x double> %5
608 }
609 ; CHECK-LABEL: define <2 x double> @fcmp_oge_on_4xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x dou ble>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
610 ; CHECK: entry:
611 ; CHECK-NEXT: %9 = fcmp oge <2 x double> %1, %3
612 ; CHECK-NEXT: %10 = fcmp oge <2 x double> %2, %4
613 ; CHECK-NEXT: %11 = select <2 x i1> %9, <2 x double> %5, <2 x double> %7
614 ; CHECK-NEXT: %12 = select <2 x i1> %10, <2 x double> %6, <2 x double> %8
615 ; CHECK-NEXT: store <2 x double> %12, <2 x double>* %0, align 16
616 ; CHECK-NEXT: ret <2 x double> %11
617 ; CHECK-NEXT: }
618
619 define <4 x double> @fcmp_uge_on_4xdouble(<4 x double>, <4 x double>, <4 x doubl e>, <4 x double>) {
620 entry:
621 %4 = fcmp uge <4 x double> %0, %1
622 %5 = select <4 x i1> %4, <4 x double> %2, <4 x double> %3
623 ret <4 x double> %5
624 }
625 ; CHECK-LABEL: define <2 x double> @fcmp_uge_on_4xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x dou ble>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
626 ; CHECK: entry:
627 ; CHECK-NEXT: %9 = fcmp uge <2 x double> %1, %3
628 ; CHECK-NEXT: %10 = fcmp uge <2 x double> %2, %4
629 ; CHECK-NEXT: %11 = select <2 x i1> %9, <2 x double> %5, <2 x double> %7
630 ; CHECK-NEXT: %12 = select <2 x i1> %10, <2 x double> %6, <2 x double> %8
631 ; CHECK-NEXT: store <2 x double> %12, <2 x double>* %0, align 16
632 ; CHECK-NEXT: ret <2 x double> %11
633 ; CHECK-NEXT: }
634
635 define <4 x double> @fcmp_ord_on_4xdouble(<4 x double>, <4 x double>, <4 x doubl e>, <4 x double>) {
636 entry:
637 %4 = fcmp ord <4 x double> %0, %1
638 %5 = select <4 x i1> %4, <4 x double> %2, <4 x double> %3
639 ret <4 x double> %5
640 }
641 ; CHECK-LABEL: define <2 x double> @fcmp_ord_on_4xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x dou ble>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
642 ; CHECK: entry:
643 ; CHECK-NEXT: %9 = fcmp ord <2 x double> %1, %3
644 ; CHECK-NEXT: %10 = fcmp ord <2 x double> %2, %4
645 ; CHECK-NEXT: %11 = select <2 x i1> %9, <2 x double> %5, <2 x double> %7
646 ; CHECK-NEXT: %12 = select <2 x i1> %10, <2 x double> %6, <2 x double> %8
647 ; CHECK-NEXT: store <2 x double> %12, <2 x double>* %0, align 16
648 ; CHECK-NEXT: ret <2 x double> %11
649 ; CHECK-NEXT: }
650
651 define <4 x double> @fcmp_uno_on_4xdouble(<4 x double>, <4 x double>, <4 x doubl e>, <4 x double>) {
652 entry:
653 %4 = fcmp uno <4 x double> %0, %1
654 %5 = select <4 x i1> %4, <4 x double> %2, <4 x double> %3
655 ret <4 x double> %5
656 }
657 ; CHECK-LABEL: define <2 x double> @fcmp_uno_on_4xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x dou ble>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
658 ; CHECK: entry:
659 ; CHECK-NEXT: %9 = fcmp uno <2 x double> %1, %3
660 ; CHECK-NEXT: %10 = fcmp uno <2 x double> %2, %4
661 ; CHECK-NEXT: %11 = select <2 x i1> %9, <2 x double> %5, <2 x double> %7
662 ; CHECK-NEXT: %12 = select <2 x i1> %10, <2 x double> %6, <2 x double> %8
663 ; CHECK-NEXT: store <2 x double> %12, <2 x double>* %0, align 16
664 ; CHECK-NEXT: ret <2 x double> %11
665 ; CHECK-NEXT: }
666
667 define <6 x float> @fcmp_true_on_6xfloat(<6 x float>, <6 x float>, <6 x float>, <6 x float>) {
668 entry:
669 %4 = fcmp true <6 x float> %0, %1
670 %5 = select <6 x i1> %4, <6 x float> %2, <6 x float> %3
671 ret <6 x float> %5
672 }
673 ; CHECK-LABEL: define <4 x float> @fcmp_true_on_6xfloat(<4 x float>* nocapture n onnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>) {
674 ; CHECK: entry:
675 ; CHECK-NEXT: %9 = fcmp true <4 x float> %1, %3
676 ; CHECK-NEXT: %10 = fcmp true <4 x float> %2, %4
677 ; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x float> %5, <4 x float> %7
678 ; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x float> %6, <4 x float> %8
679 ; CHECK-NEXT: store <4 x float> %12, <4 x float>* %0, align 16
680 ; CHECK-NEXT: ret <4 x float> %11
681 ; CHECK-NEXT: }
682
683 define <6 x float> @fcmp_false_on_6xfloat(<6 x float>, <6 x float>, <6 x float>, <6 x float>) {
684 entry:
685 %4 = fcmp false <6 x float> %0, %1
686 %5 = select <6 x i1> %4, <6 x float> %2, <6 x float> %3
687 ret <6 x float> %5
688 }
689 ; CHECK-LABEL: define <4 x float> @fcmp_false_on_6xfloat(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>) {
690 ; CHECK: entry:
691 ; CHECK-NEXT: %9 = fcmp false <4 x float> %1, %3
692 ; CHECK-NEXT: %10 = fcmp false <4 x float> %2, %4
693 ; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x float> %5, <4 x float> %7
694 ; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x float> %6, <4 x float> %8
695 ; CHECK-NEXT: store <4 x float> %12, <4 x float>* %0, align 16
696 ; CHECK-NEXT: ret <4 x float> %11
697 ; CHECK-NEXT: }
698
699 define <6 x float> @fcmp_oeq_on_6xfloat(<6 x float>, <6 x float>, <6 x float>, < 6 x float>) {
700 entry:
701 %4 = fcmp oeq <6 x float> %0, %1
702 %5 = select <6 x i1> %4, <6 x float> %2, <6 x float> %3
703 ret <6 x float> %5
704 }
705 ; CHECK-LABEL: define <4 x float> @fcmp_oeq_on_6xfloat(<4 x float>* nocapture no nnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, < 4 x float>, <4 x float>, <4 x float>, <4 x float>) {
706 ; CHECK: entry:
707 ; CHECK-NEXT: %9 = fcmp oeq <4 x float> %1, %3
708 ; CHECK-NEXT: %10 = fcmp oeq <4 x float> %2, %4
709 ; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x float> %5, <4 x float> %7
710 ; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x float> %6, <4 x float> %8
711 ; CHECK-NEXT: store <4 x float> %12, <4 x float>* %0, align 16
712 ; CHECK-NEXT: ret <4 x float> %11
713 ; CHECK-NEXT: }
714
715 define <6 x float> @fcmp_ueq_on_6xfloat(<6 x float>, <6 x float>, <6 x float>, < 6 x float>) {
716 entry:
717 %4 = fcmp ueq <6 x float> %0, %1
718 %5 = select <6 x i1> %4, <6 x float> %2, <6 x float> %3
719 ret <6 x float> %5
720 }
721 ; CHECK-LABEL: define <4 x float> @fcmp_ueq_on_6xfloat(<4 x float>* nocapture no nnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, < 4 x float>, <4 x float>, <4 x float>, <4 x float>) {
722 ; CHECK: entry:
723 ; CHECK-NEXT: %9 = fcmp ueq <4 x float> %1, %3
724 ; CHECK-NEXT: %10 = fcmp ueq <4 x float> %2, %4
725 ; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x float> %5, <4 x float> %7
726 ; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x float> %6, <4 x float> %8
727 ; CHECK-NEXT: store <4 x float> %12, <4 x float>* %0, align 16
728 ; CHECK-NEXT: ret <4 x float> %11
729 ; CHECK-NEXT: }
730
731 define <6 x float> @fcmp_one_on_6xfloat(<6 x float>, <6 x float>, <6 x float>, < 6 x float>) {
732 entry:
733 %4 = fcmp one <6 x float> %0, %1
734 %5 = select <6 x i1> %4, <6 x float> %2, <6 x float> %3
735 ret <6 x float> %5
736 }
737 ; CHECK-LABEL: define <4 x float> @fcmp_one_on_6xfloat(<4 x float>* nocapture no nnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, < 4 x float>, <4 x float>, <4 x float>, <4 x float>) {
738 ; CHECK: entry:
739 ; CHECK-NEXT: %9 = fcmp one <4 x float> %1, %3
740 ; CHECK-NEXT: %10 = fcmp one <4 x float> %2, %4
741 ; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x float> %5, <4 x float> %7
742 ; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x float> %6, <4 x float> %8
743 ; CHECK-NEXT: store <4 x float> %12, <4 x float>* %0, align 16
744 ; CHECK-NEXT: ret <4 x float> %11
745 ; CHECK-NEXT: }
746
747 define <6 x float> @fcmp_une_on_6xfloat(<6 x float>, <6 x float>, <6 x float>, < 6 x float>) {
748 entry:
749 %4 = fcmp une <6 x float> %0, %1
750 %5 = select <6 x i1> %4, <6 x float> %2, <6 x float> %3
751 ret <6 x float> %5
752 }
753 ; CHECK-LABEL: define <4 x float> @fcmp_une_on_6xfloat(<4 x float>* nocapture no nnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, < 4 x float>, <4 x float>, <4 x float>, <4 x float>) {
754 ; CHECK: entry:
755 ; CHECK-NEXT: %9 = fcmp une <4 x float> %1, %3
756 ; CHECK-NEXT: %10 = fcmp une <4 x float> %2, %4
757 ; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x float> %5, <4 x float> %7
758 ; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x float> %6, <4 x float> %8
759 ; CHECK-NEXT: store <4 x float> %12, <4 x float>* %0, align 16
760 ; CHECK-NEXT: ret <4 x float> %11
761 ; CHECK-NEXT: }
762
763 define <6 x float> @fcmp_ogt_on_6xfloat(<6 x float>, <6 x float>, <6 x float>, < 6 x float>) {
764 entry:
765 %4 = fcmp ogt <6 x float> %0, %1
766 %5 = select <6 x i1> %4, <6 x float> %2, <6 x float> %3
767 ret <6 x float> %5
768 }
769 ; CHECK-LABEL: define <4 x float> @fcmp_ogt_on_6xfloat(<4 x float>* nocapture no nnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, < 4 x float>, <4 x float>, <4 x float>, <4 x float>) {
770 ; CHECK: entry:
771 ; CHECK-NEXT: %9 = fcmp ogt <4 x float> %1, %3
772 ; CHECK-NEXT: %10 = fcmp ogt <4 x float> %2, %4
773 ; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x float> %5, <4 x float> %7
774 ; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x float> %6, <4 x float> %8
775 ; CHECK-NEXT: store <4 x float> %12, <4 x float>* %0, align 16
776 ; CHECK-NEXT: ret <4 x float> %11
777 ; CHECK-NEXT: }
778
779 define <6 x float> @fcmp_ugt_on_6xfloat(<6 x float>, <6 x float>, <6 x float>, < 6 x float>) {
780 entry:
781 %4 = fcmp ugt <6 x float> %0, %1
782 %5 = select <6 x i1> %4, <6 x float> %2, <6 x float> %3
783 ret <6 x float> %5
784 }
785 ; CHECK-LABEL: define <4 x float> @fcmp_ugt_on_6xfloat(<4 x float>* nocapture no nnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, < 4 x float>, <4 x float>, <4 x float>, <4 x float>) {
786 ; CHECK: entry:
787 ; CHECK-NEXT: %9 = fcmp ugt <4 x float> %1, %3
788 ; CHECK-NEXT: %10 = fcmp ugt <4 x float> %2, %4
789 ; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x float> %5, <4 x float> %7
790 ; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x float> %6, <4 x float> %8
791 ; CHECK-NEXT: store <4 x float> %12, <4 x float>* %0, align 16
792 ; CHECK-NEXT: ret <4 x float> %11
793 ; CHECK-NEXT: }
794
795 define <6 x float> @fcmp_oge_on_6xfloat(<6 x float>, <6 x float>, <6 x float>, < 6 x float>) {
796 entry:
797 %4 = fcmp oge <6 x float> %0, %1
798 %5 = select <6 x i1> %4, <6 x float> %2, <6 x float> %3
799 ret <6 x float> %5
800 }
801 ; CHECK-LABEL: define <4 x float> @fcmp_oge_on_6xfloat(<4 x float>* nocapture no nnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, < 4 x float>, <4 x float>, <4 x float>, <4 x float>) {
802 ; CHECK: entry:
803 ; CHECK-NEXT: %9 = fcmp oge <4 x float> %1, %3
804 ; CHECK-NEXT: %10 = fcmp oge <4 x float> %2, %4
805 ; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x float> %5, <4 x float> %7
806 ; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x float> %6, <4 x float> %8
807 ; CHECK-NEXT: store <4 x float> %12, <4 x float>* %0, align 16
808 ; CHECK-NEXT: ret <4 x float> %11
809 ; CHECK-NEXT: }
810
811 define <6 x float> @fcmp_uge_on_6xfloat(<6 x float>, <6 x float>, <6 x float>, < 6 x float>) {
812 entry:
813 %4 = fcmp uge <6 x float> %0, %1
814 %5 = select <6 x i1> %4, <6 x float> %2, <6 x float> %3
815 ret <6 x float> %5
816 }
817 ; CHECK-LABEL: define <4 x float> @fcmp_uge_on_6xfloat(<4 x float>* nocapture no nnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, < 4 x float>, <4 x float>, <4 x float>, <4 x float>) {
818 ; CHECK: entry:
819 ; CHECK-NEXT: %9 = fcmp uge <4 x float> %1, %3
820 ; CHECK-NEXT: %10 = fcmp uge <4 x float> %2, %4
821 ; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x float> %5, <4 x float> %7
822 ; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x float> %6, <4 x float> %8
823 ; CHECK-NEXT: store <4 x float> %12, <4 x float>* %0, align 16
824 ; CHECK-NEXT: ret <4 x float> %11
825 ; CHECK-NEXT: }
826
827 define <6 x float> @fcmp_ord_on_6xfloat(<6 x float>, <6 x float>, <6 x float>, < 6 x float>) {
828 entry:
829 %4 = fcmp ord <6 x float> %0, %1
830 %5 = select <6 x i1> %4, <6 x float> %2, <6 x float> %3
831 ret <6 x float> %5
832 }
833 ; CHECK-LABEL: define <4 x float> @fcmp_ord_on_6xfloat(<4 x float>* nocapture no nnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, < 4 x float>, <4 x float>, <4 x float>, <4 x float>) {
834 ; CHECK: entry:
835 ; CHECK-NEXT: %9 = fcmp ord <4 x float> %1, %3
836 ; CHECK-NEXT: %10 = fcmp ord <4 x float> %2, %4
837 ; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x float> %5, <4 x float> %7
838 ; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x float> %6, <4 x float> %8
839 ; CHECK-NEXT: store <4 x float> %12, <4 x float>* %0, align 16
840 ; CHECK-NEXT: ret <4 x float> %11
841 ; CHECK-NEXT: }
842
843 define <6 x float> @fcmp_uno_on_6xfloat(<6 x float>, <6 x float>, <6 x float>, < 6 x float>) {
844 entry:
845 %4 = fcmp uno <6 x float> %0, %1
846 %5 = select <6 x i1> %4, <6 x float> %2, <6 x float> %3
847 ret <6 x float> %5
848 }
849 ; CHECK-LABEL: define <4 x float> @fcmp_uno_on_6xfloat(<4 x float>* nocapture no nnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, < 4 x float>, <4 x float>, <4 x float>, <4 x float>) {
850 ; CHECK: entry:
851 ; CHECK-NEXT: %9 = fcmp uno <4 x float> %1, %3
852 ; CHECK-NEXT: %10 = fcmp uno <4 x float> %2, %4
853 ; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x float> %5, <4 x float> %7
854 ; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x float> %6, <4 x float> %8
855 ; CHECK-NEXT: store <4 x float> %12, <4 x float>* %0, align 16
856 ; CHECK-NEXT: ret <4 x float> %11
857 ; CHECK-NEXT: }
858
859 define <6 x double> @fcmp_true_on_6xdouble(<6 x double>, <6 x double>, <6 x doub le>, <6 x double>) {
860 entry:
861 %4 = fcmp true <6 x double> %0, %1
862 %5 = select <6 x i1> %4, <6 x double> %2, <6 x double> %3
863 ret <6 x double> %5
864 }
865 ; CHECK-LABEL: define <2 x double> @fcmp_true_on_6xdouble(<2 x double>* nocaptur e nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(1 6), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x d ouble>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
866 ; CHECK: entry:
867 ; CHECK-NEXT: %14 = fcmp true <2 x double> %2, %5
868 ; CHECK-NEXT: %15 = fcmp true <2 x double> %3, %6
869 ; CHECK-NEXT: %16 = fcmp true <2 x double> %4, %7
870 ; CHECK-NEXT: %17 = select <2 x i1> %14, <2 x double> %8, <2 x double> %11
871 ; CHECK-NEXT: %18 = select <2 x i1> %15, <2 x double> %9, <2 x double> %12
872 ; CHECK-NEXT: %19 = select <2 x i1> %16, <2 x double> %10, <2 x double> %13
873 ; CHECK-NEXT: store <2 x double> %18, <2 x double>* %0, align 16
874 ; CHECK-NEXT: store <2 x double> %19, <2 x double>* %1, align 16
875 ; CHECK-NEXT: ret <2 x double> %17
876 ; CHECK-NEXT: }
877
878 define <6 x double> @fcmp_false_on_6xdouble(<6 x double>, <6 x double>, <6 x dou ble>, <6 x double>) {
879 entry:
880 %4 = fcmp false <6 x double> %0, %1
881 %5 = select <6 x i1> %4, <6 x double> %2, <6 x double> %3
882 ret <6 x double> %5
883 }
884 ; CHECK-LABEL: define <2 x double> @fcmp_false_on_6xdouble(<2 x double>* nocaptu re nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable( 16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, < 2 x double>) {
885 ; CHECK: entry:
886 ; CHECK-NEXT: %14 = fcmp false <2 x double> %2, %5
887 ; CHECK-NEXT: %15 = fcmp false <2 x double> %3, %6
888 ; CHECK-NEXT: %16 = fcmp false <2 x double> %4, %7
889 ; CHECK-NEXT: %17 = select <2 x i1> %14, <2 x double> %8, <2 x double> %11
890 ; CHECK-NEXT: %18 = select <2 x i1> %15, <2 x double> %9, <2 x double> %12
891 ; CHECK-NEXT: %19 = select <2 x i1> %16, <2 x double> %10, <2 x double> %13
892 ; CHECK-NEXT: store <2 x double> %18, <2 x double>* %0, align 16
893 ; CHECK-NEXT: store <2 x double> %19, <2 x double>* %1, align 16
894 ; CHECK-NEXT: ret <2 x double> %17
895 ; CHECK-NEXT: }
896
897 define <6 x double> @fcmp_oeq_on_6xdouble(<6 x double>, <6 x double>, <6 x doubl e>, <6 x double>) {
898 entry:
899 %4 = fcmp oeq <6 x double> %0, %1
900 %5 = select <6 x i1> %4, <6 x double> %2, <6 x double> %3
901 ret <6 x double> %5
902 }
903 ; CHECK-LABEL: define <2 x double> @fcmp_oeq_on_6xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16 ), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x do uble>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
904 ; CHECK: entry:
905 ; CHECK-NEXT: %14 = fcmp oeq <2 x double> %2, %5
906 ; CHECK-NEXT: %15 = fcmp oeq <2 x double> %3, %6
907 ; CHECK-NEXT: %16 = fcmp oeq <2 x double> %4, %7
908 ; CHECK-NEXT: %17 = select <2 x i1> %14, <2 x double> %8, <2 x double> %11
909 ; CHECK-NEXT: %18 = select <2 x i1> %15, <2 x double> %9, <2 x double> %12
910 ; CHECK-NEXT: %19 = select <2 x i1> %16, <2 x double> %10, <2 x double> %13
911 ; CHECK-NEXT: store <2 x double> %18, <2 x double>* %0, align 16
912 ; CHECK-NEXT: store <2 x double> %19, <2 x double>* %1, align 16
913 ; CHECK-NEXT: ret <2 x double> %17
914 ; CHECK-NEXT: }
915
916 define <6 x double> @fcmp_ueq_on_6xdouble(<6 x double>, <6 x double>, <6 x doubl e>, <6 x double>) {
917 entry:
918 %4 = fcmp ueq <6 x double> %0, %1
919 %5 = select <6 x i1> %4, <6 x double> %2, <6 x double> %3
920 ret <6 x double> %5
921 }
922 ; CHECK-LABEL: define <2 x double> @fcmp_ueq_on_6xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16 ), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x do uble>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
923 ; CHECK: entry:
924 ; CHECK-NEXT: %14 = fcmp ueq <2 x double> %2, %5
925 ; CHECK-NEXT: %15 = fcmp ueq <2 x double> %3, %6
926 ; CHECK-NEXT: %16 = fcmp ueq <2 x double> %4, %7
927 ; CHECK-NEXT: %17 = select <2 x i1> %14, <2 x double> %8, <2 x double> %11
928 ; CHECK-NEXT: %18 = select <2 x i1> %15, <2 x double> %9, <2 x double> %12
929 ; CHECK-NEXT: %19 = select <2 x i1> %16, <2 x double> %10, <2 x double> %13
930 ; CHECK-NEXT: store <2 x double> %18, <2 x double>* %0, align 16
931 ; CHECK-NEXT: store <2 x double> %19, <2 x double>* %1, align 16
932 ; CHECK-NEXT: ret <2 x double> %17
933 ; CHECK-NEXT: }
934
935 define <6 x double> @fcmp_one_on_6xdouble(<6 x double>, <6 x double>, <6 x doubl e>, <6 x double>) {
936 entry:
937 %4 = fcmp one <6 x double> %0, %1
938 %5 = select <6 x i1> %4, <6 x double> %2, <6 x double> %3
939 ret <6 x double> %5
940 }
941 ; CHECK-LABEL: define <2 x double> @fcmp_one_on_6xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16 ), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x do uble>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
942 ; CHECK: entry:
943 ; CHECK-NEXT: %14 = fcmp one <2 x double> %2, %5
944 ; CHECK-NEXT: %15 = fcmp one <2 x double> %3, %6
945 ; CHECK-NEXT: %16 = fcmp one <2 x double> %4, %7
946 ; CHECK-NEXT: %17 = select <2 x i1> %14, <2 x double> %8, <2 x double> %11
947 ; CHECK-NEXT: %18 = select <2 x i1> %15, <2 x double> %9, <2 x double> %12
948 ; CHECK-NEXT: %19 = select <2 x i1> %16, <2 x double> %10, <2 x double> %13
949 ; CHECK-NEXT: store <2 x double> %18, <2 x double>* %0, align 16
950 ; CHECK-NEXT: store <2 x double> %19, <2 x double>* %1, align 16
951 ; CHECK-NEXT: ret <2 x double> %17
952 ; CHECK-NEXT: }
953
954 define <6 x double> @fcmp_une_on_6xdouble(<6 x double>, <6 x double>, <6 x doubl e>, <6 x double>) {
955 entry:
956 %4 = fcmp une <6 x double> %0, %1
957 %5 = select <6 x i1> %4, <6 x double> %2, <6 x double> %3
958 ret <6 x double> %5
959 }
960 ; CHECK-LABEL: define <2 x double> @fcmp_une_on_6xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16 ), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x do uble>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
961 ; CHECK: entry:
962 ; CHECK-NEXT: %14 = fcmp une <2 x double> %2, %5
963 ; CHECK-NEXT: %15 = fcmp une <2 x double> %3, %6
964 ; CHECK-NEXT: %16 = fcmp une <2 x double> %4, %7
965 ; CHECK-NEXT: %17 = select <2 x i1> %14, <2 x double> %8, <2 x double> %11
966 ; CHECK-NEXT: %18 = select <2 x i1> %15, <2 x double> %9, <2 x double> %12
967 ; CHECK-NEXT: %19 = select <2 x i1> %16, <2 x double> %10, <2 x double> %13
968 ; CHECK-NEXT: store <2 x double> %18, <2 x double>* %0, align 16
969 ; CHECK-NEXT: store <2 x double> %19, <2 x double>* %1, align 16
970 ; CHECK-NEXT: ret <2 x double> %17
971 ; CHECK-NEXT: }
972
973 define <6 x double> @fcmp_ogt_on_6xdouble(<6 x double>, <6 x double>, <6 x doubl e>, <6 x double>) {
974 entry:
975 %4 = fcmp ogt <6 x double> %0, %1
976 %5 = select <6 x i1> %4, <6 x double> %2, <6 x double> %3
977 ret <6 x double> %5
978 }
979 ; CHECK-LABEL: define <2 x double> @fcmp_ogt_on_6xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16 ), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x do uble>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
980 ; CHECK: entry:
981 ; CHECK-NEXT: %14 = fcmp ogt <2 x double> %2, %5
982 ; CHECK-NEXT: %15 = fcmp ogt <2 x double> %3, %6
983 ; CHECK-NEXT: %16 = fcmp ogt <2 x double> %4, %7
984 ; CHECK-NEXT: %17 = select <2 x i1> %14, <2 x double> %8, <2 x double> %11
985 ; CHECK-NEXT: %18 = select <2 x i1> %15, <2 x double> %9, <2 x double> %12
986 ; CHECK-NEXT: %19 = select <2 x i1> %16, <2 x double> %10, <2 x double> %13
987 ; CHECK-NEXT: store <2 x double> %18, <2 x double>* %0, align 16
988 ; CHECK-NEXT: store <2 x double> %19, <2 x double>* %1, align 16
989 ; CHECK-NEXT: ret <2 x double> %17
990 ; CHECK-NEXT: }
991
992 define <6 x double> @fcmp_ugt_on_6xdouble(<6 x double>, <6 x double>, <6 x doubl e>, <6 x double>) {
993 entry:
994 %4 = fcmp ugt <6 x double> %0, %1
995 %5 = select <6 x i1> %4, <6 x double> %2, <6 x double> %3
996 ret <6 x double> %5
997 }
998 ; CHECK-LABEL: define <2 x double> @fcmp_ugt_on_6xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16 ), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x do uble>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
999 ; CHECK: entry:
1000 ; CHECK-NEXT: %14 = fcmp ugt <2 x double> %2, %5
1001 ; CHECK-NEXT: %15 = fcmp ugt <2 x double> %3, %6
1002 ; CHECK-NEXT: %16 = fcmp ugt <2 x double> %4, %7
1003 ; CHECK-NEXT: %17 = select <2 x i1> %14, <2 x double> %8, <2 x double> %11
1004 ; CHECK-NEXT: %18 = select <2 x i1> %15, <2 x double> %9, <2 x double> %12
1005 ; CHECK-NEXT: %19 = select <2 x i1> %16, <2 x double> %10, <2 x double> %13
1006 ; CHECK-NEXT: store <2 x double> %18, <2 x double>* %0, align 16
1007 ; CHECK-NEXT: store <2 x double> %19, <2 x double>* %1, align 16
1008 ; CHECK-NEXT: ret <2 x double> %17
1009 ; CHECK-NEXT: }
1010
1011 define <6 x double> @fcmp_oge_on_6xdouble(<6 x double>, <6 x double>, <6 x doubl e>, <6 x double>) {
1012 entry:
1013 %4 = fcmp oge <6 x double> %0, %1
1014 %5 = select <6 x i1> %4, <6 x double> %2, <6 x double> %3
1015 ret <6 x double> %5
1016 }
1017 ; CHECK-LABEL: define <2 x double> @fcmp_oge_on_6xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16 ), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x do uble>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
1018 ; CHECK: entry:
1019 ; CHECK-NEXT: %14 = fcmp oge <2 x double> %2, %5
1020 ; CHECK-NEXT: %15 = fcmp oge <2 x double> %3, %6
1021 ; CHECK-NEXT: %16 = fcmp oge <2 x double> %4, %7
1022 ; CHECK-NEXT: %17 = select <2 x i1> %14, <2 x double> %8, <2 x double> %11
1023 ; CHECK-NEXT: %18 = select <2 x i1> %15, <2 x double> %9, <2 x double> %12
1024 ; CHECK-NEXT: %19 = select <2 x i1> %16, <2 x double> %10, <2 x double> %13
1025 ; CHECK-NEXT: store <2 x double> %18, <2 x double>* %0, align 16
1026 ; CHECK-NEXT: store <2 x double> %19, <2 x double>* %1, align 16
1027 ; CHECK-NEXT: ret <2 x double> %17
1028 ; CHECK-NEXT: }
1029
1030 define <6 x double> @fcmp_uge_on_6xdouble(<6 x double>, <6 x double>, <6 x doubl e>, <6 x double>) {
1031 entry:
1032 %4 = fcmp uge <6 x double> %0, %1
1033 %5 = select <6 x i1> %4, <6 x double> %2, <6 x double> %3
1034 ret <6 x double> %5
1035 }
1036 ; CHECK-LABEL: define <2 x double> @fcmp_uge_on_6xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16 ), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x do uble>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
1037 ; CHECK: entry:
1038 ; CHECK-NEXT: %14 = fcmp uge <2 x double> %2, %5
1039 ; CHECK-NEXT: %15 = fcmp uge <2 x double> %3, %6
1040 ; CHECK-NEXT: %16 = fcmp uge <2 x double> %4, %7
1041 ; CHECK-NEXT: %17 = select <2 x i1> %14, <2 x double> %8, <2 x double> %11
1042 ; CHECK-NEXT: %18 = select <2 x i1> %15, <2 x double> %9, <2 x double> %12
1043 ; CHECK-NEXT: %19 = select <2 x i1> %16, <2 x double> %10, <2 x double> %13
1044 ; CHECK-NEXT: store <2 x double> %18, <2 x double>* %0, align 16
1045 ; CHECK-NEXT: store <2 x double> %19, <2 x double>* %1, align 16
1046 ; CHECK-NEXT: ret <2 x double> %17
1047 ; CHECK-NEXT: }
1048
1049 define <6 x double> @fcmp_ord_on_6xdouble(<6 x double>, <6 x double>, <6 x doubl e>, <6 x double>) {
1050 entry:
1051 %4 = fcmp ord <6 x double> %0, %1
1052 %5 = select <6 x i1> %4, <6 x double> %2, <6 x double> %3
1053 ret <6 x double> %5
1054 }
1055 ; CHECK-LABEL: define <2 x double> @fcmp_ord_on_6xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16 ), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x do uble>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
1056 ; CHECK: entry:
1057 ; CHECK-NEXT: %14 = fcmp ord <2 x double> %2, %5
1058 ; CHECK-NEXT: %15 = fcmp ord <2 x double> %3, %6
1059 ; CHECK-NEXT: %16 = fcmp ord <2 x double> %4, %7
1060 ; CHECK-NEXT: %17 = select <2 x i1> %14, <2 x double> %8, <2 x double> %11
1061 ; CHECK-NEXT: %18 = select <2 x i1> %15, <2 x double> %9, <2 x double> %12
1062 ; CHECK-NEXT: %19 = select <2 x i1> %16, <2 x double> %10, <2 x double> %13
1063 ; CHECK-NEXT: store <2 x double> %18, <2 x double>* %0, align 16
1064 ; CHECK-NEXT: store <2 x double> %19, <2 x double>* %1, align 16
1065 ; CHECK-NEXT: ret <2 x double> %17
1066 ; CHECK-NEXT: }
1067
1068 define <6 x double> @fcmp_uno_on_6xdouble(<6 x double>, <6 x double>, <6 x doubl e>, <6 x double>) {
1069 entry:
1070 %4 = fcmp uno <6 x double> %0, %1
1071 %5 = select <6 x i1> %4, <6 x double> %2, <6 x double> %3
1072 ret <6 x double> %5
1073 }
1074 ; CHECK-LABEL: define <2 x double> @fcmp_uno_on_6xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16 ), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x do uble>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
1075 ; CHECK: entry:
1076 ; CHECK-NEXT: %14 = fcmp uno <2 x double> %2, %5
1077 ; CHECK-NEXT: %15 = fcmp uno <2 x double> %3, %6
1078 ; CHECK-NEXT: %16 = fcmp uno <2 x double> %4, %7
1079 ; CHECK-NEXT: %17 = select <2 x i1> %14, <2 x double> %8, <2 x double> %11
1080 ; CHECK-NEXT: %18 = select <2 x i1> %15, <2 x double> %9, <2 x double> %12
1081 ; CHECK-NEXT: %19 = select <2 x i1> %16, <2 x double> %10, <2 x double> %13
1082 ; CHECK-NEXT: store <2 x double> %18, <2 x double>* %0, align 16
1083 ; CHECK-NEXT: store <2 x double> %19, <2 x double>* %1, align 16
1084 ; CHECK-NEXT: ret <2 x double> %17
1085 ; CHECK-NEXT: }
1086
1087 define <8 x float> @fcmp_true_on_8xfloat(<8 x float>, <8 x float>, <8 x float>, <8 x float>) {
1088 entry:
1089 %4 = fcmp true <8 x float> %0, %1
1090 %5 = select <8 x i1> %4, <8 x float> %2, <8 x float> %3
1091 ret <8 x float> %5
1092 }
1093 ; CHECK-LABEL: define <4 x float> @fcmp_true_on_8xfloat(<4 x float>* nocapture n onnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>) {
1094 ; CHECK: entry:
1095 ; CHECK-NEXT: %9 = fcmp true <4 x float> %1, %3
1096 ; CHECK-NEXT: %10 = fcmp true <4 x float> %2, %4
1097 ; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x float> %5, <4 x float> %7
1098 ; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x float> %6, <4 x float> %8
1099 ; CHECK-NEXT: store <4 x float> %12, <4 x float>* %0, align 16
1100 ; CHECK-NEXT: ret <4 x float> %11
1101 ; CHECK-NEXT: }
1102
1103 define <8 x float> @fcmp_false_on_8xfloat(<8 x float>, <8 x float>, <8 x float>, <8 x float>) {
1104 entry:
1105 %4 = fcmp false <8 x float> %0, %1
1106 %5 = select <8 x i1> %4, <8 x float> %2, <8 x float> %3
1107 ret <8 x float> %5
1108 }
1109 ; CHECK-LABEL: define <4 x float> @fcmp_false_on_8xfloat(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>) {
1110 ; CHECK: entry:
1111 ; CHECK-NEXT: %9 = fcmp false <4 x float> %1, %3
1112 ; CHECK-NEXT: %10 = fcmp false <4 x float> %2, %4
1113 ; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x float> %5, <4 x float> %7
1114 ; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x float> %6, <4 x float> %8
1115 ; CHECK-NEXT: store <4 x float> %12, <4 x float>* %0, align 16
1116 ; CHECK-NEXT: ret <4 x float> %11
1117 ; CHECK-NEXT: }
1118
1119 define <8 x float> @fcmp_oeq_on_8xfloat(<8 x float>, <8 x float>, <8 x float>, < 8 x float>) {
1120 entry:
1121 %4 = fcmp oeq <8 x float> %0, %1
1122 %5 = select <8 x i1> %4, <8 x float> %2, <8 x float> %3
1123 ret <8 x float> %5
1124 }
1125 ; CHECK-LABEL: define <4 x float> @fcmp_oeq_on_8xfloat(<4 x float>* nocapture no nnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, < 4 x float>, <4 x float>, <4 x float>, <4 x float>) {
1126 ; CHECK: entry:
1127 ; CHECK-NEXT: %9 = fcmp oeq <4 x float> %1, %3
1128 ; CHECK-NEXT: %10 = fcmp oeq <4 x float> %2, %4
1129 ; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x float> %5, <4 x float> %7
1130 ; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x float> %6, <4 x float> %8
1131 ; CHECK-NEXT: store <4 x float> %12, <4 x float>* %0, align 16
1132 ; CHECK-NEXT: ret <4 x float> %11
1133 ; CHECK-NEXT: }
1134
1135 define <8 x float> @fcmp_ueq_on_8xfloat(<8 x float>, <8 x float>, <8 x float>, < 8 x float>) {
1136 entry:
1137 %4 = fcmp ueq <8 x float> %0, %1
1138 %5 = select <8 x i1> %4, <8 x float> %2, <8 x float> %3
1139 ret <8 x float> %5
1140 }
1141 ; CHECK-LABEL: define <4 x float> @fcmp_ueq_on_8xfloat(<4 x float>* nocapture no nnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, < 4 x float>, <4 x float>, <4 x float>, <4 x float>) {
1142 ; CHECK: entry:
1143 ; CHECK-NEXT: %9 = fcmp ueq <4 x float> %1, %3
1144 ; CHECK-NEXT: %10 = fcmp ueq <4 x float> %2, %4
1145 ; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x float> %5, <4 x float> %7
1146 ; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x float> %6, <4 x float> %8
1147 ; CHECK-NEXT: store <4 x float> %12, <4 x float>* %0, align 16
1148 ; CHECK-NEXT: ret <4 x float> %11
1149 ; CHECK-NEXT: }
1150
1151 define <8 x float> @fcmp_one_on_8xfloat(<8 x float>, <8 x float>, <8 x float>, < 8 x float>) {
1152 entry:
1153 %4 = fcmp one <8 x float> %0, %1
1154 %5 = select <8 x i1> %4, <8 x float> %2, <8 x float> %3
1155 ret <8 x float> %5
1156 }
1157 ; CHECK-LABEL: define <4 x float> @fcmp_one_on_8xfloat(<4 x float>* nocapture no nnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, < 4 x float>, <4 x float>, <4 x float>, <4 x float>) {
1158 ; CHECK: entry:
1159 ; CHECK-NEXT: %9 = fcmp one <4 x float> %1, %3
1160 ; CHECK-NEXT: %10 = fcmp one <4 x float> %2, %4
1161 ; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x float> %5, <4 x float> %7
1162 ; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x float> %6, <4 x float> %8
1163 ; CHECK-NEXT: store <4 x float> %12, <4 x float>* %0, align 16
1164 ; CHECK-NEXT: ret <4 x float> %11
1165 ; CHECK-NEXT: }
1166
1167 define <8 x float> @fcmp_une_on_8xfloat(<8 x float>, <8 x float>, <8 x float>, < 8 x float>) {
1168 entry:
1169 %4 = fcmp une <8 x float> %0, %1
1170 %5 = select <8 x i1> %4, <8 x float> %2, <8 x float> %3
1171 ret <8 x float> %5
1172 }
1173 ; CHECK-LABEL: define <4 x float> @fcmp_une_on_8xfloat(<4 x float>* nocapture no nnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, < 4 x float>, <4 x float>, <4 x float>, <4 x float>) {
1174 ; CHECK: entry:
1175 ; CHECK-NEXT: %9 = fcmp une <4 x float> %1, %3
1176 ; CHECK-NEXT: %10 = fcmp une <4 x float> %2, %4
1177 ; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x float> %5, <4 x float> %7
1178 ; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x float> %6, <4 x float> %8
1179 ; CHECK-NEXT: store <4 x float> %12, <4 x float>* %0, align 16
1180 ; CHECK-NEXT: ret <4 x float> %11
1181 ; CHECK-NEXT: }
1182
1183 define <8 x float> @fcmp_ogt_on_8xfloat(<8 x float>, <8 x float>, <8 x float>, < 8 x float>) {
1184 entry:
1185 %4 = fcmp ogt <8 x float> %0, %1
1186 %5 = select <8 x i1> %4, <8 x float> %2, <8 x float> %3
1187 ret <8 x float> %5
1188 }
1189 ; CHECK-LABEL: define <4 x float> @fcmp_ogt_on_8xfloat(<4 x float>* nocapture no nnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, < 4 x float>, <4 x float>, <4 x float>, <4 x float>) {
1190 ; CHECK: entry:
1191 ; CHECK-NEXT: %9 = fcmp ogt <4 x float> %1, %3
1192 ; CHECK-NEXT: %10 = fcmp ogt <4 x float> %2, %4
1193 ; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x float> %5, <4 x float> %7
1194 ; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x float> %6, <4 x float> %8
1195 ; CHECK-NEXT: store <4 x float> %12, <4 x float>* %0, align 16
1196 ; CHECK-NEXT: ret <4 x float> %11
1197 ; CHECK-NEXT: }
1198
1199 define <8 x float> @fcmp_ugt_on_8xfloat(<8 x float>, <8 x float>, <8 x float>, < 8 x float>) {
1200 entry:
1201 %4 = fcmp ugt <8 x float> %0, %1
1202 %5 = select <8 x i1> %4, <8 x float> %2, <8 x float> %3
1203 ret <8 x float> %5
1204 }
1205 ; CHECK-LABEL: define <4 x float> @fcmp_ugt_on_8xfloat(<4 x float>* nocapture no nnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, < 4 x float>, <4 x float>, <4 x float>, <4 x float>) {
1206 ; CHECK: entry:
1207 ; CHECK-NEXT: %9 = fcmp ugt <4 x float> %1, %3
1208 ; CHECK-NEXT: %10 = fcmp ugt <4 x float> %2, %4
1209 ; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x float> %5, <4 x float> %7
1210 ; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x float> %6, <4 x float> %8
1211 ; CHECK-NEXT: store <4 x float> %12, <4 x float>* %0, align 16
1212 ; CHECK-NEXT: ret <4 x float> %11
1213 ; CHECK-NEXT: }
1214
1215 define <8 x float> @fcmp_oge_on_8xfloat(<8 x float>, <8 x float>, <8 x float>, < 8 x float>) {
1216 entry:
1217 %4 = fcmp oge <8 x float> %0, %1
1218 %5 = select <8 x i1> %4, <8 x float> %2, <8 x float> %3
1219 ret <8 x float> %5
1220 }
1221 ; CHECK-LABEL: define <4 x float> @fcmp_oge_on_8xfloat(<4 x float>* nocapture no nnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, < 4 x float>, <4 x float>, <4 x float>, <4 x float>) {
1222 ; CHECK: entry:
1223 ; CHECK-NEXT: %9 = fcmp oge <4 x float> %1, %3
1224 ; CHECK-NEXT: %10 = fcmp oge <4 x float> %2, %4
1225 ; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x float> %5, <4 x float> %7
1226 ; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x float> %6, <4 x float> %8
1227 ; CHECK-NEXT: store <4 x float> %12, <4 x float>* %0, align 16
1228 ; CHECK-NEXT: ret <4 x float> %11
1229 ; CHECK-NEXT: }
1230
1231 define <8 x float> @fcmp_uge_on_8xfloat(<8 x float>, <8 x float>, <8 x float>, < 8 x float>) {
1232 entry:
1233 %4 = fcmp uge <8 x float> %0, %1
1234 %5 = select <8 x i1> %4, <8 x float> %2, <8 x float> %3
1235 ret <8 x float> %5
1236 }
1237 ; CHECK-LABEL: define <4 x float> @fcmp_uge_on_8xfloat(<4 x float>* nocapture no nnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, < 4 x float>, <4 x float>, <4 x float>, <4 x float>) {
1238 ; CHECK: entry:
1239 ; CHECK-NEXT: %9 = fcmp uge <4 x float> %1, %3
1240 ; CHECK-NEXT: %10 = fcmp uge <4 x float> %2, %4
1241 ; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x float> %5, <4 x float> %7
1242 ; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x float> %6, <4 x float> %8
1243 ; CHECK-NEXT: store <4 x float> %12, <4 x float>* %0, align 16
1244 ; CHECK-NEXT: ret <4 x float> %11
1245 ; CHECK-NEXT: }
1246
1247 define <8 x float> @fcmp_ord_on_8xfloat(<8 x float>, <8 x float>, <8 x float>, < 8 x float>) {
1248 entry:
1249 %4 = fcmp ord <8 x float> %0, %1
1250 %5 = select <8 x i1> %4, <8 x float> %2, <8 x float> %3
1251 ret <8 x float> %5
1252 }
1253 ; CHECK-LABEL: define <4 x float> @fcmp_ord_on_8xfloat(<4 x float>* nocapture no nnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, < 4 x float>, <4 x float>, <4 x float>, <4 x float>) {
1254 ; CHECK: entry:
1255 ; CHECK-NEXT: %9 = fcmp ord <4 x float> %1, %3
1256 ; CHECK-NEXT: %10 = fcmp ord <4 x float> %2, %4
1257 ; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x float> %5, <4 x float> %7
1258 ; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x float> %6, <4 x float> %8
1259 ; CHECK-NEXT: store <4 x float> %12, <4 x float>* %0, align 16
1260 ; CHECK-NEXT: ret <4 x float> %11
1261 ; CHECK-NEXT: }
1262
1263 define <8 x float> @fcmp_uno_on_8xfloat(<8 x float>, <8 x float>, <8 x float>, < 8 x float>) {
1264 entry:
1265 %4 = fcmp uno <8 x float> %0, %1
1266 %5 = select <8 x i1> %4, <8 x float> %2, <8 x float> %3
1267 ret <8 x float> %5
1268 }
1269 ; CHECK-LABEL: define <4 x float> @fcmp_uno_on_8xfloat(<4 x float>* nocapture no nnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, < 4 x float>, <4 x float>, <4 x float>, <4 x float>) {
1270 ; CHECK: entry:
1271 ; CHECK-NEXT: %9 = fcmp uno <4 x float> %1, %3
1272 ; CHECK-NEXT: %10 = fcmp uno <4 x float> %2, %4
1273 ; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x float> %5, <4 x float> %7
1274 ; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x float> %6, <4 x float> %8
1275 ; CHECK-NEXT: store <4 x float> %12, <4 x float>* %0, align 16
1276 ; CHECK-NEXT: ret <4 x float> %11
1277 ; CHECK-NEXT: }
1278
1279 define <8 x double> @fcmp_true_on_8xdouble(<8 x double>, <8 x double>, <8 x doub le>, <8 x double>) {
1280 entry:
1281 %4 = fcmp true <8 x double> %0, %1
1282 %5 = select <8 x i1> %4, <8 x double> %2, <8 x double> %3
1283 ret <8 x double> %5
1284 }
1285 ; CHECK-LABEL: define <2 x double> @fcmp_true_on_8xdouble(<2 x double>* nocaptur e nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(1 6), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x doub le>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, < 2 x double>, <2 x double>, <2 x double>) {
1286 ; CHECK: entry:
1287 ; CHECK-NEXT: %19 = fcmp true <2 x double> %3, %7
1288 ; CHECK-NEXT: %20 = fcmp true <2 x double> %4, %8
1289 ; CHECK-NEXT: %21 = fcmp true <2 x double> %5, %9
1290 ; CHECK-NEXT: %22 = fcmp true <2 x double> %6, %10
1291 ; CHECK-NEXT: %23 = select <2 x i1> %19, <2 x double> %11, <2 x double> %15
1292 ; CHECK-NEXT: %24 = select <2 x i1> %20, <2 x double> %12, <2 x double> %16
1293 ; CHECK-NEXT: %25 = select <2 x i1> %21, <2 x double> %13, <2 x double> %17
1294 ; CHECK-NEXT: %26 = select <2 x i1> %22, <2 x double> %14, <2 x double> %18
1295 ; CHECK-NEXT: store <2 x double> %24, <2 x double>* %0, align 16
1296 ; CHECK-NEXT: store <2 x double> %25, <2 x double>* %1, align 16
1297 ; CHECK-NEXT: store <2 x double> %26, <2 x double>* %2, align 16
1298 ; CHECK-NEXT: ret <2 x double> %23
1299 ; CHECK-NEXT: }
1300
1301 define <8 x double> @fcmp_false_on_8xdouble(<8 x double>, <8 x double>, <8 x dou ble>, <8 x double>) {
1302 entry:
1303 %4 = fcmp false <8 x double> %0, %1
1304 %5 = select <8 x i1> %4, <8 x double> %2, <8 x double> %3
1305 ret <8 x double> %5
1306 }
1307 ; CHECK-LABEL: define <2 x double> @fcmp_false_on_8xdouble(<2 x double>* nocaptu re nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable( 16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x dou ble>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
1308 ; CHECK: entry:
1309 ; CHECK-NEXT: %19 = fcmp false <2 x double> %3, %7
1310 ; CHECK-NEXT: %20 = fcmp false <2 x double> %4, %8
1311 ; CHECK-NEXT: %21 = fcmp false <2 x double> %5, %9
1312 ; CHECK-NEXT: %22 = fcmp false <2 x double> %6, %10
1313 ; CHECK-NEXT: %23 = select <2 x i1> %19, <2 x double> %11, <2 x double> %15
1314 ; CHECK-NEXT: %24 = select <2 x i1> %20, <2 x double> %12, <2 x double> %16
1315 ; CHECK-NEXT: %25 = select <2 x i1> %21, <2 x double> %13, <2 x double> %17
1316 ; CHECK-NEXT: %26 = select <2 x i1> %22, <2 x double> %14, <2 x double> %18
1317 ; CHECK-NEXT: store <2 x double> %24, <2 x double>* %0, align 16
1318 ; CHECK-NEXT: store <2 x double> %25, <2 x double>* %1, align 16
1319 ; CHECK-NEXT: store <2 x double> %26, <2 x double>* %2, align 16
1320 ; CHECK-NEXT: ret <2 x double> %23
1321 ; CHECK-NEXT: }
1322
1323 define <8 x double> @fcmp_oeq_on_8xdouble(<8 x double>, <8 x double>, <8 x doubl e>, <8 x double>) {
1324 entry:
1325 %4 = fcmp oeq <8 x double> %0, %1
1326 %5 = select <8 x i1> %4, <8 x double> %2, <8 x double> %3
1327 ret <8 x double> %5
1328 }
1329 ; CHECK-LABEL: define <2 x double> @fcmp_oeq_on_8xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16 ), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x doubl e>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x d ouble>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
1330 ; CHECK: entry:
1331 ; CHECK-NEXT: %19 = fcmp oeq <2 x double> %3, %7
1332 ; CHECK-NEXT: %20 = fcmp oeq <2 x double> %4, %8
1333 ; CHECK-NEXT: %21 = fcmp oeq <2 x double> %5, %9
1334 ; CHECK-NEXT: %22 = fcmp oeq <2 x double> %6, %10
1335 ; CHECK-NEXT: %23 = select <2 x i1> %19, <2 x double> %11, <2 x double> %15
1336 ; CHECK-NEXT: %24 = select <2 x i1> %20, <2 x double> %12, <2 x double> %16
1337 ; CHECK-NEXT: %25 = select <2 x i1> %21, <2 x double> %13, <2 x double> %17
1338 ; CHECK-NEXT: %26 = select <2 x i1> %22, <2 x double> %14, <2 x double> %18
1339 ; CHECK-NEXT: store <2 x double> %24, <2 x double>* %0, align 16
1340 ; CHECK-NEXT: store <2 x double> %25, <2 x double>* %1, align 16
1341 ; CHECK-NEXT: store <2 x double> %26, <2 x double>* %2, align 16
1342 ; CHECK-NEXT: ret <2 x double> %23
1343 ; CHECK-NEXT: }
1344
1345 define <8 x double> @fcmp_ueq_on_8xdouble(<8 x double>, <8 x double>, <8 x doubl e>, <8 x double>) {
1346 entry:
1347 %4 = fcmp ueq <8 x double> %0, %1
1348 %5 = select <8 x i1> %4, <8 x double> %2, <8 x double> %3
1349 ret <8 x double> %5
1350 }
1351 ; CHECK-LABEL: define <2 x double> @fcmp_ueq_on_8xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16 ), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x doubl e>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x d ouble>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
1352 ; CHECK: entry:
1353 ; CHECK-NEXT: %19 = fcmp ueq <2 x double> %3, %7
1354 ; CHECK-NEXT: %20 = fcmp ueq <2 x double> %4, %8
1355 ; CHECK-NEXT: %21 = fcmp ueq <2 x double> %5, %9
1356 ; CHECK-NEXT: %22 = fcmp ueq <2 x double> %6, %10
1357 ; CHECK-NEXT: %23 = select <2 x i1> %19, <2 x double> %11, <2 x double> %15
1358 ; CHECK-NEXT: %24 = select <2 x i1> %20, <2 x double> %12, <2 x double> %16
1359 ; CHECK-NEXT: %25 = select <2 x i1> %21, <2 x double> %13, <2 x double> %17
1360 ; CHECK-NEXT: %26 = select <2 x i1> %22, <2 x double> %14, <2 x double> %18
1361 ; CHECK-NEXT: store <2 x double> %24, <2 x double>* %0, align 16
1362 ; CHECK-NEXT: store <2 x double> %25, <2 x double>* %1, align 16
1363 ; CHECK-NEXT: store <2 x double> %26, <2 x double>* %2, align 16
1364 ; CHECK-NEXT: ret <2 x double> %23
1365 ; CHECK-NEXT: }
1366
1367 define <8 x double> @fcmp_one_on_8xdouble(<8 x double>, <8 x double>, <8 x doubl e>, <8 x double>) {
1368 entry:
1369 %4 = fcmp one <8 x double> %0, %1
1370 %5 = select <8 x i1> %4, <8 x double> %2, <8 x double> %3
1371 ret <8 x double> %5
1372 }
1373 ; CHECK-LABEL: define <2 x double> @fcmp_one_on_8xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16 ), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x doubl e>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x d ouble>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
1374 ; CHECK: entry:
1375 ; CHECK-NEXT: %19 = fcmp one <2 x double> %3, %7
1376 ; CHECK-NEXT: %20 = fcmp one <2 x double> %4, %8
1377 ; CHECK-NEXT: %21 = fcmp one <2 x double> %5, %9
1378 ; CHECK-NEXT: %22 = fcmp one <2 x double> %6, %10
1379 ; CHECK-NEXT: %23 = select <2 x i1> %19, <2 x double> %11, <2 x double> %15
1380 ; CHECK-NEXT: %24 = select <2 x i1> %20, <2 x double> %12, <2 x double> %16
1381 ; CHECK-NEXT: %25 = select <2 x i1> %21, <2 x double> %13, <2 x double> %17
1382 ; CHECK-NEXT: %26 = select <2 x i1> %22, <2 x double> %14, <2 x double> %18
1383 ; CHECK-NEXT: store <2 x double> %24, <2 x double>* %0, align 16
1384 ; CHECK-NEXT: store <2 x double> %25, <2 x double>* %1, align 16
1385 ; CHECK-NEXT: store <2 x double> %26, <2 x double>* %2, align 16
1386 ; CHECK-NEXT: ret <2 x double> %23
1387 ; CHECK-NEXT: }
1388
1389 define <8 x double> @fcmp_une_on_8xdouble(<8 x double>, <8 x double>, <8 x doubl e>, <8 x double>) {
1390 entry:
1391 %4 = fcmp une <8 x double> %0, %1
1392 %5 = select <8 x i1> %4, <8 x double> %2, <8 x double> %3
1393 ret <8 x double> %5
1394 }
1395 ; CHECK-LABEL: define <2 x double> @fcmp_une_on_8xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16 ), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x doubl e>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x d ouble>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
1396 ; CHECK: entry:
1397 ; CHECK-NEXT: %19 = fcmp une <2 x double> %3, %7
1398 ; CHECK-NEXT: %20 = fcmp une <2 x double> %4, %8
1399 ; CHECK-NEXT: %21 = fcmp une <2 x double> %5, %9
1400 ; CHECK-NEXT: %22 = fcmp une <2 x double> %6, %10
1401 ; CHECK-NEXT: %23 = select <2 x i1> %19, <2 x double> %11, <2 x double> %15
1402 ; CHECK-NEXT: %24 = select <2 x i1> %20, <2 x double> %12, <2 x double> %16
1403 ; CHECK-NEXT: %25 = select <2 x i1> %21, <2 x double> %13, <2 x double> %17
1404 ; CHECK-NEXT: %26 = select <2 x i1> %22, <2 x double> %14, <2 x double> %18
1405 ; CHECK-NEXT: store <2 x double> %24, <2 x double>* %0, align 16
1406 ; CHECK-NEXT: store <2 x double> %25, <2 x double>* %1, align 16
1407 ; CHECK-NEXT: store <2 x double> %26, <2 x double>* %2, align 16
1408 ; CHECK-NEXT: ret <2 x double> %23
1409 ; CHECK-NEXT: }
1410
1411 define <8 x double> @fcmp_ogt_on_8xdouble(<8 x double>, <8 x double>, <8 x doubl e>, <8 x double>) {
1412 entry:
1413 %4 = fcmp ogt <8 x double> %0, %1
1414 %5 = select <8 x i1> %4, <8 x double> %2, <8 x double> %3
1415 ret <8 x double> %5
1416 }
1417 ; CHECK-LABEL: define <2 x double> @fcmp_ogt_on_8xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16 ), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x doubl e>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x d ouble>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
1418 ; CHECK: entry:
1419 ; CHECK-NEXT: %19 = fcmp ogt <2 x double> %3, %7
1420 ; CHECK-NEXT: %20 = fcmp ogt <2 x double> %4, %8
1421 ; CHECK-NEXT: %21 = fcmp ogt <2 x double> %5, %9
1422 ; CHECK-NEXT: %22 = fcmp ogt <2 x double> %6, %10
1423 ; CHECK-NEXT: %23 = select <2 x i1> %19, <2 x double> %11, <2 x double> %15
1424 ; CHECK-NEXT: %24 = select <2 x i1> %20, <2 x double> %12, <2 x double> %16
1425 ; CHECK-NEXT: %25 = select <2 x i1> %21, <2 x double> %13, <2 x double> %17
1426 ; CHECK-NEXT: %26 = select <2 x i1> %22, <2 x double> %14, <2 x double> %18
1427 ; CHECK-NEXT: store <2 x double> %24, <2 x double>* %0, align 16
1428 ; CHECK-NEXT: store <2 x double> %25, <2 x double>* %1, align 16
1429 ; CHECK-NEXT: store <2 x double> %26, <2 x double>* %2, align 16
1430 ; CHECK-NEXT: ret <2 x double> %23
1431 ; CHECK-NEXT: }
1432
1433 define <8 x double> @fcmp_ugt_on_8xdouble(<8 x double>, <8 x double>, <8 x doubl e>, <8 x double>) {
1434 entry:
1435 %4 = fcmp ugt <8 x double> %0, %1
1436 %5 = select <8 x i1> %4, <8 x double> %2, <8 x double> %3
1437 ret <8 x double> %5
1438 }
1439 ; CHECK-LABEL: define <2 x double> @fcmp_ugt_on_8xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16 ), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x doubl e>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x d ouble>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
1440 ; CHECK: entry:
1441 ; CHECK-NEXT: %19 = fcmp ugt <2 x double> %3, %7
1442 ; CHECK-NEXT: %20 = fcmp ugt <2 x double> %4, %8
1443 ; CHECK-NEXT: %21 = fcmp ugt <2 x double> %5, %9
1444 ; CHECK-NEXT: %22 = fcmp ugt <2 x double> %6, %10
1445 ; CHECK-NEXT: %23 = select <2 x i1> %19, <2 x double> %11, <2 x double> %15
1446 ; CHECK-NEXT: %24 = select <2 x i1> %20, <2 x double> %12, <2 x double> %16
1447 ; CHECK-NEXT: %25 = select <2 x i1> %21, <2 x double> %13, <2 x double> %17
1448 ; CHECK-NEXT: %26 = select <2 x i1> %22, <2 x double> %14, <2 x double> %18
1449 ; CHECK-NEXT: store <2 x double> %24, <2 x double>* %0, align 16
1450 ; CHECK-NEXT: store <2 x double> %25, <2 x double>* %1, align 16
1451 ; CHECK-NEXT: store <2 x double> %26, <2 x double>* %2, align 16
1452 ; CHECK-NEXT: ret <2 x double> %23
1453 ; CHECK-NEXT: }
1454
1455 define <8 x double> @fcmp_oge_on_8xdouble(<8 x double>, <8 x double>, <8 x doubl e>, <8 x double>) {
1456 entry:
1457 %4 = fcmp oge <8 x double> %0, %1
1458 %5 = select <8 x i1> %4, <8 x double> %2, <8 x double> %3
1459 ret <8 x double> %5
1460 }
1461 ; CHECK-LABEL: define <2 x double> @fcmp_oge_on_8xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16 ), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x doubl e>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x d ouble>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
1462 ; CHECK: entry:
1463 ; CHECK-NEXT: %19 = fcmp oge <2 x double> %3, %7
1464 ; CHECK-NEXT: %20 = fcmp oge <2 x double> %4, %8
1465 ; CHECK-NEXT: %21 = fcmp oge <2 x double> %5, %9
1466 ; CHECK-NEXT: %22 = fcmp oge <2 x double> %6, %10
1467 ; CHECK-NEXT: %23 = select <2 x i1> %19, <2 x double> %11, <2 x double> %15
1468 ; CHECK-NEXT: %24 = select <2 x i1> %20, <2 x double> %12, <2 x double> %16
1469 ; CHECK-NEXT: %25 = select <2 x i1> %21, <2 x double> %13, <2 x double> %17
1470 ; CHECK-NEXT: %26 = select <2 x i1> %22, <2 x double> %14, <2 x double> %18
1471 ; CHECK-NEXT: store <2 x double> %24, <2 x double>* %0, align 16
1472 ; CHECK-NEXT: store <2 x double> %25, <2 x double>* %1, align 16
1473 ; CHECK-NEXT: store <2 x double> %26, <2 x double>* %2, align 16
1474 ; CHECK-NEXT: ret <2 x double> %23
1475 ; CHECK-NEXT: }
1476
1477 define <8 x double> @fcmp_uge_on_8xdouble(<8 x double>, <8 x double>, <8 x doubl e>, <8 x double>) {
1478 entry:
1479 %4 = fcmp uge <8 x double> %0, %1
1480 %5 = select <8 x i1> %4, <8 x double> %2, <8 x double> %3
1481 ret <8 x double> %5
1482 }
1483 ; CHECK-LABEL: define <2 x double> @fcmp_uge_on_8xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16 ), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x doubl e>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x d ouble>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
1484 ; CHECK: entry:
1485 ; CHECK-NEXT: %19 = fcmp uge <2 x double> %3, %7
1486 ; CHECK-NEXT: %20 = fcmp uge <2 x double> %4, %8
1487 ; CHECK-NEXT: %21 = fcmp uge <2 x double> %5, %9
1488 ; CHECK-NEXT: %22 = fcmp uge <2 x double> %6, %10
1489 ; CHECK-NEXT: %23 = select <2 x i1> %19, <2 x double> %11, <2 x double> %15
1490 ; CHECK-NEXT: %24 = select <2 x i1> %20, <2 x double> %12, <2 x double> %16
1491 ; CHECK-NEXT: %25 = select <2 x i1> %21, <2 x double> %13, <2 x double> %17
1492 ; CHECK-NEXT: %26 = select <2 x i1> %22, <2 x double> %14, <2 x double> %18
1493 ; CHECK-NEXT: store <2 x double> %24, <2 x double>* %0, align 16
1494 ; CHECK-NEXT: store <2 x double> %25, <2 x double>* %1, align 16
1495 ; CHECK-NEXT: store <2 x double> %26, <2 x double>* %2, align 16
1496 ; CHECK-NEXT: ret <2 x double> %23
1497 ; CHECK-NEXT: }
1498
1499 define <8 x double> @fcmp_ord_on_8xdouble(<8 x double>, <8 x double>, <8 x doubl e>, <8 x double>) {
1500 entry:
1501 %4 = fcmp ord <8 x double> %0, %1
1502 %5 = select <8 x i1> %4, <8 x double> %2, <8 x double> %3
1503 ret <8 x double> %5
1504 }
1505 ; CHECK-LABEL: define <2 x double> @fcmp_ord_on_8xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16 ), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x doubl e>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x d ouble>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
1506 ; CHECK: entry:
1507 ; CHECK-NEXT: %19 = fcmp ord <2 x double> %3, %7
1508 ; CHECK-NEXT: %20 = fcmp ord <2 x double> %4, %8
1509 ; CHECK-NEXT: %21 = fcmp ord <2 x double> %5, %9
1510 ; CHECK-NEXT: %22 = fcmp ord <2 x double> %6, %10
1511 ; CHECK-NEXT: %23 = select <2 x i1> %19, <2 x double> %11, <2 x double> %15
1512 ; CHECK-NEXT: %24 = select <2 x i1> %20, <2 x double> %12, <2 x double> %16
1513 ; CHECK-NEXT: %25 = select <2 x i1> %21, <2 x double> %13, <2 x double> %17
1514 ; CHECK-NEXT: %26 = select <2 x i1> %22, <2 x double> %14, <2 x double> %18
1515 ; CHECK-NEXT: store <2 x double> %24, <2 x double>* %0, align 16
1516 ; CHECK-NEXT: store <2 x double> %25, <2 x double>* %1, align 16
1517 ; CHECK-NEXT: store <2 x double> %26, <2 x double>* %2, align 16
1518 ; CHECK-NEXT: ret <2 x double> %23
1519 ; CHECK-NEXT: }
1520
1521 define <8 x double> @fcmp_uno_on_8xdouble(<8 x double>, <8 x double>, <8 x doubl e>, <8 x double>) {
1522 entry:
1523 %4 = fcmp uno <8 x double> %0, %1
1524 %5 = select <8 x i1> %4, <8 x double> %2, <8 x double> %3
1525 ret <8 x double> %5
1526 }
1527 ; CHECK-LABEL: define <2 x double> @fcmp_uno_on_8xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16 ), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x doubl e>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x d ouble>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
1528 ; CHECK: entry:
1529 ; CHECK-NEXT: %19 = fcmp uno <2 x double> %3, %7
1530 ; CHECK-NEXT: %20 = fcmp uno <2 x double> %4, %8
1531 ; CHECK-NEXT: %21 = fcmp uno <2 x double> %5, %9
1532 ; CHECK-NEXT: %22 = fcmp uno <2 x double> %6, %10
1533 ; CHECK-NEXT: %23 = select <2 x i1> %19, <2 x double> %11, <2 x double> %15
1534 ; CHECK-NEXT: %24 = select <2 x i1> %20, <2 x double> %12, <2 x double> %16
1535 ; CHECK-NEXT: %25 = select <2 x i1> %21, <2 x double> %13, <2 x double> %17
1536 ; CHECK-NEXT: %26 = select <2 x i1> %22, <2 x double> %14, <2 x double> %18
1537 ; CHECK-NEXT: store <2 x double> %24, <2 x double>* %0, align 16
1538 ; CHECK-NEXT: store <2 x double> %25, <2 x double>* %1, align 16
1539 ; CHECK-NEXT: store <2 x double> %26, <2 x double>* %2, align 16
1540 ; CHECK-NEXT: ret <2 x double> %23
1541 ; CHECK-NEXT: }
1542
1543 define <12 x float> @fcmp_true_on_12xfloat(<12 x float>, <12 x float>, <12 x flo at>, <12 x float>) {
1544 entry:
1545 %4 = fcmp true <12 x float> %0, %1
1546 %5 = select <12 x i1> %4, <12 x float> %2, <12 x float> %3
1547 ret <12 x float> %5
1548 }
1549 ; CHECK-LABEL: define <4 x float> @fcmp_true_on_12xfloat(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, < 4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>) {
1550 ; CHECK: entry:
1551 ; CHECK-NEXT: %14 = fcmp true <4 x float> %2, %5
1552 ; CHECK-NEXT: %15 = fcmp true <4 x float> %3, %6
1553 ; CHECK-NEXT: %16 = fcmp true <4 x float> %4, %7
1554 ; CHECK-NEXT: %17 = select <4 x i1> %14, <4 x float> %8, <4 x float> %11
1555 ; CHECK-NEXT: %18 = select <4 x i1> %15, <4 x float> %9, <4 x float> %12
1556 ; CHECK-NEXT: %19 = select <4 x i1> %16, <4 x float> %10, <4 x float> %13
1557 ; CHECK-NEXT: store <4 x float> %18, <4 x float>* %0, align 16
1558 ; CHECK-NEXT: store <4 x float> %19, <4 x float>* %1, align 16
1559 ; CHECK-NEXT: ret <4 x float> %17
1560 ; CHECK-NEXT: }
1561
1562 define <12 x float> @fcmp_false_on_12xfloat(<12 x float>, <12 x float>, <12 x fl oat>, <12 x float>) {
1563 entry:
1564 %4 = fcmp false <12 x float> %0, %1
1565 %5 = select <12 x i1> %4, <12 x float> %2, <12 x float> %3
1566 ret <12 x float> %5
1567 }
1568 ; CHECK-LABEL: define <4 x float> @fcmp_false_on_12xfloat(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16) , <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>) {
1569 ; CHECK: entry:
1570 ; CHECK-NEXT: %14 = fcmp false <4 x float> %2, %5
1571 ; CHECK-NEXT: %15 = fcmp false <4 x float> %3, %6
1572 ; CHECK-NEXT: %16 = fcmp false <4 x float> %4, %7
1573 ; CHECK-NEXT: %17 = select <4 x i1> %14, <4 x float> %8, <4 x float> %11
1574 ; CHECK-NEXT: %18 = select <4 x i1> %15, <4 x float> %9, <4 x float> %12
1575 ; CHECK-NEXT: %19 = select <4 x i1> %16, <4 x float> %10, <4 x float> %13
1576 ; CHECK-NEXT: store <4 x float> %18, <4 x float>* %0, align 16
1577 ; CHECK-NEXT: store <4 x float> %19, <4 x float>* %1, align 16
1578 ; CHECK-NEXT: ret <4 x float> %17
1579 ; CHECK-NEXT: }
1580
1581 define <12 x float> @fcmp_oeq_on_12xfloat(<12 x float>, <12 x float>, <12 x floa t>, <12 x float>) {
1582 entry:
1583 %4 = fcmp oeq <12 x float> %0, %1
1584 %5 = select <12 x i1> %4, <12 x float> %2, <12 x float> %3
1585 ret <12 x float> %5
1586 }
1587 ; CHECK-LABEL: define <4 x float> @fcmp_oeq_on_12xfloat(<4 x float>* nocapture n onnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>) {
1588 ; CHECK: entry:
1589 ; CHECK-NEXT: %14 = fcmp oeq <4 x float> %2, %5
1590 ; CHECK-NEXT: %15 = fcmp oeq <4 x float> %3, %6
1591 ; CHECK-NEXT: %16 = fcmp oeq <4 x float> %4, %7
1592 ; CHECK-NEXT: %17 = select <4 x i1> %14, <4 x float> %8, <4 x float> %11
1593 ; CHECK-NEXT: %18 = select <4 x i1> %15, <4 x float> %9, <4 x float> %12
1594 ; CHECK-NEXT: %19 = select <4 x i1> %16, <4 x float> %10, <4 x float> %13
1595 ; CHECK-NEXT: store <4 x float> %18, <4 x float>* %0, align 16
1596 ; CHECK-NEXT: store <4 x float> %19, <4 x float>* %1, align 16
1597 ; CHECK-NEXT: ret <4 x float> %17
1598 ; CHECK-NEXT: }
1599
1600 define <12 x float> @fcmp_ueq_on_12xfloat(<12 x float>, <12 x float>, <12 x floa t>, <12 x float>) {
1601 entry:
1602 %4 = fcmp ueq <12 x float> %0, %1
1603 %5 = select <12 x i1> %4, <12 x float> %2, <12 x float> %3
1604 ret <12 x float> %5
1605 }
1606 ; CHECK-LABEL: define <4 x float> @fcmp_ueq_on_12xfloat(<4 x float>* nocapture n onnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>) {
1607 ; CHECK: entry:
1608 ; CHECK-NEXT: %14 = fcmp ueq <4 x float> %2, %5
1609 ; CHECK-NEXT: %15 = fcmp ueq <4 x float> %3, %6
1610 ; CHECK-NEXT: %16 = fcmp ueq <4 x float> %4, %7
1611 ; CHECK-NEXT: %17 = select <4 x i1> %14, <4 x float> %8, <4 x float> %11
1612 ; CHECK-NEXT: %18 = select <4 x i1> %15, <4 x float> %9, <4 x float> %12
1613 ; CHECK-NEXT: %19 = select <4 x i1> %16, <4 x float> %10, <4 x float> %13
1614 ; CHECK-NEXT: store <4 x float> %18, <4 x float>* %0, align 16
1615 ; CHECK-NEXT: store <4 x float> %19, <4 x float>* %1, align 16
1616 ; CHECK-NEXT: ret <4 x float> %17
1617 ; CHECK-NEXT: }
1618
1619 define <12 x float> @fcmp_one_on_12xfloat(<12 x float>, <12 x float>, <12 x floa t>, <12 x float>) {
1620 entry:
1621 %4 = fcmp one <12 x float> %0, %1
1622 %5 = select <12 x i1> %4, <12 x float> %2, <12 x float> %3
1623 ret <12 x float> %5
1624 }
1625 ; CHECK-LABEL: define <4 x float> @fcmp_one_on_12xfloat(<4 x float>* nocapture n onnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>) {
1626 ; CHECK: entry:
1627 ; CHECK-NEXT: %14 = fcmp one <4 x float> %2, %5
1628 ; CHECK-NEXT: %15 = fcmp one <4 x float> %3, %6
1629 ; CHECK-NEXT: %16 = fcmp one <4 x float> %4, %7
1630 ; CHECK-NEXT: %17 = select <4 x i1> %14, <4 x float> %8, <4 x float> %11
1631 ; CHECK-NEXT: %18 = select <4 x i1> %15, <4 x float> %9, <4 x float> %12
1632 ; CHECK-NEXT: %19 = select <4 x i1> %16, <4 x float> %10, <4 x float> %13
1633 ; CHECK-NEXT: store <4 x float> %18, <4 x float>* %0, align 16
1634 ; CHECK-NEXT: store <4 x float> %19, <4 x float>* %1, align 16
1635 ; CHECK-NEXT: ret <4 x float> %17
1636 ; CHECK-NEXT: }
1637
1638 define <12 x float> @fcmp_une_on_12xfloat(<12 x float>, <12 x float>, <12 x floa t>, <12 x float>) {
1639 entry:
1640 %4 = fcmp une <12 x float> %0, %1
1641 %5 = select <12 x i1> %4, <12 x float> %2, <12 x float> %3
1642 ret <12 x float> %5
1643 }
1644 ; CHECK-LABEL: define <4 x float> @fcmp_une_on_12xfloat(<4 x float>* nocapture n onnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>) {
1645 ; CHECK: entry:
1646 ; CHECK-NEXT: %14 = fcmp une <4 x float> %2, %5
1647 ; CHECK-NEXT: %15 = fcmp une <4 x float> %3, %6
1648 ; CHECK-NEXT: %16 = fcmp une <4 x float> %4, %7
1649 ; CHECK-NEXT: %17 = select <4 x i1> %14, <4 x float> %8, <4 x float> %11
1650 ; CHECK-NEXT: %18 = select <4 x i1> %15, <4 x float> %9, <4 x float> %12
1651 ; CHECK-NEXT: %19 = select <4 x i1> %16, <4 x float> %10, <4 x float> %13
1652 ; CHECK-NEXT: store <4 x float> %18, <4 x float>* %0, align 16
1653 ; CHECK-NEXT: store <4 x float> %19, <4 x float>* %1, align 16
1654 ; CHECK-NEXT: ret <4 x float> %17
1655 ; CHECK-NEXT: }
1656
1657 define <12 x float> @fcmp_ogt_on_12xfloat(<12 x float>, <12 x float>, <12 x floa t>, <12 x float>) {
1658 entry:
1659 %4 = fcmp ogt <12 x float> %0, %1
1660 %5 = select <12 x i1> %4, <12 x float> %2, <12 x float> %3
1661 ret <12 x float> %5
1662 }
1663 ; CHECK-LABEL: define <4 x float> @fcmp_ogt_on_12xfloat(<4 x float>* nocapture n onnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>) {
1664 ; CHECK: entry:
1665 ; CHECK-NEXT: %14 = fcmp ogt <4 x float> %2, %5
1666 ; CHECK-NEXT: %15 = fcmp ogt <4 x float> %3, %6
1667 ; CHECK-NEXT: %16 = fcmp ogt <4 x float> %4, %7
1668 ; CHECK-NEXT: %17 = select <4 x i1> %14, <4 x float> %8, <4 x float> %11
1669 ; CHECK-NEXT: %18 = select <4 x i1> %15, <4 x float> %9, <4 x float> %12
1670 ; CHECK-NEXT: %19 = select <4 x i1> %16, <4 x float> %10, <4 x float> %13
1671 ; CHECK-NEXT: store <4 x float> %18, <4 x float>* %0, align 16
1672 ; CHECK-NEXT: store <4 x float> %19, <4 x float>* %1, align 16
1673 ; CHECK-NEXT: ret <4 x float> %17
1674 ; CHECK-NEXT: }
1675
1676 define <12 x float> @fcmp_ugt_on_12xfloat(<12 x float>, <12 x float>, <12 x floa t>, <12 x float>) {
1677 entry:
1678 %4 = fcmp ugt <12 x float> %0, %1
1679 %5 = select <12 x i1> %4, <12 x float> %2, <12 x float> %3
1680 ret <12 x float> %5
1681 }
1682 ; CHECK-LABEL: define <4 x float> @fcmp_ugt_on_12xfloat(<4 x float>* nocapture n onnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>) {
1683 ; CHECK: entry:
1684 ; CHECK-NEXT: %14 = fcmp ugt <4 x float> %2, %5
1685 ; CHECK-NEXT: %15 = fcmp ugt <4 x float> %3, %6
1686 ; CHECK-NEXT: %16 = fcmp ugt <4 x float> %4, %7
1687 ; CHECK-NEXT: %17 = select <4 x i1> %14, <4 x float> %8, <4 x float> %11
1688 ; CHECK-NEXT: %18 = select <4 x i1> %15, <4 x float> %9, <4 x float> %12
1689 ; CHECK-NEXT: %19 = select <4 x i1> %16, <4 x float> %10, <4 x float> %13
1690 ; CHECK-NEXT: store <4 x float> %18, <4 x float>* %0, align 16
1691 ; CHECK-NEXT: store <4 x float> %19, <4 x float>* %1, align 16
1692 ; CHECK-NEXT: ret <4 x float> %17
1693 ; CHECK-NEXT: }
1694
1695 define <12 x float> @fcmp_oge_on_12xfloat(<12 x float>, <12 x float>, <12 x floa t>, <12 x float>) {
1696 entry:
1697 %4 = fcmp oge <12 x float> %0, %1
1698 %5 = select <12 x i1> %4, <12 x float> %2, <12 x float> %3
1699 ret <12 x float> %5
1700 }
1701 ; CHECK-LABEL: define <4 x float> @fcmp_oge_on_12xfloat(<4 x float>* nocapture n onnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>) {
1702 ; CHECK: entry:
1703 ; CHECK-NEXT: %14 = fcmp oge <4 x float> %2, %5
1704 ; CHECK-NEXT: %15 = fcmp oge <4 x float> %3, %6
1705 ; CHECK-NEXT: %16 = fcmp oge <4 x float> %4, %7
1706 ; CHECK-NEXT: %17 = select <4 x i1> %14, <4 x float> %8, <4 x float> %11
1707 ; CHECK-NEXT: %18 = select <4 x i1> %15, <4 x float> %9, <4 x float> %12
1708 ; CHECK-NEXT: %19 = select <4 x i1> %16, <4 x float> %10, <4 x float> %13
1709 ; CHECK-NEXT: store <4 x float> %18, <4 x float>* %0, align 16
1710 ; CHECK-NEXT: store <4 x float> %19, <4 x float>* %1, align 16
1711 ; CHECK-NEXT: ret <4 x float> %17
1712 ; CHECK-NEXT: }
1713
1714 define <12 x float> @fcmp_uge_on_12xfloat(<12 x float>, <12 x float>, <12 x floa t>, <12 x float>) {
1715 entry:
1716 %4 = fcmp uge <12 x float> %0, %1
1717 %5 = select <12 x i1> %4, <12 x float> %2, <12 x float> %3
1718 ret <12 x float> %5
1719 }
1720 ; CHECK-LABEL: define <4 x float> @fcmp_uge_on_12xfloat(<4 x float>* nocapture n onnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>) {
1721 ; CHECK: entry:
1722 ; CHECK-NEXT: %14 = fcmp uge <4 x float> %2, %5
1723 ; CHECK-NEXT: %15 = fcmp uge <4 x float> %3, %6
1724 ; CHECK-NEXT: %16 = fcmp uge <4 x float> %4, %7
1725 ; CHECK-NEXT: %17 = select <4 x i1> %14, <4 x float> %8, <4 x float> %11
1726 ; CHECK-NEXT: %18 = select <4 x i1> %15, <4 x float> %9, <4 x float> %12
1727 ; CHECK-NEXT: %19 = select <4 x i1> %16, <4 x float> %10, <4 x float> %13
1728 ; CHECK-NEXT: store <4 x float> %18, <4 x float>* %0, align 16
1729 ; CHECK-NEXT: store <4 x float> %19, <4 x float>* %1, align 16
1730 ; CHECK-NEXT: ret <4 x float> %17
1731 ; CHECK-NEXT: }
1732
1733 define <12 x float> @fcmp_ord_on_12xfloat(<12 x float>, <12 x float>, <12 x floa t>, <12 x float>) {
1734 entry:
1735 %4 = fcmp ord <12 x float> %0, %1
1736 %5 = select <12 x i1> %4, <12 x float> %2, <12 x float> %3
1737 ret <12 x float> %5
1738 }
1739 ; CHECK-LABEL: define <4 x float> @fcmp_ord_on_12xfloat(<4 x float>* nocapture n onnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>) {
1740 ; CHECK: entry:
1741 ; CHECK-NEXT: %14 = fcmp ord <4 x float> %2, %5
1742 ; CHECK-NEXT: %15 = fcmp ord <4 x float> %3, %6
1743 ; CHECK-NEXT: %16 = fcmp ord <4 x float> %4, %7
1744 ; CHECK-NEXT: %17 = select <4 x i1> %14, <4 x float> %8, <4 x float> %11
1745 ; CHECK-NEXT: %18 = select <4 x i1> %15, <4 x float> %9, <4 x float> %12
1746 ; CHECK-NEXT: %19 = select <4 x i1> %16, <4 x float> %10, <4 x float> %13
1747 ; CHECK-NEXT: store <4 x float> %18, <4 x float>* %0, align 16
1748 ; CHECK-NEXT: store <4 x float> %19, <4 x float>* %1, align 16
1749 ; CHECK-NEXT: ret <4 x float> %17
1750 ; CHECK-NEXT: }
1751
1752 define <12 x float> @fcmp_uno_on_12xfloat(<12 x float>, <12 x float>, <12 x floa t>, <12 x float>) {
1753 entry:
1754 %4 = fcmp uno <12 x float> %0, %1
1755 %5 = select <12 x i1> %4, <12 x float> %2, <12 x float> %3
1756 ret <12 x float> %5
1757 }
1758 ; CHECK-LABEL: define <4 x float> @fcmp_uno_on_12xfloat(<4 x float>* nocapture n onnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>) {
1759 ; CHECK: entry:
1760 ; CHECK-NEXT: %14 = fcmp uno <4 x float> %2, %5
1761 ; CHECK-NEXT: %15 = fcmp uno <4 x float> %3, %6
1762 ; CHECK-NEXT: %16 = fcmp uno <4 x float> %4, %7
1763 ; CHECK-NEXT: %17 = select <4 x i1> %14, <4 x float> %8, <4 x float> %11
1764 ; CHECK-NEXT: %18 = select <4 x i1> %15, <4 x float> %9, <4 x float> %12
1765 ; CHECK-NEXT: %19 = select <4 x i1> %16, <4 x float> %10, <4 x float> %13
1766 ; CHECK-NEXT: store <4 x float> %18, <4 x float>* %0, align 16
1767 ; CHECK-NEXT: store <4 x float> %19, <4 x float>* %1, align 16
1768 ; CHECK-NEXT: ret <4 x float> %17
1769 ; CHECK-NEXT: }
1770
1771 define <12 x double> @fcmp_true_on_12xdouble(<12 x double>, <12 x double>, <12 x double>, <12 x double>) {
1772 entry:
1773 %4 = fcmp true <12 x double> %0, %1
1774 %5 = select <12 x i1> %4, <12 x double> %2, <12 x double> %3
1775 ret <12 x double> %5
1776 }
1777 ; CHECK-LABEL: define <2 x double> @fcmp_true_on_12xdouble(<2 x double>* nocaptu re nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable( 16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocaptur e nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(1 6), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x d ouble>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double> , <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x dou ble>, <2 x double>) {
1778 ; CHECK: entry:
1779 ; CHECK-NEXT: %29 = fcmp true <2 x double> %5, %11
1780 ; CHECK-NEXT: %30 = fcmp true <2 x double> %6, %12
1781 ; CHECK-NEXT: %31 = fcmp true <2 x double> %7, %13
1782 ; CHECK-NEXT: %32 = fcmp true <2 x double> %8, %14
1783 ; CHECK-NEXT: %33 = fcmp true <2 x double> %9, %15
1784 ; CHECK-NEXT: %34 = fcmp true <2 x double> %10, %16
1785 ; CHECK-NEXT: %35 = select <2 x i1> %29, <2 x double> %17, <2 x double> %23
1786 ; CHECK-NEXT: %36 = select <2 x i1> %30, <2 x double> %18, <2 x double> %24
1787 ; CHECK-NEXT: %37 = select <2 x i1> %31, <2 x double> %19, <2 x double> %25
1788 ; CHECK-NEXT: %38 = select <2 x i1> %32, <2 x double> %20, <2 x double> %26
1789 ; CHECK-NEXT: %39 = select <2 x i1> %33, <2 x double> %21, <2 x double> %27
1790 ; CHECK-NEXT: %40 = select <2 x i1> %34, <2 x double> %22, <2 x double> %28
1791 ; CHECK-NEXT: store <2 x double> %36, <2 x double>* %0, align 16
1792 ; CHECK-NEXT: store <2 x double> %37, <2 x double>* %1, align 16
1793 ; CHECK-NEXT: store <2 x double> %38, <2 x double>* %2, align 16
1794 ; CHECK-NEXT: store <2 x double> %39, <2 x double>* %3, align 16
1795 ; CHECK-NEXT: store <2 x double> %40, <2 x double>* %4, align 16
1796 ; CHECK-NEXT: ret <2 x double> %35
1797 ; CHECK-NEXT: }
1798
1799 define <12 x double> @fcmp_false_on_12xdouble(<12 x double>, <12 x double>, <12 x double>, <12 x double>) {
1800 entry:
1801 %4 = fcmp false <12 x double> %0, %1
1802 %5 = select <12 x i1> %4, <12 x double> %2, <12 x double> %3
1803 ret <12 x double> %5
1804 }
1805 ; CHECK-LABEL: define <2 x double> @fcmp_false_on_12xdouble(<2 x double>* nocapt ure nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable (16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocaptu re nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable( 16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, < 2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double >, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x do uble>, <2 x double>) {
1806 ; CHECK: entry:
1807 ; CHECK-NEXT: %29 = fcmp false <2 x double> %5, %11
1808 ; CHECK-NEXT: %30 = fcmp false <2 x double> %6, %12
1809 ; CHECK-NEXT: %31 = fcmp false <2 x double> %7, %13
1810 ; CHECK-NEXT: %32 = fcmp false <2 x double> %8, %14
1811 ; CHECK-NEXT: %33 = fcmp false <2 x double> %9, %15
1812 ; CHECK-NEXT: %34 = fcmp false <2 x double> %10, %16
1813 ; CHECK-NEXT: %35 = select <2 x i1> %29, <2 x double> %17, <2 x double> %23
1814 ; CHECK-NEXT: %36 = select <2 x i1> %30, <2 x double> %18, <2 x double> %24
1815 ; CHECK-NEXT: %37 = select <2 x i1> %31, <2 x double> %19, <2 x double> %25
1816 ; CHECK-NEXT: %38 = select <2 x i1> %32, <2 x double> %20, <2 x double> %26
1817 ; CHECK-NEXT: %39 = select <2 x i1> %33, <2 x double> %21, <2 x double> %27
1818 ; CHECK-NEXT: %40 = select <2 x i1> %34, <2 x double> %22, <2 x double> %28
1819 ; CHECK-NEXT: store <2 x double> %36, <2 x double>* %0, align 16
1820 ; CHECK-NEXT: store <2 x double> %37, <2 x double>* %1, align 16
1821 ; CHECK-NEXT: store <2 x double> %38, <2 x double>* %2, align 16
1822 ; CHECK-NEXT: store <2 x double> %39, <2 x double>* %3, align 16
1823 ; CHECK-NEXT: store <2 x double> %40, <2 x double>* %4, align 16
1824 ; CHECK-NEXT: ret <2 x double> %35
1825 ; CHECK-NEXT: }
1826
1827 define <12 x double> @fcmp_oeq_on_12xdouble(<12 x double>, <12 x double>, <12 x double>, <12 x double>) {
1828 entry:
1829 %4 = fcmp oeq <12 x double> %0, %1
1830 %5 = select <12 x i1> %4, <12 x double> %2, <12 x double> %3
1831 ret <12 x double> %5
1832 }
1833 ; CHECK-LABEL: define <2 x double> @fcmp_oeq_on_12xdouble(<2 x double>* nocaptur e nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(1 6), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16 ), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x do uble>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x doub le>, <2 x double>) {
1834 ; CHECK: entry:
1835 ; CHECK-NEXT: %29 = fcmp oeq <2 x double> %5, %11
1836 ; CHECK-NEXT: %30 = fcmp oeq <2 x double> %6, %12
1837 ; CHECK-NEXT: %31 = fcmp oeq <2 x double> %7, %13
1838 ; CHECK-NEXT: %32 = fcmp oeq <2 x double> %8, %14
1839 ; CHECK-NEXT: %33 = fcmp oeq <2 x double> %9, %15
1840 ; CHECK-NEXT: %34 = fcmp oeq <2 x double> %10, %16
1841 ; CHECK-NEXT: %35 = select <2 x i1> %29, <2 x double> %17, <2 x double> %23
1842 ; CHECK-NEXT: %36 = select <2 x i1> %30, <2 x double> %18, <2 x double> %24
1843 ; CHECK-NEXT: %37 = select <2 x i1> %31, <2 x double> %19, <2 x double> %25
1844 ; CHECK-NEXT: %38 = select <2 x i1> %32, <2 x double> %20, <2 x double> %26
1845 ; CHECK-NEXT: %39 = select <2 x i1> %33, <2 x double> %21, <2 x double> %27
1846 ; CHECK-NEXT: %40 = select <2 x i1> %34, <2 x double> %22, <2 x double> %28
1847 ; CHECK-NEXT: store <2 x double> %36, <2 x double>* %0, align 16
1848 ; CHECK-NEXT: store <2 x double> %37, <2 x double>* %1, align 16
1849 ; CHECK-NEXT: store <2 x double> %38, <2 x double>* %2, align 16
1850 ; CHECK-NEXT: store <2 x double> %39, <2 x double>* %3, align 16
1851 ; CHECK-NEXT: store <2 x double> %40, <2 x double>* %4, align 16
1852 ; CHECK-NEXT: ret <2 x double> %35
1853 ; CHECK-NEXT: }
1854
1855 define <12 x double> @fcmp_ueq_on_12xdouble(<12 x double>, <12 x double>, <12 x double>, <12 x double>) {
1856 entry:
1857 %4 = fcmp ueq <12 x double> %0, %1
1858 %5 = select <12 x i1> %4, <12 x double> %2, <12 x double> %3
1859 ret <12 x double> %5
1860 }
1861 ; CHECK-LABEL: define <2 x double> @fcmp_ueq_on_12xdouble(<2 x double>* nocaptur e nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(1 6), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16 ), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x do uble>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x doub le>, <2 x double>) {
1862 ; CHECK: entry:
1863 ; CHECK-NEXT: %29 = fcmp ueq <2 x double> %5, %11
1864 ; CHECK-NEXT: %30 = fcmp ueq <2 x double> %6, %12
1865 ; CHECK-NEXT: %31 = fcmp ueq <2 x double> %7, %13
1866 ; CHECK-NEXT: %32 = fcmp ueq <2 x double> %8, %14
1867 ; CHECK-NEXT: %33 = fcmp ueq <2 x double> %9, %15
1868 ; CHECK-NEXT: %34 = fcmp ueq <2 x double> %10, %16
1869 ; CHECK-NEXT: %35 = select <2 x i1> %29, <2 x double> %17, <2 x double> %23
1870 ; CHECK-NEXT: %36 = select <2 x i1> %30, <2 x double> %18, <2 x double> %24
1871 ; CHECK-NEXT: %37 = select <2 x i1> %31, <2 x double> %19, <2 x double> %25
1872 ; CHECK-NEXT: %38 = select <2 x i1> %32, <2 x double> %20, <2 x double> %26
1873 ; CHECK-NEXT: %39 = select <2 x i1> %33, <2 x double> %21, <2 x double> %27
1874 ; CHECK-NEXT: %40 = select <2 x i1> %34, <2 x double> %22, <2 x double> %28
1875 ; CHECK-NEXT: store <2 x double> %36, <2 x double>* %0, align 16
1876 ; CHECK-NEXT: store <2 x double> %37, <2 x double>* %1, align 16
1877 ; CHECK-NEXT: store <2 x double> %38, <2 x double>* %2, align 16
1878 ; CHECK-NEXT: store <2 x double> %39, <2 x double>* %3, align 16
1879 ; CHECK-NEXT: store <2 x double> %40, <2 x double>* %4, align 16
1880 ; CHECK-NEXT: ret <2 x double> %35
1881 ; CHECK-NEXT: }
1882
1883 define <12 x double> @fcmp_one_on_12xdouble(<12 x double>, <12 x double>, <12 x double>, <12 x double>) {
1884 entry:
1885 %4 = fcmp one <12 x double> %0, %1
1886 %5 = select <12 x i1> %4, <12 x double> %2, <12 x double> %3
1887 ret <12 x double> %5
1888 }
1889 ; CHECK-LABEL: define <2 x double> @fcmp_one_on_12xdouble(<2 x double>* nocaptur e nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(1 6), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16 ), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x do uble>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x doub le>, <2 x double>) {
1890 ; CHECK: entry:
1891 ; CHECK-NEXT: %29 = fcmp one <2 x double> %5, %11
1892 ; CHECK-NEXT: %30 = fcmp one <2 x double> %6, %12
1893 ; CHECK-NEXT: %31 = fcmp one <2 x double> %7, %13
1894 ; CHECK-NEXT: %32 = fcmp one <2 x double> %8, %14
1895 ; CHECK-NEXT: %33 = fcmp one <2 x double> %9, %15
1896 ; CHECK-NEXT: %34 = fcmp one <2 x double> %10, %16
1897 ; CHECK-NEXT: %35 = select <2 x i1> %29, <2 x double> %17, <2 x double> %23
1898 ; CHECK-NEXT: %36 = select <2 x i1> %30, <2 x double> %18, <2 x double> %24
1899 ; CHECK-NEXT: %37 = select <2 x i1> %31, <2 x double> %19, <2 x double> %25
1900 ; CHECK-NEXT: %38 = select <2 x i1> %32, <2 x double> %20, <2 x double> %26
1901 ; CHECK-NEXT: %39 = select <2 x i1> %33, <2 x double> %21, <2 x double> %27
1902 ; CHECK-NEXT: %40 = select <2 x i1> %34, <2 x double> %22, <2 x double> %28
1903 ; CHECK-NEXT: store <2 x double> %36, <2 x double>* %0, align 16
1904 ; CHECK-NEXT: store <2 x double> %37, <2 x double>* %1, align 16
1905 ; CHECK-NEXT: store <2 x double> %38, <2 x double>* %2, align 16
1906 ; CHECK-NEXT: store <2 x double> %39, <2 x double>* %3, align 16
1907 ; CHECK-NEXT: store <2 x double> %40, <2 x double>* %4, align 16
1908 ; CHECK-NEXT: ret <2 x double> %35
1909 ; CHECK-NEXT: }
1910
1911 define <12 x double> @fcmp_une_on_12xdouble(<12 x double>, <12 x double>, <12 x double>, <12 x double>) {
1912 entry:
1913 %4 = fcmp une <12 x double> %0, %1
1914 %5 = select <12 x i1> %4, <12 x double> %2, <12 x double> %3
1915 ret <12 x double> %5
1916 }
1917 ; CHECK-LABEL: define <2 x double> @fcmp_une_on_12xdouble(<2 x double>* nocaptur e nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(1 6), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16 ), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x do uble>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x doub le>, <2 x double>) {
1918 ; CHECK: entry:
1919 ; CHECK-NEXT: %29 = fcmp une <2 x double> %5, %11
1920 ; CHECK-NEXT: %30 = fcmp une <2 x double> %6, %12
1921 ; CHECK-NEXT: %31 = fcmp une <2 x double> %7, %13
1922 ; CHECK-NEXT: %32 = fcmp une <2 x double> %8, %14
1923 ; CHECK-NEXT: %33 = fcmp une <2 x double> %9, %15
1924 ; CHECK-NEXT: %34 = fcmp une <2 x double> %10, %16
1925 ; CHECK-NEXT: %35 = select <2 x i1> %29, <2 x double> %17, <2 x double> %23
1926 ; CHECK-NEXT: %36 = select <2 x i1> %30, <2 x double> %18, <2 x double> %24
1927 ; CHECK-NEXT: %37 = select <2 x i1> %31, <2 x double> %19, <2 x double> %25
1928 ; CHECK-NEXT: %38 = select <2 x i1> %32, <2 x double> %20, <2 x double> %26
1929 ; CHECK-NEXT: %39 = select <2 x i1> %33, <2 x double> %21, <2 x double> %27
1930 ; CHECK-NEXT: %40 = select <2 x i1> %34, <2 x double> %22, <2 x double> %28
1931 ; CHECK-NEXT: store <2 x double> %36, <2 x double>* %0, align 16
1932 ; CHECK-NEXT: store <2 x double> %37, <2 x double>* %1, align 16
1933 ; CHECK-NEXT: store <2 x double> %38, <2 x double>* %2, align 16
1934 ; CHECK-NEXT: store <2 x double> %39, <2 x double>* %3, align 16
1935 ; CHECK-NEXT: store <2 x double> %40, <2 x double>* %4, align 16
1936 ; CHECK-NEXT: ret <2 x double> %35
1937 ; CHECK-NEXT: }
1938
1939 define <12 x double> @fcmp_ogt_on_12xdouble(<12 x double>, <12 x double>, <12 x double>, <12 x double>) {
1940 entry:
1941 %4 = fcmp ogt <12 x double> %0, %1
1942 %5 = select <12 x i1> %4, <12 x double> %2, <12 x double> %3
1943 ret <12 x double> %5
1944 }
1945 ; CHECK-LABEL: define <2 x double> @fcmp_ogt_on_12xdouble(<2 x double>* nocaptur e nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(1 6), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16 ), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x do uble>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x doub le>, <2 x double>) {
1946 ; CHECK: entry:
1947 ; CHECK-NEXT: %29 = fcmp ogt <2 x double> %5, %11
1948 ; CHECK-NEXT: %30 = fcmp ogt <2 x double> %6, %12
1949 ; CHECK-NEXT: %31 = fcmp ogt <2 x double> %7, %13
1950 ; CHECK-NEXT: %32 = fcmp ogt <2 x double> %8, %14
1951 ; CHECK-NEXT: %33 = fcmp ogt <2 x double> %9, %15
1952 ; CHECK-NEXT: %34 = fcmp ogt <2 x double> %10, %16
1953 ; CHECK-NEXT: %35 = select <2 x i1> %29, <2 x double> %17, <2 x double> %23
1954 ; CHECK-NEXT: %36 = select <2 x i1> %30, <2 x double> %18, <2 x double> %24
1955 ; CHECK-NEXT: %37 = select <2 x i1> %31, <2 x double> %19, <2 x double> %25
1956 ; CHECK-NEXT: %38 = select <2 x i1> %32, <2 x double> %20, <2 x double> %26
1957 ; CHECK-NEXT: %39 = select <2 x i1> %33, <2 x double> %21, <2 x double> %27
1958 ; CHECK-NEXT: %40 = select <2 x i1> %34, <2 x double> %22, <2 x double> %28
1959 ; CHECK-NEXT: store <2 x double> %36, <2 x double>* %0, align 16
1960 ; CHECK-NEXT: store <2 x double> %37, <2 x double>* %1, align 16
1961 ; CHECK-NEXT: store <2 x double> %38, <2 x double>* %2, align 16
1962 ; CHECK-NEXT: store <2 x double> %39, <2 x double>* %3, align 16
1963 ; CHECK-NEXT: store <2 x double> %40, <2 x double>* %4, align 16
1964 ; CHECK-NEXT: ret <2 x double> %35
1965 ; CHECK-NEXT: }
1966
1967 define <12 x double> @fcmp_ugt_on_12xdouble(<12 x double>, <12 x double>, <12 x double>, <12 x double>) {
1968 entry:
1969 %4 = fcmp ugt <12 x double> %0, %1
1970 %5 = select <12 x i1> %4, <12 x double> %2, <12 x double> %3
1971 ret <12 x double> %5
1972 }
1973 ; CHECK-LABEL: define <2 x double> @fcmp_ugt_on_12xdouble(<2 x double>* nocaptur e nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(1 6), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16 ), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x do uble>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x doub le>, <2 x double>) {
1974 ; CHECK: entry:
1975 ; CHECK-NEXT: %29 = fcmp ugt <2 x double> %5, %11
1976 ; CHECK-NEXT: %30 = fcmp ugt <2 x double> %6, %12
1977 ; CHECK-NEXT: %31 = fcmp ugt <2 x double> %7, %13
1978 ; CHECK-NEXT: %32 = fcmp ugt <2 x double> %8, %14
1979 ; CHECK-NEXT: %33 = fcmp ugt <2 x double> %9, %15
1980 ; CHECK-NEXT: %34 = fcmp ugt <2 x double> %10, %16
1981 ; CHECK-NEXT: %35 = select <2 x i1> %29, <2 x double> %17, <2 x double> %23
1982 ; CHECK-NEXT: %36 = select <2 x i1> %30, <2 x double> %18, <2 x double> %24
1983 ; CHECK-NEXT: %37 = select <2 x i1> %31, <2 x double> %19, <2 x double> %25
1984 ; CHECK-NEXT: %38 = select <2 x i1> %32, <2 x double> %20, <2 x double> %26
1985 ; CHECK-NEXT: %39 = select <2 x i1> %33, <2 x double> %21, <2 x double> %27
1986 ; CHECK-NEXT: %40 = select <2 x i1> %34, <2 x double> %22, <2 x double> %28
1987 ; CHECK-NEXT: store <2 x double> %36, <2 x double>* %0, align 16
1988 ; CHECK-NEXT: store <2 x double> %37, <2 x double>* %1, align 16
1989 ; CHECK-NEXT: store <2 x double> %38, <2 x double>* %2, align 16
1990 ; CHECK-NEXT: store <2 x double> %39, <2 x double>* %3, align 16
1991 ; CHECK-NEXT: store <2 x double> %40, <2 x double>* %4, align 16
1992 ; CHECK-NEXT: ret <2 x double> %35
1993 ; CHECK-NEXT: }
1994
1995 define <12 x double> @fcmp_oge_on_12xdouble(<12 x double>, <12 x double>, <12 x double>, <12 x double>) {
1996 entry:
1997 %4 = fcmp oge <12 x double> %0, %1
1998 %5 = select <12 x i1> %4, <12 x double> %2, <12 x double> %3
1999 ret <12 x double> %5
2000 }
2001 ; CHECK-LABEL: define <2 x double> @fcmp_oge_on_12xdouble(<2 x double>* nocaptur e nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(1 6), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16 ), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x do uble>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x doub le>, <2 x double>) {
2002 ; CHECK: entry:
2003 ; CHECK-NEXT: %29 = fcmp oge <2 x double> %5, %11
2004 ; CHECK-NEXT: %30 = fcmp oge <2 x double> %6, %12
2005 ; CHECK-NEXT: %31 = fcmp oge <2 x double> %7, %13
2006 ; CHECK-NEXT: %32 = fcmp oge <2 x double> %8, %14
2007 ; CHECK-NEXT: %33 = fcmp oge <2 x double> %9, %15
2008 ; CHECK-NEXT: %34 = fcmp oge <2 x double> %10, %16
2009 ; CHECK-NEXT: %35 = select <2 x i1> %29, <2 x double> %17, <2 x double> %23
2010 ; CHECK-NEXT: %36 = select <2 x i1> %30, <2 x double> %18, <2 x double> %24
2011 ; CHECK-NEXT: %37 = select <2 x i1> %31, <2 x double> %19, <2 x double> %25
2012 ; CHECK-NEXT: %38 = select <2 x i1> %32, <2 x double> %20, <2 x double> %26
2013 ; CHECK-NEXT: %39 = select <2 x i1> %33, <2 x double> %21, <2 x double> %27
2014 ; CHECK-NEXT: %40 = select <2 x i1> %34, <2 x double> %22, <2 x double> %28
2015 ; CHECK-NEXT: store <2 x double> %36, <2 x double>* %0, align 16
2016 ; CHECK-NEXT: store <2 x double> %37, <2 x double>* %1, align 16
2017 ; CHECK-NEXT: store <2 x double> %38, <2 x double>* %2, align 16
2018 ; CHECK-NEXT: store <2 x double> %39, <2 x double>* %3, align 16
2019 ; CHECK-NEXT: store <2 x double> %40, <2 x double>* %4, align 16
2020 ; CHECK-NEXT: ret <2 x double> %35
2021 ; CHECK-NEXT: }
2022
2023 define <12 x double> @fcmp_uge_on_12xdouble(<12 x double>, <12 x double>, <12 x double>, <12 x double>) {
2024 entry:
2025 %4 = fcmp uge <12 x double> %0, %1
2026 %5 = select <12 x i1> %4, <12 x double> %2, <12 x double> %3
2027 ret <12 x double> %5
2028 }
2029 ; CHECK-LABEL: define <2 x double> @fcmp_uge_on_12xdouble(<2 x double>* nocaptur e nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(1 6), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16 ), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x do uble>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x doub le>, <2 x double>) {
2030 ; CHECK: entry:
2031 ; CHECK-NEXT: %29 = fcmp uge <2 x double> %5, %11
2032 ; CHECK-NEXT: %30 = fcmp uge <2 x double> %6, %12
2033 ; CHECK-NEXT: %31 = fcmp uge <2 x double> %7, %13
2034 ; CHECK-NEXT: %32 = fcmp uge <2 x double> %8, %14
2035 ; CHECK-NEXT: %33 = fcmp uge <2 x double> %9, %15
2036 ; CHECK-NEXT: %34 = fcmp uge <2 x double> %10, %16
2037 ; CHECK-NEXT: %35 = select <2 x i1> %29, <2 x double> %17, <2 x double> %23
2038 ; CHECK-NEXT: %36 = select <2 x i1> %30, <2 x double> %18, <2 x double> %24
2039 ; CHECK-NEXT: %37 = select <2 x i1> %31, <2 x double> %19, <2 x double> %25
2040 ; CHECK-NEXT: %38 = select <2 x i1> %32, <2 x double> %20, <2 x double> %26
2041 ; CHECK-NEXT: %39 = select <2 x i1> %33, <2 x double> %21, <2 x double> %27
2042 ; CHECK-NEXT: %40 = select <2 x i1> %34, <2 x double> %22, <2 x double> %28
2043 ; CHECK-NEXT: store <2 x double> %36, <2 x double>* %0, align 16
2044 ; CHECK-NEXT: store <2 x double> %37, <2 x double>* %1, align 16
2045 ; CHECK-NEXT: store <2 x double> %38, <2 x double>* %2, align 16
2046 ; CHECK-NEXT: store <2 x double> %39, <2 x double>* %3, align 16
2047 ; CHECK-NEXT: store <2 x double> %40, <2 x double>* %4, align 16
2048 ; CHECK-NEXT: ret <2 x double> %35
2049 ; CHECK-NEXT: }
2050
2051 define <12 x double> @fcmp_ord_on_12xdouble(<12 x double>, <12 x double>, <12 x double>, <12 x double>) {
2052 entry:
2053 %4 = fcmp ord <12 x double> %0, %1
2054 %5 = select <12 x i1> %4, <12 x double> %2, <12 x double> %3
2055 ret <12 x double> %5
2056 }
2057 ; CHECK-LABEL: define <2 x double> @fcmp_ord_on_12xdouble(<2 x double>* nocaptur e nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(1 6), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16 ), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x do uble>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x doub le>, <2 x double>) {
2058 ; CHECK: entry:
2059 ; CHECK-NEXT: %29 = fcmp ord <2 x double> %5, %11
2060 ; CHECK-NEXT: %30 = fcmp ord <2 x double> %6, %12
2061 ; CHECK-NEXT: %31 = fcmp ord <2 x double> %7, %13
2062 ; CHECK-NEXT: %32 = fcmp ord <2 x double> %8, %14
2063 ; CHECK-NEXT: %33 = fcmp ord <2 x double> %9, %15
2064 ; CHECK-NEXT: %34 = fcmp ord <2 x double> %10, %16
2065 ; CHECK-NEXT: %35 = select <2 x i1> %29, <2 x double> %17, <2 x double> %23
2066 ; CHECK-NEXT: %36 = select <2 x i1> %30, <2 x double> %18, <2 x double> %24
2067 ; CHECK-NEXT: %37 = select <2 x i1> %31, <2 x double> %19, <2 x double> %25
2068 ; CHECK-NEXT: %38 = select <2 x i1> %32, <2 x double> %20, <2 x double> %26
2069 ; CHECK-NEXT: %39 = select <2 x i1> %33, <2 x double> %21, <2 x double> %27
2070 ; CHECK-NEXT: %40 = select <2 x i1> %34, <2 x double> %22, <2 x double> %28
2071 ; CHECK-NEXT: store <2 x double> %36, <2 x double>* %0, align 16
2072 ; CHECK-NEXT: store <2 x double> %37, <2 x double>* %1, align 16
2073 ; CHECK-NEXT: store <2 x double> %38, <2 x double>* %2, align 16
2074 ; CHECK-NEXT: store <2 x double> %39, <2 x double>* %3, align 16
2075 ; CHECK-NEXT: store <2 x double> %40, <2 x double>* %4, align 16
2076 ; CHECK-NEXT: ret <2 x double> %35
2077 ; CHECK-NEXT: }
2078
2079 define <12 x double> @fcmp_uno_on_12xdouble(<12 x double>, <12 x double>, <12 x double>, <12 x double>) {
2080 entry:
2081 %4 = fcmp uno <12 x double> %0, %1
2082 %5 = select <12 x i1> %4, <12 x double> %2, <12 x double> %3
2083 ret <12 x double> %5
2084 }
2085 ; CHECK-LABEL: define <2 x double> @fcmp_uno_on_12xdouble(<2 x double>* nocaptur e nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(1 6), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16 ), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x do uble>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x doub le>, <2 x double>) {
2086 ; CHECK: entry:
2087 ; CHECK-NEXT: %29 = fcmp uno <2 x double> %5, %11
2088 ; CHECK-NEXT: %30 = fcmp uno <2 x double> %6, %12
2089 ; CHECK-NEXT: %31 = fcmp uno <2 x double> %7, %13
2090 ; CHECK-NEXT: %32 = fcmp uno <2 x double> %8, %14
2091 ; CHECK-NEXT: %33 = fcmp uno <2 x double> %9, %15
2092 ; CHECK-NEXT: %34 = fcmp uno <2 x double> %10, %16
2093 ; CHECK-NEXT: %35 = select <2 x i1> %29, <2 x double> %17, <2 x double> %23
2094 ; CHECK-NEXT: %36 = select <2 x i1> %30, <2 x double> %18, <2 x double> %24
2095 ; CHECK-NEXT: %37 = select <2 x i1> %31, <2 x double> %19, <2 x double> %25
2096 ; CHECK-NEXT: %38 = select <2 x i1> %32, <2 x double> %20, <2 x double> %26
2097 ; CHECK-NEXT: %39 = select <2 x i1> %33, <2 x double> %21, <2 x double> %27
2098 ; CHECK-NEXT: %40 = select <2 x i1> %34, <2 x double> %22, <2 x double> %28
2099 ; CHECK-NEXT: store <2 x double> %36, <2 x double>* %0, align 16
2100 ; CHECK-NEXT: store <2 x double> %37, <2 x double>* %1, align 16
2101 ; CHECK-NEXT: store <2 x double> %38, <2 x double>* %2, align 16
2102 ; CHECK-NEXT: store <2 x double> %39, <2 x double>* %3, align 16
2103 ; CHECK-NEXT: store <2 x double> %40, <2 x double>* %4, align 16
2104 ; CHECK-NEXT: ret <2 x double> %35
2105 ; CHECK-NEXT: }
2106
2107 define <16 x float> @fcmp_true_on_16xfloat(<16 x float>, <16 x float>, <16 x flo at>, <16 x float>) {
2108 entry:
2109 %4 = fcmp true <16 x float> %0, %1
2110 %5 = select <16 x i1> %4, <16 x float> %2, <16 x float> %3
2111 ret <16 x float> %5
2112 }
2113 ; CHECK-LABEL: define <4 x float> @fcmp_true_on_16xfloat(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, < 4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>) {
2114 ; CHECK: entry:
2115 ; CHECK-NEXT: %19 = fcmp true <4 x float> %3, %7
2116 ; CHECK-NEXT: %20 = fcmp true <4 x float> %4, %8
2117 ; CHECK-NEXT: %21 = fcmp true <4 x float> %5, %9
2118 ; CHECK-NEXT: %22 = fcmp true <4 x float> %6, %10
2119 ; CHECK-NEXT: %23 = select <4 x i1> %19, <4 x float> %11, <4 x float> %15
2120 ; CHECK-NEXT: %24 = select <4 x i1> %20, <4 x float> %12, <4 x float> %16
2121 ; CHECK-NEXT: %25 = select <4 x i1> %21, <4 x float> %13, <4 x float> %17
2122 ; CHECK-NEXT: %26 = select <4 x i1> %22, <4 x float> %14, <4 x float> %18
2123 ; CHECK-NEXT: store <4 x float> %24, <4 x float>* %0, align 16
2124 ; CHECK-NEXT: store <4 x float> %25, <4 x float>* %1, align 16
2125 ; CHECK-NEXT: store <4 x float> %26, <4 x float>* %2, align 16
2126 ; CHECK-NEXT: ret <4 x float> %23
2127 ; CHECK-NEXT: }
2128
2129 define <16 x float> @fcmp_false_on_16xfloat(<16 x float>, <16 x float>, <16 x fl oat>, <16 x float>) {
2130 entry:
2131 %4 = fcmp false <16 x float> %0, %1
2132 %5 = select <16 x i1> %4, <16 x float> %2, <16 x float> %3
2133 ret <16 x float> %5
2134 }
2135 ; CHECK-LABEL: define <4 x float> @fcmp_false_on_16xfloat(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16) , <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>) {
2136 ; CHECK: entry:
2137 ; CHECK-NEXT: %19 = fcmp false <4 x float> %3, %7
2138 ; CHECK-NEXT: %20 = fcmp false <4 x float> %4, %8
2139 ; CHECK-NEXT: %21 = fcmp false <4 x float> %5, %9
2140 ; CHECK-NEXT: %22 = fcmp false <4 x float> %6, %10
2141 ; CHECK-NEXT: %23 = select <4 x i1> %19, <4 x float> %11, <4 x float> %15
2142 ; CHECK-NEXT: %24 = select <4 x i1> %20, <4 x float> %12, <4 x float> %16
2143 ; CHECK-NEXT: %25 = select <4 x i1> %21, <4 x float> %13, <4 x float> %17
2144 ; CHECK-NEXT: %26 = select <4 x i1> %22, <4 x float> %14, <4 x float> %18
2145 ; CHECK-NEXT: store <4 x float> %24, <4 x float>* %0, align 16
2146 ; CHECK-NEXT: store <4 x float> %25, <4 x float>* %1, align 16
2147 ; CHECK-NEXT: store <4 x float> %26, <4 x float>* %2, align 16
2148 ; CHECK-NEXT: ret <4 x float> %23
2149 ; CHECK-NEXT: }
2150
2151 define <16 x float> @fcmp_oeq_on_16xfloat(<16 x float>, <16 x float>, <16 x floa t>, <16 x float>) {
2152 entry:
2153 %4 = fcmp oeq <16 x float> %0, %1
2154 %5 = select <16 x i1> %4, <16 x float> %2, <16 x float> %3
2155 ret <16 x float> %5
2156 }
2157 ; CHECK-LABEL: define <4 x float> @fcmp_oeq_on_16xfloat(<4 x float>* nocapture n onnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x f loat>, <4 x float>) {
2158 ; CHECK: entry:
2159 ; CHECK-NEXT: %19 = fcmp oeq <4 x float> %3, %7
2160 ; CHECK-NEXT: %20 = fcmp oeq <4 x float> %4, %8
2161 ; CHECK-NEXT: %21 = fcmp oeq <4 x float> %5, %9
2162 ; CHECK-NEXT: %22 = fcmp oeq <4 x float> %6, %10
2163 ; CHECK-NEXT: %23 = select <4 x i1> %19, <4 x float> %11, <4 x float> %15
2164 ; CHECK-NEXT: %24 = select <4 x i1> %20, <4 x float> %12, <4 x float> %16
2165 ; CHECK-NEXT: %25 = select <4 x i1> %21, <4 x float> %13, <4 x float> %17
2166 ; CHECK-NEXT: %26 = select <4 x i1> %22, <4 x float> %14, <4 x float> %18
2167 ; CHECK-NEXT: store <4 x float> %24, <4 x float>* %0, align 16
2168 ; CHECK-NEXT: store <4 x float> %25, <4 x float>* %1, align 16
2169 ; CHECK-NEXT: store <4 x float> %26, <4 x float>* %2, align 16
2170 ; CHECK-NEXT: ret <4 x float> %23
2171 ; CHECK-NEXT: }
2172
2173 define <16 x float> @fcmp_ueq_on_16xfloat(<16 x float>, <16 x float>, <16 x floa t>, <16 x float>) {
2174 entry:
2175 %4 = fcmp ueq <16 x float> %0, %1
2176 %5 = select <16 x i1> %4, <16 x float> %2, <16 x float> %3
2177 ret <16 x float> %5
2178 }
2179 ; CHECK-LABEL: define <4 x float> @fcmp_ueq_on_16xfloat(<4 x float>* nocapture n onnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x f loat>, <4 x float>) {
2180 ; CHECK: entry:
2181 ; CHECK-NEXT: %19 = fcmp ueq <4 x float> %3, %7
2182 ; CHECK-NEXT: %20 = fcmp ueq <4 x float> %4, %8
2183 ; CHECK-NEXT: %21 = fcmp ueq <4 x float> %5, %9
2184 ; CHECK-NEXT: %22 = fcmp ueq <4 x float> %6, %10
2185 ; CHECK-NEXT: %23 = select <4 x i1> %19, <4 x float> %11, <4 x float> %15
2186 ; CHECK-NEXT: %24 = select <4 x i1> %20, <4 x float> %12, <4 x float> %16
2187 ; CHECK-NEXT: %25 = select <4 x i1> %21, <4 x float> %13, <4 x float> %17
2188 ; CHECK-NEXT: %26 = select <4 x i1> %22, <4 x float> %14, <4 x float> %18
2189 ; CHECK-NEXT: store <4 x float> %24, <4 x float>* %0, align 16
2190 ; CHECK-NEXT: store <4 x float> %25, <4 x float>* %1, align 16
2191 ; CHECK-NEXT: store <4 x float> %26, <4 x float>* %2, align 16
2192 ; CHECK-NEXT: ret <4 x float> %23
2193 ; CHECK-NEXT: }
2194
2195 define <16 x float> @fcmp_one_on_16xfloat(<16 x float>, <16 x float>, <16 x floa t>, <16 x float>) {
2196 entry:
2197 %4 = fcmp one <16 x float> %0, %1
2198 %5 = select <16 x i1> %4, <16 x float> %2, <16 x float> %3
2199 ret <16 x float> %5
2200 }
2201 ; CHECK-LABEL: define <4 x float> @fcmp_one_on_16xfloat(<4 x float>* nocapture n onnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x f loat>, <4 x float>) {
2202 ; CHECK: entry:
2203 ; CHECK-NEXT: %19 = fcmp one <4 x float> %3, %7
2204 ; CHECK-NEXT: %20 = fcmp one <4 x float> %4, %8
2205 ; CHECK-NEXT: %21 = fcmp one <4 x float> %5, %9
2206 ; CHECK-NEXT: %22 = fcmp one <4 x float> %6, %10
2207 ; CHECK-NEXT: %23 = select <4 x i1> %19, <4 x float> %11, <4 x float> %15
2208 ; CHECK-NEXT: %24 = select <4 x i1> %20, <4 x float> %12, <4 x float> %16
2209 ; CHECK-NEXT: %25 = select <4 x i1> %21, <4 x float> %13, <4 x float> %17
2210 ; CHECK-NEXT: %26 = select <4 x i1> %22, <4 x float> %14, <4 x float> %18
2211 ; CHECK-NEXT: store <4 x float> %24, <4 x float>* %0, align 16
2212 ; CHECK-NEXT: store <4 x float> %25, <4 x float>* %1, align 16
2213 ; CHECK-NEXT: store <4 x float> %26, <4 x float>* %2, align 16
2214 ; CHECK-NEXT: ret <4 x float> %23
2215 ; CHECK-NEXT: }
2216
2217 define <16 x float> @fcmp_une_on_16xfloat(<16 x float>, <16 x float>, <16 x floa t>, <16 x float>) {
2218 entry:
2219 %4 = fcmp une <16 x float> %0, %1
2220 %5 = select <16 x i1> %4, <16 x float> %2, <16 x float> %3
2221 ret <16 x float> %5
2222 }
2223 ; CHECK-LABEL: define <4 x float> @fcmp_une_on_16xfloat(<4 x float>* nocapture n onnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x f loat>, <4 x float>) {
2224 ; CHECK: entry:
2225 ; CHECK-NEXT: %19 = fcmp une <4 x float> %3, %7
2226 ; CHECK-NEXT: %20 = fcmp une <4 x float> %4, %8
2227 ; CHECK-NEXT: %21 = fcmp une <4 x float> %5, %9
2228 ; CHECK-NEXT: %22 = fcmp une <4 x float> %6, %10
2229 ; CHECK-NEXT: %23 = select <4 x i1> %19, <4 x float> %11, <4 x float> %15
2230 ; CHECK-NEXT: %24 = select <4 x i1> %20, <4 x float> %12, <4 x float> %16
2231 ; CHECK-NEXT: %25 = select <4 x i1> %21, <4 x float> %13, <4 x float> %17
2232 ; CHECK-NEXT: %26 = select <4 x i1> %22, <4 x float> %14, <4 x float> %18
2233 ; CHECK-NEXT: store <4 x float> %24, <4 x float>* %0, align 16
2234 ; CHECK-NEXT: store <4 x float> %25, <4 x float>* %1, align 16
2235 ; CHECK-NEXT: store <4 x float> %26, <4 x float>* %2, align 16
2236 ; CHECK-NEXT: ret <4 x float> %23
2237 ; CHECK-NEXT: }
2238
2239 define <16 x float> @fcmp_ogt_on_16xfloat(<16 x float>, <16 x float>, <16 x floa t>, <16 x float>) {
2240 entry:
2241 %4 = fcmp ogt <16 x float> %0, %1
2242 %5 = select <16 x i1> %4, <16 x float> %2, <16 x float> %3
2243 ret <16 x float> %5
2244 }
2245 ; CHECK-LABEL: define <4 x float> @fcmp_ogt_on_16xfloat(<4 x float>* nocapture n onnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x f loat>, <4 x float>) {
2246 ; CHECK: entry:
2247 ; CHECK-NEXT: %19 = fcmp ogt <4 x float> %3, %7
2248 ; CHECK-NEXT: %20 = fcmp ogt <4 x float> %4, %8
2249 ; CHECK-NEXT: %21 = fcmp ogt <4 x float> %5, %9
2250 ; CHECK-NEXT: %22 = fcmp ogt <4 x float> %6, %10
2251 ; CHECK-NEXT: %23 = select <4 x i1> %19, <4 x float> %11, <4 x float> %15
2252 ; CHECK-NEXT: %24 = select <4 x i1> %20, <4 x float> %12, <4 x float> %16
2253 ; CHECK-NEXT: %25 = select <4 x i1> %21, <4 x float> %13, <4 x float> %17
2254 ; CHECK-NEXT: %26 = select <4 x i1> %22, <4 x float> %14, <4 x float> %18
2255 ; CHECK-NEXT: store <4 x float> %24, <4 x float>* %0, align 16
2256 ; CHECK-NEXT: store <4 x float> %25, <4 x float>* %1, align 16
2257 ; CHECK-NEXT: store <4 x float> %26, <4 x float>* %2, align 16
2258 ; CHECK-NEXT: ret <4 x float> %23
2259 ; CHECK-NEXT: }
2260
2261 define <16 x float> @fcmp_ugt_on_16xfloat(<16 x float>, <16 x float>, <16 x floa t>, <16 x float>) {
2262 entry:
2263 %4 = fcmp ugt <16 x float> %0, %1
2264 %5 = select <16 x i1> %4, <16 x float> %2, <16 x float> %3
2265 ret <16 x float> %5
2266 }
2267 ; CHECK-LABEL: define <4 x float> @fcmp_ugt_on_16xfloat(<4 x float>* nocapture n onnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x f loat>, <4 x float>) {
2268 ; CHECK: entry:
2269 ; CHECK-NEXT: %19 = fcmp ugt <4 x float> %3, %7
2270 ; CHECK-NEXT: %20 = fcmp ugt <4 x float> %4, %8
2271 ; CHECK-NEXT: %21 = fcmp ugt <4 x float> %5, %9
2272 ; CHECK-NEXT: %22 = fcmp ugt <4 x float> %6, %10
2273 ; CHECK-NEXT: %23 = select <4 x i1> %19, <4 x float> %11, <4 x float> %15
2274 ; CHECK-NEXT: %24 = select <4 x i1> %20, <4 x float> %12, <4 x float> %16
2275 ; CHECK-NEXT: %25 = select <4 x i1> %21, <4 x float> %13, <4 x float> %17
2276 ; CHECK-NEXT: %26 = select <4 x i1> %22, <4 x float> %14, <4 x float> %18
2277 ; CHECK-NEXT: store <4 x float> %24, <4 x float>* %0, align 16
2278 ; CHECK-NEXT: store <4 x float> %25, <4 x float>* %1, align 16
2279 ; CHECK-NEXT: store <4 x float> %26, <4 x float>* %2, align 16
2280 ; CHECK-NEXT: ret <4 x float> %23
2281 ; CHECK-NEXT: }
2282
2283 define <16 x float> @fcmp_oge_on_16xfloat(<16 x float>, <16 x float>, <16 x floa t>, <16 x float>) {
2284 entry:
2285 %4 = fcmp oge <16 x float> %0, %1
2286 %5 = select <16 x i1> %4, <16 x float> %2, <16 x float> %3
2287 ret <16 x float> %5
2288 }
2289 ; CHECK-LABEL: define <4 x float> @fcmp_oge_on_16xfloat(<4 x float>* nocapture n onnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x f loat>, <4 x float>) {
2290 ; CHECK: entry:
2291 ; CHECK-NEXT: %19 = fcmp oge <4 x float> %3, %7
2292 ; CHECK-NEXT: %20 = fcmp oge <4 x float> %4, %8
2293 ; CHECK-NEXT: %21 = fcmp oge <4 x float> %5, %9
2294 ; CHECK-NEXT: %22 = fcmp oge <4 x float> %6, %10
2295 ; CHECK-NEXT: %23 = select <4 x i1> %19, <4 x float> %11, <4 x float> %15
2296 ; CHECK-NEXT: %24 = select <4 x i1> %20, <4 x float> %12, <4 x float> %16
2297 ; CHECK-NEXT: %25 = select <4 x i1> %21, <4 x float> %13, <4 x float> %17
2298 ; CHECK-NEXT: %26 = select <4 x i1> %22, <4 x float> %14, <4 x float> %18
2299 ; CHECK-NEXT: store <4 x float> %24, <4 x float>* %0, align 16
2300 ; CHECK-NEXT: store <4 x float> %25, <4 x float>* %1, align 16
2301 ; CHECK-NEXT: store <4 x float> %26, <4 x float>* %2, align 16
2302 ; CHECK-NEXT: ret <4 x float> %23
2303 ; CHECK-NEXT: }
2304
2305 define <16 x float> @fcmp_uge_on_16xfloat(<16 x float>, <16 x float>, <16 x floa t>, <16 x float>) {
2306 entry:
2307 %4 = fcmp uge <16 x float> %0, %1
2308 %5 = select <16 x i1> %4, <16 x float> %2, <16 x float> %3
2309 ret <16 x float> %5
2310 }
2311 ; CHECK-LABEL: define <4 x float> @fcmp_uge_on_16xfloat(<4 x float>* nocapture n onnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x f loat>, <4 x float>) {
2312 ; CHECK: entry:
2313 ; CHECK-NEXT: %19 = fcmp uge <4 x float> %3, %7
2314 ; CHECK-NEXT: %20 = fcmp uge <4 x float> %4, %8
2315 ; CHECK-NEXT: %21 = fcmp uge <4 x float> %5, %9
2316 ; CHECK-NEXT: %22 = fcmp uge <4 x float> %6, %10
2317 ; CHECK-NEXT: %23 = select <4 x i1> %19, <4 x float> %11, <4 x float> %15
2318 ; CHECK-NEXT: %24 = select <4 x i1> %20, <4 x float> %12, <4 x float> %16
2319 ; CHECK-NEXT: %25 = select <4 x i1> %21, <4 x float> %13, <4 x float> %17
2320 ; CHECK-NEXT: %26 = select <4 x i1> %22, <4 x float> %14, <4 x float> %18
2321 ; CHECK-NEXT: store <4 x float> %24, <4 x float>* %0, align 16
2322 ; CHECK-NEXT: store <4 x float> %25, <4 x float>* %1, align 16
2323 ; CHECK-NEXT: store <4 x float> %26, <4 x float>* %2, align 16
2324 ; CHECK-NEXT: ret <4 x float> %23
2325 ; CHECK-NEXT: }
2326
2327 define <16 x float> @fcmp_ord_on_16xfloat(<16 x float>, <16 x float>, <16 x floa t>, <16 x float>) {
2328 entry:
2329 %4 = fcmp ord <16 x float> %0, %1
2330 %5 = select <16 x i1> %4, <16 x float> %2, <16 x float> %3
2331 ret <16 x float> %5
2332 }
2333 ; CHECK-LABEL: define <4 x float> @fcmp_ord_on_16xfloat(<4 x float>* nocapture n onnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x f loat>, <4 x float>) {
2334 ; CHECK: entry:
2335 ; CHECK-NEXT: %19 = fcmp ord <4 x float> %3, %7
2336 ; CHECK-NEXT: %20 = fcmp ord <4 x float> %4, %8
2337 ; CHECK-NEXT: %21 = fcmp ord <4 x float> %5, %9
2338 ; CHECK-NEXT: %22 = fcmp ord <4 x float> %6, %10
2339 ; CHECK-NEXT: %23 = select <4 x i1> %19, <4 x float> %11, <4 x float> %15
2340 ; CHECK-NEXT: %24 = select <4 x i1> %20, <4 x float> %12, <4 x float> %16
2341 ; CHECK-NEXT: %25 = select <4 x i1> %21, <4 x float> %13, <4 x float> %17
2342 ; CHECK-NEXT: %26 = select <4 x i1> %22, <4 x float> %14, <4 x float> %18
2343 ; CHECK-NEXT: store <4 x float> %24, <4 x float>* %0, align 16
2344 ; CHECK-NEXT: store <4 x float> %25, <4 x float>* %1, align 16
2345 ; CHECK-NEXT: store <4 x float> %26, <4 x float>* %2, align 16
2346 ; CHECK-NEXT: ret <4 x float> %23
2347 ; CHECK-NEXT: }
2348
2349 define <16 x float> @fcmp_uno_on_16xfloat(<16 x float>, <16 x float>, <16 x floa t>, <16 x float>) {
2350 entry:
2351 %4 = fcmp uno <16 x float> %0, %1
2352 %5 = select <16 x i1> %4, <16 x float> %2, <16 x float> %3
2353 ret <16 x float> %5
2354 }
2355 ; CHECK-LABEL: define <4 x float> @fcmp_uno_on_16xfloat(<4 x float>* nocapture n onnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x f loat>, <4 x float>) {
2356 ; CHECK: entry:
2357 ; CHECK-NEXT: %19 = fcmp uno <4 x float> %3, %7
2358 ; CHECK-NEXT: %20 = fcmp uno <4 x float> %4, %8
2359 ; CHECK-NEXT: %21 = fcmp uno <4 x float> %5, %9
2360 ; CHECK-NEXT: %22 = fcmp uno <4 x float> %6, %10
2361 ; CHECK-NEXT: %23 = select <4 x i1> %19, <4 x float> %11, <4 x float> %15
2362 ; CHECK-NEXT: %24 = select <4 x i1> %20, <4 x float> %12, <4 x float> %16
2363 ; CHECK-NEXT: %25 = select <4 x i1> %21, <4 x float> %13, <4 x float> %17
2364 ; CHECK-NEXT: %26 = select <4 x i1> %22, <4 x float> %14, <4 x float> %18
2365 ; CHECK-NEXT: store <4 x float> %24, <4 x float>* %0, align 16
2366 ; CHECK-NEXT: store <4 x float> %25, <4 x float>* %1, align 16
2367 ; CHECK-NEXT: store <4 x float> %26, <4 x float>* %2, align 16
2368 ; CHECK-NEXT: ret <4 x float> %23
2369 ; CHECK-NEXT: }
2370
2371 define <16 x double> @fcmp_true_on_16xdouble(<16 x double>, <16 x double>, <16 x double>, <16 x double>) {
2372 entry:
2373 %4 = fcmp true <16 x double> %0, %1
2374 %5 = select <16 x i1> %4, <16 x double> %2, <16 x double> %3
2375 ret <16 x double> %5
2376 }
2377 ; CHECK-LABEL: define <2 x double> @fcmp_true_on_16xdouble(<2 x double>* nocaptu re nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable( 16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocaptur e nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(1 6), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x dou ble>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x doubl e>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x d ouble>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
2378 ; CHECK: entry:
2379 ; CHECK-NEXT: %39 = fcmp true <2 x double> %7, %15
2380 ; CHECK-NEXT: %40 = fcmp true <2 x double> %8, %16
2381 ; CHECK-NEXT: %41 = fcmp true <2 x double> %9, %17
2382 ; CHECK-NEXT: %42 = fcmp true <2 x double> %10, %18
2383 ; CHECK-NEXT: %43 = fcmp true <2 x double> %11, %19
2384 ; CHECK-NEXT: %44 = fcmp true <2 x double> %12, %20
2385 ; CHECK-NEXT: %45 = fcmp true <2 x double> %13, %21
2386 ; CHECK-NEXT: %46 = fcmp true <2 x double> %14, %22
2387 ; CHECK-NEXT: %47 = select <2 x i1> %39, <2 x double> %23, <2 x double> %31
2388 ; CHECK-NEXT: %48 = select <2 x i1> %40, <2 x double> %24, <2 x double> %32
2389 ; CHECK-NEXT: %49 = select <2 x i1> %41, <2 x double> %25, <2 x double> %33
2390 ; CHECK-NEXT: %50 = select <2 x i1> %42, <2 x double> %26, <2 x double> %34
2391 ; CHECK-NEXT: %51 = select <2 x i1> %43, <2 x double> %27, <2 x double> %35
2392 ; CHECK-NEXT: %52 = select <2 x i1> %44, <2 x double> %28, <2 x double> %36
2393 ; CHECK-NEXT: %53 = select <2 x i1> %45, <2 x double> %29, <2 x double> %37
2394 ; CHECK-NEXT: %54 = select <2 x i1> %46, <2 x double> %30, <2 x double> %38
2395 ; CHECK-NEXT: store <2 x double> %48, <2 x double>* %0, align 16
2396 ; CHECK-NEXT: store <2 x double> %49, <2 x double>* %1, align 16
2397 ; CHECK-NEXT: store <2 x double> %50, <2 x double>* %2, align 16
2398 ; CHECK-NEXT: store <2 x double> %51, <2 x double>* %3, align 16
2399 ; CHECK-NEXT: store <2 x double> %52, <2 x double>* %4, align 16
2400 ; CHECK-NEXT: store <2 x double> %53, <2 x double>* %5, align 16
2401 ; CHECK-NEXT: store <2 x double> %54, <2 x double>* %6, align 16
2402 ; CHECK-NEXT: ret <2 x double> %47
2403 ; CHECK-NEXT: }
2404
2405 define <16 x double> @fcmp_false_on_16xdouble(<16 x double>, <16 x double>, <16 x double>, <16 x double>) {
2406 entry:
2407 %4 = fcmp false <16 x double> %0, %1
2408 %5 = select <16 x i1> %4, <16 x double> %2, <16 x double> %3
2409 ret <16 x double> %5
2410 }
2411 ; CHECK-LABEL: define <2 x double> @fcmp_false_on_16xdouble(<2 x double>* nocapt ure nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable (16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocaptu re nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable( 16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocaptur e nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x do uble>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x doub le>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
2412 ; CHECK: entry:
2413 ; CHECK-NEXT: %39 = fcmp false <2 x double> %7, %15
2414 ; CHECK-NEXT: %40 = fcmp false <2 x double> %8, %16
2415 ; CHECK-NEXT: %41 = fcmp false <2 x double> %9, %17
2416 ; CHECK-NEXT: %42 = fcmp false <2 x double> %10, %18
2417 ; CHECK-NEXT: %43 = fcmp false <2 x double> %11, %19
2418 ; CHECK-NEXT: %44 = fcmp false <2 x double> %12, %20
2419 ; CHECK-NEXT: %45 = fcmp false <2 x double> %13, %21
2420 ; CHECK-NEXT: %46 = fcmp false <2 x double> %14, %22
2421 ; CHECK-NEXT: %47 = select <2 x i1> %39, <2 x double> %23, <2 x double> %31
2422 ; CHECK-NEXT: %48 = select <2 x i1> %40, <2 x double> %24, <2 x double> %32
2423 ; CHECK-NEXT: %49 = select <2 x i1> %41, <2 x double> %25, <2 x double> %33
2424 ; CHECK-NEXT: %50 = select <2 x i1> %42, <2 x double> %26, <2 x double> %34
2425 ; CHECK-NEXT: %51 = select <2 x i1> %43, <2 x double> %27, <2 x double> %35
2426 ; CHECK-NEXT: %52 = select <2 x i1> %44, <2 x double> %28, <2 x double> %36
2427 ; CHECK-NEXT: %53 = select <2 x i1> %45, <2 x double> %29, <2 x double> %37
2428 ; CHECK-NEXT: %54 = select <2 x i1> %46, <2 x double> %30, <2 x double> %38
2429 ; CHECK-NEXT: store <2 x double> %48, <2 x double>* %0, align 16
2430 ; CHECK-NEXT: store <2 x double> %49, <2 x double>* %1, align 16
2431 ; CHECK-NEXT: store <2 x double> %50, <2 x double>* %2, align 16
2432 ; CHECK-NEXT: store <2 x double> %51, <2 x double>* %3, align 16
2433 ; CHECK-NEXT: store <2 x double> %52, <2 x double>* %4, align 16
2434 ; CHECK-NEXT: store <2 x double> %53, <2 x double>* %5, align 16
2435 ; CHECK-NEXT: store <2 x double> %54, <2 x double>* %6, align 16
2436 ; CHECK-NEXT: ret <2 x double> %47
2437 ; CHECK-NEXT: }
2438
2439 define <16 x double> @fcmp_oeq_on_16xdouble(<16 x double>, <16 x double>, <16 x double>, <16 x double>) {
2440 entry:
2441 %4 = fcmp oeq <16 x double> %0, %1
2442 %5 = select <16 x i1> %4, <16 x double> %2, <16 x double> %3
2443 ret <16 x double> %5
2444 }
2445 ; CHECK-LABEL: define <2 x double> @fcmp_oeq_on_16xdouble(<2 x double>* nocaptur e nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(1 6), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16 ), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x doub le>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, < 2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double >, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x do uble>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
2446 ; CHECK: entry:
2447 ; CHECK-NEXT: %39 = fcmp oeq <2 x double> %7, %15
2448 ; CHECK-NEXT: %40 = fcmp oeq <2 x double> %8, %16
2449 ; CHECK-NEXT: %41 = fcmp oeq <2 x double> %9, %17
2450 ; CHECK-NEXT: %42 = fcmp oeq <2 x double> %10, %18
2451 ; CHECK-NEXT: %43 = fcmp oeq <2 x double> %11, %19
2452 ; CHECK-NEXT: %44 = fcmp oeq <2 x double> %12, %20
2453 ; CHECK-NEXT: %45 = fcmp oeq <2 x double> %13, %21
2454 ; CHECK-NEXT: %46 = fcmp oeq <2 x double> %14, %22
2455 ; CHECK-NEXT: %47 = select <2 x i1> %39, <2 x double> %23, <2 x double> %31
2456 ; CHECK-NEXT: %48 = select <2 x i1> %40, <2 x double> %24, <2 x double> %32
2457 ; CHECK-NEXT: %49 = select <2 x i1> %41, <2 x double> %25, <2 x double> %33
2458 ; CHECK-NEXT: %50 = select <2 x i1> %42, <2 x double> %26, <2 x double> %34
2459 ; CHECK-NEXT: %51 = select <2 x i1> %43, <2 x double> %27, <2 x double> %35
2460 ; CHECK-NEXT: %52 = select <2 x i1> %44, <2 x double> %28, <2 x double> %36
2461 ; CHECK-NEXT: %53 = select <2 x i1> %45, <2 x double> %29, <2 x double> %37
2462 ; CHECK-NEXT: %54 = select <2 x i1> %46, <2 x double> %30, <2 x double> %38
2463 ; CHECK-NEXT: store <2 x double> %48, <2 x double>* %0, align 16
2464 ; CHECK-NEXT: store <2 x double> %49, <2 x double>* %1, align 16
2465 ; CHECK-NEXT: store <2 x double> %50, <2 x double>* %2, align 16
2466 ; CHECK-NEXT: store <2 x double> %51, <2 x double>* %3, align 16
2467 ; CHECK-NEXT: store <2 x double> %52, <2 x double>* %4, align 16
2468 ; CHECK-NEXT: store <2 x double> %53, <2 x double>* %5, align 16
2469 ; CHECK-NEXT: store <2 x double> %54, <2 x double>* %6, align 16
2470 ; CHECK-NEXT: ret <2 x double> %47
2471 ; CHECK-NEXT: }
2472
2473 define <16 x double> @fcmp_ueq_on_16xdouble(<16 x double>, <16 x double>, <16 x double>, <16 x double>) {
2474 entry:
2475 %4 = fcmp ueq <16 x double> %0, %1
2476 %5 = select <16 x i1> %4, <16 x double> %2, <16 x double> %3
2477 ret <16 x double> %5
2478 }
2479 ; CHECK-LABEL: define <2 x double> @fcmp_ueq_on_16xdouble(<2 x double>* nocaptur e nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(1 6), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16 ), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x doub le>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, < 2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double >, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x do uble>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
2480 ; CHECK: entry:
2481 ; CHECK-NEXT: %39 = fcmp ueq <2 x double> %7, %15
2482 ; CHECK-NEXT: %40 = fcmp ueq <2 x double> %8, %16
2483 ; CHECK-NEXT: %41 = fcmp ueq <2 x double> %9, %17
2484 ; CHECK-NEXT: %42 = fcmp ueq <2 x double> %10, %18
2485 ; CHECK-NEXT: %43 = fcmp ueq <2 x double> %11, %19
2486 ; CHECK-NEXT: %44 = fcmp ueq <2 x double> %12, %20
2487 ; CHECK-NEXT: %45 = fcmp ueq <2 x double> %13, %21
2488 ; CHECK-NEXT: %46 = fcmp ueq <2 x double> %14, %22
2489 ; CHECK-NEXT: %47 = select <2 x i1> %39, <2 x double> %23, <2 x double> %31
2490 ; CHECK-NEXT: %48 = select <2 x i1> %40, <2 x double> %24, <2 x double> %32
2491 ; CHECK-NEXT: %49 = select <2 x i1> %41, <2 x double> %25, <2 x double> %33
2492 ; CHECK-NEXT: %50 = select <2 x i1> %42, <2 x double> %26, <2 x double> %34
2493 ; CHECK-NEXT: %51 = select <2 x i1> %43, <2 x double> %27, <2 x double> %35
2494 ; CHECK-NEXT: %52 = select <2 x i1> %44, <2 x double> %28, <2 x double> %36
2495 ; CHECK-NEXT: %53 = select <2 x i1> %45, <2 x double> %29, <2 x double> %37
2496 ; CHECK-NEXT: %54 = select <2 x i1> %46, <2 x double> %30, <2 x double> %38
2497 ; CHECK-NEXT: store <2 x double> %48, <2 x double>* %0, align 16
2498 ; CHECK-NEXT: store <2 x double> %49, <2 x double>* %1, align 16
2499 ; CHECK-NEXT: store <2 x double> %50, <2 x double>* %2, align 16
2500 ; CHECK-NEXT: store <2 x double> %51, <2 x double>* %3, align 16
2501 ; CHECK-NEXT: store <2 x double> %52, <2 x double>* %4, align 16
2502 ; CHECK-NEXT: store <2 x double> %53, <2 x double>* %5, align 16
2503 ; CHECK-NEXT: store <2 x double> %54, <2 x double>* %6, align 16
2504 ; CHECK-NEXT: ret <2 x double> %47
2505 ; CHECK-NEXT: }
2506
2507 define <16 x double> @fcmp_one_on_16xdouble(<16 x double>, <16 x double>, <16 x double>, <16 x double>) {
2508 entry:
2509 %4 = fcmp one <16 x double> %0, %1
2510 %5 = select <16 x i1> %4, <16 x double> %2, <16 x double> %3
2511 ret <16 x double> %5
2512 }
2513 ; CHECK-LABEL: define <2 x double> @fcmp_one_on_16xdouble(<2 x double>* nocaptur e nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(1 6), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16 ), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x doub le>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, < 2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double >, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x do uble>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
2514 ; CHECK: entry:
2515 ; CHECK-NEXT: %39 = fcmp one <2 x double> %7, %15
2516 ; CHECK-NEXT: %40 = fcmp one <2 x double> %8, %16
2517 ; CHECK-NEXT: %41 = fcmp one <2 x double> %9, %17
2518 ; CHECK-NEXT: %42 = fcmp one <2 x double> %10, %18
2519 ; CHECK-NEXT: %43 = fcmp one <2 x double> %11, %19
2520 ; CHECK-NEXT: %44 = fcmp one <2 x double> %12, %20
2521 ; CHECK-NEXT: %45 = fcmp one <2 x double> %13, %21
2522 ; CHECK-NEXT: %46 = fcmp one <2 x double> %14, %22
2523 ; CHECK-NEXT: %47 = select <2 x i1> %39, <2 x double> %23, <2 x double> %31
2524 ; CHECK-NEXT: %48 = select <2 x i1> %40, <2 x double> %24, <2 x double> %32
2525 ; CHECK-NEXT: %49 = select <2 x i1> %41, <2 x double> %25, <2 x double> %33
2526 ; CHECK-NEXT: %50 = select <2 x i1> %42, <2 x double> %26, <2 x double> %34
2527 ; CHECK-NEXT: %51 = select <2 x i1> %43, <2 x double> %27, <2 x double> %35
2528 ; CHECK-NEXT: %52 = select <2 x i1> %44, <2 x double> %28, <2 x double> %36
2529 ; CHECK-NEXT: %53 = select <2 x i1> %45, <2 x double> %29, <2 x double> %37
2530 ; CHECK-NEXT: %54 = select <2 x i1> %46, <2 x double> %30, <2 x double> %38
2531 ; CHECK-NEXT: store <2 x double> %48, <2 x double>* %0, align 16
2532 ; CHECK-NEXT: store <2 x double> %49, <2 x double>* %1, align 16
2533 ; CHECK-NEXT: store <2 x double> %50, <2 x double>* %2, align 16
2534 ; CHECK-NEXT: store <2 x double> %51, <2 x double>* %3, align 16
2535 ; CHECK-NEXT: store <2 x double> %52, <2 x double>* %4, align 16
2536 ; CHECK-NEXT: store <2 x double> %53, <2 x double>* %5, align 16
2537 ; CHECK-NEXT: store <2 x double> %54, <2 x double>* %6, align 16
2538 ; CHECK-NEXT: ret <2 x double> %47
2539 ; CHECK-NEXT: }
2540
2541 define <16 x double> @fcmp_une_on_16xdouble(<16 x double>, <16 x double>, <16 x double>, <16 x double>) {
2542 entry:
2543 %4 = fcmp une <16 x double> %0, %1
2544 %5 = select <16 x i1> %4, <16 x double> %2, <16 x double> %3
2545 ret <16 x double> %5
2546 }
2547 ; CHECK-LABEL: define <2 x double> @fcmp_une_on_16xdouble(<2 x double>* nocaptur e nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(1 6), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16 ), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x doub le>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, < 2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double >, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x do uble>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
2548 ; CHECK: entry:
2549 ; CHECK-NEXT: %39 = fcmp une <2 x double> %7, %15
2550 ; CHECK-NEXT: %40 = fcmp une <2 x double> %8, %16
2551 ; CHECK-NEXT: %41 = fcmp une <2 x double> %9, %17
2552 ; CHECK-NEXT: %42 = fcmp une <2 x double> %10, %18
2553 ; CHECK-NEXT: %43 = fcmp une <2 x double> %11, %19
2554 ; CHECK-NEXT: %44 = fcmp une <2 x double> %12, %20
2555 ; CHECK-NEXT: %45 = fcmp une <2 x double> %13, %21
2556 ; CHECK-NEXT: %46 = fcmp une <2 x double> %14, %22
2557 ; CHECK-NEXT: %47 = select <2 x i1> %39, <2 x double> %23, <2 x double> %31
2558 ; CHECK-NEXT: %48 = select <2 x i1> %40, <2 x double> %24, <2 x double> %32
2559 ; CHECK-NEXT: %49 = select <2 x i1> %41, <2 x double> %25, <2 x double> %33
2560 ; CHECK-NEXT: %50 = select <2 x i1> %42, <2 x double> %26, <2 x double> %34
2561 ; CHECK-NEXT: %51 = select <2 x i1> %43, <2 x double> %27, <2 x double> %35
2562 ; CHECK-NEXT: %52 = select <2 x i1> %44, <2 x double> %28, <2 x double> %36
2563 ; CHECK-NEXT: %53 = select <2 x i1> %45, <2 x double> %29, <2 x double> %37
2564 ; CHECK-NEXT: %54 = select <2 x i1> %46, <2 x double> %30, <2 x double> %38
2565 ; CHECK-NEXT: store <2 x double> %48, <2 x double>* %0, align 16
2566 ; CHECK-NEXT: store <2 x double> %49, <2 x double>* %1, align 16
2567 ; CHECK-NEXT: store <2 x double> %50, <2 x double>* %2, align 16
2568 ; CHECK-NEXT: store <2 x double> %51, <2 x double>* %3, align 16
2569 ; CHECK-NEXT: store <2 x double> %52, <2 x double>* %4, align 16
2570 ; CHECK-NEXT: store <2 x double> %53, <2 x double>* %5, align 16
2571 ; CHECK-NEXT: store <2 x double> %54, <2 x double>* %6, align 16
2572 ; CHECK-NEXT: ret <2 x double> %47
2573 ; CHECK-NEXT: }
2574
2575 define <16 x double> @fcmp_ogt_on_16xdouble(<16 x double>, <16 x double>, <16 x double>, <16 x double>) {
2576 entry:
2577 %4 = fcmp ogt <16 x double> %0, %1
2578 %5 = select <16 x i1> %4, <16 x double> %2, <16 x double> %3
2579 ret <16 x double> %5
2580 }
2581 ; CHECK-LABEL: define <2 x double> @fcmp_ogt_on_16xdouble(<2 x double>* nocaptur e nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(1 6), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16 ), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x doub le>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, < 2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double >, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x do uble>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
2582 ; CHECK: entry:
2583 ; CHECK-NEXT: %39 = fcmp ogt <2 x double> %7, %15
2584 ; CHECK-NEXT: %40 = fcmp ogt <2 x double> %8, %16
2585 ; CHECK-NEXT: %41 = fcmp ogt <2 x double> %9, %17
2586 ; CHECK-NEXT: %42 = fcmp ogt <2 x double> %10, %18
2587 ; CHECK-NEXT: %43 = fcmp ogt <2 x double> %11, %19
2588 ; CHECK-NEXT: %44 = fcmp ogt <2 x double> %12, %20
2589 ; CHECK-NEXT: %45 = fcmp ogt <2 x double> %13, %21
2590 ; CHECK-NEXT: %46 = fcmp ogt <2 x double> %14, %22
2591 ; CHECK-NEXT: %47 = select <2 x i1> %39, <2 x double> %23, <2 x double> %31
2592 ; CHECK-NEXT: %48 = select <2 x i1> %40, <2 x double> %24, <2 x double> %32
2593 ; CHECK-NEXT: %49 = select <2 x i1> %41, <2 x double> %25, <2 x double> %33
2594 ; CHECK-NEXT: %50 = select <2 x i1> %42, <2 x double> %26, <2 x double> %34
2595 ; CHECK-NEXT: %51 = select <2 x i1> %43, <2 x double> %27, <2 x double> %35
2596 ; CHECK-NEXT: %52 = select <2 x i1> %44, <2 x double> %28, <2 x double> %36
2597 ; CHECK-NEXT: %53 = select <2 x i1> %45, <2 x double> %29, <2 x double> %37
2598 ; CHECK-NEXT: %54 = select <2 x i1> %46, <2 x double> %30, <2 x double> %38
2599 ; CHECK-NEXT: store <2 x double> %48, <2 x double>* %0, align 16
2600 ; CHECK-NEXT: store <2 x double> %49, <2 x double>* %1, align 16
2601 ; CHECK-NEXT: store <2 x double> %50, <2 x double>* %2, align 16
2602 ; CHECK-NEXT: store <2 x double> %51, <2 x double>* %3, align 16
2603 ; CHECK-NEXT: store <2 x double> %52, <2 x double>* %4, align 16
2604 ; CHECK-NEXT: store <2 x double> %53, <2 x double>* %5, align 16
2605 ; CHECK-NEXT: store <2 x double> %54, <2 x double>* %6, align 16
2606 ; CHECK-NEXT: ret <2 x double> %47
2607 ; CHECK-NEXT: }
2608
2609 define <16 x double> @fcmp_ugt_on_16xdouble(<16 x double>, <16 x double>, <16 x double>, <16 x double>) {
2610 entry:
2611 %4 = fcmp ugt <16 x double> %0, %1
2612 %5 = select <16 x i1> %4, <16 x double> %2, <16 x double> %3
2613 ret <16 x double> %5
2614 }
2615 ; CHECK-LABEL: define <2 x double> @fcmp_ugt_on_16xdouble(<2 x double>* nocaptur e nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(1 6), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16 ), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x doub le>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, < 2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double >, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x do uble>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
2616 ; CHECK: entry:
2617 ; CHECK-NEXT: %39 = fcmp ugt <2 x double> %7, %15
2618 ; CHECK-NEXT: %40 = fcmp ugt <2 x double> %8, %16
2619 ; CHECK-NEXT: %41 = fcmp ugt <2 x double> %9, %17
2620 ; CHECK-NEXT: %42 = fcmp ugt <2 x double> %10, %18
2621 ; CHECK-NEXT: %43 = fcmp ugt <2 x double> %11, %19
2622 ; CHECK-NEXT: %44 = fcmp ugt <2 x double> %12, %20
2623 ; CHECK-NEXT: %45 = fcmp ugt <2 x double> %13, %21
2624 ; CHECK-NEXT: %46 = fcmp ugt <2 x double> %14, %22
2625 ; CHECK-NEXT: %47 = select <2 x i1> %39, <2 x double> %23, <2 x double> %31
2626 ; CHECK-NEXT: %48 = select <2 x i1> %40, <2 x double> %24, <2 x double> %32
2627 ; CHECK-NEXT: %49 = select <2 x i1> %41, <2 x double> %25, <2 x double> %33
2628 ; CHECK-NEXT: %50 = select <2 x i1> %42, <2 x double> %26, <2 x double> %34
2629 ; CHECK-NEXT: %51 = select <2 x i1> %43, <2 x double> %27, <2 x double> %35
2630 ; CHECK-NEXT: %52 = select <2 x i1> %44, <2 x double> %28, <2 x double> %36
2631 ; CHECK-NEXT: %53 = select <2 x i1> %45, <2 x double> %29, <2 x double> %37
2632 ; CHECK-NEXT: %54 = select <2 x i1> %46, <2 x double> %30, <2 x double> %38
2633 ; CHECK-NEXT: store <2 x double> %48, <2 x double>* %0, align 16
2634 ; CHECK-NEXT: store <2 x double> %49, <2 x double>* %1, align 16
2635 ; CHECK-NEXT: store <2 x double> %50, <2 x double>* %2, align 16
2636 ; CHECK-NEXT: store <2 x double> %51, <2 x double>* %3, align 16
2637 ; CHECK-NEXT: store <2 x double> %52, <2 x double>* %4, align 16
2638 ; CHECK-NEXT: store <2 x double> %53, <2 x double>* %5, align 16
2639 ; CHECK-NEXT: store <2 x double> %54, <2 x double>* %6, align 16
2640 ; CHECK-NEXT: ret <2 x double> %47
2641 ; CHECK-NEXT: }
2642
2643 define <16 x double> @fcmp_oge_on_16xdouble(<16 x double>, <16 x double>, <16 x double>, <16 x double>) {
2644 entry:
2645 %4 = fcmp oge <16 x double> %0, %1
2646 %5 = select <16 x i1> %4, <16 x double> %2, <16 x double> %3
2647 ret <16 x double> %5
2648 }
2649 ; CHECK-LABEL: define <2 x double> @fcmp_oge_on_16xdouble(<2 x double>* nocaptur e nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(1 6), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16 ), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x doub le>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, < 2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double >, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x do uble>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
2650 ; CHECK: entry:
2651 ; CHECK-NEXT: %39 = fcmp oge <2 x double> %7, %15
2652 ; CHECK-NEXT: %40 = fcmp oge <2 x double> %8, %16
2653 ; CHECK-NEXT: %41 = fcmp oge <2 x double> %9, %17
2654 ; CHECK-NEXT: %42 = fcmp oge <2 x double> %10, %18
2655 ; CHECK-NEXT: %43 = fcmp oge <2 x double> %11, %19
2656 ; CHECK-NEXT: %44 = fcmp oge <2 x double> %12, %20
2657 ; CHECK-NEXT: %45 = fcmp oge <2 x double> %13, %21
2658 ; CHECK-NEXT: %46 = fcmp oge <2 x double> %14, %22
2659 ; CHECK-NEXT: %47 = select <2 x i1> %39, <2 x double> %23, <2 x double> %31
2660 ; CHECK-NEXT: %48 = select <2 x i1> %40, <2 x double> %24, <2 x double> %32
2661 ; CHECK-NEXT: %49 = select <2 x i1> %41, <2 x double> %25, <2 x double> %33
2662 ; CHECK-NEXT: %50 = select <2 x i1> %42, <2 x double> %26, <2 x double> %34
2663 ; CHECK-NEXT: %51 = select <2 x i1> %43, <2 x double> %27, <2 x double> %35
2664 ; CHECK-NEXT: %52 = select <2 x i1> %44, <2 x double> %28, <2 x double> %36
2665 ; CHECK-NEXT: %53 = select <2 x i1> %45, <2 x double> %29, <2 x double> %37
2666 ; CHECK-NEXT: %54 = select <2 x i1> %46, <2 x double> %30, <2 x double> %38
2667 ; CHECK-NEXT: store <2 x double> %48, <2 x double>* %0, align 16
2668 ; CHECK-NEXT: store <2 x double> %49, <2 x double>* %1, align 16
2669 ; CHECK-NEXT: store <2 x double> %50, <2 x double>* %2, align 16
2670 ; CHECK-NEXT: store <2 x double> %51, <2 x double>* %3, align 16
2671 ; CHECK-NEXT: store <2 x double> %52, <2 x double>* %4, align 16
2672 ; CHECK-NEXT: store <2 x double> %53, <2 x double>* %5, align 16
2673 ; CHECK-NEXT: store <2 x double> %54, <2 x double>* %6, align 16
2674 ; CHECK-NEXT: ret <2 x double> %47
2675 ; CHECK-NEXT: }
2676
2677 define <16 x double> @fcmp_uge_on_16xdouble(<16 x double>, <16 x double>, <16 x double>, <16 x double>) {
2678 entry:
2679 %4 = fcmp uge <16 x double> %0, %1
2680 %5 = select <16 x i1> %4, <16 x double> %2, <16 x double> %3
2681 ret <16 x double> %5
2682 }
2683 ; CHECK-LABEL: define <2 x double> @fcmp_uge_on_16xdouble(<2 x double>* nocaptur e nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(1 6), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16 ), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x doub le>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, < 2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double >, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x do uble>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
2684 ; CHECK: entry:
2685 ; CHECK-NEXT: %39 = fcmp uge <2 x double> %7, %15
2686 ; CHECK-NEXT: %40 = fcmp uge <2 x double> %8, %16
2687 ; CHECK-NEXT: %41 = fcmp uge <2 x double> %9, %17
2688 ; CHECK-NEXT: %42 = fcmp uge <2 x double> %10, %18
2689 ; CHECK-NEXT: %43 = fcmp uge <2 x double> %11, %19
2690 ; CHECK-NEXT: %44 = fcmp uge <2 x double> %12, %20
2691 ; CHECK-NEXT: %45 = fcmp uge <2 x double> %13, %21
2692 ; CHECK-NEXT: %46 = fcmp uge <2 x double> %14, %22
2693 ; CHECK-NEXT: %47 = select <2 x i1> %39, <2 x double> %23, <2 x double> %31
2694 ; CHECK-NEXT: %48 = select <2 x i1> %40, <2 x double> %24, <2 x double> %32
2695 ; CHECK-NEXT: %49 = select <2 x i1> %41, <2 x double> %25, <2 x double> %33
2696 ; CHECK-NEXT: %50 = select <2 x i1> %42, <2 x double> %26, <2 x double> %34
2697 ; CHECK-NEXT: %51 = select <2 x i1> %43, <2 x double> %27, <2 x double> %35
2698 ; CHECK-NEXT: %52 = select <2 x i1> %44, <2 x double> %28, <2 x double> %36
2699 ; CHECK-NEXT: %53 = select <2 x i1> %45, <2 x double> %29, <2 x double> %37
2700 ; CHECK-NEXT: %54 = select <2 x i1> %46, <2 x double> %30, <2 x double> %38
2701 ; CHECK-NEXT: store <2 x double> %48, <2 x double>* %0, align 16
2702 ; CHECK-NEXT: store <2 x double> %49, <2 x double>* %1, align 16
2703 ; CHECK-NEXT: store <2 x double> %50, <2 x double>* %2, align 16
2704 ; CHECK-NEXT: store <2 x double> %51, <2 x double>* %3, align 16
2705 ; CHECK-NEXT: store <2 x double> %52, <2 x double>* %4, align 16
2706 ; CHECK-NEXT: store <2 x double> %53, <2 x double>* %5, align 16
2707 ; CHECK-NEXT: store <2 x double> %54, <2 x double>* %6, align 16
2708 ; CHECK-NEXT: ret <2 x double> %47
2709 ; CHECK-NEXT: }
2710
2711 define <16 x double> @fcmp_ord_on_16xdouble(<16 x double>, <16 x double>, <16 x double>, <16 x double>) {
2712 entry:
2713 %4 = fcmp ord <16 x double> %0, %1
2714 %5 = select <16 x i1> %4, <16 x double> %2, <16 x double> %3
2715 ret <16 x double> %5
2716 }
2717 ; CHECK-LABEL: define <2 x double> @fcmp_ord_on_16xdouble(<2 x double>* nocaptur e nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(1 6), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16 ), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x doub le>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, < 2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double >, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x do uble>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
2718 ; CHECK: entry:
2719 ; CHECK-NEXT: %39 = fcmp ord <2 x double> %7, %15
2720 ; CHECK-NEXT: %40 = fcmp ord <2 x double> %8, %16
2721 ; CHECK-NEXT: %41 = fcmp ord <2 x double> %9, %17
2722 ; CHECK-NEXT: %42 = fcmp ord <2 x double> %10, %18
2723 ; CHECK-NEXT: %43 = fcmp ord <2 x double> %11, %19
2724 ; CHECK-NEXT: %44 = fcmp ord <2 x double> %12, %20
2725 ; CHECK-NEXT: %45 = fcmp ord <2 x double> %13, %21
2726 ; CHECK-NEXT: %46 = fcmp ord <2 x double> %14, %22
2727 ; CHECK-NEXT: %47 = select <2 x i1> %39, <2 x double> %23, <2 x double> %31
2728 ; CHECK-NEXT: %48 = select <2 x i1> %40, <2 x double> %24, <2 x double> %32
2729 ; CHECK-NEXT: %49 = select <2 x i1> %41, <2 x double> %25, <2 x double> %33
2730 ; CHECK-NEXT: %50 = select <2 x i1> %42, <2 x double> %26, <2 x double> %34
2731 ; CHECK-NEXT: %51 = select <2 x i1> %43, <2 x double> %27, <2 x double> %35
2732 ; CHECK-NEXT: %52 = select <2 x i1> %44, <2 x double> %28, <2 x double> %36
2733 ; CHECK-NEXT: %53 = select <2 x i1> %45, <2 x double> %29, <2 x double> %37
2734 ; CHECK-NEXT: %54 = select <2 x i1> %46, <2 x double> %30, <2 x double> %38
2735 ; CHECK-NEXT: store <2 x double> %48, <2 x double>* %0, align 16
2736 ; CHECK-NEXT: store <2 x double> %49, <2 x double>* %1, align 16
2737 ; CHECK-NEXT: store <2 x double> %50, <2 x double>* %2, align 16
2738 ; CHECK-NEXT: store <2 x double> %51, <2 x double>* %3, align 16
2739 ; CHECK-NEXT: store <2 x double> %52, <2 x double>* %4, align 16
2740 ; CHECK-NEXT: store <2 x double> %53, <2 x double>* %5, align 16
2741 ; CHECK-NEXT: store <2 x double> %54, <2 x double>* %6, align 16
2742 ; CHECK-NEXT: ret <2 x double> %47
2743 ; CHECK-NEXT: }
2744
2745 define <16 x double> @fcmp_uno_on_16xdouble(<16 x double>, <16 x double>, <16 x double>, <16 x double>) {
2746 entry:
2747 %4 = fcmp uno <16 x double> %0, %1
2748 %5 = select <16 x i1> %4, <16 x double> %2, <16 x double> %3
2749 ret <16 x double> %5
2750 }
2751 ; CHECK-LABEL: define <2 x double> @fcmp_uno_on_16xdouble(<2 x double>* nocaptur e nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(1 6), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16 ), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x doub le>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, < 2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double >, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x do uble>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
2752 ; CHECK: entry:
2753 ; CHECK-NEXT: %39 = fcmp uno <2 x double> %7, %15
2754 ; CHECK-NEXT: %40 = fcmp uno <2 x double> %8, %16
2755 ; CHECK-NEXT: %41 = fcmp uno <2 x double> %9, %17
2756 ; CHECK-NEXT: %42 = fcmp uno <2 x double> %10, %18
2757 ; CHECK-NEXT: %43 = fcmp uno <2 x double> %11, %19
2758 ; CHECK-NEXT: %44 = fcmp uno <2 x double> %12, %20
2759 ; CHECK-NEXT: %45 = fcmp uno <2 x double> %13, %21
2760 ; CHECK-NEXT: %46 = fcmp uno <2 x double> %14, %22
2761 ; CHECK-NEXT: %47 = select <2 x i1> %39, <2 x double> %23, <2 x double> %31
2762 ; CHECK-NEXT: %48 = select <2 x i1> %40, <2 x double> %24, <2 x double> %32
2763 ; CHECK-NEXT: %49 = select <2 x i1> %41, <2 x double> %25, <2 x double> %33
2764 ; CHECK-NEXT: %50 = select <2 x i1> %42, <2 x double> %26, <2 x double> %34
2765 ; CHECK-NEXT: %51 = select <2 x i1> %43, <2 x double> %27, <2 x double> %35
2766 ; CHECK-NEXT: %52 = select <2 x i1> %44, <2 x double> %28, <2 x double> %36
2767 ; CHECK-NEXT: %53 = select <2 x i1> %45, <2 x double> %29, <2 x double> %37
2768 ; CHECK-NEXT: %54 = select <2 x i1> %46, <2 x double> %30, <2 x double> %38
2769 ; CHECK-NEXT: store <2 x double> %48, <2 x double>* %0, align 16
2770 ; CHECK-NEXT: store <2 x double> %49, <2 x double>* %1, align 16
2771 ; CHECK-NEXT: store <2 x double> %50, <2 x double>* %2, align 16
2772 ; CHECK-NEXT: store <2 x double> %51, <2 x double>* %3, align 16
2773 ; CHECK-NEXT: store <2 x double> %52, <2 x double>* %4, align 16
2774 ; CHECK-NEXT: store <2 x double> %53, <2 x double>* %5, align 16
2775 ; CHECK-NEXT: store <2 x double> %54, <2 x double>* %6, align 16
2776 ; CHECK-NEXT: ret <2 x double> %47
2777 ; CHECK-NEXT: }
2778
2779 define <20 x float> @fcmp_true_on_20xfloat(<20 x float>, <20 x float>, <20 x flo at>, <20 x float>) {
2780 entry:
2781 %4 = fcmp true <20 x float> %0, %1
2782 %5 = select <20 x i1> %4, <20 x float> %2, <20 x float> %3
2783 ret <20 x float> %5
2784 }
2785 ; CHECK-LABEL: define <4 x float> @fcmp_true_on_20xfloat(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonn ull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x fl oat>, <4 x float>, <4 x float>, <4 x float>) {
2786 ; CHECK: entry:
2787 ; CHECK-NEXT: %24 = fcmp true <4 x float> %4, %9
2788 ; CHECK-NEXT: %25 = fcmp true <4 x float> %5, %10
2789 ; CHECK-NEXT: %26 = fcmp true <4 x float> %6, %11
2790 ; CHECK-NEXT: %27 = fcmp true <4 x float> %7, %12
2791 ; CHECK-NEXT: %28 = fcmp true <4 x float> %8, %13
2792 ; CHECK-NEXT: %29 = select <4 x i1> %24, <4 x float> %14, <4 x float> %19
2793 ; CHECK-NEXT: %30 = select <4 x i1> %25, <4 x float> %15, <4 x float> %20
2794 ; CHECK-NEXT: %31 = select <4 x i1> %26, <4 x float> %16, <4 x float> %21
2795 ; CHECK-NEXT: %32 = select <4 x i1> %27, <4 x float> %17, <4 x float> %22
2796 ; CHECK-NEXT: %33 = select <4 x i1> %28, <4 x float> %18, <4 x float> %23
2797 ; CHECK-NEXT: store <4 x float> %30, <4 x float>* %0, align 16
2798 ; CHECK-NEXT: store <4 x float> %31, <4 x float>* %1, align 16
2799 ; CHECK-NEXT: store <4 x float> %32, <4 x float>* %2, align 16
2800 ; CHECK-NEXT: store <4 x float> %33, <4 x float>* %3, align 16
2801 ; CHECK-NEXT: ret <4 x float> %29
2802 ; CHECK-NEXT: }
2803
2804 define <20 x float> @fcmp_false_on_20xfloat(<20 x float>, <20 x float>, <20 x fl oat>, <20 x float>) {
2805 entry:
2806 %4 = fcmp false <20 x float> %0, %1
2807 %5 = select <20 x i1> %4, <20 x float> %2, <20 x float> %3
2808 ret <20 x float> %5
2809 }
2810 ; CHECK-LABEL: define <4 x float> @fcmp_false_on_20xfloat(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16) , <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture non null dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x f loat>, <4 x float>, <4 x float>, <4 x float>) {
2811 ; CHECK: entry:
2812 ; CHECK-NEXT: %24 = fcmp false <4 x float> %4, %9
2813 ; CHECK-NEXT: %25 = fcmp false <4 x float> %5, %10
2814 ; CHECK-NEXT: %26 = fcmp false <4 x float> %6, %11
2815 ; CHECK-NEXT: %27 = fcmp false <4 x float> %7, %12
2816 ; CHECK-NEXT: %28 = fcmp false <4 x float> %8, %13
2817 ; CHECK-NEXT: %29 = select <4 x i1> %24, <4 x float> %14, <4 x float> %19
2818 ; CHECK-NEXT: %30 = select <4 x i1> %25, <4 x float> %15, <4 x float> %20
2819 ; CHECK-NEXT: %31 = select <4 x i1> %26, <4 x float> %16, <4 x float> %21
2820 ; CHECK-NEXT: %32 = select <4 x i1> %27, <4 x float> %17, <4 x float> %22
2821 ; CHECK-NEXT: %33 = select <4 x i1> %28, <4 x float> %18, <4 x float> %23
2822 ; CHECK-NEXT: store <4 x float> %30, <4 x float>* %0, align 16
2823 ; CHECK-NEXT: store <4 x float> %31, <4 x float>* %1, align 16
2824 ; CHECK-NEXT: store <4 x float> %32, <4 x float>* %2, align 16
2825 ; CHECK-NEXT: store <4 x float> %33, <4 x float>* %3, align 16
2826 ; CHECK-NEXT: ret <4 x float> %29
2827 ; CHECK-NEXT: }
2828
2829 define <20 x float> @fcmp_oeq_on_20xfloat(<20 x float>, <20 x float>, <20 x floa t>, <20 x float>) {
2830 entry:
2831 %4 = fcmp oeq <20 x float> %0, %1
2832 %5 = select <20 x i1> %4, <20 x float> %2, <20 x float> %3
2833 ret <20 x float> %5
2834 }
2835 ; CHECK-LABEL: define <4 x float> @fcmp_oeq_on_20xfloat(<4 x float>* nocapture n onnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnu ll dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x f loat>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x flo at>, <4 x float>, <4 x float>, <4 x float>) {
2836 ; CHECK: entry:
2837 ; CHECK-NEXT: %24 = fcmp oeq <4 x float> %4, %9
2838 ; CHECK-NEXT: %25 = fcmp oeq <4 x float> %5, %10
2839 ; CHECK-NEXT: %26 = fcmp oeq <4 x float> %6, %11
2840 ; CHECK-NEXT: %27 = fcmp oeq <4 x float> %7, %12
2841 ; CHECK-NEXT: %28 = fcmp oeq <4 x float> %8, %13
2842 ; CHECK-NEXT: %29 = select <4 x i1> %24, <4 x float> %14, <4 x float> %19
2843 ; CHECK-NEXT: %30 = select <4 x i1> %25, <4 x float> %15, <4 x float> %20
2844 ; CHECK-NEXT: %31 = select <4 x i1> %26, <4 x float> %16, <4 x float> %21
2845 ; CHECK-NEXT: %32 = select <4 x i1> %27, <4 x float> %17, <4 x float> %22
2846 ; CHECK-NEXT: %33 = select <4 x i1> %28, <4 x float> %18, <4 x float> %23
2847 ; CHECK-NEXT: store <4 x float> %30, <4 x float>* %0, align 16
2848 ; CHECK-NEXT: store <4 x float> %31, <4 x float>* %1, align 16
2849 ; CHECK-NEXT: store <4 x float> %32, <4 x float>* %2, align 16
2850 ; CHECK-NEXT: store <4 x float> %33, <4 x float>* %3, align 16
2851 ; CHECK-NEXT: ret <4 x float> %29
2852 ; CHECK-NEXT: }
2853
2854 define <20 x float> @fcmp_ueq_on_20xfloat(<20 x float>, <20 x float>, <20 x floa t>, <20 x float>) {
2855 entry:
2856 %4 = fcmp ueq <20 x float> %0, %1
2857 %5 = select <20 x i1> %4, <20 x float> %2, <20 x float> %3
2858 ret <20 x float> %5
2859 }
2860 ; CHECK-LABEL: define <4 x float> @fcmp_ueq_on_20xfloat(<4 x float>* nocapture n onnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnu ll dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x f loat>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x flo at>, <4 x float>, <4 x float>, <4 x float>) {
2861 ; CHECK: entry:
2862 ; CHECK-NEXT: %24 = fcmp ueq <4 x float> %4, %9
2863 ; CHECK-NEXT: %25 = fcmp ueq <4 x float> %5, %10
2864 ; CHECK-NEXT: %26 = fcmp ueq <4 x float> %6, %11
2865 ; CHECK-NEXT: %27 = fcmp ueq <4 x float> %7, %12
2866 ; CHECK-NEXT: %28 = fcmp ueq <4 x float> %8, %13
2867 ; CHECK-NEXT: %29 = select <4 x i1> %24, <4 x float> %14, <4 x float> %19
2868 ; CHECK-NEXT: %30 = select <4 x i1> %25, <4 x float> %15, <4 x float> %20
2869 ; CHECK-NEXT: %31 = select <4 x i1> %26, <4 x float> %16, <4 x float> %21
2870 ; CHECK-NEXT: %32 = select <4 x i1> %27, <4 x float> %17, <4 x float> %22
2871 ; CHECK-NEXT: %33 = select <4 x i1> %28, <4 x float> %18, <4 x float> %23
2872 ; CHECK-NEXT: store <4 x float> %30, <4 x float>* %0, align 16
2873 ; CHECK-NEXT: store <4 x float> %31, <4 x float>* %1, align 16
2874 ; CHECK-NEXT: store <4 x float> %32, <4 x float>* %2, align 16
2875 ; CHECK-NEXT: store <4 x float> %33, <4 x float>* %3, align 16
2876 ; CHECK-NEXT: ret <4 x float> %29
2877 ; CHECK-NEXT: }
2878
2879 define <20 x float> @fcmp_one_on_20xfloat(<20 x float>, <20 x float>, <20 x floa t>, <20 x float>) {
2880 entry:
2881 %4 = fcmp one <20 x float> %0, %1
2882 %5 = select <20 x i1> %4, <20 x float> %2, <20 x float> %3
2883 ret <20 x float> %5
2884 }
2885 ; CHECK-LABEL: define <4 x float> @fcmp_one_on_20xfloat(<4 x float>* nocapture n onnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnu ll dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x f loat>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x flo at>, <4 x float>, <4 x float>, <4 x float>) {
2886 ; CHECK: entry:
2887 ; CHECK-NEXT: %24 = fcmp one <4 x float> %4, %9
2888 ; CHECK-NEXT: %25 = fcmp one <4 x float> %5, %10
2889 ; CHECK-NEXT: %26 = fcmp one <4 x float> %6, %11
2890 ; CHECK-NEXT: %27 = fcmp one <4 x float> %7, %12
2891 ; CHECK-NEXT: %28 = fcmp one <4 x float> %8, %13
2892 ; CHECK-NEXT: %29 = select <4 x i1> %24, <4 x float> %14, <4 x float> %19
2893 ; CHECK-NEXT: %30 = select <4 x i1> %25, <4 x float> %15, <4 x float> %20
2894 ; CHECK-NEXT: %31 = select <4 x i1> %26, <4 x float> %16, <4 x float> %21
2895 ; CHECK-NEXT: %32 = select <4 x i1> %27, <4 x float> %17, <4 x float> %22
2896 ; CHECK-NEXT: %33 = select <4 x i1> %28, <4 x float> %18, <4 x float> %23
2897 ; CHECK-NEXT: store <4 x float> %30, <4 x float>* %0, align 16
2898 ; CHECK-NEXT: store <4 x float> %31, <4 x float>* %1, align 16
2899 ; CHECK-NEXT: store <4 x float> %32, <4 x float>* %2, align 16
2900 ; CHECK-NEXT: store <4 x float> %33, <4 x float>* %3, align 16
2901 ; CHECK-NEXT: ret <4 x float> %29
2902 ; CHECK-NEXT: }
2903
2904 define <20 x float> @fcmp_une_on_20xfloat(<20 x float>, <20 x float>, <20 x floa t>, <20 x float>) {
2905 entry:
2906 %4 = fcmp une <20 x float> %0, %1
2907 %5 = select <20 x i1> %4, <20 x float> %2, <20 x float> %3
2908 ret <20 x float> %5
2909 }
2910 ; CHECK-LABEL: define <4 x float> @fcmp_une_on_20xfloat(<4 x float>* nocapture n onnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnu ll dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x f loat>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x flo at>, <4 x float>, <4 x float>, <4 x float>) {
2911 ; CHECK: entry:
2912 ; CHECK-NEXT: %24 = fcmp une <4 x float> %4, %9
2913 ; CHECK-NEXT: %25 = fcmp une <4 x float> %5, %10
2914 ; CHECK-NEXT: %26 = fcmp une <4 x float> %6, %11
2915 ; CHECK-NEXT: %27 = fcmp une <4 x float> %7, %12
2916 ; CHECK-NEXT: %28 = fcmp une <4 x float> %8, %13
2917 ; CHECK-NEXT: %29 = select <4 x i1> %24, <4 x float> %14, <4 x float> %19
2918 ; CHECK-NEXT: %30 = select <4 x i1> %25, <4 x float> %15, <4 x float> %20
2919 ; CHECK-NEXT: %31 = select <4 x i1> %26, <4 x float> %16, <4 x float> %21
2920 ; CHECK-NEXT: %32 = select <4 x i1> %27, <4 x float> %17, <4 x float> %22
2921 ; CHECK-NEXT: %33 = select <4 x i1> %28, <4 x float> %18, <4 x float> %23
2922 ; CHECK-NEXT: store <4 x float> %30, <4 x float>* %0, align 16
2923 ; CHECK-NEXT: store <4 x float> %31, <4 x float>* %1, align 16
2924 ; CHECK-NEXT: store <4 x float> %32, <4 x float>* %2, align 16
2925 ; CHECK-NEXT: store <4 x float> %33, <4 x float>* %3, align 16
2926 ; CHECK-NEXT: ret <4 x float> %29
2927 ; CHECK-NEXT: }
2928
2929 define <20 x float> @fcmp_ogt_on_20xfloat(<20 x float>, <20 x float>, <20 x floa t>, <20 x float>) {
2930 entry:
2931 %4 = fcmp ogt <20 x float> %0, %1
2932 %5 = select <20 x i1> %4, <20 x float> %2, <20 x float> %3
2933 ret <20 x float> %5
2934 }
2935 ; CHECK-LABEL: define <4 x float> @fcmp_ogt_on_20xfloat(<4 x float>* nocapture n onnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnu ll dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x f loat>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x flo at>, <4 x float>, <4 x float>, <4 x float>) {
2936 ; CHECK: entry:
2937 ; CHECK-NEXT: %24 = fcmp ogt <4 x float> %4, %9
2938 ; CHECK-NEXT: %25 = fcmp ogt <4 x float> %5, %10
2939 ; CHECK-NEXT: %26 = fcmp ogt <4 x float> %6, %11
2940 ; CHECK-NEXT: %27 = fcmp ogt <4 x float> %7, %12
2941 ; CHECK-NEXT: %28 = fcmp ogt <4 x float> %8, %13
2942 ; CHECK-NEXT: %29 = select <4 x i1> %24, <4 x float> %14, <4 x float> %19
2943 ; CHECK-NEXT: %30 = select <4 x i1> %25, <4 x float> %15, <4 x float> %20
2944 ; CHECK-NEXT: %31 = select <4 x i1> %26, <4 x float> %16, <4 x float> %21
2945 ; CHECK-NEXT: %32 = select <4 x i1> %27, <4 x float> %17, <4 x float> %22
2946 ; CHECK-NEXT: %33 = select <4 x i1> %28, <4 x float> %18, <4 x float> %23
2947 ; CHECK-NEXT: store <4 x float> %30, <4 x float>* %0, align 16
2948 ; CHECK-NEXT: store <4 x float> %31, <4 x float>* %1, align 16
2949 ; CHECK-NEXT: store <4 x float> %32, <4 x float>* %2, align 16
2950 ; CHECK-NEXT: store <4 x float> %33, <4 x float>* %3, align 16
2951 ; CHECK-NEXT: ret <4 x float> %29
2952 ; CHECK-NEXT: }
2953
2954 define <20 x float> @fcmp_ugt_on_20xfloat(<20 x float>, <20 x float>, <20 x floa t>, <20 x float>) {
2955 entry:
2956 %4 = fcmp ugt <20 x float> %0, %1
2957 %5 = select <20 x i1> %4, <20 x float> %2, <20 x float> %3
2958 ret <20 x float> %5
2959 }
2960 ; CHECK-LABEL: define <4 x float> @fcmp_ugt_on_20xfloat(<4 x float>* nocapture n onnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnu ll dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x f loat>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x flo at>, <4 x float>, <4 x float>, <4 x float>) {
2961 ; CHECK: entry:
2962 ; CHECK-NEXT: %24 = fcmp ugt <4 x float> %4, %9
2963 ; CHECK-NEXT: %25 = fcmp ugt <4 x float> %5, %10
2964 ; CHECK-NEXT: %26 = fcmp ugt <4 x float> %6, %11
2965 ; CHECK-NEXT: %27 = fcmp ugt <4 x float> %7, %12
2966 ; CHECK-NEXT: %28 = fcmp ugt <4 x float> %8, %13
2967 ; CHECK-NEXT: %29 = select <4 x i1> %24, <4 x float> %14, <4 x float> %19
2968 ; CHECK-NEXT: %30 = select <4 x i1> %25, <4 x float> %15, <4 x float> %20
2969 ; CHECK-NEXT: %31 = select <4 x i1> %26, <4 x float> %16, <4 x float> %21
2970 ; CHECK-NEXT: %32 = select <4 x i1> %27, <4 x float> %17, <4 x float> %22
2971 ; CHECK-NEXT: %33 = select <4 x i1> %28, <4 x float> %18, <4 x float> %23
2972 ; CHECK-NEXT: store <4 x float> %30, <4 x float>* %0, align 16
2973 ; CHECK-NEXT: store <4 x float> %31, <4 x float>* %1, align 16
2974 ; CHECK-NEXT: store <4 x float> %32, <4 x float>* %2, align 16
2975 ; CHECK-NEXT: store <4 x float> %33, <4 x float>* %3, align 16
2976 ; CHECK-NEXT: ret <4 x float> %29
2977 ; CHECK-NEXT: }
2978
2979 define <20 x float> @fcmp_oge_on_20xfloat(<20 x float>, <20 x float>, <20 x floa t>, <20 x float>) {
2980 entry:
2981 %4 = fcmp oge <20 x float> %0, %1
2982 %5 = select <20 x i1> %4, <20 x float> %2, <20 x float> %3
2983 ret <20 x float> %5
2984 }
2985 ; CHECK-LABEL: define <4 x float> @fcmp_oge_on_20xfloat(<4 x float>* nocapture n onnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnu ll dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x f loat>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x flo at>, <4 x float>, <4 x float>, <4 x float>) {
2986 ; CHECK: entry:
2987 ; CHECK-NEXT: %24 = fcmp oge <4 x float> %4, %9
2988 ; CHECK-NEXT: %25 = fcmp oge <4 x float> %5, %10
2989 ; CHECK-NEXT: %26 = fcmp oge <4 x float> %6, %11
2990 ; CHECK-NEXT: %27 = fcmp oge <4 x float> %7, %12
2991 ; CHECK-NEXT: %28 = fcmp oge <4 x float> %8, %13
2992 ; CHECK-NEXT: %29 = select <4 x i1> %24, <4 x float> %14, <4 x float> %19
2993 ; CHECK-NEXT: %30 = select <4 x i1> %25, <4 x float> %15, <4 x float> %20
2994 ; CHECK-NEXT: %31 = select <4 x i1> %26, <4 x float> %16, <4 x float> %21
2995 ; CHECK-NEXT: %32 = select <4 x i1> %27, <4 x float> %17, <4 x float> %22
2996 ; CHECK-NEXT: %33 = select <4 x i1> %28, <4 x float> %18, <4 x float> %23
2997 ; CHECK-NEXT: store <4 x float> %30, <4 x float>* %0, align 16
2998 ; CHECK-NEXT: store <4 x float> %31, <4 x float>* %1, align 16
2999 ; CHECK-NEXT: store <4 x float> %32, <4 x float>* %2, align 16
3000 ; CHECK-NEXT: store <4 x float> %33, <4 x float>* %3, align 16
3001 ; CHECK-NEXT: ret <4 x float> %29
3002 ; CHECK-NEXT: }
3003
3004 define <20 x float> @fcmp_uge_on_20xfloat(<20 x float>, <20 x float>, <20 x floa t>, <20 x float>) {
3005 entry:
3006 %4 = fcmp uge <20 x float> %0, %1
3007 %5 = select <20 x i1> %4, <20 x float> %2, <20 x float> %3
3008 ret <20 x float> %5
3009 }
3010 ; CHECK-LABEL: define <4 x float> @fcmp_uge_on_20xfloat(<4 x float>* nocapture n onnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnu ll dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x f loat>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x flo at>, <4 x float>, <4 x float>, <4 x float>) {
3011 ; CHECK: entry:
3012 ; CHECK-NEXT: %24 = fcmp uge <4 x float> %4, %9
3013 ; CHECK-NEXT: %25 = fcmp uge <4 x float> %5, %10
3014 ; CHECK-NEXT: %26 = fcmp uge <4 x float> %6, %11
3015 ; CHECK-NEXT: %27 = fcmp uge <4 x float> %7, %12
3016 ; CHECK-NEXT: %28 = fcmp uge <4 x float> %8, %13
3017 ; CHECK-NEXT: %29 = select <4 x i1> %24, <4 x float> %14, <4 x float> %19
3018 ; CHECK-NEXT: %30 = select <4 x i1> %25, <4 x float> %15, <4 x float> %20
3019 ; CHECK-NEXT: %31 = select <4 x i1> %26, <4 x float> %16, <4 x float> %21
3020 ; CHECK-NEXT: %32 = select <4 x i1> %27, <4 x float> %17, <4 x float> %22
3021 ; CHECK-NEXT: %33 = select <4 x i1> %28, <4 x float> %18, <4 x float> %23
3022 ; CHECK-NEXT: store <4 x float> %30, <4 x float>* %0, align 16
3023 ; CHECK-NEXT: store <4 x float> %31, <4 x float>* %1, align 16
3024 ; CHECK-NEXT: store <4 x float> %32, <4 x float>* %2, align 16
3025 ; CHECK-NEXT: store <4 x float> %33, <4 x float>* %3, align 16
3026 ; CHECK-NEXT: ret <4 x float> %29
3027 ; CHECK-NEXT: }
3028
3029 define <20 x float> @fcmp_ord_on_20xfloat(<20 x float>, <20 x float>, <20 x floa t>, <20 x float>) {
3030 entry:
3031 %4 = fcmp ord <20 x float> %0, %1
3032 %5 = select <20 x i1> %4, <20 x float> %2, <20 x float> %3
3033 ret <20 x float> %5
3034 }
3035 ; CHECK-LABEL: define <4 x float> @fcmp_ord_on_20xfloat(<4 x float>* nocapture n onnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnu ll dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x f loat>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x flo at>, <4 x float>, <4 x float>, <4 x float>) {
3036 ; CHECK: entry:
3037 ; CHECK-NEXT: %24 = fcmp ord <4 x float> %4, %9
3038 ; CHECK-NEXT: %25 = fcmp ord <4 x float> %5, %10
3039 ; CHECK-NEXT: %26 = fcmp ord <4 x float> %6, %11
3040 ; CHECK-NEXT: %27 = fcmp ord <4 x float> %7, %12
3041 ; CHECK-NEXT: %28 = fcmp ord <4 x float> %8, %13
3042 ; CHECK-NEXT: %29 = select <4 x i1> %24, <4 x float> %14, <4 x float> %19
3043 ; CHECK-NEXT: %30 = select <4 x i1> %25, <4 x float> %15, <4 x float> %20
3044 ; CHECK-NEXT: %31 = select <4 x i1> %26, <4 x float> %16, <4 x float> %21
3045 ; CHECK-NEXT: %32 = select <4 x i1> %27, <4 x float> %17, <4 x float> %22
3046 ; CHECK-NEXT: %33 = select <4 x i1> %28, <4 x float> %18, <4 x float> %23
3047 ; CHECK-NEXT: store <4 x float> %30, <4 x float>* %0, align 16
3048 ; CHECK-NEXT: store <4 x float> %31, <4 x float>* %1, align 16
3049 ; CHECK-NEXT: store <4 x float> %32, <4 x float>* %2, align 16
3050 ; CHECK-NEXT: store <4 x float> %33, <4 x float>* %3, align 16
3051 ; CHECK-NEXT: ret <4 x float> %29
3052 ; CHECK-NEXT: }
3053
3054 define <20 x float> @fcmp_uno_on_20xfloat(<20 x float>, <20 x float>, <20 x floa t>, <20 x float>) {
3055 entry:
3056 %4 = fcmp uno <20 x float> %0, %1
3057 %5 = select <20 x i1> %4, <20 x float> %2, <20 x float> %3
3058 ret <20 x float> %5
3059 }
3060 ; CHECK-LABEL: define <4 x float> @fcmp_uno_on_20xfloat(<4 x float>* nocapture n onnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnu ll dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x f loat>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x flo at>, <4 x float>, <4 x float>, <4 x float>) {
3061 ; CHECK: entry:
3062 ; CHECK-NEXT: %24 = fcmp uno <4 x float> %4, %9
3063 ; CHECK-NEXT: %25 = fcmp uno <4 x float> %5, %10
3064 ; CHECK-NEXT: %26 = fcmp uno <4 x float> %6, %11
3065 ; CHECK-NEXT: %27 = fcmp uno <4 x float> %7, %12
3066 ; CHECK-NEXT: %28 = fcmp uno <4 x float> %8, %13
3067 ; CHECK-NEXT: %29 = select <4 x i1> %24, <4 x float> %14, <4 x float> %19
3068 ; CHECK-NEXT: %30 = select <4 x i1> %25, <4 x float> %15, <4 x float> %20
3069 ; CHECK-NEXT: %31 = select <4 x i1> %26, <4 x float> %16, <4 x float> %21
3070 ; CHECK-NEXT: %32 = select <4 x i1> %27, <4 x float> %17, <4 x float> %22
3071 ; CHECK-NEXT: %33 = select <4 x i1> %28, <4 x float> %18, <4 x float> %23
3072 ; CHECK-NEXT: store <4 x float> %30, <4 x float>* %0, align 16
3073 ; CHECK-NEXT: store <4 x float> %31, <4 x float>* %1, align 16
3074 ; CHECK-NEXT: store <4 x float> %32, <4 x float>* %2, align 16
3075 ; CHECK-NEXT: store <4 x float> %33, <4 x float>* %3, align 16
3076 ; CHECK-NEXT: ret <4 x float> %29
3077 ; CHECK-NEXT: }
3078
3079 define <20 x double> @fcmp_true_on_20xdouble(<20 x double>, <20 x double>, <20 x double>, <20 x double>) {
3080 entry:
3081 %4 = fcmp true <20 x double> %0, %1
3082 %5 = select <20 x i1> %4, <20 x double> %2, <20 x double> %3
3083 ret <20 x double> %5
3084 }
3085 ; CHECK-LABEL: define <2 x double> @fcmp_true_on_20xdouble(<2 x double>* nocaptu re nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable( 16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocaptur e nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(1 6), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16 ), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x doubl e>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x d ouble>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double> , <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x dou ble>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
3086 ; CHECK: entry:
3087 ; CHECK-NEXT: %49 = fcmp true <2 x double> %9, %19
3088 ; CHECK-NEXT: %50 = fcmp true <2 x double> %10, %20
3089 ; CHECK-NEXT: %51 = fcmp true <2 x double> %11, %21
3090 ; CHECK-NEXT: %52 = fcmp true <2 x double> %12, %22
3091 ; CHECK-NEXT: %53 = fcmp true <2 x double> %13, %23
3092 ; CHECK-NEXT: %54 = fcmp true <2 x double> %14, %24
3093 ; CHECK-NEXT: %55 = fcmp true <2 x double> %15, %25
3094 ; CHECK-NEXT: %56 = fcmp true <2 x double> %16, %26
3095 ; CHECK-NEXT: %57 = fcmp true <2 x double> %17, %27
3096 ; CHECK-NEXT: %58 = fcmp true <2 x double> %18, %28
3097 ; CHECK-NEXT: %59 = select <2 x i1> %49, <2 x double> %29, <2 x double> %39
3098 ; CHECK-NEXT: %60 = select <2 x i1> %50, <2 x double> %30, <2 x double> %40
3099 ; CHECK-NEXT: %61 = select <2 x i1> %51, <2 x double> %31, <2 x double> %41
3100 ; CHECK-NEXT: %62 = select <2 x i1> %52, <2 x double> %32, <2 x double> %42
3101 ; CHECK-NEXT: %63 = select <2 x i1> %53, <2 x double> %33, <2 x double> %43
3102 ; CHECK-NEXT: %64 = select <2 x i1> %54, <2 x double> %34, <2 x double> %44
3103 ; CHECK-NEXT: %65 = select <2 x i1> %55, <2 x double> %35, <2 x double> %45
3104 ; CHECK-NEXT: %66 = select <2 x i1> %56, <2 x double> %36, <2 x double> %46
3105 ; CHECK-NEXT: %67 = select <2 x i1> %57, <2 x double> %37, <2 x double> %47
3106 ; CHECK-NEXT: %68 = select <2 x i1> %58, <2 x double> %38, <2 x double> %48
3107 ; CHECK-NEXT: store <2 x double> %60, <2 x double>* %0, align 16
3108 ; CHECK-NEXT: store <2 x double> %61, <2 x double>* %1, align 16
3109 ; CHECK-NEXT: store <2 x double> %62, <2 x double>* %2, align 16
3110 ; CHECK-NEXT: store <2 x double> %63, <2 x double>* %3, align 16
3111 ; CHECK-NEXT: store <2 x double> %64, <2 x double>* %4, align 16
3112 ; CHECK-NEXT: store <2 x double> %65, <2 x double>* %5, align 16
3113 ; CHECK-NEXT: store <2 x double> %66, <2 x double>* %6, align 16
3114 ; CHECK-NEXT: store <2 x double> %67, <2 x double>* %7, align 16
3115 ; CHECK-NEXT: store <2 x double> %68, <2 x double>* %8, align 16
3116 ; CHECK-NEXT: ret <2 x double> %59
3117 ; CHECK-NEXT: }
3118
3119 define <20 x double> @fcmp_false_on_20xdouble(<20 x double>, <20 x double>, <20 x double>, <20 x double>) {
3120 entry:
3121 %4 = fcmp false <20 x double> %0, %1
3122 %5 = select <20 x i1> %4, <20 x double> %2, <20 x double> %3
3123 ret <20 x double> %5
3124 }
3125 ; CHECK-LABEL: define <2 x double> @fcmp_false_on_20xdouble(<2 x double>* nocapt ure nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable (16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocaptu re nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable( 16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocaptur e nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(1 6), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x doub le>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, < 2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double >, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x do uble>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>) {
3126 ; CHECK: entry:
3127 ; CHECK-NEXT: %49 = fcmp false <2 x double> %9, %19
3128 ; CHECK-NEXT: %50 = fcmp false <2 x double> %10, %20
3129 ; CHECK-NEXT: %51 = fcmp false <2 x double> %11, %21
3130 ; CHECK-NEXT: %52 = fcmp false <2 x double> %12, %22
3131 ; CHECK-NEXT: %53 = fcmp false <2 x double> %13, %23
3132 ; CHECK-NEXT: %54 = fcmp false <2 x double> %14, %24
3133 ; CHECK-NEXT: %55 = fcmp false <2 x double> %15, %25
3134 ; CHECK-NEXT: %56 = fcmp false <2 x double> %16, %26
3135 ; CHECK-NEXT: %57 = fcmp false <2 x double> %17, %27
3136 ; CHECK-NEXT: %58 = fcmp false <2 x double> %18, %28
3137 ; CHECK-NEXT: %59 = select <2 x i1> %49, <2 x double> %29, <2 x double> %39
3138 ; CHECK-NEXT: %60 = select <2 x i1> %50, <2 x double> %30, <2 x double> %40
3139 ; CHECK-NEXT: %61 = select <2 x i1> %51, <2 x double> %31, <2 x double> %41
3140 ; CHECK-NEXT: %62 = select <2 x i1> %52, <2 x double> %32, <2 x double> %42
3141 ; CHECK-NEXT: %63 = select <2 x i1> %53, <2 x double> %33, <2 x double> %43
3142 ; CHECK-NEXT: %64 = select <2 x i1> %54, <2 x double> %34, <2 x double> %44
3143 ; CHECK-NEXT: %65 = select <2 x i1> %55, <2 x double> %35, <2 x double> %45
3144 ; CHECK-NEXT: %66 = select <2 x i1> %56, <2 x double> %36, <2 x double> %46
3145 ; CHECK-NEXT: %67 = select <2 x i1> %57, <2 x double> %37, <2 x double> %47
3146 ; CHECK-NEXT: %68 = select <2 x i1> %58, <2 x double> %38, <2 x double> %48
3147 ; CHECK-NEXT: store <2 x double> %60, <2 x double>* %0, align 16
3148 ; CHECK-NEXT: store <2 x double> %61, <2 x double>* %1, align 16
3149 ; CHECK-NEXT: store <2 x double> %62, <2 x double>* %2, align 16
3150 ; CHECK-NEXT: store <2 x double> %63, <2 x double>* %3, align 16
3151 ; CHECK-NEXT: store <2 x double> %64, <2 x double>* %4, align 16
3152 ; CHECK-NEXT: store <2 x double> %65, <2 x double>* %5, align 16
3153 ; CHECK-NEXT: store <2 x double> %66, <2 x double>* %6, align 16
3154 ; CHECK-NEXT: store <2 x double> %67, <2 x double>* %7, align 16
3155 ; CHECK-NEXT: store <2 x double> %68, <2 x double>* %8, align 16
3156 ; CHECK-NEXT: ret <2 x double> %59
3157 ; CHECK-NEXT: }
3158
3159 define <20 x double> @fcmp_oeq_on_20xdouble(<20 x double>, <20 x double>, <20 x double>, <20 x double>) {
3160 entry:
3161 %4 = fcmp oeq <20 x double> %0, %1
3162 %5 = select <20 x i1> %4, <20 x double> %2, <20 x double> %3
3163 ret <20 x double> %5
3164 }
3165 ; CHECK-LABEL: define <2 x double> @fcmp_oeq_on_20xdouble(<2 x double>* nocaptur e nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(1 6), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16 ), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16) , <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double >, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x do uble>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x doub le>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, < 2 x double>, <2 x double>, <2 x double>, <2 x double>) {
3166 ; CHECK: entry:
3167 ; CHECK-NEXT: %49 = fcmp oeq <2 x double> %9, %19
3168 ; CHECK-NEXT: %50 = fcmp oeq <2 x double> %10, %20
3169 ; CHECK-NEXT: %51 = fcmp oeq <2 x double> %11, %21
3170 ; CHECK-NEXT: %52 = fcmp oeq <2 x double> %12, %22
3171 ; CHECK-NEXT: %53 = fcmp oeq <2 x double> %13, %23
3172 ; CHECK-NEXT: %54 = fcmp oeq <2 x double> %14, %24
3173 ; CHECK-NEXT: %55 = fcmp oeq <2 x double> %15, %25
3174 ; CHECK-NEXT: %56 = fcmp oeq <2 x double> %16, %26
3175 ; CHECK-NEXT: %57 = fcmp oeq <2 x double> %17, %27
3176 ; CHECK-NEXT: %58 = fcmp oeq <2 x double> %18, %28
3177 ; CHECK-NEXT: %59 = select <2 x i1> %49, <2 x double> %29, <2 x double> %39
3178 ; CHECK-NEXT: %60 = select <2 x i1> %50, <2 x double> %30, <2 x double> %40
3179 ; CHECK-NEXT: %61 = select <2 x i1> %51, <2 x double> %31, <2 x double> %41
3180 ; CHECK-NEXT: %62 = select <2 x i1> %52, <2 x double> %32, <2 x double> %42
3181 ; CHECK-NEXT: %63 = select <2 x i1> %53, <2 x double> %33, <2 x double> %43
3182 ; CHECK-NEXT: %64 = select <2 x i1> %54, <2 x double> %34, <2 x double> %44
3183 ; CHECK-NEXT: %65 = select <2 x i1> %55, <2 x double> %35, <2 x double> %45
3184 ; CHECK-NEXT: %66 = select <2 x i1> %56, <2 x double> %36, <2 x double> %46
3185 ; CHECK-NEXT: %67 = select <2 x i1> %57, <2 x double> %37, <2 x double> %47
3186 ; CHECK-NEXT: %68 = select <2 x i1> %58, <2 x double> %38, <2 x double> %48
3187 ; CHECK-NEXT: store <2 x double> %60, <2 x double>* %0, align 16
3188 ; CHECK-NEXT: store <2 x double> %61, <2 x double>* %1, align 16
3189 ; CHECK-NEXT: store <2 x double> %62, <2 x double>* %2, align 16
3190 ; CHECK-NEXT: store <2 x double> %63, <2 x double>* %3, align 16
3191 ; CHECK-NEXT: store <2 x double> %64, <2 x double>* %4, align 16
3192 ; CHECK-NEXT: store <2 x double> %65, <2 x double>* %5, align 16
3193 ; CHECK-NEXT: store <2 x double> %66, <2 x double>* %6, align 16
3194 ; CHECK-NEXT: store <2 x double> %67, <2 x double>* %7, align 16
3195 ; CHECK-NEXT: store <2 x double> %68, <2 x double>* %8, align 16
3196 ; CHECK-NEXT: ret <2 x double> %59
3197 ; CHECK-NEXT: }
3198
3199 define <20 x double> @fcmp_ueq_on_20xdouble(<20 x double>, <20 x double>, <20 x double>, <20 x double>) {
3200 entry:
3201 %4 = fcmp ueq <20 x double> %0, %1
3202 %5 = select <20 x i1> %4, <20 x double> %2, <20 x double> %3
3203 ret <20 x double> %5
3204 }
3205 ; CHECK-LABEL: define <2 x double> @fcmp_ueq_on_20xdouble(<2 x double>* nocaptur e nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(1 6), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16 ), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16) , <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double >, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x do uble>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x doub le>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, < 2 x double>, <2 x double>, <2 x double>, <2 x double>) {
3206 ; CHECK: entry:
3207 ; CHECK-NEXT: %49 = fcmp ueq <2 x double> %9, %19
3208 ; CHECK-NEXT: %50 = fcmp ueq <2 x double> %10, %20
3209 ; CHECK-NEXT: %51 = fcmp ueq <2 x double> %11, %21
3210 ; CHECK-NEXT: %52 = fcmp ueq <2 x double> %12, %22
3211 ; CHECK-NEXT: %53 = fcmp ueq <2 x double> %13, %23
3212 ; CHECK-NEXT: %54 = fcmp ueq <2 x double> %14, %24
3213 ; CHECK-NEXT: %55 = fcmp ueq <2 x double> %15, %25
3214 ; CHECK-NEXT: %56 = fcmp ueq <2 x double> %16, %26
3215 ; CHECK-NEXT: %57 = fcmp ueq <2 x double> %17, %27
3216 ; CHECK-NEXT: %58 = fcmp ueq <2 x double> %18, %28
3217 ; CHECK-NEXT: %59 = select <2 x i1> %49, <2 x double> %29, <2 x double> %39
3218 ; CHECK-NEXT: %60 = select <2 x i1> %50, <2 x double> %30, <2 x double> %40
3219 ; CHECK-NEXT: %61 = select <2 x i1> %51, <2 x double> %31, <2 x double> %41
3220 ; CHECK-NEXT: %62 = select <2 x i1> %52, <2 x double> %32, <2 x double> %42
3221 ; CHECK-NEXT: %63 = select <2 x i1> %53, <2 x double> %33, <2 x double> %43
3222 ; CHECK-NEXT: %64 = select <2 x i1> %54, <2 x double> %34, <2 x double> %44
3223 ; CHECK-NEXT: %65 = select <2 x i1> %55, <2 x double> %35, <2 x double> %45
3224 ; CHECK-NEXT: %66 = select <2 x i1> %56, <2 x double> %36, <2 x double> %46
3225 ; CHECK-NEXT: %67 = select <2 x i1> %57, <2 x double> %37, <2 x double> %47
3226 ; CHECK-NEXT: %68 = select <2 x i1> %58, <2 x double> %38, <2 x double> %48
3227 ; CHECK-NEXT: store <2 x double> %60, <2 x double>* %0, align 16
3228 ; CHECK-NEXT: store <2 x double> %61, <2 x double>* %1, align 16
3229 ; CHECK-NEXT: store <2 x double> %62, <2 x double>* %2, align 16
3230 ; CHECK-NEXT: store <2 x double> %63, <2 x double>* %3, align 16
3231 ; CHECK-NEXT: store <2 x double> %64, <2 x double>* %4, align 16
3232 ; CHECK-NEXT: store <2 x double> %65, <2 x double>* %5, align 16
3233 ; CHECK-NEXT: store <2 x double> %66, <2 x double>* %6, align 16
3234 ; CHECK-NEXT: store <2 x double> %67, <2 x double>* %7, align 16
3235 ; CHECK-NEXT: store <2 x double> %68, <2 x double>* %8, align 16
3236 ; CHECK-NEXT: ret <2 x double> %59
3237 ; CHECK-NEXT: }
3238
3239 define <20 x double> @fcmp_one_on_20xdouble(<20 x double>, <20 x double>, <20 x double>, <20 x double>) {
3240 entry:
3241 %4 = fcmp one <20 x double> %0, %1
3242 %5 = select <20 x i1> %4, <20 x double> %2, <20 x double> %3
3243 ret <20 x double> %5
3244 }
3245 ; CHECK-LABEL: define <2 x double> @fcmp_one_on_20xdouble(<2 x double>* nocaptur e nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(1 6), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16 ), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16) , <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double >, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x do uble>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x doub le>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, < 2 x double>, <2 x double>, <2 x double>, <2 x double>) {
3246 ; CHECK: entry:
3247 ; CHECK-NEXT: %49 = fcmp one <2 x double> %9, %19
3248 ; CHECK-NEXT: %50 = fcmp one <2 x double> %10, %20
3249 ; CHECK-NEXT: %51 = fcmp one <2 x double> %11, %21
3250 ; CHECK-NEXT: %52 = fcmp one <2 x double> %12, %22
3251 ; CHECK-NEXT: %53 = fcmp one <2 x double> %13, %23
3252 ; CHECK-NEXT: %54 = fcmp one <2 x double> %14, %24
3253 ; CHECK-NEXT: %55 = fcmp one <2 x double> %15, %25
3254 ; CHECK-NEXT: %56 = fcmp one <2 x double> %16, %26
3255 ; CHECK-NEXT: %57 = fcmp one <2 x double> %17, %27
3256 ; CHECK-NEXT: %58 = fcmp one <2 x double> %18, %28
3257 ; CHECK-NEXT: %59 = select <2 x i1> %49, <2 x double> %29, <2 x double> %39
3258 ; CHECK-NEXT: %60 = select <2 x i1> %50, <2 x double> %30, <2 x double> %40
3259 ; CHECK-NEXT: %61 = select <2 x i1> %51, <2 x double> %31, <2 x double> %41
3260 ; CHECK-NEXT: %62 = select <2 x i1> %52, <2 x double> %32, <2 x double> %42
3261 ; CHECK-NEXT: %63 = select <2 x i1> %53, <2 x double> %33, <2 x double> %43
3262 ; CHECK-NEXT: %64 = select <2 x i1> %54, <2 x double> %34, <2 x double> %44
3263 ; CHECK-NEXT: %65 = select <2 x i1> %55, <2 x double> %35, <2 x double> %45
3264 ; CHECK-NEXT: %66 = select <2 x i1> %56, <2 x double> %36, <2 x double> %46
3265 ; CHECK-NEXT: %67 = select <2 x i1> %57, <2 x double> %37, <2 x double> %47
3266 ; CHECK-NEXT: %68 = select <2 x i1> %58, <2 x double> %38, <2 x double> %48
3267 ; CHECK-NEXT: store <2 x double> %60, <2 x double>* %0, align 16
3268 ; CHECK-NEXT: store <2 x double> %61, <2 x double>* %1, align 16
3269 ; CHECK-NEXT: store <2 x double> %62, <2 x double>* %2, align 16
3270 ; CHECK-NEXT: store <2 x double> %63, <2 x double>* %3, align 16
3271 ; CHECK-NEXT: store <2 x double> %64, <2 x double>* %4, align 16
3272 ; CHECK-NEXT: store <2 x double> %65, <2 x double>* %5, align 16
3273 ; CHECK-NEXT: store <2 x double> %66, <2 x double>* %6, align 16
3274 ; CHECK-NEXT: store <2 x double> %67, <2 x double>* %7, align 16
3275 ; CHECK-NEXT: store <2 x double> %68, <2 x double>* %8, align 16
3276 ; CHECK-NEXT: ret <2 x double> %59
3277 ; CHECK-NEXT: }
3278
3279 define <20 x double> @fcmp_une_on_20xdouble(<20 x double>, <20 x double>, <20 x double>, <20 x double>) {
3280 entry:
3281 %4 = fcmp une <20 x double> %0, %1
3282 %5 = select <20 x i1> %4, <20 x double> %2, <20 x double> %3
3283 ret <20 x double> %5
3284 }
3285 ; CHECK-LABEL: define <2 x double> @fcmp_une_on_20xdouble(<2 x double>* nocaptur e nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(1 6), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16 ), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16) , <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double >, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x do uble>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x doub le>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, < 2 x double>, <2 x double>, <2 x double>, <2 x double>) {
3286 ; CHECK: entry:
3287 ; CHECK-NEXT: %49 = fcmp une <2 x double> %9, %19
3288 ; CHECK-NEXT: %50 = fcmp une <2 x double> %10, %20
3289 ; CHECK-NEXT: %51 = fcmp une <2 x double> %11, %21
3290 ; CHECK-NEXT: %52 = fcmp une <2 x double> %12, %22
3291 ; CHECK-NEXT: %53 = fcmp une <2 x double> %13, %23
3292 ; CHECK-NEXT: %54 = fcmp une <2 x double> %14, %24
3293 ; CHECK-NEXT: %55 = fcmp une <2 x double> %15, %25
3294 ; CHECK-NEXT: %56 = fcmp une <2 x double> %16, %26
3295 ; CHECK-NEXT: %57 = fcmp une <2 x double> %17, %27
3296 ; CHECK-NEXT: %58 = fcmp une <2 x double> %18, %28
3297 ; CHECK-NEXT: %59 = select <2 x i1> %49, <2 x double> %29, <2 x double> %39
3298 ; CHECK-NEXT: %60 = select <2 x i1> %50, <2 x double> %30, <2 x double> %40
3299 ; CHECK-NEXT: %61 = select <2 x i1> %51, <2 x double> %31, <2 x double> %41
3300 ; CHECK-NEXT: %62 = select <2 x i1> %52, <2 x double> %32, <2 x double> %42
3301 ; CHECK-NEXT: %63 = select <2 x i1> %53, <2 x double> %33, <2 x double> %43
3302 ; CHECK-NEXT: %64 = select <2 x i1> %54, <2 x double> %34, <2 x double> %44
3303 ; CHECK-NEXT: %65 = select <2 x i1> %55, <2 x double> %35, <2 x double> %45
3304 ; CHECK-NEXT: %66 = select <2 x i1> %56, <2 x double> %36, <2 x double> %46
3305 ; CHECK-NEXT: %67 = select <2 x i1> %57, <2 x double> %37, <2 x double> %47
3306 ; CHECK-NEXT: %68 = select <2 x i1> %58, <2 x double> %38, <2 x double> %48
3307 ; CHECK-NEXT: store <2 x double> %60, <2 x double>* %0, align 16
3308 ; CHECK-NEXT: store <2 x double> %61, <2 x double>* %1, align 16
3309 ; CHECK-NEXT: store <2 x double> %62, <2 x double>* %2, align 16
3310 ; CHECK-NEXT: store <2 x double> %63, <2 x double>* %3, align 16
3311 ; CHECK-NEXT: store <2 x double> %64, <2 x double>* %4, align 16
3312 ; CHECK-NEXT: store <2 x double> %65, <2 x double>* %5, align 16
3313 ; CHECK-NEXT: store <2 x double> %66, <2 x double>* %6, align 16
3314 ; CHECK-NEXT: store <2 x double> %67, <2 x double>* %7, align 16
3315 ; CHECK-NEXT: store <2 x double> %68, <2 x double>* %8, align 16
3316 ; CHECK-NEXT: ret <2 x double> %59
3317 ; CHECK-NEXT: }
3318
3319 define <20 x double> @fcmp_ogt_on_20xdouble(<20 x double>, <20 x double>, <20 x double>, <20 x double>) {
3320 entry:
3321 %4 = fcmp ogt <20 x double> %0, %1
3322 %5 = select <20 x i1> %4, <20 x double> %2, <20 x double> %3
3323 ret <20 x double> %5
3324 }
3325 ; CHECK-LABEL: define <2 x double> @fcmp_ogt_on_20xdouble(<2 x double>* nocaptur e nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(1 6), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16 ), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16) , <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double >, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x do uble>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x doub le>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, < 2 x double>, <2 x double>, <2 x double>, <2 x double>) {
3326 ; CHECK: entry:
3327 ; CHECK-NEXT: %49 = fcmp ogt <2 x double> %9, %19
3328 ; CHECK-NEXT: %50 = fcmp ogt <2 x double> %10, %20
3329 ; CHECK-NEXT: %51 = fcmp ogt <2 x double> %11, %21
3330 ; CHECK-NEXT: %52 = fcmp ogt <2 x double> %12, %22
3331 ; CHECK-NEXT: %53 = fcmp ogt <2 x double> %13, %23
3332 ; CHECK-NEXT: %54 = fcmp ogt <2 x double> %14, %24
3333 ; CHECK-NEXT: %55 = fcmp ogt <2 x double> %15, %25
3334 ; CHECK-NEXT: %56 = fcmp ogt <2 x double> %16, %26
3335 ; CHECK-NEXT: %57 = fcmp ogt <2 x double> %17, %27
3336 ; CHECK-NEXT: %58 = fcmp ogt <2 x double> %18, %28
3337 ; CHECK-NEXT: %59 = select <2 x i1> %49, <2 x double> %29, <2 x double> %39
3338 ; CHECK-NEXT: %60 = select <2 x i1> %50, <2 x double> %30, <2 x double> %40
3339 ; CHECK-NEXT: %61 = select <2 x i1> %51, <2 x double> %31, <2 x double> %41
3340 ; CHECK-NEXT: %62 = select <2 x i1> %52, <2 x double> %32, <2 x double> %42
3341 ; CHECK-NEXT: %63 = select <2 x i1> %53, <2 x double> %33, <2 x double> %43
3342 ; CHECK-NEXT: %64 = select <2 x i1> %54, <2 x double> %34, <2 x double> %44
3343 ; CHECK-NEXT: %65 = select <2 x i1> %55, <2 x double> %35, <2 x double> %45
3344 ; CHECK-NEXT: %66 = select <2 x i1> %56, <2 x double> %36, <2 x double> %46
3345 ; CHECK-NEXT: %67 = select <2 x i1> %57, <2 x double> %37, <2 x double> %47
3346 ; CHECK-NEXT: %68 = select <2 x i1> %58, <2 x double> %38, <2 x double> %48
3347 ; CHECK-NEXT: store <2 x double> %60, <2 x double>* %0, align 16
3348 ; CHECK-NEXT: store <2 x double> %61, <2 x double>* %1, align 16
3349 ; CHECK-NEXT: store <2 x double> %62, <2 x double>* %2, align 16
3350 ; CHECK-NEXT: store <2 x double> %63, <2 x double>* %3, align 16
3351 ; CHECK-NEXT: store <2 x double> %64, <2 x double>* %4, align 16
3352 ; CHECK-NEXT: store <2 x double> %65, <2 x double>* %5, align 16
3353 ; CHECK-NEXT: store <2 x double> %66, <2 x double>* %6, align 16
3354 ; CHECK-NEXT: store <2 x double> %67, <2 x double>* %7, align 16
3355 ; CHECK-NEXT: store <2 x double> %68, <2 x double>* %8, align 16
3356 ; CHECK-NEXT: ret <2 x double> %59
3357 ; CHECK-NEXT: }
3358
3359 define <20 x double> @fcmp_ugt_on_20xdouble(<20 x double>, <20 x double>, <20 x double>, <20 x double>) {
3360 entry:
3361 %4 = fcmp ugt <20 x double> %0, %1
3362 %5 = select <20 x i1> %4, <20 x double> %2, <20 x double> %3
3363 ret <20 x double> %5
3364 }
3365 ; CHECK-LABEL: define <2 x double> @fcmp_ugt_on_20xdouble(<2 x double>* nocaptur e nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(1 6), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16 ), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16) , <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double >, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x do uble>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x doub le>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, < 2 x double>, <2 x double>, <2 x double>, <2 x double>) {
3366 ; CHECK: entry:
3367 ; CHECK-NEXT: %49 = fcmp ugt <2 x double> %9, %19
3368 ; CHECK-NEXT: %50 = fcmp ugt <2 x double> %10, %20
3369 ; CHECK-NEXT: %51 = fcmp ugt <2 x double> %11, %21
3370 ; CHECK-NEXT: %52 = fcmp ugt <2 x double> %12, %22
3371 ; CHECK-NEXT: %53 = fcmp ugt <2 x double> %13, %23
3372 ; CHECK-NEXT: %54 = fcmp ugt <2 x double> %14, %24
3373 ; CHECK-NEXT: %55 = fcmp ugt <2 x double> %15, %25
3374 ; CHECK-NEXT: %56 = fcmp ugt <2 x double> %16, %26
3375 ; CHECK-NEXT: %57 = fcmp ugt <2 x double> %17, %27
3376 ; CHECK-NEXT: %58 = fcmp ugt <2 x double> %18, %28
3377 ; CHECK-NEXT: %59 = select <2 x i1> %49, <2 x double> %29, <2 x double> %39
3378 ; CHECK-NEXT: %60 = select <2 x i1> %50, <2 x double> %30, <2 x double> %40
3379 ; CHECK-NEXT: %61 = select <2 x i1> %51, <2 x double> %31, <2 x double> %41
3380 ; CHECK-NEXT: %62 = select <2 x i1> %52, <2 x double> %32, <2 x double> %42
3381 ; CHECK-NEXT: %63 = select <2 x i1> %53, <2 x double> %33, <2 x double> %43
3382 ; CHECK-NEXT: %64 = select <2 x i1> %54, <2 x double> %34, <2 x double> %44
3383 ; CHECK-NEXT: %65 = select <2 x i1> %55, <2 x double> %35, <2 x double> %45
3384 ; CHECK-NEXT: %66 = select <2 x i1> %56, <2 x double> %36, <2 x double> %46
3385 ; CHECK-NEXT: %67 = select <2 x i1> %57, <2 x double> %37, <2 x double> %47
3386 ; CHECK-NEXT: %68 = select <2 x i1> %58, <2 x double> %38, <2 x double> %48
3387 ; CHECK-NEXT: store <2 x double> %60, <2 x double>* %0, align 16
3388 ; CHECK-NEXT: store <2 x double> %61, <2 x double>* %1, align 16
3389 ; CHECK-NEXT: store <2 x double> %62, <2 x double>* %2, align 16
3390 ; CHECK-NEXT: store <2 x double> %63, <2 x double>* %3, align 16
3391 ; CHECK-NEXT: store <2 x double> %64, <2 x double>* %4, align 16
3392 ; CHECK-NEXT: store <2 x double> %65, <2 x double>* %5, align 16
3393 ; CHECK-NEXT: store <2 x double> %66, <2 x double>* %6, align 16
3394 ; CHECK-NEXT: store <2 x double> %67, <2 x double>* %7, align 16
3395 ; CHECK-NEXT: store <2 x double> %68, <2 x double>* %8, align 16
3396 ; CHECK-NEXT: ret <2 x double> %59
3397 ; CHECK-NEXT: }
3398
3399 define <20 x double> @fcmp_oge_on_20xdouble(<20 x double>, <20 x double>, <20 x double>, <20 x double>) {
3400 entry:
3401 %4 = fcmp oge <20 x double> %0, %1
3402 %5 = select <20 x i1> %4, <20 x double> %2, <20 x double> %3
3403 ret <20 x double> %5
3404 }
3405 ; CHECK-LABEL: define <2 x double> @fcmp_oge_on_20xdouble(<2 x double>* nocaptur e nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(1 6), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16 ), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16) , <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double >, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x do uble>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x doub le>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, < 2 x double>, <2 x double>, <2 x double>, <2 x double>) {
3406 ; CHECK: entry:
3407 ; CHECK-NEXT: %49 = fcmp oge <2 x double> %9, %19
3408 ; CHECK-NEXT: %50 = fcmp oge <2 x double> %10, %20
3409 ; CHECK-NEXT: %51 = fcmp oge <2 x double> %11, %21
3410 ; CHECK-NEXT: %52 = fcmp oge <2 x double> %12, %22
3411 ; CHECK-NEXT: %53 = fcmp oge <2 x double> %13, %23
3412 ; CHECK-NEXT: %54 = fcmp oge <2 x double> %14, %24
3413 ; CHECK-NEXT: %55 = fcmp oge <2 x double> %15, %25
3414 ; CHECK-NEXT: %56 = fcmp oge <2 x double> %16, %26
3415 ; CHECK-NEXT: %57 = fcmp oge <2 x double> %17, %27
3416 ; CHECK-NEXT: %58 = fcmp oge <2 x double> %18, %28
3417 ; CHECK-NEXT: %59 = select <2 x i1> %49, <2 x double> %29, <2 x double> %39
3418 ; CHECK-NEXT: %60 = select <2 x i1> %50, <2 x double> %30, <2 x double> %40
3419 ; CHECK-NEXT: %61 = select <2 x i1> %51, <2 x double> %31, <2 x double> %41
3420 ; CHECK-NEXT: %62 = select <2 x i1> %52, <2 x double> %32, <2 x double> %42
3421 ; CHECK-NEXT: %63 = select <2 x i1> %53, <2 x double> %33, <2 x double> %43
3422 ; CHECK-NEXT: %64 = select <2 x i1> %54, <2 x double> %34, <2 x double> %44
3423 ; CHECK-NEXT: %65 = select <2 x i1> %55, <2 x double> %35, <2 x double> %45
3424 ; CHECK-NEXT: %66 = select <2 x i1> %56, <2 x double> %36, <2 x double> %46
3425 ; CHECK-NEXT: %67 = select <2 x i1> %57, <2 x double> %37, <2 x double> %47
3426 ; CHECK-NEXT: %68 = select <2 x i1> %58, <2 x double> %38, <2 x double> %48
3427 ; CHECK-NEXT: store <2 x double> %60, <2 x double>* %0, align 16
3428 ; CHECK-NEXT: store <2 x double> %61, <2 x double>* %1, align 16
3429 ; CHECK-NEXT: store <2 x double> %62, <2 x double>* %2, align 16
3430 ; CHECK-NEXT: store <2 x double> %63, <2 x double>* %3, align 16
3431 ; CHECK-NEXT: store <2 x double> %64, <2 x double>* %4, align 16
3432 ; CHECK-NEXT: store <2 x double> %65, <2 x double>* %5, align 16
3433 ; CHECK-NEXT: store <2 x double> %66, <2 x double>* %6, align 16
3434 ; CHECK-NEXT: store <2 x double> %67, <2 x double>* %7, align 16
3435 ; CHECK-NEXT: store <2 x double> %68, <2 x double>* %8, align 16
3436 ; CHECK-NEXT: ret <2 x double> %59
3437 ; CHECK-NEXT: }
3438
3439 define <20 x double> @fcmp_uge_on_20xdouble(<20 x double>, <20 x double>, <20 x double>, <20 x double>) {
3440 entry:
3441 %4 = fcmp uge <20 x double> %0, %1
3442 %5 = select <20 x i1> %4, <20 x double> %2, <20 x double> %3
3443 ret <20 x double> %5
3444 }
3445 ; CHECK-LABEL: define <2 x double> @fcmp_uge_on_20xdouble(<2 x double>* nocaptur e nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(1 6), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16 ), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16) , <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double >, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x do uble>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x doub le>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, < 2 x double>, <2 x double>, <2 x double>, <2 x double>) {
3446 ; CHECK: entry:
3447 ; CHECK-NEXT: %49 = fcmp uge <2 x double> %9, %19
3448 ; CHECK-NEXT: %50 = fcmp uge <2 x double> %10, %20
3449 ; CHECK-NEXT: %51 = fcmp uge <2 x double> %11, %21
3450 ; CHECK-NEXT: %52 = fcmp uge <2 x double> %12, %22
3451 ; CHECK-NEXT: %53 = fcmp uge <2 x double> %13, %23
3452 ; CHECK-NEXT: %54 = fcmp uge <2 x double> %14, %24
3453 ; CHECK-NEXT: %55 = fcmp uge <2 x double> %15, %25
3454 ; CHECK-NEXT: %56 = fcmp uge <2 x double> %16, %26
3455 ; CHECK-NEXT: %57 = fcmp uge <2 x double> %17, %27
3456 ; CHECK-NEXT: %58 = fcmp uge <2 x double> %18, %28
3457 ; CHECK-NEXT: %59 = select <2 x i1> %49, <2 x double> %29, <2 x double> %39
3458 ; CHECK-NEXT: %60 = select <2 x i1> %50, <2 x double> %30, <2 x double> %40
3459 ; CHECK-NEXT: %61 = select <2 x i1> %51, <2 x double> %31, <2 x double> %41
3460 ; CHECK-NEXT: %62 = select <2 x i1> %52, <2 x double> %32, <2 x double> %42
3461 ; CHECK-NEXT: %63 = select <2 x i1> %53, <2 x double> %33, <2 x double> %43
3462 ; CHECK-NEXT: %64 = select <2 x i1> %54, <2 x double> %34, <2 x double> %44
3463 ; CHECK-NEXT: %65 = select <2 x i1> %55, <2 x double> %35, <2 x double> %45
3464 ; CHECK-NEXT: %66 = select <2 x i1> %56, <2 x double> %36, <2 x double> %46
3465 ; CHECK-NEXT: %67 = select <2 x i1> %57, <2 x double> %37, <2 x double> %47
3466 ; CHECK-NEXT: %68 = select <2 x i1> %58, <2 x double> %38, <2 x double> %48
3467 ; CHECK-NEXT: store <2 x double> %60, <2 x double>* %0, align 16
3468 ; CHECK-NEXT: store <2 x double> %61, <2 x double>* %1, align 16
3469 ; CHECK-NEXT: store <2 x double> %62, <2 x double>* %2, align 16
3470 ; CHECK-NEXT: store <2 x double> %63, <2 x double>* %3, align 16
3471 ; CHECK-NEXT: store <2 x double> %64, <2 x double>* %4, align 16
3472 ; CHECK-NEXT: store <2 x double> %65, <2 x double>* %5, align 16
3473 ; CHECK-NEXT: store <2 x double> %66, <2 x double>* %6, align 16
3474 ; CHECK-NEXT: store <2 x double> %67, <2 x double>* %7, align 16
3475 ; CHECK-NEXT: store <2 x double> %68, <2 x double>* %8, align 16
3476 ; CHECK-NEXT: ret <2 x double> %59
3477 ; CHECK-NEXT: }
3478
3479 define <20 x double> @fcmp_ord_on_20xdouble(<20 x double>, <20 x double>, <20 x double>, <20 x double>) {
3480 entry:
3481 %4 = fcmp ord <20 x double> %0, %1
3482 %5 = select <20 x i1> %4, <20 x double> %2, <20 x double> %3
3483 ret <20 x double> %5
3484 }
3485 ; CHECK-LABEL: define <2 x double> @fcmp_ord_on_20xdouble(<2 x double>* nocaptur e nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(1 6), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16 ), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16) , <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double >, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x do uble>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x doub le>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, < 2 x double>, <2 x double>, <2 x double>, <2 x double>) {
3486 ; CHECK: entry:
3487 ; CHECK-NEXT: %49 = fcmp ord <2 x double> %9, %19
3488 ; CHECK-NEXT: %50 = fcmp ord <2 x double> %10, %20
3489 ; CHECK-NEXT: %51 = fcmp ord <2 x double> %11, %21
3490 ; CHECK-NEXT: %52 = fcmp ord <2 x double> %12, %22
3491 ; CHECK-NEXT: %53 = fcmp ord <2 x double> %13, %23
3492 ; CHECK-NEXT: %54 = fcmp ord <2 x double> %14, %24
3493 ; CHECK-NEXT: %55 = fcmp ord <2 x double> %15, %25
3494 ; CHECK-NEXT: %56 = fcmp ord <2 x double> %16, %26
3495 ; CHECK-NEXT: %57 = fcmp ord <2 x double> %17, %27
3496 ; CHECK-NEXT: %58 = fcmp ord <2 x double> %18, %28
3497 ; CHECK-NEXT: %59 = select <2 x i1> %49, <2 x double> %29, <2 x double> %39
3498 ; CHECK-NEXT: %60 = select <2 x i1> %50, <2 x double> %30, <2 x double> %40
3499 ; CHECK-NEXT: %61 = select <2 x i1> %51, <2 x double> %31, <2 x double> %41
3500 ; CHECK-NEXT: %62 = select <2 x i1> %52, <2 x double> %32, <2 x double> %42
3501 ; CHECK-NEXT: %63 = select <2 x i1> %53, <2 x double> %33, <2 x double> %43
3502 ; CHECK-NEXT: %64 = select <2 x i1> %54, <2 x double> %34, <2 x double> %44
3503 ; CHECK-NEXT: %65 = select <2 x i1> %55, <2 x double> %35, <2 x double> %45
3504 ; CHECK-NEXT: %66 = select <2 x i1> %56, <2 x double> %36, <2 x double> %46
3505 ; CHECK-NEXT: %67 = select <2 x i1> %57, <2 x double> %37, <2 x double> %47
3506 ; CHECK-NEXT: %68 = select <2 x i1> %58, <2 x double> %38, <2 x double> %48
3507 ; CHECK-NEXT: store <2 x double> %60, <2 x double>* %0, align 16
3508 ; CHECK-NEXT: store <2 x double> %61, <2 x double>* %1, align 16
3509 ; CHECK-NEXT: store <2 x double> %62, <2 x double>* %2, align 16
3510 ; CHECK-NEXT: store <2 x double> %63, <2 x double>* %3, align 16
3511 ; CHECK-NEXT: store <2 x double> %64, <2 x double>* %4, align 16
3512 ; CHECK-NEXT: store <2 x double> %65, <2 x double>* %5, align 16
3513 ; CHECK-NEXT: store <2 x double> %66, <2 x double>* %6, align 16
3514 ; CHECK-NEXT: store <2 x double> %67, <2 x double>* %7, align 16
3515 ; CHECK-NEXT: store <2 x double> %68, <2 x double>* %8, align 16
3516 ; CHECK-NEXT: ret <2 x double> %59
3517 ; CHECK-NEXT: }
3518
3519 define <20 x double> @fcmp_uno_on_20xdouble(<20 x double>, <20 x double>, <20 x double>, <20 x double>) {
3520 entry:
3521 %4 = fcmp uno <20 x double> %0, %1
3522 %5 = select <20 x i1> %4, <20 x double> %2, <20 x double> %3
3523 ret <20 x double> %5
3524 }
3525 ; CHECK-LABEL: define <2 x double> @fcmp_uno_on_20xdouble(<2 x double>* nocaptur e nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(1 6), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16 ), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16) , <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double >, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x do uble>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x doub le>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, < 2 x double>, <2 x double>, <2 x double>, <2 x double>) {
3526 ; CHECK: entry:
3527 ; CHECK-NEXT: %49 = fcmp uno <2 x double> %9, %19
3528 ; CHECK-NEXT: %50 = fcmp uno <2 x double> %10, %20
3529 ; CHECK-NEXT: %51 = fcmp uno <2 x double> %11, %21
3530 ; CHECK-NEXT: %52 = fcmp uno <2 x double> %12, %22
3531 ; CHECK-NEXT: %53 = fcmp uno <2 x double> %13, %23
3532 ; CHECK-NEXT: %54 = fcmp uno <2 x double> %14, %24
3533 ; CHECK-NEXT: %55 = fcmp uno <2 x double> %15, %25
3534 ; CHECK-NEXT: %56 = fcmp uno <2 x double> %16, %26
3535 ; CHECK-NEXT: %57 = fcmp uno <2 x double> %17, %27
3536 ; CHECK-NEXT: %58 = fcmp uno <2 x double> %18, %28
3537 ; CHECK-NEXT: %59 = select <2 x i1> %49, <2 x double> %29, <2 x double> %39
3538 ; CHECK-NEXT: %60 = select <2 x i1> %50, <2 x double> %30, <2 x double> %40
3539 ; CHECK-NEXT: %61 = select <2 x i1> %51, <2 x double> %31, <2 x double> %41
3540 ; CHECK-NEXT: %62 = select <2 x i1> %52, <2 x double> %32, <2 x double> %42
3541 ; CHECK-NEXT: %63 = select <2 x i1> %53, <2 x double> %33, <2 x double> %43
3542 ; CHECK-NEXT: %64 = select <2 x i1> %54, <2 x double> %34, <2 x double> %44
3543 ; CHECK-NEXT: %65 = select <2 x i1> %55, <2 x double> %35, <2 x double> %45
3544 ; CHECK-NEXT: %66 = select <2 x i1> %56, <2 x double> %36, <2 x double> %46
3545 ; CHECK-NEXT: %67 = select <2 x i1> %57, <2 x double> %37, <2 x double> %47
3546 ; CHECK-NEXT: %68 = select <2 x i1> %58, <2 x double> %38, <2 x double> %48
3547 ; CHECK-NEXT: store <2 x double> %60, <2 x double>* %0, align 16
3548 ; CHECK-NEXT: store <2 x double> %61, <2 x double>* %1, align 16
3549 ; CHECK-NEXT: store <2 x double> %62, <2 x double>* %2, align 16
3550 ; CHECK-NEXT: store <2 x double> %63, <2 x double>* %3, align 16
3551 ; CHECK-NEXT: store <2 x double> %64, <2 x double>* %4, align 16
3552 ; CHECK-NEXT: store <2 x double> %65, <2 x double>* %5, align 16
3553 ; CHECK-NEXT: store <2 x double> %66, <2 x double>* %6, align 16
3554 ; CHECK-NEXT: store <2 x double> %67, <2 x double>* %7, align 16
3555 ; CHECK-NEXT: store <2 x double> %68, <2 x double>* %8, align 16
3556 ; CHECK-NEXT: ret <2 x double> %59
3557 ; CHECK-NEXT: }
3558
3559 define <2 x i8> @icmp_eq_on_2xi8(<2 x i8>, <2 x i8>, <2 x i8>, <2 x i8>) {
3560 entry:
3561 %4 = icmp eq <2 x i8> %0, %1
3562 %5 = select <2 x i1> %4, <2 x i8> %2, <2 x i8> %3
3563 ret <2 x i8> %5
3564 }
3565 ; CHECK-LABEL: define <16 x i8> @icmp_eq_on_2xi8(<16 x i8>, <16 x i8>, <16 x i8> , <16 x i8>) {
3566 ; CHECK: entry:
3567 ; CHECK-NEXT: %4 = icmp eq <16 x i8> %0, %1
3568 ; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
3569 ; CHECK-NEXT: ret <16 x i8> %5
3570 ; CHECK-NEXT: }
3571
3572 define <2 x i8> @icmp_ne_on_2xi8(<2 x i8>, <2 x i8>, <2 x i8>, <2 x i8>) {
3573 entry:
3574 %4 = icmp ne <2 x i8> %0, %1
3575 %5 = select <2 x i1> %4, <2 x i8> %2, <2 x i8> %3
3576 ret <2 x i8> %5
3577 }
3578 ; CHECK-LABEL: define <16 x i8> @icmp_ne_on_2xi8(<16 x i8>, <16 x i8>, <16 x i8> , <16 x i8>) {
3579 ; CHECK: entry:
3580 ; CHECK-NEXT: %4 = icmp ne <16 x i8> %0, %1
3581 ; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
3582 ; CHECK-NEXT: ret <16 x i8> %5
3583 ; CHECK-NEXT: }
3584
3585 define <2 x i8> @icmp_sgt_on_2xi8(<2 x i8>, <2 x i8>, <2 x i8>, <2 x i8>) {
3586 entry:
3587 %4 = icmp sgt <2 x i8> %0, %1
3588 %5 = select <2 x i1> %4, <2 x i8> %2, <2 x i8> %3
3589 ret <2 x i8> %5
3590 }
3591 ; CHECK-LABEL: define <16 x i8> @icmp_sgt_on_2xi8(<16 x i8>, <16 x i8>, <16 x i8 >, <16 x i8>) {
3592 ; CHECK: entry:
3593 ; CHECK-NEXT: %4 = icmp sgt <16 x i8> %0, %1
3594 ; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
3595 ; CHECK-NEXT: ret <16 x i8> %5
3596 ; CHECK-NEXT: }
3597
3598 define <2 x i8> @icmp_ugt_on_2xi8(<2 x i8>, <2 x i8>, <2 x i8>, <2 x i8>) {
3599 entry:
3600 %4 = icmp ugt <2 x i8> %0, %1
3601 %5 = select <2 x i1> %4, <2 x i8> %2, <2 x i8> %3
3602 ret <2 x i8> %5
3603 }
3604 ; CHECK-LABEL: define <16 x i8> @icmp_ugt_on_2xi8(<16 x i8>, <16 x i8>, <16 x i8 >, <16 x i8>) {
3605 ; CHECK: entry:
3606 ; CHECK-NEXT: %4 = icmp ugt <16 x i8> %0, %1
3607 ; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
3608 ; CHECK-NEXT: ret <16 x i8> %5
3609 ; CHECK-NEXT: }
3610
3611 define <2 x i8> @icmp_sge_on_2xi8(<2 x i8>, <2 x i8>, <2 x i8>, <2 x i8>) {
3612 entry:
3613 %4 = icmp sge <2 x i8> %0, %1
3614 %5 = select <2 x i1> %4, <2 x i8> %2, <2 x i8> %3
3615 ret <2 x i8> %5
3616 }
3617 ; CHECK-LABEL: define <16 x i8> @icmp_sge_on_2xi8(<16 x i8>, <16 x i8>, <16 x i8 >, <16 x i8>) {
3618 ; CHECK: entry:
3619 ; CHECK-NEXT: %4 = icmp sge <16 x i8> %0, %1
3620 ; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
3621 ; CHECK-NEXT: ret <16 x i8> %5
3622 ; CHECK-NEXT: }
3623
3624 define <2 x i8> @icmp_uge_on_2xi8(<2 x i8>, <2 x i8>, <2 x i8>, <2 x i8>) {
3625 entry:
3626 %4 = icmp uge <2 x i8> %0, %1
3627 %5 = select <2 x i1> %4, <2 x i8> %2, <2 x i8> %3
3628 ret <2 x i8> %5
3629 }
3630 ; CHECK-LABEL: define <16 x i8> @icmp_uge_on_2xi8(<16 x i8>, <16 x i8>, <16 x i8 >, <16 x i8>) {
3631 ; CHECK: entry:
3632 ; CHECK-NEXT: %4 = icmp uge <16 x i8> %0, %1
3633 ; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
3634 ; CHECK-NEXT: ret <16 x i8> %5
3635 ; CHECK-NEXT: }
3636
3637 define <2 x i8> @icmp_slt_on_2xi8(<2 x i8>, <2 x i8>, <2 x i8>, <2 x i8>) {
3638 entry:
3639 %4 = icmp slt <2 x i8> %0, %1
3640 %5 = select <2 x i1> %4, <2 x i8> %2, <2 x i8> %3
3641 ret <2 x i8> %5
3642 }
3643 ; CHECK-LABEL: define <16 x i8> @icmp_slt_on_2xi8(<16 x i8>, <16 x i8>, <16 x i8 >, <16 x i8>) {
3644 ; CHECK: entry:
3645 ; CHECK-NEXT: %4 = icmp slt <16 x i8> %0, %1
3646 ; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
3647 ; CHECK-NEXT: ret <16 x i8> %5
3648 ; CHECK-NEXT: }
3649
3650 define <2 x i8> @icmp_ult_on_2xi8(<2 x i8>, <2 x i8>, <2 x i8>, <2 x i8>) {
3651 entry:
3652 %4 = icmp ult <2 x i8> %0, %1
3653 %5 = select <2 x i1> %4, <2 x i8> %2, <2 x i8> %3
3654 ret <2 x i8> %5
3655 }
3656 ; CHECK-LABEL: define <16 x i8> @icmp_ult_on_2xi8(<16 x i8>, <16 x i8>, <16 x i8 >, <16 x i8>) {
3657 ; CHECK: entry:
3658 ; CHECK-NEXT: %4 = icmp ult <16 x i8> %0, %1
3659 ; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
3660 ; CHECK-NEXT: ret <16 x i8> %5
3661 ; CHECK-NEXT: }
3662
3663 define <2 x i8> @icmp_sle_on_2xi8(<2 x i8>, <2 x i8>, <2 x i8>, <2 x i8>) {
3664 entry:
3665 %4 = icmp sle <2 x i8> %0, %1
3666 %5 = select <2 x i1> %4, <2 x i8> %2, <2 x i8> %3
3667 ret <2 x i8> %5
3668 }
3669 ; CHECK-LABEL: define <16 x i8> @icmp_sle_on_2xi8(<16 x i8>, <16 x i8>, <16 x i8 >, <16 x i8>) {
3670 ; CHECK: entry:
3671 ; CHECK-NEXT: %4 = icmp sle <16 x i8> %0, %1
3672 ; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
3673 ; CHECK-NEXT: ret <16 x i8> %5
3674 ; CHECK-NEXT: }
3675
3676 define <2 x i8> @icmp_ule_on_2xi8(<2 x i8>, <2 x i8>, <2 x i8>, <2 x i8>) {
3677 entry:
3678 %4 = icmp ule <2 x i8> %0, %1
3679 %5 = select <2 x i1> %4, <2 x i8> %2, <2 x i8> %3
3680 ret <2 x i8> %5
3681 }
3682 ; CHECK-LABEL: define <16 x i8> @icmp_ule_on_2xi8(<16 x i8>, <16 x i8>, <16 x i8 >, <16 x i8>) {
3683 ; CHECK: entry:
3684 ; CHECK-NEXT: %4 = icmp ule <16 x i8> %0, %1
3685 ; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
3686 ; CHECK-NEXT: ret <16 x i8> %5
3687 ; CHECK-NEXT: }
3688
3689 define <2 x i16> @icmp_eq_on_2xi16(<2 x i16>, <2 x i16>, <2 x i16>, <2 x i16>) {
3690 entry:
3691 %4 = icmp eq <2 x i16> %0, %1
3692 %5 = select <2 x i1> %4, <2 x i16> %2, <2 x i16> %3
3693 ret <2 x i16> %5
3694 }
3695 ; CHECK-LABEL: define <8 x i16> @icmp_eq_on_2xi16(<8 x i16>, <8 x i16>, <8 x i16 >, <8 x i16>) {
3696 ; CHECK: entry:
3697 ; CHECK-NEXT: %4 = icmp eq <8 x i16> %0, %1
3698 ; CHECK-NEXT: %5 = select <8 x i1> %4, <8 x i16> %2, <8 x i16> %3
3699 ; CHECK-NEXT: ret <8 x i16> %5
3700 ; CHECK-NEXT: }
3701
3702 define <2 x i16> @icmp_ne_on_2xi16(<2 x i16>, <2 x i16>, <2 x i16>, <2 x i16>) {
3703 entry:
3704 %4 = icmp ne <2 x i16> %0, %1
3705 %5 = select <2 x i1> %4, <2 x i16> %2, <2 x i16> %3
3706 ret <2 x i16> %5
3707 }
3708 ; CHECK-LABEL: define <8 x i16> @icmp_ne_on_2xi16(<8 x i16>, <8 x i16>, <8 x i16 >, <8 x i16>) {
3709 ; CHECK: entry:
3710 ; CHECK-NEXT: %4 = icmp ne <8 x i16> %0, %1
3711 ; CHECK-NEXT: %5 = select <8 x i1> %4, <8 x i16> %2, <8 x i16> %3
3712 ; CHECK-NEXT: ret <8 x i16> %5
3713 ; CHECK-NEXT: }
3714
3715 define <2 x i16> @icmp_sgt_on_2xi16(<2 x i16>, <2 x i16>, <2 x i16>, <2 x i16>) {
3716 entry:
3717 %4 = icmp sgt <2 x i16> %0, %1
3718 %5 = select <2 x i1> %4, <2 x i16> %2, <2 x i16> %3
3719 ret <2 x i16> %5
3720 }
3721 ; CHECK-LABEL: define <8 x i16> @icmp_sgt_on_2xi16(<8 x i16>, <8 x i16>, <8 x i1 6>, <8 x i16>) {
3722 ; CHECK: entry:
3723 ; CHECK-NEXT: %4 = icmp sgt <8 x i16> %0, %1
3724 ; CHECK-NEXT: %5 = select <8 x i1> %4, <8 x i16> %2, <8 x i16> %3
3725 ; CHECK-NEXT: ret <8 x i16> %5
3726 ; CHECK-NEXT: }
3727
3728 define <2 x i16> @icmp_ugt_on_2xi16(<2 x i16>, <2 x i16>, <2 x i16>, <2 x i16>) {
3729 entry:
3730 %4 = icmp ugt <2 x i16> %0, %1
3731 %5 = select <2 x i1> %4, <2 x i16> %2, <2 x i16> %3
3732 ret <2 x i16> %5
3733 }
3734 ; CHECK-LABEL: define <8 x i16> @icmp_ugt_on_2xi16(<8 x i16>, <8 x i16>, <8 x i1 6>, <8 x i16>) {
3735 ; CHECK: entry:
3736 ; CHECK-NEXT: %4 = icmp ugt <8 x i16> %0, %1
3737 ; CHECK-NEXT: %5 = select <8 x i1> %4, <8 x i16> %2, <8 x i16> %3
3738 ; CHECK-NEXT: ret <8 x i16> %5
3739 ; CHECK-NEXT: }
3740
3741 define <2 x i16> @icmp_sge_on_2xi16(<2 x i16>, <2 x i16>, <2 x i16>, <2 x i16>) {
3742 entry:
3743 %4 = icmp sge <2 x i16> %0, %1
3744 %5 = select <2 x i1> %4, <2 x i16> %2, <2 x i16> %3
3745 ret <2 x i16> %5
3746 }
3747 ; CHECK-LABEL: define <8 x i16> @icmp_sge_on_2xi16(<8 x i16>, <8 x i16>, <8 x i1 6>, <8 x i16>) {
3748 ; CHECK: entry:
3749 ; CHECK-NEXT: %4 = icmp sge <8 x i16> %0, %1
3750 ; CHECK-NEXT: %5 = select <8 x i1> %4, <8 x i16> %2, <8 x i16> %3
3751 ; CHECK-NEXT: ret <8 x i16> %5
3752 ; CHECK-NEXT: }
3753
3754 define <2 x i16> @icmp_uge_on_2xi16(<2 x i16>, <2 x i16>, <2 x i16>, <2 x i16>) {
3755 entry:
3756 %4 = icmp uge <2 x i16> %0, %1
3757 %5 = select <2 x i1> %4, <2 x i16> %2, <2 x i16> %3
3758 ret <2 x i16> %5
3759 }
3760 ; CHECK-LABEL: define <8 x i16> @icmp_uge_on_2xi16(<8 x i16>, <8 x i16>, <8 x i1 6>, <8 x i16>) {
3761 ; CHECK: entry:
3762 ; CHECK-NEXT: %4 = icmp uge <8 x i16> %0, %1
3763 ; CHECK-NEXT: %5 = select <8 x i1> %4, <8 x i16> %2, <8 x i16> %3
3764 ; CHECK-NEXT: ret <8 x i16> %5
3765 ; CHECK-NEXT: }
3766
3767 define <2 x i16> @icmp_slt_on_2xi16(<2 x i16>, <2 x i16>, <2 x i16>, <2 x i16>) {
3768 entry:
3769 %4 = icmp slt <2 x i16> %0, %1
3770 %5 = select <2 x i1> %4, <2 x i16> %2, <2 x i16> %3
3771 ret <2 x i16> %5
3772 }
3773 ; CHECK-LABEL: define <8 x i16> @icmp_slt_on_2xi16(<8 x i16>, <8 x i16>, <8 x i1 6>, <8 x i16>) {
3774 ; CHECK: entry:
3775 ; CHECK-NEXT: %4 = icmp slt <8 x i16> %0, %1
3776 ; CHECK-NEXT: %5 = select <8 x i1> %4, <8 x i16> %2, <8 x i16> %3
3777 ; CHECK-NEXT: ret <8 x i16> %5
3778 ; CHECK-NEXT: }
3779
3780 define <2 x i16> @icmp_ult_on_2xi16(<2 x i16>, <2 x i16>, <2 x i16>, <2 x i16>) {
3781 entry:
3782 %4 = icmp ult <2 x i16> %0, %1
3783 %5 = select <2 x i1> %4, <2 x i16> %2, <2 x i16> %3
3784 ret <2 x i16> %5
3785 }
3786 ; CHECK-LABEL: define <8 x i16> @icmp_ult_on_2xi16(<8 x i16>, <8 x i16>, <8 x i1 6>, <8 x i16>) {
3787 ; CHECK: entry:
3788 ; CHECK-NEXT: %4 = icmp ult <8 x i16> %0, %1
3789 ; CHECK-NEXT: %5 = select <8 x i1> %4, <8 x i16> %2, <8 x i16> %3
3790 ; CHECK-NEXT: ret <8 x i16> %5
3791 ; CHECK-NEXT: }
3792
3793 define <2 x i16> @icmp_sle_on_2xi16(<2 x i16>, <2 x i16>, <2 x i16>, <2 x i16>) {
3794 entry:
3795 %4 = icmp sle <2 x i16> %0, %1
3796 %5 = select <2 x i1> %4, <2 x i16> %2, <2 x i16> %3
3797 ret <2 x i16> %5
3798 }
3799 ; CHECK-LABEL: define <8 x i16> @icmp_sle_on_2xi16(<8 x i16>, <8 x i16>, <8 x i1 6>, <8 x i16>) {
3800 ; CHECK: entry:
3801 ; CHECK-NEXT: %4 = icmp sle <8 x i16> %0, %1
3802 ; CHECK-NEXT: %5 = select <8 x i1> %4, <8 x i16> %2, <8 x i16> %3
3803 ; CHECK-NEXT: ret <8 x i16> %5
3804 ; CHECK-NEXT: }
3805
3806 define <2 x i16> @icmp_ule_on_2xi16(<2 x i16>, <2 x i16>, <2 x i16>, <2 x i16>) {
3807 entry:
3808 %4 = icmp ule <2 x i16> %0, %1
3809 %5 = select <2 x i1> %4, <2 x i16> %2, <2 x i16> %3
3810 ret <2 x i16> %5
3811 }
3812 ; CHECK-LABEL: define <8 x i16> @icmp_ule_on_2xi16(<8 x i16>, <8 x i16>, <8 x i1 6>, <8 x i16>) {
3813 ; CHECK: entry:
3814 ; CHECK-NEXT: %4 = icmp ule <8 x i16> %0, %1
3815 ; CHECK-NEXT: %5 = select <8 x i1> %4, <8 x i16> %2, <8 x i16> %3
3816 ; CHECK-NEXT: ret <8 x i16> %5
3817 ; CHECK-NEXT: }
3818
3819 define <2 x i32> @icmp_eq_on_2xi32(<2 x i32>, <2 x i32>, <2 x i32>, <2 x i32>) {
3820 entry:
3821 %4 = icmp eq <2 x i32> %0, %1
3822 %5 = select <2 x i1> %4, <2 x i32> %2, <2 x i32> %3
3823 ret <2 x i32> %5
3824 }
3825 ; CHECK-LABEL: define <4 x i32> @icmp_eq_on_2xi32(<4 x i32>, <4 x i32>, <4 x i32 >, <4 x i32>) {
3826 ; CHECK: entry:
3827 ; CHECK-NEXT: %4 = icmp eq <4 x i32> %0, %1
3828 ; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x i32> %2, <4 x i32> %3
3829 ; CHECK-NEXT: ret <4 x i32> %5
3830 ; CHECK-NEXT: }
3831
3832 define <2 x i32> @icmp_ne_on_2xi32(<2 x i32>, <2 x i32>, <2 x i32>, <2 x i32>) {
3833 entry:
3834 %4 = icmp ne <2 x i32> %0, %1
3835 %5 = select <2 x i1> %4, <2 x i32> %2, <2 x i32> %3
3836 ret <2 x i32> %5
3837 }
3838 ; CHECK-LABEL: define <4 x i32> @icmp_ne_on_2xi32(<4 x i32>, <4 x i32>, <4 x i32 >, <4 x i32>) {
3839 ; CHECK: entry:
3840 ; CHECK-NEXT: %4 = icmp ne <4 x i32> %0, %1
3841 ; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x i32> %2, <4 x i32> %3
3842 ; CHECK-NEXT: ret <4 x i32> %5
3843 ; CHECK-NEXT: }
3844
3845 define <2 x i32> @icmp_sgt_on_2xi32(<2 x i32>, <2 x i32>, <2 x i32>, <2 x i32>) {
3846 entry:
3847 %4 = icmp sgt <2 x i32> %0, %1
3848 %5 = select <2 x i1> %4, <2 x i32> %2, <2 x i32> %3
3849 ret <2 x i32> %5
3850 }
3851 ; CHECK-LABEL: define <4 x i32> @icmp_sgt_on_2xi32(<4 x i32>, <4 x i32>, <4 x i3 2>, <4 x i32>) {
3852 ; CHECK: entry:
3853 ; CHECK-NEXT: %4 = icmp sgt <4 x i32> %0, %1
3854 ; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x i32> %2, <4 x i32> %3
3855 ; CHECK-NEXT: ret <4 x i32> %5
3856 ; CHECK-NEXT: }
3857
3858 define <2 x i32> @icmp_ugt_on_2xi32(<2 x i32>, <2 x i32>, <2 x i32>, <2 x i32>) {
3859 entry:
3860 %4 = icmp ugt <2 x i32> %0, %1
3861 %5 = select <2 x i1> %4, <2 x i32> %2, <2 x i32> %3
3862 ret <2 x i32> %5
3863 }
3864 ; CHECK-LABEL: define <4 x i32> @icmp_ugt_on_2xi32(<4 x i32>, <4 x i32>, <4 x i3 2>, <4 x i32>) {
3865 ; CHECK: entry:
3866 ; CHECK-NEXT: %4 = icmp ugt <4 x i32> %0, %1
3867 ; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x i32> %2, <4 x i32> %3
3868 ; CHECK-NEXT: ret <4 x i32> %5
3869 ; CHECK-NEXT: }
3870
3871 define <2 x i32> @icmp_sge_on_2xi32(<2 x i32>, <2 x i32>, <2 x i32>, <2 x i32>) {
3872 entry:
3873 %4 = icmp sge <2 x i32> %0, %1
3874 %5 = select <2 x i1> %4, <2 x i32> %2, <2 x i32> %3
3875 ret <2 x i32> %5
3876 }
3877 ; CHECK-LABEL: define <4 x i32> @icmp_sge_on_2xi32(<4 x i32>, <4 x i32>, <4 x i3 2>, <4 x i32>) {
3878 ; CHECK: entry:
3879 ; CHECK-NEXT: %4 = icmp sge <4 x i32> %0, %1
3880 ; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x i32> %2, <4 x i32> %3
3881 ; CHECK-NEXT: ret <4 x i32> %5
3882 ; CHECK-NEXT: }
3883
3884 define <2 x i32> @icmp_uge_on_2xi32(<2 x i32>, <2 x i32>, <2 x i32>, <2 x i32>) {
3885 entry:
3886 %4 = icmp uge <2 x i32> %0, %1
3887 %5 = select <2 x i1> %4, <2 x i32> %2, <2 x i32> %3
3888 ret <2 x i32> %5
3889 }
3890 ; CHECK-LABEL: define <4 x i32> @icmp_uge_on_2xi32(<4 x i32>, <4 x i32>, <4 x i3 2>, <4 x i32>) {
3891 ; CHECK: entry:
3892 ; CHECK-NEXT: %4 = icmp uge <4 x i32> %0, %1
3893 ; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x i32> %2, <4 x i32> %3
3894 ; CHECK-NEXT: ret <4 x i32> %5
3895 ; CHECK-NEXT: }
3896
3897 define <2 x i32> @icmp_slt_on_2xi32(<2 x i32>, <2 x i32>, <2 x i32>, <2 x i32>) {
3898 entry:
3899 %4 = icmp slt <2 x i32> %0, %1
3900 %5 = select <2 x i1> %4, <2 x i32> %2, <2 x i32> %3
3901 ret <2 x i32> %5
3902 }
3903 ; CHECK-LABEL: define <4 x i32> @icmp_slt_on_2xi32(<4 x i32>, <4 x i32>, <4 x i3 2>, <4 x i32>) {
3904 ; CHECK: entry:
3905 ; CHECK-NEXT: %4 = icmp slt <4 x i32> %0, %1
3906 ; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x i32> %2, <4 x i32> %3
3907 ; CHECK-NEXT: ret <4 x i32> %5
3908 ; CHECK-NEXT: }
3909
3910 define <2 x i32> @icmp_ult_on_2xi32(<2 x i32>, <2 x i32>, <2 x i32>, <2 x i32>) {
3911 entry:
3912 %4 = icmp ult <2 x i32> %0, %1
3913 %5 = select <2 x i1> %4, <2 x i32> %2, <2 x i32> %3
3914 ret <2 x i32> %5
3915 }
3916 ; CHECK-LABEL: define <4 x i32> @icmp_ult_on_2xi32(<4 x i32>, <4 x i32>, <4 x i3 2>, <4 x i32>) {
3917 ; CHECK: entry:
3918 ; CHECK-NEXT: %4 = icmp ult <4 x i32> %0, %1
3919 ; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x i32> %2, <4 x i32> %3
3920 ; CHECK-NEXT: ret <4 x i32> %5
3921 ; CHECK-NEXT: }
3922
3923 define <2 x i32> @icmp_sle_on_2xi32(<2 x i32>, <2 x i32>, <2 x i32>, <2 x i32>) {
3924 entry:
3925 %4 = icmp sle <2 x i32> %0, %1
3926 %5 = select <2 x i1> %4, <2 x i32> %2, <2 x i32> %3
3927 ret <2 x i32> %5
3928 }
3929 ; CHECK-LABEL: define <4 x i32> @icmp_sle_on_2xi32(<4 x i32>, <4 x i32>, <4 x i3 2>, <4 x i32>) {
3930 ; CHECK: entry:
3931 ; CHECK-NEXT: %4 = icmp sle <4 x i32> %0, %1
3932 ; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x i32> %2, <4 x i32> %3
3933 ; CHECK-NEXT: ret <4 x i32> %5
3934 ; CHECK-NEXT: }
3935
3936 define <2 x i32> @icmp_ule_on_2xi32(<2 x i32>, <2 x i32>, <2 x i32>, <2 x i32>) {
3937 entry:
3938 %4 = icmp ule <2 x i32> %0, %1
3939 %5 = select <2 x i1> %4, <2 x i32> %2, <2 x i32> %3
3940 ret <2 x i32> %5
3941 }
3942 ; CHECK-LABEL: define <4 x i32> @icmp_ule_on_2xi32(<4 x i32>, <4 x i32>, <4 x i3 2>, <4 x i32>) {
3943 ; CHECK: entry:
3944 ; CHECK-NEXT: %4 = icmp ule <4 x i32> %0, %1
3945 ; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x i32> %2, <4 x i32> %3
3946 ; CHECK-NEXT: ret <4 x i32> %5
3947 ; CHECK-NEXT: }
3948
3949 define <2 x i64> @icmp_eq_on_2xi64(<2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
3950 entry:
3951 %4 = icmp eq <2 x i64> %0, %1
3952 %5 = select <2 x i1> %4, <2 x i64> %2, <2 x i64> %3
3953 ret <2 x i64> %5
3954 }
3955 ; CHECK-LABEL: define <2 x i64> @icmp_eq_on_2xi64(<2 x i64>, <2 x i64>, <2 x i64 >, <2 x i64>) {
3956 ; CHECK: entry:
3957 ; CHECK-NEXT: %4 = icmp eq <2 x i64> %0, %1
3958 ; CHECK-NEXT: %5 = select <2 x i1> %4, <2 x i64> %2, <2 x i64> %3
3959 ; CHECK-NEXT: ret <2 x i64> %5
3960 ; CHECK-NEXT: }
3961
3962 define <2 x i64> @icmp_ne_on_2xi64(<2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
3963 entry:
3964 %4 = icmp ne <2 x i64> %0, %1
3965 %5 = select <2 x i1> %4, <2 x i64> %2, <2 x i64> %3
3966 ret <2 x i64> %5
3967 }
3968 ; CHECK-LABEL: define <2 x i64> @icmp_ne_on_2xi64(<2 x i64>, <2 x i64>, <2 x i64 >, <2 x i64>) {
3969 ; CHECK: entry:
3970 ; CHECK-NEXT: %4 = icmp ne <2 x i64> %0, %1
3971 ; CHECK-NEXT: %5 = select <2 x i1> %4, <2 x i64> %2, <2 x i64> %3
3972 ; CHECK-NEXT: ret <2 x i64> %5
3973 ; CHECK-NEXT: }
3974
3975 define <2 x i64> @icmp_sgt_on_2xi64(<2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
3976 entry:
3977 %4 = icmp sgt <2 x i64> %0, %1
3978 %5 = select <2 x i1> %4, <2 x i64> %2, <2 x i64> %3
3979 ret <2 x i64> %5
3980 }
3981 ; CHECK-LABEL: define <2 x i64> @icmp_sgt_on_2xi64(<2 x i64>, <2 x i64>, <2 x i6 4>, <2 x i64>) {
3982 ; CHECK: entry:
3983 ; CHECK-NEXT: %4 = icmp sgt <2 x i64> %0, %1
3984 ; CHECK-NEXT: %5 = select <2 x i1> %4, <2 x i64> %2, <2 x i64> %3
3985 ; CHECK-NEXT: ret <2 x i64> %5
3986 ; CHECK-NEXT: }
3987
3988 define <2 x i64> @icmp_ugt_on_2xi64(<2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
3989 entry:
3990 %4 = icmp ugt <2 x i64> %0, %1
3991 %5 = select <2 x i1> %4, <2 x i64> %2, <2 x i64> %3
3992 ret <2 x i64> %5
3993 }
3994 ; CHECK-LABEL: define <2 x i64> @icmp_ugt_on_2xi64(<2 x i64>, <2 x i64>, <2 x i6 4>, <2 x i64>) {
3995 ; CHECK: entry:
3996 ; CHECK-NEXT: %4 = icmp ugt <2 x i64> %0, %1
3997 ; CHECK-NEXT: %5 = select <2 x i1> %4, <2 x i64> %2, <2 x i64> %3
3998 ; CHECK-NEXT: ret <2 x i64> %5
3999 ; CHECK-NEXT: }
4000
4001 define <2 x i64> @icmp_sge_on_2xi64(<2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
4002 entry:
4003 %4 = icmp sge <2 x i64> %0, %1
4004 %5 = select <2 x i1> %4, <2 x i64> %2, <2 x i64> %3
4005 ret <2 x i64> %5
4006 }
4007 ; CHECK-LABEL: define <2 x i64> @icmp_sge_on_2xi64(<2 x i64>, <2 x i64>, <2 x i6 4>, <2 x i64>) {
4008 ; CHECK: entry:
4009 ; CHECK-NEXT: %4 = icmp sge <2 x i64> %0, %1
4010 ; CHECK-NEXT: %5 = select <2 x i1> %4, <2 x i64> %2, <2 x i64> %3
4011 ; CHECK-NEXT: ret <2 x i64> %5
4012 ; CHECK-NEXT: }
4013
4014 define <2 x i64> @icmp_uge_on_2xi64(<2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
4015 entry:
4016 %4 = icmp uge <2 x i64> %0, %1
4017 %5 = select <2 x i1> %4, <2 x i64> %2, <2 x i64> %3
4018 ret <2 x i64> %5
4019 }
4020 ; CHECK-LABEL: define <2 x i64> @icmp_uge_on_2xi64(<2 x i64>, <2 x i64>, <2 x i6 4>, <2 x i64>) {
4021 ; CHECK: entry:
4022 ; CHECK-NEXT: %4 = icmp uge <2 x i64> %0, %1
4023 ; CHECK-NEXT: %5 = select <2 x i1> %4, <2 x i64> %2, <2 x i64> %3
4024 ; CHECK-NEXT: ret <2 x i64> %5
4025 ; CHECK-NEXT: }
4026
4027 define <2 x i64> @icmp_slt_on_2xi64(<2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
4028 entry:
4029 %4 = icmp slt <2 x i64> %0, %1
4030 %5 = select <2 x i1> %4, <2 x i64> %2, <2 x i64> %3
4031 ret <2 x i64> %5
4032 }
4033 ; CHECK-LABEL: define <2 x i64> @icmp_slt_on_2xi64(<2 x i64>, <2 x i64>, <2 x i6 4>, <2 x i64>) {
4034 ; CHECK: entry:
4035 ; CHECK-NEXT: %4 = icmp slt <2 x i64> %0, %1
4036 ; CHECK-NEXT: %5 = select <2 x i1> %4, <2 x i64> %2, <2 x i64> %3
4037 ; CHECK-NEXT: ret <2 x i64> %5
4038 ; CHECK-NEXT: }
4039
4040 define <2 x i64> @icmp_ult_on_2xi64(<2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
4041 entry:
4042 %4 = icmp ult <2 x i64> %0, %1
4043 %5 = select <2 x i1> %4, <2 x i64> %2, <2 x i64> %3
4044 ret <2 x i64> %5
4045 }
4046 ; CHECK-LABEL: define <2 x i64> @icmp_ult_on_2xi64(<2 x i64>, <2 x i64>, <2 x i6 4>, <2 x i64>) {
4047 ; CHECK: entry:
4048 ; CHECK-NEXT: %4 = icmp ult <2 x i64> %0, %1
4049 ; CHECK-NEXT: %5 = select <2 x i1> %4, <2 x i64> %2, <2 x i64> %3
4050 ; CHECK-NEXT: ret <2 x i64> %5
4051 ; CHECK-NEXT: }
4052
4053 define <2 x i64> @icmp_sle_on_2xi64(<2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
4054 entry:
4055 %4 = icmp sle <2 x i64> %0, %1
4056 %5 = select <2 x i1> %4, <2 x i64> %2, <2 x i64> %3
4057 ret <2 x i64> %5
4058 }
4059 ; CHECK-LABEL: define <2 x i64> @icmp_sle_on_2xi64(<2 x i64>, <2 x i64>, <2 x i6 4>, <2 x i64>) {
4060 ; CHECK: entry:
4061 ; CHECK-NEXT: %4 = icmp sle <2 x i64> %0, %1
4062 ; CHECK-NEXT: %5 = select <2 x i1> %4, <2 x i64> %2, <2 x i64> %3
4063 ; CHECK-NEXT: ret <2 x i64> %5
4064 ; CHECK-NEXT: }
4065
4066 define <2 x i64> @icmp_ule_on_2xi64(<2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
4067 entry:
4068 %4 = icmp ule <2 x i64> %0, %1
4069 %5 = select <2 x i1> %4, <2 x i64> %2, <2 x i64> %3
4070 ret <2 x i64> %5
4071 }
4072 ; CHECK-LABEL: define <2 x i64> @icmp_ule_on_2xi64(<2 x i64>, <2 x i64>, <2 x i6 4>, <2 x i64>) {
4073 ; CHECK: entry:
4074 ; CHECK-NEXT: %4 = icmp ule <2 x i64> %0, %1
4075 ; CHECK-NEXT: %5 = select <2 x i1> %4, <2 x i64> %2, <2 x i64> %3
4076 ; CHECK-NEXT: ret <2 x i64> %5
4077 ; CHECK-NEXT: }
4078
4079 define <2 x i8*> @icmp_eq_on_2xi8ptr(<2 x i8*>, <2 x i8*>, <2 x i8*>, <2 x i8*>) {
4080 entry:
4081 %4 = icmp eq <2 x i8*> %0, %1
4082 %5 = select <2 x i1> %4, <2 x i8*> %2, <2 x i8*> %3
4083 ret <2 x i8*> %5
4084 }
4085 ; CHECK-LABEL: define <4 x i8*> @icmp_eq_on_2xi8ptr(<4 x i8*>, <4 x i8*>, <4 x i 8*>, <4 x i8*>) {
4086 ; CHECK: entry:
4087 ; CHECK-NEXT: %4 = icmp eq <4 x i8*> %0, %1
4088 ; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x i8*> %2, <4 x i8*> %3
4089 ; CHECK-NEXT: ret <4 x i8*> %5
4090 ; CHECK-NEXT: }
4091
4092 define <2 x i8*> @icmp_ne_on_2xi8ptr(<2 x i8*>, <2 x i8*>, <2 x i8*>, <2 x i8*>) {
4093 entry:
4094 %4 = icmp ne <2 x i8*> %0, %1
4095 %5 = select <2 x i1> %4, <2 x i8*> %2, <2 x i8*> %3
4096 ret <2 x i8*> %5
4097 }
4098 ; CHECK-LABEL: define <4 x i8*> @icmp_ne_on_2xi8ptr(<4 x i8*>, <4 x i8*>, <4 x i 8*>, <4 x i8*>) {
4099 ; CHECK: entry:
4100 ; CHECK-NEXT: %4 = icmp ne <4 x i8*> %0, %1
4101 ; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x i8*> %2, <4 x i8*> %3
4102 ; CHECK-NEXT: ret <4 x i8*> %5
4103 ; CHECK-NEXT: }
4104
4105 define <2 x i8*> @icmp_sgt_on_2xi8ptr(<2 x i8*>, <2 x i8*>, <2 x i8*>, <2 x i8*> ) {
4106 entry:
4107 %4 = icmp sgt <2 x i8*> %0, %1
4108 %5 = select <2 x i1> %4, <2 x i8*> %2, <2 x i8*> %3
4109 ret <2 x i8*> %5
4110 }
4111 ; CHECK-LABEL: define <4 x i8*> @icmp_sgt_on_2xi8ptr(<4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
4112 ; CHECK: entry:
4113 ; CHECK-NEXT: %4 = icmp sgt <4 x i8*> %0, %1
4114 ; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x i8*> %2, <4 x i8*> %3
4115 ; CHECK-NEXT: ret <4 x i8*> %5
4116 ; CHECK-NEXT: }
4117
4118 define <2 x i8*> @icmp_ugt_on_2xi8ptr(<2 x i8*>, <2 x i8*>, <2 x i8*>, <2 x i8*> ) {
4119 entry:
4120 %4 = icmp ugt <2 x i8*> %0, %1
4121 %5 = select <2 x i1> %4, <2 x i8*> %2, <2 x i8*> %3
4122 ret <2 x i8*> %5
4123 }
4124 ; CHECK-LABEL: define <4 x i8*> @icmp_ugt_on_2xi8ptr(<4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
4125 ; CHECK: entry:
4126 ; CHECK-NEXT: %4 = icmp ugt <4 x i8*> %0, %1
4127 ; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x i8*> %2, <4 x i8*> %3
4128 ; CHECK-NEXT: ret <4 x i8*> %5
4129 ; CHECK-NEXT: }
4130
4131 define <2 x i8*> @icmp_sge_on_2xi8ptr(<2 x i8*>, <2 x i8*>, <2 x i8*>, <2 x i8*> ) {
4132 entry:
4133 %4 = icmp sge <2 x i8*> %0, %1
4134 %5 = select <2 x i1> %4, <2 x i8*> %2, <2 x i8*> %3
4135 ret <2 x i8*> %5
4136 }
4137 ; CHECK-LABEL: define <4 x i8*> @icmp_sge_on_2xi8ptr(<4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
4138 ; CHECK: entry:
4139 ; CHECK-NEXT: %4 = icmp sge <4 x i8*> %0, %1
4140 ; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x i8*> %2, <4 x i8*> %3
4141 ; CHECK-NEXT: ret <4 x i8*> %5
4142 ; CHECK-NEXT: }
4143
4144 define <2 x i8*> @icmp_uge_on_2xi8ptr(<2 x i8*>, <2 x i8*>, <2 x i8*>, <2 x i8*> ) {
4145 entry:
4146 %4 = icmp uge <2 x i8*> %0, %1
4147 %5 = select <2 x i1> %4, <2 x i8*> %2, <2 x i8*> %3
4148 ret <2 x i8*> %5
4149 }
4150 ; CHECK-LABEL: define <4 x i8*> @icmp_uge_on_2xi8ptr(<4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
4151 ; CHECK: entry:
4152 ; CHECK-NEXT: %4 = icmp uge <4 x i8*> %0, %1
4153 ; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x i8*> %2, <4 x i8*> %3
4154 ; CHECK-NEXT: ret <4 x i8*> %5
4155 ; CHECK-NEXT: }
4156
4157 define <2 x i8*> @icmp_slt_on_2xi8ptr(<2 x i8*>, <2 x i8*>, <2 x i8*>, <2 x i8*> ) {
4158 entry:
4159 %4 = icmp slt <2 x i8*> %0, %1
4160 %5 = select <2 x i1> %4, <2 x i8*> %2, <2 x i8*> %3
4161 ret <2 x i8*> %5
4162 }
4163 ; CHECK-LABEL: define <4 x i8*> @icmp_slt_on_2xi8ptr(<4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
4164 ; CHECK: entry:
4165 ; CHECK-NEXT: %4 = icmp slt <4 x i8*> %0, %1
4166 ; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x i8*> %2, <4 x i8*> %3
4167 ; CHECK-NEXT: ret <4 x i8*> %5
4168 ; CHECK-NEXT: }
4169
4170 define <2 x i8*> @icmp_ult_on_2xi8ptr(<2 x i8*>, <2 x i8*>, <2 x i8*>, <2 x i8*> ) {
4171 entry:
4172 %4 = icmp ult <2 x i8*> %0, %1
4173 %5 = select <2 x i1> %4, <2 x i8*> %2, <2 x i8*> %3
4174 ret <2 x i8*> %5
4175 }
4176 ; CHECK-LABEL: define <4 x i8*> @icmp_ult_on_2xi8ptr(<4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
4177 ; CHECK: entry:
4178 ; CHECK-NEXT: %4 = icmp ult <4 x i8*> %0, %1
4179 ; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x i8*> %2, <4 x i8*> %3
4180 ; CHECK-NEXT: ret <4 x i8*> %5
4181 ; CHECK-NEXT: }
4182
4183 define <2 x i8*> @icmp_sle_on_2xi8ptr(<2 x i8*>, <2 x i8*>, <2 x i8*>, <2 x i8*> ) {
4184 entry:
4185 %4 = icmp sle <2 x i8*> %0, %1
4186 %5 = select <2 x i1> %4, <2 x i8*> %2, <2 x i8*> %3
4187 ret <2 x i8*> %5
4188 }
4189 ; CHECK-LABEL: define <4 x i8*> @icmp_sle_on_2xi8ptr(<4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
4190 ; CHECK: entry:
4191 ; CHECK-NEXT: %4 = icmp sle <4 x i8*> %0, %1
4192 ; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x i8*> %2, <4 x i8*> %3
4193 ; CHECK-NEXT: ret <4 x i8*> %5
4194 ; CHECK-NEXT: }
4195
4196 define <2 x i8*> @icmp_ule_on_2xi8ptr(<2 x i8*>, <2 x i8*>, <2 x i8*>, <2 x i8*> ) {
4197 entry:
4198 %4 = icmp ule <2 x i8*> %0, %1
4199 %5 = select <2 x i1> %4, <2 x i8*> %2, <2 x i8*> %3
4200 ret <2 x i8*> %5
4201 }
4202 ; CHECK-LABEL: define <4 x i8*> @icmp_ule_on_2xi8ptr(<4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
4203 ; CHECK: entry:
4204 ; CHECK-NEXT: %4 = icmp ule <4 x i8*> %0, %1
4205 ; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x i8*> %2, <4 x i8*> %3
4206 ; CHECK-NEXT: ret <4 x i8*> %5
4207 ; CHECK-NEXT: }
4208
4209 define <4 x i8> @icmp_eq_on_4xi8(<4 x i8>, <4 x i8>, <4 x i8>, <4 x i8>) {
4210 entry:
4211 %4 = icmp eq <4 x i8> %0, %1
4212 %5 = select <4 x i1> %4, <4 x i8> %2, <4 x i8> %3
4213 ret <4 x i8> %5
4214 }
4215 ; CHECK-LABEL: define <16 x i8> @icmp_eq_on_4xi8(<16 x i8>, <16 x i8>, <16 x i8> , <16 x i8>) {
4216 ; CHECK: entry:
4217 ; CHECK-NEXT: %4 = icmp eq <16 x i8> %0, %1
4218 ; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
4219 ; CHECK-NEXT: ret <16 x i8> %5
4220 ; CHECK-NEXT: }
4221
4222 define <4 x i8> @icmp_ne_on_4xi8(<4 x i8>, <4 x i8>, <4 x i8>, <4 x i8>) {
4223 entry:
4224 %4 = icmp ne <4 x i8> %0, %1
4225 %5 = select <4 x i1> %4, <4 x i8> %2, <4 x i8> %3
4226 ret <4 x i8> %5
4227 }
4228 ; CHECK-LABEL: define <16 x i8> @icmp_ne_on_4xi8(<16 x i8>, <16 x i8>, <16 x i8> , <16 x i8>) {
4229 ; CHECK: entry:
4230 ; CHECK-NEXT: %4 = icmp ne <16 x i8> %0, %1
4231 ; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
4232 ; CHECK-NEXT: ret <16 x i8> %5
4233 ; CHECK-NEXT: }
4234
4235 define <4 x i8> @icmp_sgt_on_4xi8(<4 x i8>, <4 x i8>, <4 x i8>, <4 x i8>) {
4236 entry:
4237 %4 = icmp sgt <4 x i8> %0, %1
4238 %5 = select <4 x i1> %4, <4 x i8> %2, <4 x i8> %3
4239 ret <4 x i8> %5
4240 }
4241 ; CHECK-LABEL: define <16 x i8> @icmp_sgt_on_4xi8(<16 x i8>, <16 x i8>, <16 x i8 >, <16 x i8>) {
4242 ; CHECK: entry:
4243 ; CHECK-NEXT: %4 = icmp sgt <16 x i8> %0, %1
4244 ; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
4245 ; CHECK-NEXT: ret <16 x i8> %5
4246 ; CHECK-NEXT: }
4247
4248 define <4 x i8> @icmp_ugt_on_4xi8(<4 x i8>, <4 x i8>, <4 x i8>, <4 x i8>) {
4249 entry:
4250 %4 = icmp ugt <4 x i8> %0, %1
4251 %5 = select <4 x i1> %4, <4 x i8> %2, <4 x i8> %3
4252 ret <4 x i8> %5
4253 }
4254 ; CHECK-LABEL: define <16 x i8> @icmp_ugt_on_4xi8(<16 x i8>, <16 x i8>, <16 x i8 >, <16 x i8>) {
4255 ; CHECK: entry:
4256 ; CHECK-NEXT: %4 = icmp ugt <16 x i8> %0, %1
4257 ; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
4258 ; CHECK-NEXT: ret <16 x i8> %5
4259 ; CHECK-NEXT: }
4260
4261 define <4 x i8> @icmp_sge_on_4xi8(<4 x i8>, <4 x i8>, <4 x i8>, <4 x i8>) {
4262 entry:
4263 %4 = icmp sge <4 x i8> %0, %1
4264 %5 = select <4 x i1> %4, <4 x i8> %2, <4 x i8> %3
4265 ret <4 x i8> %5
4266 }
4267 ; CHECK-LABEL: define <16 x i8> @icmp_sge_on_4xi8(<16 x i8>, <16 x i8>, <16 x i8 >, <16 x i8>) {
4268 ; CHECK: entry:
4269 ; CHECK-NEXT: %4 = icmp sge <16 x i8> %0, %1
4270 ; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
4271 ; CHECK-NEXT: ret <16 x i8> %5
4272 ; CHECK-NEXT: }
4273
4274 define <4 x i8> @icmp_uge_on_4xi8(<4 x i8>, <4 x i8>, <4 x i8>, <4 x i8>) {
4275 entry:
4276 %4 = icmp uge <4 x i8> %0, %1
4277 %5 = select <4 x i1> %4, <4 x i8> %2, <4 x i8> %3
4278 ret <4 x i8> %5
4279 }
4280 ; CHECK-LABEL: define <16 x i8> @icmp_uge_on_4xi8(<16 x i8>, <16 x i8>, <16 x i8 >, <16 x i8>) {
4281 ; CHECK: entry:
4282 ; CHECK-NEXT: %4 = icmp uge <16 x i8> %0, %1
4283 ; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
4284 ; CHECK-NEXT: ret <16 x i8> %5
4285 ; CHECK-NEXT: }
4286
4287 define <4 x i8> @icmp_slt_on_4xi8(<4 x i8>, <4 x i8>, <4 x i8>, <4 x i8>) {
4288 entry:
4289 %4 = icmp slt <4 x i8> %0, %1
4290 %5 = select <4 x i1> %4, <4 x i8> %2, <4 x i8> %3
4291 ret <4 x i8> %5
4292 }
4293 ; CHECK-LABEL: define <16 x i8> @icmp_slt_on_4xi8(<16 x i8>, <16 x i8>, <16 x i8 >, <16 x i8>) {
4294 ; CHECK: entry:
4295 ; CHECK-NEXT: %4 = icmp slt <16 x i8> %0, %1
4296 ; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
4297 ; CHECK-NEXT: ret <16 x i8> %5
4298 ; CHECK-NEXT: }
4299
4300 define <4 x i8> @icmp_ult_on_4xi8(<4 x i8>, <4 x i8>, <4 x i8>, <4 x i8>) {
4301 entry:
4302 %4 = icmp ult <4 x i8> %0, %1
4303 %5 = select <4 x i1> %4, <4 x i8> %2, <4 x i8> %3
4304 ret <4 x i8> %5
4305 }
4306 ; CHECK-LABEL: define <16 x i8> @icmp_ult_on_4xi8(<16 x i8>, <16 x i8>, <16 x i8 >, <16 x i8>) {
4307 ; CHECK: entry:
4308 ; CHECK-NEXT: %4 = icmp ult <16 x i8> %0, %1
4309 ; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
4310 ; CHECK-NEXT: ret <16 x i8> %5
4311 ; CHECK-NEXT: }
4312
4313 define <4 x i8> @icmp_sle_on_4xi8(<4 x i8>, <4 x i8>, <4 x i8>, <4 x i8>) {
4314 entry:
4315 %4 = icmp sle <4 x i8> %0, %1
4316 %5 = select <4 x i1> %4, <4 x i8> %2, <4 x i8> %3
4317 ret <4 x i8> %5
4318 }
4319 ; CHECK-LABEL: define <16 x i8> @icmp_sle_on_4xi8(<16 x i8>, <16 x i8>, <16 x i8 >, <16 x i8>) {
4320 ; CHECK: entry:
4321 ; CHECK-NEXT: %4 = icmp sle <16 x i8> %0, %1
4322 ; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
4323 ; CHECK-NEXT: ret <16 x i8> %5
4324 ; CHECK-NEXT: }
4325
4326 define <4 x i8> @icmp_ule_on_4xi8(<4 x i8>, <4 x i8>, <4 x i8>, <4 x i8>) {
4327 entry:
4328 %4 = icmp ule <4 x i8> %0, %1
4329 %5 = select <4 x i1> %4, <4 x i8> %2, <4 x i8> %3
4330 ret <4 x i8> %5
4331 }
4332 ; CHECK-LABEL: define <16 x i8> @icmp_ule_on_4xi8(<16 x i8>, <16 x i8>, <16 x i8 >, <16 x i8>) {
4333 ; CHECK: entry:
4334 ; CHECK-NEXT: %4 = icmp ule <16 x i8> %0, %1
4335 ; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
4336 ; CHECK-NEXT: ret <16 x i8> %5
4337 ; CHECK-NEXT: }
4338
4339 define <4 x i16> @icmp_eq_on_4xi16(<4 x i16>, <4 x i16>, <4 x i16>, <4 x i16>) {
4340 entry:
4341 %4 = icmp eq <4 x i16> %0, %1
4342 %5 = select <4 x i1> %4, <4 x i16> %2, <4 x i16> %3
4343 ret <4 x i16> %5
4344 }
4345 ; CHECK-LABEL: define <8 x i16> @icmp_eq_on_4xi16(<8 x i16>, <8 x i16>, <8 x i16 >, <8 x i16>) {
4346 ; CHECK: entry:
4347 ; CHECK-NEXT: %4 = icmp eq <8 x i16> %0, %1
4348 ; CHECK-NEXT: %5 = select <8 x i1> %4, <8 x i16> %2, <8 x i16> %3
4349 ; CHECK-NEXT: ret <8 x i16> %5
4350 ; CHECK-NEXT: }
4351
4352 define <4 x i16> @icmp_ne_on_4xi16(<4 x i16>, <4 x i16>, <4 x i16>, <4 x i16>) {
4353 entry:
4354 %4 = icmp ne <4 x i16> %0, %1
4355 %5 = select <4 x i1> %4, <4 x i16> %2, <4 x i16> %3
4356 ret <4 x i16> %5
4357 }
4358 ; CHECK-LABEL: define <8 x i16> @icmp_ne_on_4xi16(<8 x i16>, <8 x i16>, <8 x i16 >, <8 x i16>) {
4359 ; CHECK: entry:
4360 ; CHECK-NEXT: %4 = icmp ne <8 x i16> %0, %1
4361 ; CHECK-NEXT: %5 = select <8 x i1> %4, <8 x i16> %2, <8 x i16> %3
4362 ; CHECK-NEXT: ret <8 x i16> %5
4363 ; CHECK-NEXT: }
4364
4365 define <4 x i16> @icmp_sgt_on_4xi16(<4 x i16>, <4 x i16>, <4 x i16>, <4 x i16>) {
4366 entry:
4367 %4 = icmp sgt <4 x i16> %0, %1
4368 %5 = select <4 x i1> %4, <4 x i16> %2, <4 x i16> %3
4369 ret <4 x i16> %5
4370 }
4371 ; CHECK-LABEL: define <8 x i16> @icmp_sgt_on_4xi16(<8 x i16>, <8 x i16>, <8 x i1 6>, <8 x i16>) {
4372 ; CHECK: entry:
4373 ; CHECK-NEXT: %4 = icmp sgt <8 x i16> %0, %1
4374 ; CHECK-NEXT: %5 = select <8 x i1> %4, <8 x i16> %2, <8 x i16> %3
4375 ; CHECK-NEXT: ret <8 x i16> %5
4376 ; CHECK-NEXT: }
4377
4378 define <4 x i16> @icmp_ugt_on_4xi16(<4 x i16>, <4 x i16>, <4 x i16>, <4 x i16>) {
4379 entry:
4380 %4 = icmp ugt <4 x i16> %0, %1
4381 %5 = select <4 x i1> %4, <4 x i16> %2, <4 x i16> %3
4382 ret <4 x i16> %5
4383 }
4384 ; CHECK-LABEL: define <8 x i16> @icmp_ugt_on_4xi16(<8 x i16>, <8 x i16>, <8 x i1 6>, <8 x i16>) {
4385 ; CHECK: entry:
4386 ; CHECK-NEXT: %4 = icmp ugt <8 x i16> %0, %1
4387 ; CHECK-NEXT: %5 = select <8 x i1> %4, <8 x i16> %2, <8 x i16> %3
4388 ; CHECK-NEXT: ret <8 x i16> %5
4389 ; CHECK-NEXT: }
4390
4391 define <4 x i16> @icmp_sge_on_4xi16(<4 x i16>, <4 x i16>, <4 x i16>, <4 x i16>) {
4392 entry:
4393 %4 = icmp sge <4 x i16> %0, %1
4394 %5 = select <4 x i1> %4, <4 x i16> %2, <4 x i16> %3
4395 ret <4 x i16> %5
4396 }
4397 ; CHECK-LABEL: define <8 x i16> @icmp_sge_on_4xi16(<8 x i16>, <8 x i16>, <8 x i1 6>, <8 x i16>) {
4398 ; CHECK: entry:
4399 ; CHECK-NEXT: %4 = icmp sge <8 x i16> %0, %1
4400 ; CHECK-NEXT: %5 = select <8 x i1> %4, <8 x i16> %2, <8 x i16> %3
4401 ; CHECK-NEXT: ret <8 x i16> %5
4402 ; CHECK-NEXT: }
4403
4404 define <4 x i16> @icmp_uge_on_4xi16(<4 x i16>, <4 x i16>, <4 x i16>, <4 x i16>) {
4405 entry:
4406 %4 = icmp uge <4 x i16> %0, %1
4407 %5 = select <4 x i1> %4, <4 x i16> %2, <4 x i16> %3
4408 ret <4 x i16> %5
4409 }
4410 ; CHECK-LABEL: define <8 x i16> @icmp_uge_on_4xi16(<8 x i16>, <8 x i16>, <8 x i1 6>, <8 x i16>) {
4411 ; CHECK: entry:
4412 ; CHECK-NEXT: %4 = icmp uge <8 x i16> %0, %1
4413 ; CHECK-NEXT: %5 = select <8 x i1> %4, <8 x i16> %2, <8 x i16> %3
4414 ; CHECK-NEXT: ret <8 x i16> %5
4415 ; CHECK-NEXT: }
4416
4417 define <4 x i16> @icmp_slt_on_4xi16(<4 x i16>, <4 x i16>, <4 x i16>, <4 x i16>) {
4418 entry:
4419 %4 = icmp slt <4 x i16> %0, %1
4420 %5 = select <4 x i1> %4, <4 x i16> %2, <4 x i16> %3
4421 ret <4 x i16> %5
4422 }
4423 ; CHECK-LABEL: define <8 x i16> @icmp_slt_on_4xi16(<8 x i16>, <8 x i16>, <8 x i1 6>, <8 x i16>) {
4424 ; CHECK: entry:
4425 ; CHECK-NEXT: %4 = icmp slt <8 x i16> %0, %1
4426 ; CHECK-NEXT: %5 = select <8 x i1> %4, <8 x i16> %2, <8 x i16> %3
4427 ; CHECK-NEXT: ret <8 x i16> %5
4428 ; CHECK-NEXT: }
4429
4430 define <4 x i16> @icmp_ult_on_4xi16(<4 x i16>, <4 x i16>, <4 x i16>, <4 x i16>) {
4431 entry:
4432 %4 = icmp ult <4 x i16> %0, %1
4433 %5 = select <4 x i1> %4, <4 x i16> %2, <4 x i16> %3
4434 ret <4 x i16> %5
4435 }
4436 ; CHECK-LABEL: define <8 x i16> @icmp_ult_on_4xi16(<8 x i16>, <8 x i16>, <8 x i1 6>, <8 x i16>) {
4437 ; CHECK: entry:
4438 ; CHECK-NEXT: %4 = icmp ult <8 x i16> %0, %1
4439 ; CHECK-NEXT: %5 = select <8 x i1> %4, <8 x i16> %2, <8 x i16> %3
4440 ; CHECK-NEXT: ret <8 x i16> %5
4441 ; CHECK-NEXT: }
4442
4443 define <4 x i16> @icmp_sle_on_4xi16(<4 x i16>, <4 x i16>, <4 x i16>, <4 x i16>) {
4444 entry:
4445 %4 = icmp sle <4 x i16> %0, %1
4446 %5 = select <4 x i1> %4, <4 x i16> %2, <4 x i16> %3
4447 ret <4 x i16> %5
4448 }
4449 ; CHECK-LABEL: define <8 x i16> @icmp_sle_on_4xi16(<8 x i16>, <8 x i16>, <8 x i1 6>, <8 x i16>) {
4450 ; CHECK: entry:
4451 ; CHECK-NEXT: %4 = icmp sle <8 x i16> %0, %1
4452 ; CHECK-NEXT: %5 = select <8 x i1> %4, <8 x i16> %2, <8 x i16> %3
4453 ; CHECK-NEXT: ret <8 x i16> %5
4454 ; CHECK-NEXT: }
4455
4456 define <4 x i16> @icmp_ule_on_4xi16(<4 x i16>, <4 x i16>, <4 x i16>, <4 x i16>) {
4457 entry:
4458 %4 = icmp ule <4 x i16> %0, %1
4459 %5 = select <4 x i1> %4, <4 x i16> %2, <4 x i16> %3
4460 ret <4 x i16> %5
4461 }
4462 ; CHECK-LABEL: define <8 x i16> @icmp_ule_on_4xi16(<8 x i16>, <8 x i16>, <8 x i1 6>, <8 x i16>) {
4463 ; CHECK: entry:
4464 ; CHECK-NEXT: %4 = icmp ule <8 x i16> %0, %1
4465 ; CHECK-NEXT: %5 = select <8 x i1> %4, <8 x i16> %2, <8 x i16> %3
4466 ; CHECK-NEXT: ret <8 x i16> %5
4467 ; CHECK-NEXT: }
4468
4469 define <4 x i32> @icmp_eq_on_4xi32(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
4470 entry:
4471 %4 = icmp eq <4 x i32> %0, %1
4472 %5 = select <4 x i1> %4, <4 x i32> %2, <4 x i32> %3
4473 ret <4 x i32> %5
4474 }
4475 ; CHECK-LABEL: define <4 x i32> @icmp_eq_on_4xi32(<4 x i32>, <4 x i32>, <4 x i32 >, <4 x i32>) {
4476 ; CHECK: entry:
4477 ; CHECK-NEXT: %4 = icmp eq <4 x i32> %0, %1
4478 ; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x i32> %2, <4 x i32> %3
4479 ; CHECK-NEXT: ret <4 x i32> %5
4480 ; CHECK-NEXT: }
4481
4482 define <4 x i32> @icmp_ne_on_4xi32(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
4483 entry:
4484 %4 = icmp ne <4 x i32> %0, %1
4485 %5 = select <4 x i1> %4, <4 x i32> %2, <4 x i32> %3
4486 ret <4 x i32> %5
4487 }
4488 ; CHECK-LABEL: define <4 x i32> @icmp_ne_on_4xi32(<4 x i32>, <4 x i32>, <4 x i32 >, <4 x i32>) {
4489 ; CHECK: entry:
4490 ; CHECK-NEXT: %4 = icmp ne <4 x i32> %0, %1
4491 ; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x i32> %2, <4 x i32> %3
4492 ; CHECK-NEXT: ret <4 x i32> %5
4493 ; CHECK-NEXT: }
4494
4495 define <4 x i32> @icmp_sgt_on_4xi32(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
4496 entry:
4497 %4 = icmp sgt <4 x i32> %0, %1
4498 %5 = select <4 x i1> %4, <4 x i32> %2, <4 x i32> %3
4499 ret <4 x i32> %5
4500 }
4501 ; CHECK-LABEL: define <4 x i32> @icmp_sgt_on_4xi32(<4 x i32>, <4 x i32>, <4 x i3 2>, <4 x i32>) {
4502 ; CHECK: entry:
4503 ; CHECK-NEXT: %4 = icmp sgt <4 x i32> %0, %1
4504 ; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x i32> %2, <4 x i32> %3
4505 ; CHECK-NEXT: ret <4 x i32> %5
4506 ; CHECK-NEXT: }
4507
4508 define <4 x i32> @icmp_ugt_on_4xi32(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
4509 entry:
4510 %4 = icmp ugt <4 x i32> %0, %1
4511 %5 = select <4 x i1> %4, <4 x i32> %2, <4 x i32> %3
4512 ret <4 x i32> %5
4513 }
4514 ; CHECK-LABEL: define <4 x i32> @icmp_ugt_on_4xi32(<4 x i32>, <4 x i32>, <4 x i3 2>, <4 x i32>) {
4515 ; CHECK: entry:
4516 ; CHECK-NEXT: %4 = icmp ugt <4 x i32> %0, %1
4517 ; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x i32> %2, <4 x i32> %3
4518 ; CHECK-NEXT: ret <4 x i32> %5
4519 ; CHECK-NEXT: }
4520
4521 define <4 x i32> @icmp_sge_on_4xi32(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
4522 entry:
4523 %4 = icmp sge <4 x i32> %0, %1
4524 %5 = select <4 x i1> %4, <4 x i32> %2, <4 x i32> %3
4525 ret <4 x i32> %5
4526 }
4527 ; CHECK-LABEL: define <4 x i32> @icmp_sge_on_4xi32(<4 x i32>, <4 x i32>, <4 x i3 2>, <4 x i32>) {
4528 ; CHECK: entry:
4529 ; CHECK-NEXT: %4 = icmp sge <4 x i32> %0, %1
4530 ; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x i32> %2, <4 x i32> %3
4531 ; CHECK-NEXT: ret <4 x i32> %5
4532 ; CHECK-NEXT: }
4533
4534 define <4 x i32> @icmp_uge_on_4xi32(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
4535 entry:
4536 %4 = icmp uge <4 x i32> %0, %1
4537 %5 = select <4 x i1> %4, <4 x i32> %2, <4 x i32> %3
4538 ret <4 x i32> %5
4539 }
4540 ; CHECK-LABEL: define <4 x i32> @icmp_uge_on_4xi32(<4 x i32>, <4 x i32>, <4 x i3 2>, <4 x i32>) {
4541 ; CHECK: entry:
4542 ; CHECK-NEXT: %4 = icmp uge <4 x i32> %0, %1
4543 ; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x i32> %2, <4 x i32> %3
4544 ; CHECK-NEXT: ret <4 x i32> %5
4545 ; CHECK-NEXT: }
4546
4547 define <4 x i32> @icmp_slt_on_4xi32(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
4548 entry:
4549 %4 = icmp slt <4 x i32> %0, %1
4550 %5 = select <4 x i1> %4, <4 x i32> %2, <4 x i32> %3
4551 ret <4 x i32> %5
4552 }
4553 ; CHECK-LABEL: define <4 x i32> @icmp_slt_on_4xi32(<4 x i32>, <4 x i32>, <4 x i3 2>, <4 x i32>) {
4554 ; CHECK: entry:
4555 ; CHECK-NEXT: %4 = icmp slt <4 x i32> %0, %1
4556 ; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x i32> %2, <4 x i32> %3
4557 ; CHECK-NEXT: ret <4 x i32> %5
4558 ; CHECK-NEXT: }
4559
4560 define <4 x i32> @icmp_ult_on_4xi32(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
4561 entry:
4562 %4 = icmp ult <4 x i32> %0, %1
4563 %5 = select <4 x i1> %4, <4 x i32> %2, <4 x i32> %3
4564 ret <4 x i32> %5
4565 }
4566 ; CHECK-LABEL: define <4 x i32> @icmp_ult_on_4xi32(<4 x i32>, <4 x i32>, <4 x i3 2>, <4 x i32>) {
4567 ; CHECK: entry:
4568 ; CHECK-NEXT: %4 = icmp ult <4 x i32> %0, %1
4569 ; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x i32> %2, <4 x i32> %3
4570 ; CHECK-NEXT: ret <4 x i32> %5
4571 ; CHECK-NEXT: }
4572
4573 define <4 x i32> @icmp_sle_on_4xi32(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
4574 entry:
4575 %4 = icmp sle <4 x i32> %0, %1
4576 %5 = select <4 x i1> %4, <4 x i32> %2, <4 x i32> %3
4577 ret <4 x i32> %5
4578 }
4579 ; CHECK-LABEL: define <4 x i32> @icmp_sle_on_4xi32(<4 x i32>, <4 x i32>, <4 x i3 2>, <4 x i32>) {
4580 ; CHECK: entry:
4581 ; CHECK-NEXT: %4 = icmp sle <4 x i32> %0, %1
4582 ; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x i32> %2, <4 x i32> %3
4583 ; CHECK-NEXT: ret <4 x i32> %5
4584 ; CHECK-NEXT: }
4585
4586 define <4 x i32> @icmp_ule_on_4xi32(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
4587 entry:
4588 %4 = icmp ule <4 x i32> %0, %1
4589 %5 = select <4 x i1> %4, <4 x i32> %2, <4 x i32> %3
4590 ret <4 x i32> %5
4591 }
4592 ; CHECK-LABEL: define <4 x i32> @icmp_ule_on_4xi32(<4 x i32>, <4 x i32>, <4 x i3 2>, <4 x i32>) {
4593 ; CHECK: entry:
4594 ; CHECK-NEXT: %4 = icmp ule <4 x i32> %0, %1
4595 ; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x i32> %2, <4 x i32> %3
4596 ; CHECK-NEXT: ret <4 x i32> %5
4597 ; CHECK-NEXT: }
4598
4599 define <4 x i64> @icmp_eq_on_4xi64(<4 x i64>, <4 x i64>, <4 x i64>, <4 x i64>) {
4600 entry:
4601 %4 = icmp eq <4 x i64> %0, %1
4602 %5 = select <4 x i1> %4, <4 x i64> %2, <4 x i64> %3
4603 ret <4 x i64> %5
4604 }
4605 ; CHECK-LABEL: define <2 x i64> @icmp_eq_on_4xi64(<2 x i64>* nocapture nonnull d ereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
4606 ; CHECK: entry:
4607 ; CHECK-NEXT: %9 = icmp eq <2 x i64> %1, %3
4608 ; CHECK-NEXT: %10 = icmp eq <2 x i64> %2, %4
4609 ; CHECK-NEXT: %11 = select <2 x i1> %9, <2 x i64> %5, <2 x i64> %7
4610 ; CHECK-NEXT: %12 = select <2 x i1> %10, <2 x i64> %6, <2 x i64> %8
4611 ; CHECK-NEXT: store <2 x i64> %12, <2 x i64>* %0, align 16
4612 ; CHECK-NEXT: ret <2 x i64> %11
4613 ; CHECK-NEXT: }
4614
4615 define <4 x i64> @icmp_ne_on_4xi64(<4 x i64>, <4 x i64>, <4 x i64>, <4 x i64>) {
4616 entry:
4617 %4 = icmp ne <4 x i64> %0, %1
4618 %5 = select <4 x i1> %4, <4 x i64> %2, <4 x i64> %3
4619 ret <4 x i64> %5
4620 }
4621 ; CHECK-LABEL: define <2 x i64> @icmp_ne_on_4xi64(<2 x i64>* nocapture nonnull d ereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
4622 ; CHECK: entry:
4623 ; CHECK-NEXT: %9 = icmp ne <2 x i64> %1, %3
4624 ; CHECK-NEXT: %10 = icmp ne <2 x i64> %2, %4
4625 ; CHECK-NEXT: %11 = select <2 x i1> %9, <2 x i64> %5, <2 x i64> %7
4626 ; CHECK-NEXT: %12 = select <2 x i1> %10, <2 x i64> %6, <2 x i64> %8
4627 ; CHECK-NEXT: store <2 x i64> %12, <2 x i64>* %0, align 16
4628 ; CHECK-NEXT: ret <2 x i64> %11
4629 ; CHECK-NEXT: }
4630
4631 define <4 x i64> @icmp_sgt_on_4xi64(<4 x i64>, <4 x i64>, <4 x i64>, <4 x i64>) {
4632 entry:
4633 %4 = icmp sgt <4 x i64> %0, %1
4634 %5 = select <4 x i1> %4, <4 x i64> %2, <4 x i64> %3
4635 ret <4 x i64> %5
4636 }
4637 ; CHECK-LABEL: define <2 x i64> @icmp_sgt_on_4xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
4638 ; CHECK: entry:
4639 ; CHECK-NEXT: %9 = icmp sgt <2 x i64> %1, %3
4640 ; CHECK-NEXT: %10 = icmp sgt <2 x i64> %2, %4
4641 ; CHECK-NEXT: %11 = select <2 x i1> %9, <2 x i64> %5, <2 x i64> %7
4642 ; CHECK-NEXT: %12 = select <2 x i1> %10, <2 x i64> %6, <2 x i64> %8
4643 ; CHECK-NEXT: store <2 x i64> %12, <2 x i64>* %0, align 16
4644 ; CHECK-NEXT: ret <2 x i64> %11
4645 ; CHECK-NEXT: }
4646
4647 define <4 x i64> @icmp_ugt_on_4xi64(<4 x i64>, <4 x i64>, <4 x i64>, <4 x i64>) {
4648 entry:
4649 %4 = icmp ugt <4 x i64> %0, %1
4650 %5 = select <4 x i1> %4, <4 x i64> %2, <4 x i64> %3
4651 ret <4 x i64> %5
4652 }
4653 ; CHECK-LABEL: define <2 x i64> @icmp_ugt_on_4xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
4654 ; CHECK: entry:
4655 ; CHECK-NEXT: %9 = icmp ugt <2 x i64> %1, %3
4656 ; CHECK-NEXT: %10 = icmp ugt <2 x i64> %2, %4
4657 ; CHECK-NEXT: %11 = select <2 x i1> %9, <2 x i64> %5, <2 x i64> %7
4658 ; CHECK-NEXT: %12 = select <2 x i1> %10, <2 x i64> %6, <2 x i64> %8
4659 ; CHECK-NEXT: store <2 x i64> %12, <2 x i64>* %0, align 16
4660 ; CHECK-NEXT: ret <2 x i64> %11
4661 ; CHECK-NEXT: }
4662
4663 define <4 x i64> @icmp_sge_on_4xi64(<4 x i64>, <4 x i64>, <4 x i64>, <4 x i64>) {
4664 entry:
4665 %4 = icmp sge <4 x i64> %0, %1
4666 %5 = select <4 x i1> %4, <4 x i64> %2, <4 x i64> %3
4667 ret <4 x i64> %5
4668 }
4669 ; CHECK-LABEL: define <2 x i64> @icmp_sge_on_4xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
4670 ; CHECK: entry:
4671 ; CHECK-NEXT: %9 = icmp sge <2 x i64> %1, %3
4672 ; CHECK-NEXT: %10 = icmp sge <2 x i64> %2, %4
4673 ; CHECK-NEXT: %11 = select <2 x i1> %9, <2 x i64> %5, <2 x i64> %7
4674 ; CHECK-NEXT: %12 = select <2 x i1> %10, <2 x i64> %6, <2 x i64> %8
4675 ; CHECK-NEXT: store <2 x i64> %12, <2 x i64>* %0, align 16
4676 ; CHECK-NEXT: ret <2 x i64> %11
4677 ; CHECK-NEXT: }
4678
4679 define <4 x i64> @icmp_uge_on_4xi64(<4 x i64>, <4 x i64>, <4 x i64>, <4 x i64>) {
4680 entry:
4681 %4 = icmp uge <4 x i64> %0, %1
4682 %5 = select <4 x i1> %4, <4 x i64> %2, <4 x i64> %3
4683 ret <4 x i64> %5
4684 }
4685 ; CHECK-LABEL: define <2 x i64> @icmp_uge_on_4xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
4686 ; CHECK: entry:
4687 ; CHECK-NEXT: %9 = icmp uge <2 x i64> %1, %3
4688 ; CHECK-NEXT: %10 = icmp uge <2 x i64> %2, %4
4689 ; CHECK-NEXT: %11 = select <2 x i1> %9, <2 x i64> %5, <2 x i64> %7
4690 ; CHECK-NEXT: %12 = select <2 x i1> %10, <2 x i64> %6, <2 x i64> %8
4691 ; CHECK-NEXT: store <2 x i64> %12, <2 x i64>* %0, align 16
4692 ; CHECK-NEXT: ret <2 x i64> %11
4693 ; CHECK-NEXT: }
4694
4695 define <4 x i64> @icmp_slt_on_4xi64(<4 x i64>, <4 x i64>, <4 x i64>, <4 x i64>) {
4696 entry:
4697 %4 = icmp slt <4 x i64> %0, %1
4698 %5 = select <4 x i1> %4, <4 x i64> %2, <4 x i64> %3
4699 ret <4 x i64> %5
4700 }
4701 ; CHECK-LABEL: define <2 x i64> @icmp_slt_on_4xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
4702 ; CHECK: entry:
4703 ; CHECK-NEXT: %9 = icmp slt <2 x i64> %1, %3
4704 ; CHECK-NEXT: %10 = icmp slt <2 x i64> %2, %4
4705 ; CHECK-NEXT: %11 = select <2 x i1> %9, <2 x i64> %5, <2 x i64> %7
4706 ; CHECK-NEXT: %12 = select <2 x i1> %10, <2 x i64> %6, <2 x i64> %8
4707 ; CHECK-NEXT: store <2 x i64> %12, <2 x i64>* %0, align 16
4708 ; CHECK-NEXT: ret <2 x i64> %11
4709 ; CHECK-NEXT: }
4710
4711 define <4 x i64> @icmp_ult_on_4xi64(<4 x i64>, <4 x i64>, <4 x i64>, <4 x i64>) {
4712 entry:
4713 %4 = icmp ult <4 x i64> %0, %1
4714 %5 = select <4 x i1> %4, <4 x i64> %2, <4 x i64> %3
4715 ret <4 x i64> %5
4716 }
4717 ; CHECK-LABEL: define <2 x i64> @icmp_ult_on_4xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
4718 ; CHECK: entry:
4719 ; CHECK-NEXT: %9 = icmp ult <2 x i64> %1, %3
4720 ; CHECK-NEXT: %10 = icmp ult <2 x i64> %2, %4
4721 ; CHECK-NEXT: %11 = select <2 x i1> %9, <2 x i64> %5, <2 x i64> %7
4722 ; CHECK-NEXT: %12 = select <2 x i1> %10, <2 x i64> %6, <2 x i64> %8
4723 ; CHECK-NEXT: store <2 x i64> %12, <2 x i64>* %0, align 16
4724 ; CHECK-NEXT: ret <2 x i64> %11
4725 ; CHECK-NEXT: }
4726
4727 define <4 x i64> @icmp_sle_on_4xi64(<4 x i64>, <4 x i64>, <4 x i64>, <4 x i64>) {
4728 entry:
4729 %4 = icmp sle <4 x i64> %0, %1
4730 %5 = select <4 x i1> %4, <4 x i64> %2, <4 x i64> %3
4731 ret <4 x i64> %5
4732 }
4733 ; CHECK-LABEL: define <2 x i64> @icmp_sle_on_4xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
4734 ; CHECK: entry:
4735 ; CHECK-NEXT: %9 = icmp sle <2 x i64> %1, %3
4736 ; CHECK-NEXT: %10 = icmp sle <2 x i64> %2, %4
4737 ; CHECK-NEXT: %11 = select <2 x i1> %9, <2 x i64> %5, <2 x i64> %7
4738 ; CHECK-NEXT: %12 = select <2 x i1> %10, <2 x i64> %6, <2 x i64> %8
4739 ; CHECK-NEXT: store <2 x i64> %12, <2 x i64>* %0, align 16
4740 ; CHECK-NEXT: ret <2 x i64> %11
4741 ; CHECK-NEXT: }
4742
4743 define <4 x i64> @icmp_ule_on_4xi64(<4 x i64>, <4 x i64>, <4 x i64>, <4 x i64>) {
4744 entry:
4745 %4 = icmp ule <4 x i64> %0, %1
4746 %5 = select <4 x i1> %4, <4 x i64> %2, <4 x i64> %3
4747 ret <4 x i64> %5
4748 }
4749 ; CHECK-LABEL: define <2 x i64> @icmp_ule_on_4xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
4750 ; CHECK: entry:
4751 ; CHECK-NEXT: %9 = icmp ule <2 x i64> %1, %3
4752 ; CHECK-NEXT: %10 = icmp ule <2 x i64> %2, %4
4753 ; CHECK-NEXT: %11 = select <2 x i1> %9, <2 x i64> %5, <2 x i64> %7
4754 ; CHECK-NEXT: %12 = select <2 x i1> %10, <2 x i64> %6, <2 x i64> %8
4755 ; CHECK-NEXT: store <2 x i64> %12, <2 x i64>* %0, align 16
4756 ; CHECK-NEXT: ret <2 x i64> %11
4757 ; CHECK-NEXT: }
4758
4759 define <4 x i8*> @icmp_eq_on_4xi8ptr(<4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
4760 entry:
4761 %4 = icmp eq <4 x i8*> %0, %1
4762 %5 = select <4 x i1> %4, <4 x i8*> %2, <4 x i8*> %3
4763 ret <4 x i8*> %5
4764 }
4765 ; CHECK-LABEL: define <4 x i8*> @icmp_eq_on_4xi8ptr(<4 x i8*>, <4 x i8*>, <4 x i 8*>, <4 x i8*>) {
4766 ; CHECK: entry:
4767 ; CHECK-NEXT: %4 = icmp eq <4 x i8*> %0, %1
4768 ; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x i8*> %2, <4 x i8*> %3
4769 ; CHECK-NEXT: ret <4 x i8*> %5
4770 ; CHECK-NEXT: }
4771
4772 define <4 x i8*> @icmp_ne_on_4xi8ptr(<4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
4773 entry:
4774 %4 = icmp ne <4 x i8*> %0, %1
4775 %5 = select <4 x i1> %4, <4 x i8*> %2, <4 x i8*> %3
4776 ret <4 x i8*> %5
4777 }
4778 ; CHECK-LABEL: define <4 x i8*> @icmp_ne_on_4xi8ptr(<4 x i8*>, <4 x i8*>, <4 x i 8*>, <4 x i8*>) {
4779 ; CHECK: entry:
4780 ; CHECK-NEXT: %4 = icmp ne <4 x i8*> %0, %1
4781 ; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x i8*> %2, <4 x i8*> %3
4782 ; CHECK-NEXT: ret <4 x i8*> %5
4783 ; CHECK-NEXT: }
4784
4785 define <4 x i8*> @icmp_sgt_on_4xi8ptr(<4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*> ) {
4786 entry:
4787 %4 = icmp sgt <4 x i8*> %0, %1
4788 %5 = select <4 x i1> %4, <4 x i8*> %2, <4 x i8*> %3
4789 ret <4 x i8*> %5
4790 }
4791 ; CHECK-LABEL: define <4 x i8*> @icmp_sgt_on_4xi8ptr(<4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
4792 ; CHECK: entry:
4793 ; CHECK-NEXT: %4 = icmp sgt <4 x i8*> %0, %1
4794 ; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x i8*> %2, <4 x i8*> %3
4795 ; CHECK-NEXT: ret <4 x i8*> %5
4796 ; CHECK-NEXT: }
4797
4798 define <4 x i8*> @icmp_ugt_on_4xi8ptr(<4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*> ) {
4799 entry:
4800 %4 = icmp ugt <4 x i8*> %0, %1
4801 %5 = select <4 x i1> %4, <4 x i8*> %2, <4 x i8*> %3
4802 ret <4 x i8*> %5
4803 }
4804 ; CHECK-LABEL: define <4 x i8*> @icmp_ugt_on_4xi8ptr(<4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
4805 ; CHECK: entry:
4806 ; CHECK-NEXT: %4 = icmp ugt <4 x i8*> %0, %1
4807 ; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x i8*> %2, <4 x i8*> %3
4808 ; CHECK-NEXT: ret <4 x i8*> %5
4809 ; CHECK-NEXT: }
4810
4811 define <4 x i8*> @icmp_sge_on_4xi8ptr(<4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*> ) {
4812 entry:
4813 %4 = icmp sge <4 x i8*> %0, %1
4814 %5 = select <4 x i1> %4, <4 x i8*> %2, <4 x i8*> %3
4815 ret <4 x i8*> %5
4816 }
4817 ; CHECK-LABEL: define <4 x i8*> @icmp_sge_on_4xi8ptr(<4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
4818 ; CHECK: entry:
4819 ; CHECK-NEXT: %4 = icmp sge <4 x i8*> %0, %1
4820 ; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x i8*> %2, <4 x i8*> %3
4821 ; CHECK-NEXT: ret <4 x i8*> %5
4822 ; CHECK-NEXT: }
4823
4824 define <4 x i8*> @icmp_uge_on_4xi8ptr(<4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*> ) {
4825 entry:
4826 %4 = icmp uge <4 x i8*> %0, %1
4827 %5 = select <4 x i1> %4, <4 x i8*> %2, <4 x i8*> %3
4828 ret <4 x i8*> %5
4829 }
4830 ; CHECK-LABEL: define <4 x i8*> @icmp_uge_on_4xi8ptr(<4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
4831 ; CHECK: entry:
4832 ; CHECK-NEXT: %4 = icmp uge <4 x i8*> %0, %1
4833 ; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x i8*> %2, <4 x i8*> %3
4834 ; CHECK-NEXT: ret <4 x i8*> %5
4835 ; CHECK-NEXT: }
4836
4837 define <4 x i8*> @icmp_slt_on_4xi8ptr(<4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*> ) {
4838 entry:
4839 %4 = icmp slt <4 x i8*> %0, %1
4840 %5 = select <4 x i1> %4, <4 x i8*> %2, <4 x i8*> %3
4841 ret <4 x i8*> %5
4842 }
4843 ; CHECK-LABEL: define <4 x i8*> @icmp_slt_on_4xi8ptr(<4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
4844 ; CHECK: entry:
4845 ; CHECK-NEXT: %4 = icmp slt <4 x i8*> %0, %1
4846 ; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x i8*> %2, <4 x i8*> %3
4847 ; CHECK-NEXT: ret <4 x i8*> %5
4848 ; CHECK-NEXT: }
4849
4850 define <4 x i8*> @icmp_ult_on_4xi8ptr(<4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*> ) {
4851 entry:
4852 %4 = icmp ult <4 x i8*> %0, %1
4853 %5 = select <4 x i1> %4, <4 x i8*> %2, <4 x i8*> %3
4854 ret <4 x i8*> %5
4855 }
4856 ; CHECK-LABEL: define <4 x i8*> @icmp_ult_on_4xi8ptr(<4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
4857 ; CHECK: entry:
4858 ; CHECK-NEXT: %4 = icmp ult <4 x i8*> %0, %1
4859 ; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x i8*> %2, <4 x i8*> %3
4860 ; CHECK-NEXT: ret <4 x i8*> %5
4861 ; CHECK-NEXT: }
4862
4863 define <4 x i8*> @icmp_sle_on_4xi8ptr(<4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*> ) {
4864 entry:
4865 %4 = icmp sle <4 x i8*> %0, %1
4866 %5 = select <4 x i1> %4, <4 x i8*> %2, <4 x i8*> %3
4867 ret <4 x i8*> %5
4868 }
4869 ; CHECK-LABEL: define <4 x i8*> @icmp_sle_on_4xi8ptr(<4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
4870 ; CHECK: entry:
4871 ; CHECK-NEXT: %4 = icmp sle <4 x i8*> %0, %1
4872 ; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x i8*> %2, <4 x i8*> %3
4873 ; CHECK-NEXT: ret <4 x i8*> %5
4874 ; CHECK-NEXT: }
4875
4876 define <4 x i8*> @icmp_ule_on_4xi8ptr(<4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*> ) {
4877 entry:
4878 %4 = icmp ule <4 x i8*> %0, %1
4879 %5 = select <4 x i1> %4, <4 x i8*> %2, <4 x i8*> %3
4880 ret <4 x i8*> %5
4881 }
4882 ; CHECK-LABEL: define <4 x i8*> @icmp_ule_on_4xi8ptr(<4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
4883 ; CHECK: entry:
4884 ; CHECK-NEXT: %4 = icmp ule <4 x i8*> %0, %1
4885 ; CHECK-NEXT: %5 = select <4 x i1> %4, <4 x i8*> %2, <4 x i8*> %3
4886 ; CHECK-NEXT: ret <4 x i8*> %5
4887 ; CHECK-NEXT: }
4888
4889 define <6 x i8> @icmp_eq_on_6xi8(<6 x i8>, <6 x i8>, <6 x i8>, <6 x i8>) {
4890 entry:
4891 %4 = icmp eq <6 x i8> %0, %1
4892 %5 = select <6 x i1> %4, <6 x i8> %2, <6 x i8> %3
4893 ret <6 x i8> %5
4894 }
4895 ; CHECK-LABEL: define <16 x i8> @icmp_eq_on_6xi8(<16 x i8>, <16 x i8>, <16 x i8> , <16 x i8>) {
4896 ; CHECK: entry:
4897 ; CHECK-NEXT: %4 = icmp eq <16 x i8> %0, %1
4898 ; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
4899 ; CHECK-NEXT: ret <16 x i8> %5
4900 ; CHECK-NEXT: }
4901
4902 define <6 x i8> @icmp_ne_on_6xi8(<6 x i8>, <6 x i8>, <6 x i8>, <6 x i8>) {
4903 entry:
4904 %4 = icmp ne <6 x i8> %0, %1
4905 %5 = select <6 x i1> %4, <6 x i8> %2, <6 x i8> %3
4906 ret <6 x i8> %5
4907 }
4908 ; CHECK-LABEL: define <16 x i8> @icmp_ne_on_6xi8(<16 x i8>, <16 x i8>, <16 x i8> , <16 x i8>) {
4909 ; CHECK: entry:
4910 ; CHECK-NEXT: %4 = icmp ne <16 x i8> %0, %1
4911 ; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
4912 ; CHECK-NEXT: ret <16 x i8> %5
4913 ; CHECK-NEXT: }
4914
4915 define <6 x i8> @icmp_sgt_on_6xi8(<6 x i8>, <6 x i8>, <6 x i8>, <6 x i8>) {
4916 entry:
4917 %4 = icmp sgt <6 x i8> %0, %1
4918 %5 = select <6 x i1> %4, <6 x i8> %2, <6 x i8> %3
4919 ret <6 x i8> %5
4920 }
4921 ; CHECK-LABEL: define <16 x i8> @icmp_sgt_on_6xi8(<16 x i8>, <16 x i8>, <16 x i8 >, <16 x i8>) {
4922 ; CHECK: entry:
4923 ; CHECK-NEXT: %4 = icmp sgt <16 x i8> %0, %1
4924 ; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
4925 ; CHECK-NEXT: ret <16 x i8> %5
4926 ; CHECK-NEXT: }
4927
4928 define <6 x i8> @icmp_ugt_on_6xi8(<6 x i8>, <6 x i8>, <6 x i8>, <6 x i8>) {
4929 entry:
4930 %4 = icmp ugt <6 x i8> %0, %1
4931 %5 = select <6 x i1> %4, <6 x i8> %2, <6 x i8> %3
4932 ret <6 x i8> %5
4933 }
4934 ; CHECK-LABEL: define <16 x i8> @icmp_ugt_on_6xi8(<16 x i8>, <16 x i8>, <16 x i8 >, <16 x i8>) {
4935 ; CHECK: entry:
4936 ; CHECK-NEXT: %4 = icmp ugt <16 x i8> %0, %1
4937 ; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
4938 ; CHECK-NEXT: ret <16 x i8> %5
4939 ; CHECK-NEXT: }
4940
4941 define <6 x i8> @icmp_sge_on_6xi8(<6 x i8>, <6 x i8>, <6 x i8>, <6 x i8>) {
4942 entry:
4943 %4 = icmp sge <6 x i8> %0, %1
4944 %5 = select <6 x i1> %4, <6 x i8> %2, <6 x i8> %3
4945 ret <6 x i8> %5
4946 }
4947 ; CHECK-LABEL: define <16 x i8> @icmp_sge_on_6xi8(<16 x i8>, <16 x i8>, <16 x i8 >, <16 x i8>) {
4948 ; CHECK: entry:
4949 ; CHECK-NEXT: %4 = icmp sge <16 x i8> %0, %1
4950 ; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
4951 ; CHECK-NEXT: ret <16 x i8> %5
4952 ; CHECK-NEXT: }
4953
4954 define <6 x i8> @icmp_uge_on_6xi8(<6 x i8>, <6 x i8>, <6 x i8>, <6 x i8>) {
4955 entry:
4956 %4 = icmp uge <6 x i8> %0, %1
4957 %5 = select <6 x i1> %4, <6 x i8> %2, <6 x i8> %3
4958 ret <6 x i8> %5
4959 }
4960 ; CHECK-LABEL: define <16 x i8> @icmp_uge_on_6xi8(<16 x i8>, <16 x i8>, <16 x i8 >, <16 x i8>) {
4961 ; CHECK: entry:
4962 ; CHECK-NEXT: %4 = icmp uge <16 x i8> %0, %1
4963 ; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
4964 ; CHECK-NEXT: ret <16 x i8> %5
4965 ; CHECK-NEXT: }
4966
4967 define <6 x i8> @icmp_slt_on_6xi8(<6 x i8>, <6 x i8>, <6 x i8>, <6 x i8>) {
4968 entry:
4969 %4 = icmp slt <6 x i8> %0, %1
4970 %5 = select <6 x i1> %4, <6 x i8> %2, <6 x i8> %3
4971 ret <6 x i8> %5
4972 }
4973 ; CHECK-LABEL: define <16 x i8> @icmp_slt_on_6xi8(<16 x i8>, <16 x i8>, <16 x i8 >, <16 x i8>) {
4974 ; CHECK: entry:
4975 ; CHECK-NEXT: %4 = icmp slt <16 x i8> %0, %1
4976 ; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
4977 ; CHECK-NEXT: ret <16 x i8> %5
4978 ; CHECK-NEXT: }
4979
4980 define <6 x i8> @icmp_ult_on_6xi8(<6 x i8>, <6 x i8>, <6 x i8>, <6 x i8>) {
4981 entry:
4982 %4 = icmp ult <6 x i8> %0, %1
4983 %5 = select <6 x i1> %4, <6 x i8> %2, <6 x i8> %3
4984 ret <6 x i8> %5
4985 }
4986 ; CHECK-LABEL: define <16 x i8> @icmp_ult_on_6xi8(<16 x i8>, <16 x i8>, <16 x i8 >, <16 x i8>) {
4987 ; CHECK: entry:
4988 ; CHECK-NEXT: %4 = icmp ult <16 x i8> %0, %1
4989 ; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
4990 ; CHECK-NEXT: ret <16 x i8> %5
4991 ; CHECK-NEXT: }
4992
4993 define <6 x i8> @icmp_sle_on_6xi8(<6 x i8>, <6 x i8>, <6 x i8>, <6 x i8>) {
4994 entry:
4995 %4 = icmp sle <6 x i8> %0, %1
4996 %5 = select <6 x i1> %4, <6 x i8> %2, <6 x i8> %3
4997 ret <6 x i8> %5
4998 }
4999 ; CHECK-LABEL: define <16 x i8> @icmp_sle_on_6xi8(<16 x i8>, <16 x i8>, <16 x i8 >, <16 x i8>) {
5000 ; CHECK: entry:
5001 ; CHECK-NEXT: %4 = icmp sle <16 x i8> %0, %1
5002 ; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
5003 ; CHECK-NEXT: ret <16 x i8> %5
5004 ; CHECK-NEXT: }
5005
5006 define <6 x i8> @icmp_ule_on_6xi8(<6 x i8>, <6 x i8>, <6 x i8>, <6 x i8>) {
5007 entry:
5008 %4 = icmp ule <6 x i8> %0, %1
5009 %5 = select <6 x i1> %4, <6 x i8> %2, <6 x i8> %3
5010 ret <6 x i8> %5
5011 }
5012 ; CHECK-LABEL: define <16 x i8> @icmp_ule_on_6xi8(<16 x i8>, <16 x i8>, <16 x i8 >, <16 x i8>) {
5013 ; CHECK: entry:
5014 ; CHECK-NEXT: %4 = icmp ule <16 x i8> %0, %1
5015 ; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
5016 ; CHECK-NEXT: ret <16 x i8> %5
5017 ; CHECK-NEXT: }
5018
5019 define <6 x i16> @icmp_eq_on_6xi16(<6 x i16>, <6 x i16>, <6 x i16>, <6 x i16>) {
5020 entry:
5021 %4 = icmp eq <6 x i16> %0, %1
5022 %5 = select <6 x i1> %4, <6 x i16> %2, <6 x i16> %3
5023 ret <6 x i16> %5
5024 }
5025 ; CHECK-LABEL: define <8 x i16> @icmp_eq_on_6xi16(<8 x i16>, <8 x i16>, <8 x i16 >, <8 x i16>) {
5026 ; CHECK: entry:
5027 ; CHECK-NEXT: %4 = icmp eq <8 x i16> %0, %1
5028 ; CHECK-NEXT: %5 = select <8 x i1> %4, <8 x i16> %2, <8 x i16> %3
5029 ; CHECK-NEXT: ret <8 x i16> %5
5030 ; CHECK-NEXT: }
5031
5032 define <6 x i16> @icmp_ne_on_6xi16(<6 x i16>, <6 x i16>, <6 x i16>, <6 x i16>) {
5033 entry:
5034 %4 = icmp ne <6 x i16> %0, %1
5035 %5 = select <6 x i1> %4, <6 x i16> %2, <6 x i16> %3
5036 ret <6 x i16> %5
5037 }
5038 ; CHECK-LABEL: define <8 x i16> @icmp_ne_on_6xi16(<8 x i16>, <8 x i16>, <8 x i16 >, <8 x i16>) {
5039 ; CHECK: entry:
5040 ; CHECK-NEXT: %4 = icmp ne <8 x i16> %0, %1
5041 ; CHECK-NEXT: %5 = select <8 x i1> %4, <8 x i16> %2, <8 x i16> %3
5042 ; CHECK-NEXT: ret <8 x i16> %5
5043 ; CHECK-NEXT: }
5044
5045 define <6 x i16> @icmp_sgt_on_6xi16(<6 x i16>, <6 x i16>, <6 x i16>, <6 x i16>) {
5046 entry:
5047 %4 = icmp sgt <6 x i16> %0, %1
5048 %5 = select <6 x i1> %4, <6 x i16> %2, <6 x i16> %3
5049 ret <6 x i16> %5
5050 }
5051 ; CHECK-LABEL: define <8 x i16> @icmp_sgt_on_6xi16(<8 x i16>, <8 x i16>, <8 x i1 6>, <8 x i16>) {
5052 ; CHECK: entry:
5053 ; CHECK-NEXT: %4 = icmp sgt <8 x i16> %0, %1
5054 ; CHECK-NEXT: %5 = select <8 x i1> %4, <8 x i16> %2, <8 x i16> %3
5055 ; CHECK-NEXT: ret <8 x i16> %5
5056 ; CHECK-NEXT: }
5057
5058 define <6 x i16> @icmp_ugt_on_6xi16(<6 x i16>, <6 x i16>, <6 x i16>, <6 x i16>) {
5059 entry:
5060 %4 = icmp ugt <6 x i16> %0, %1
5061 %5 = select <6 x i1> %4, <6 x i16> %2, <6 x i16> %3
5062 ret <6 x i16> %5
5063 }
5064 ; CHECK-LABEL: define <8 x i16> @icmp_ugt_on_6xi16(<8 x i16>, <8 x i16>, <8 x i1 6>, <8 x i16>) {
5065 ; CHECK: entry:
5066 ; CHECK-NEXT: %4 = icmp ugt <8 x i16> %0, %1
5067 ; CHECK-NEXT: %5 = select <8 x i1> %4, <8 x i16> %2, <8 x i16> %3
5068 ; CHECK-NEXT: ret <8 x i16> %5
5069 ; CHECK-NEXT: }
5070
5071 define <6 x i16> @icmp_sge_on_6xi16(<6 x i16>, <6 x i16>, <6 x i16>, <6 x i16>) {
5072 entry:
5073 %4 = icmp sge <6 x i16> %0, %1
5074 %5 = select <6 x i1> %4, <6 x i16> %2, <6 x i16> %3
5075 ret <6 x i16> %5
5076 }
5077 ; CHECK-LABEL: define <8 x i16> @icmp_sge_on_6xi16(<8 x i16>, <8 x i16>, <8 x i1 6>, <8 x i16>) {
5078 ; CHECK: entry:
5079 ; CHECK-NEXT: %4 = icmp sge <8 x i16> %0, %1
5080 ; CHECK-NEXT: %5 = select <8 x i1> %4, <8 x i16> %2, <8 x i16> %3
5081 ; CHECK-NEXT: ret <8 x i16> %5
5082 ; CHECK-NEXT: }
5083
5084 define <6 x i16> @icmp_uge_on_6xi16(<6 x i16>, <6 x i16>, <6 x i16>, <6 x i16>) {
5085 entry:
5086 %4 = icmp uge <6 x i16> %0, %1
5087 %5 = select <6 x i1> %4, <6 x i16> %2, <6 x i16> %3
5088 ret <6 x i16> %5
5089 }
5090 ; CHECK-LABEL: define <8 x i16> @icmp_uge_on_6xi16(<8 x i16>, <8 x i16>, <8 x i1 6>, <8 x i16>) {
5091 ; CHECK: entry:
5092 ; CHECK-NEXT: %4 = icmp uge <8 x i16> %0, %1
5093 ; CHECK-NEXT: %5 = select <8 x i1> %4, <8 x i16> %2, <8 x i16> %3
5094 ; CHECK-NEXT: ret <8 x i16> %5
5095 ; CHECK-NEXT: }
5096
5097 define <6 x i16> @icmp_slt_on_6xi16(<6 x i16>, <6 x i16>, <6 x i16>, <6 x i16>) {
5098 entry:
5099 %4 = icmp slt <6 x i16> %0, %1
5100 %5 = select <6 x i1> %4, <6 x i16> %2, <6 x i16> %3
5101 ret <6 x i16> %5
5102 }
5103 ; CHECK-LABEL: define <8 x i16> @icmp_slt_on_6xi16(<8 x i16>, <8 x i16>, <8 x i1 6>, <8 x i16>) {
5104 ; CHECK: entry:
5105 ; CHECK-NEXT: %4 = icmp slt <8 x i16> %0, %1
5106 ; CHECK-NEXT: %5 = select <8 x i1> %4, <8 x i16> %2, <8 x i16> %3
5107 ; CHECK-NEXT: ret <8 x i16> %5
5108 ; CHECK-NEXT: }
5109
5110 define <6 x i16> @icmp_ult_on_6xi16(<6 x i16>, <6 x i16>, <6 x i16>, <6 x i16>) {
5111 entry:
5112 %4 = icmp ult <6 x i16> %0, %1
5113 %5 = select <6 x i1> %4, <6 x i16> %2, <6 x i16> %3
5114 ret <6 x i16> %5
5115 }
5116 ; CHECK-LABEL: define <8 x i16> @icmp_ult_on_6xi16(<8 x i16>, <8 x i16>, <8 x i1 6>, <8 x i16>) {
5117 ; CHECK: entry:
5118 ; CHECK-NEXT: %4 = icmp ult <8 x i16> %0, %1
5119 ; CHECK-NEXT: %5 = select <8 x i1> %4, <8 x i16> %2, <8 x i16> %3
5120 ; CHECK-NEXT: ret <8 x i16> %5
5121 ; CHECK-NEXT: }
5122
5123 define <6 x i16> @icmp_sle_on_6xi16(<6 x i16>, <6 x i16>, <6 x i16>, <6 x i16>) {
5124 entry:
5125 %4 = icmp sle <6 x i16> %0, %1
5126 %5 = select <6 x i1> %4, <6 x i16> %2, <6 x i16> %3
5127 ret <6 x i16> %5
5128 }
5129 ; CHECK-LABEL: define <8 x i16> @icmp_sle_on_6xi16(<8 x i16>, <8 x i16>, <8 x i1 6>, <8 x i16>) {
5130 ; CHECK: entry:
5131 ; CHECK-NEXT: %4 = icmp sle <8 x i16> %0, %1
5132 ; CHECK-NEXT: %5 = select <8 x i1> %4, <8 x i16> %2, <8 x i16> %3
5133 ; CHECK-NEXT: ret <8 x i16> %5
5134 ; CHECK-NEXT: }
5135
5136 define <6 x i16> @icmp_ule_on_6xi16(<6 x i16>, <6 x i16>, <6 x i16>, <6 x i16>) {
5137 entry:
5138 %4 = icmp ule <6 x i16> %0, %1
5139 %5 = select <6 x i1> %4, <6 x i16> %2, <6 x i16> %3
5140 ret <6 x i16> %5
5141 }
5142 ; CHECK-LABEL: define <8 x i16> @icmp_ule_on_6xi16(<8 x i16>, <8 x i16>, <8 x i1 6>, <8 x i16>) {
5143 ; CHECK: entry:
5144 ; CHECK-NEXT: %4 = icmp ule <8 x i16> %0, %1
5145 ; CHECK-NEXT: %5 = select <8 x i1> %4, <8 x i16> %2, <8 x i16> %3
5146 ; CHECK-NEXT: ret <8 x i16> %5
5147 ; CHECK-NEXT: }
5148
5149 define <6 x i32> @icmp_eq_on_6xi32(<6 x i32>, <6 x i32>, <6 x i32>, <6 x i32>) {
5150 entry:
5151 %4 = icmp eq <6 x i32> %0, %1
5152 %5 = select <6 x i1> %4, <6 x i32> %2, <6 x i32> %3
5153 ret <6 x i32> %5
5154 }
5155 ; CHECK-LABEL: define <4 x i32> @icmp_eq_on_6xi32(<4 x i32>* nocapture nonnull d ereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
5156 ; CHECK: entry:
5157 ; CHECK-NEXT: %9 = icmp eq <4 x i32> %1, %3
5158 ; CHECK-NEXT: %10 = icmp eq <4 x i32> %2, %4
5159 ; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x i32> %5, <4 x i32> %7
5160 ; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x i32> %6, <4 x i32> %8
5161 ; CHECK-NEXT: store <4 x i32> %12, <4 x i32>* %0, align 16
5162 ; CHECK-NEXT: ret <4 x i32> %11
5163 ; CHECK-NEXT: }
5164
5165 define <6 x i32> @icmp_ne_on_6xi32(<6 x i32>, <6 x i32>, <6 x i32>, <6 x i32>) {
5166 entry:
5167 %4 = icmp ne <6 x i32> %0, %1
5168 %5 = select <6 x i1> %4, <6 x i32> %2, <6 x i32> %3
5169 ret <6 x i32> %5
5170 }
5171 ; CHECK-LABEL: define <4 x i32> @icmp_ne_on_6xi32(<4 x i32>* nocapture nonnull d ereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
5172 ; CHECK: entry:
5173 ; CHECK-NEXT: %9 = icmp ne <4 x i32> %1, %3
5174 ; CHECK-NEXT: %10 = icmp ne <4 x i32> %2, %4
5175 ; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x i32> %5, <4 x i32> %7
5176 ; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x i32> %6, <4 x i32> %8
5177 ; CHECK-NEXT: store <4 x i32> %12, <4 x i32>* %0, align 16
5178 ; CHECK-NEXT: ret <4 x i32> %11
5179 ; CHECK-NEXT: }
5180
5181 define <6 x i32> @icmp_sgt_on_6xi32(<6 x i32>, <6 x i32>, <6 x i32>, <6 x i32>) {
5182 entry:
5183 %4 = icmp sgt <6 x i32> %0, %1
5184 %5 = select <6 x i1> %4, <6 x i32> %2, <6 x i32> %3
5185 ret <6 x i32> %5
5186 }
5187 ; CHECK-LABEL: define <4 x i32> @icmp_sgt_on_6xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
5188 ; CHECK: entry:
5189 ; CHECK-NEXT: %9 = icmp sgt <4 x i32> %1, %3
5190 ; CHECK-NEXT: %10 = icmp sgt <4 x i32> %2, %4
5191 ; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x i32> %5, <4 x i32> %7
5192 ; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x i32> %6, <4 x i32> %8
5193 ; CHECK-NEXT: store <4 x i32> %12, <4 x i32>* %0, align 16
5194 ; CHECK-NEXT: ret <4 x i32> %11
5195 ; CHECK-NEXT: }
5196
5197 define <6 x i32> @icmp_ugt_on_6xi32(<6 x i32>, <6 x i32>, <6 x i32>, <6 x i32>) {
5198 entry:
5199 %4 = icmp ugt <6 x i32> %0, %1
5200 %5 = select <6 x i1> %4, <6 x i32> %2, <6 x i32> %3
5201 ret <6 x i32> %5
5202 }
5203 ; CHECK-LABEL: define <4 x i32> @icmp_ugt_on_6xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
5204 ; CHECK: entry:
5205 ; CHECK-NEXT: %9 = icmp ugt <4 x i32> %1, %3
5206 ; CHECK-NEXT: %10 = icmp ugt <4 x i32> %2, %4
5207 ; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x i32> %5, <4 x i32> %7
5208 ; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x i32> %6, <4 x i32> %8
5209 ; CHECK-NEXT: store <4 x i32> %12, <4 x i32>* %0, align 16
5210 ; CHECK-NEXT: ret <4 x i32> %11
5211 ; CHECK-NEXT: }
5212
5213 define <6 x i32> @icmp_sge_on_6xi32(<6 x i32>, <6 x i32>, <6 x i32>, <6 x i32>) {
5214 entry:
5215 %4 = icmp sge <6 x i32> %0, %1
5216 %5 = select <6 x i1> %4, <6 x i32> %2, <6 x i32> %3
5217 ret <6 x i32> %5
5218 }
5219 ; CHECK-LABEL: define <4 x i32> @icmp_sge_on_6xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
5220 ; CHECK: entry:
5221 ; CHECK-NEXT: %9 = icmp sge <4 x i32> %1, %3
5222 ; CHECK-NEXT: %10 = icmp sge <4 x i32> %2, %4
5223 ; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x i32> %5, <4 x i32> %7
5224 ; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x i32> %6, <4 x i32> %8
5225 ; CHECK-NEXT: store <4 x i32> %12, <4 x i32>* %0, align 16
5226 ; CHECK-NEXT: ret <4 x i32> %11
5227 ; CHECK-NEXT: }
5228
5229 define <6 x i32> @icmp_uge_on_6xi32(<6 x i32>, <6 x i32>, <6 x i32>, <6 x i32>) {
5230 entry:
5231 %4 = icmp uge <6 x i32> %0, %1
5232 %5 = select <6 x i1> %4, <6 x i32> %2, <6 x i32> %3
5233 ret <6 x i32> %5
5234 }
5235 ; CHECK-LABEL: define <4 x i32> @icmp_uge_on_6xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
5236 ; CHECK: entry:
5237 ; CHECK-NEXT: %9 = icmp uge <4 x i32> %1, %3
5238 ; CHECK-NEXT: %10 = icmp uge <4 x i32> %2, %4
5239 ; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x i32> %5, <4 x i32> %7
5240 ; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x i32> %6, <4 x i32> %8
5241 ; CHECK-NEXT: store <4 x i32> %12, <4 x i32>* %0, align 16
5242 ; CHECK-NEXT: ret <4 x i32> %11
5243 ; CHECK-NEXT: }
5244
5245 define <6 x i32> @icmp_slt_on_6xi32(<6 x i32>, <6 x i32>, <6 x i32>, <6 x i32>) {
5246 entry:
5247 %4 = icmp slt <6 x i32> %0, %1
5248 %5 = select <6 x i1> %4, <6 x i32> %2, <6 x i32> %3
5249 ret <6 x i32> %5
5250 }
5251 ; CHECK-LABEL: define <4 x i32> @icmp_slt_on_6xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
5252 ; CHECK: entry:
5253 ; CHECK-NEXT: %9 = icmp slt <4 x i32> %1, %3
5254 ; CHECK-NEXT: %10 = icmp slt <4 x i32> %2, %4
5255 ; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x i32> %5, <4 x i32> %7
5256 ; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x i32> %6, <4 x i32> %8
5257 ; CHECK-NEXT: store <4 x i32> %12, <4 x i32>* %0, align 16
5258 ; CHECK-NEXT: ret <4 x i32> %11
5259 ; CHECK-NEXT: }
5260
5261 define <6 x i32> @icmp_ult_on_6xi32(<6 x i32>, <6 x i32>, <6 x i32>, <6 x i32>) {
5262 entry:
5263 %4 = icmp ult <6 x i32> %0, %1
5264 %5 = select <6 x i1> %4, <6 x i32> %2, <6 x i32> %3
5265 ret <6 x i32> %5
5266 }
5267 ; CHECK-LABEL: define <4 x i32> @icmp_ult_on_6xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
5268 ; CHECK: entry:
5269 ; CHECK-NEXT: %9 = icmp ult <4 x i32> %1, %3
5270 ; CHECK-NEXT: %10 = icmp ult <4 x i32> %2, %4
5271 ; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x i32> %5, <4 x i32> %7
5272 ; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x i32> %6, <4 x i32> %8
5273 ; CHECK-NEXT: store <4 x i32> %12, <4 x i32>* %0, align 16
5274 ; CHECK-NEXT: ret <4 x i32> %11
5275 ; CHECK-NEXT: }
5276
5277 define <6 x i32> @icmp_sle_on_6xi32(<6 x i32>, <6 x i32>, <6 x i32>, <6 x i32>) {
5278 entry:
5279 %4 = icmp sle <6 x i32> %0, %1
5280 %5 = select <6 x i1> %4, <6 x i32> %2, <6 x i32> %3
5281 ret <6 x i32> %5
5282 }
5283 ; CHECK-LABEL: define <4 x i32> @icmp_sle_on_6xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
5284 ; CHECK: entry:
5285 ; CHECK-NEXT: %9 = icmp sle <4 x i32> %1, %3
5286 ; CHECK-NEXT: %10 = icmp sle <4 x i32> %2, %4
5287 ; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x i32> %5, <4 x i32> %7
5288 ; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x i32> %6, <4 x i32> %8
5289 ; CHECK-NEXT: store <4 x i32> %12, <4 x i32>* %0, align 16
5290 ; CHECK-NEXT: ret <4 x i32> %11
5291 ; CHECK-NEXT: }
5292
5293 define <6 x i32> @icmp_ule_on_6xi32(<6 x i32>, <6 x i32>, <6 x i32>, <6 x i32>) {
5294 entry:
5295 %4 = icmp ule <6 x i32> %0, %1
5296 %5 = select <6 x i1> %4, <6 x i32> %2, <6 x i32> %3
5297 ret <6 x i32> %5
5298 }
5299 ; CHECK-LABEL: define <4 x i32> @icmp_ule_on_6xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
5300 ; CHECK: entry:
5301 ; CHECK-NEXT: %9 = icmp ule <4 x i32> %1, %3
5302 ; CHECK-NEXT: %10 = icmp ule <4 x i32> %2, %4
5303 ; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x i32> %5, <4 x i32> %7
5304 ; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x i32> %6, <4 x i32> %8
5305 ; CHECK-NEXT: store <4 x i32> %12, <4 x i32>* %0, align 16
5306 ; CHECK-NEXT: ret <4 x i32> %11
5307 ; CHECK-NEXT: }
5308
5309 define <6 x i64> @icmp_eq_on_6xi64(<6 x i64>, <6 x i64>, <6 x i64>, <6 x i64>) {
5310 entry:
5311 %4 = icmp eq <6 x i64> %0, %1
5312 %5 = select <6 x i1> %4, <6 x i64> %2, <6 x i64> %3
5313 ret <6 x i64> %5
5314 }
5315 ; CHECK-LABEL: define <2 x i64> @icmp_eq_on_6xi64(<2 x i64>* nocapture nonnull d ereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
5316 ; CHECK: entry:
5317 ; CHECK-NEXT: %14 = icmp eq <2 x i64> %2, %5
5318 ; CHECK-NEXT: %15 = icmp eq <2 x i64> %3, %6
5319 ; CHECK-NEXT: %16 = icmp eq <2 x i64> %4, %7
5320 ; CHECK-NEXT: %17 = select <2 x i1> %14, <2 x i64> %8, <2 x i64> %11
5321 ; CHECK-NEXT: %18 = select <2 x i1> %15, <2 x i64> %9, <2 x i64> %12
5322 ; CHECK-NEXT: %19 = select <2 x i1> %16, <2 x i64> %10, <2 x i64> %13
5323 ; CHECK-NEXT: store <2 x i64> %18, <2 x i64>* %0, align 16
5324 ; CHECK-NEXT: store <2 x i64> %19, <2 x i64>* %1, align 16
5325 ; CHECK-NEXT: ret <2 x i64> %17
5326 ; CHECK-NEXT: }
5327
5328 define <6 x i64> @icmp_ne_on_6xi64(<6 x i64>, <6 x i64>, <6 x i64>, <6 x i64>) {
5329 entry:
5330 %4 = icmp ne <6 x i64> %0, %1
5331 %5 = select <6 x i1> %4, <6 x i64> %2, <6 x i64> %3
5332 ret <6 x i64> %5
5333 }
5334 ; CHECK-LABEL: define <2 x i64> @icmp_ne_on_6xi64(<2 x i64>* nocapture nonnull d ereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
5335 ; CHECK: entry:
5336 ; CHECK-NEXT: %14 = icmp ne <2 x i64> %2, %5
5337 ; CHECK-NEXT: %15 = icmp ne <2 x i64> %3, %6
5338 ; CHECK-NEXT: %16 = icmp ne <2 x i64> %4, %7
5339 ; CHECK-NEXT: %17 = select <2 x i1> %14, <2 x i64> %8, <2 x i64> %11
5340 ; CHECK-NEXT: %18 = select <2 x i1> %15, <2 x i64> %9, <2 x i64> %12
5341 ; CHECK-NEXT: %19 = select <2 x i1> %16, <2 x i64> %10, <2 x i64> %13
5342 ; CHECK-NEXT: store <2 x i64> %18, <2 x i64>* %0, align 16
5343 ; CHECK-NEXT: store <2 x i64> %19, <2 x i64>* %1, align 16
5344 ; CHECK-NEXT: ret <2 x i64> %17
5345 ; CHECK-NEXT: }
5346
5347 define <6 x i64> @icmp_sgt_on_6xi64(<6 x i64>, <6 x i64>, <6 x i64>, <6 x i64>) {
5348 entry:
5349 %4 = icmp sgt <6 x i64> %0, %1
5350 %5 = select <6 x i1> %4, <6 x i64> %2, <6 x i64> %3
5351 ret <6 x i64> %5
5352 }
5353 ; CHECK-LABEL: define <2 x i64> @icmp_sgt_on_6xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64> , <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, < 2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
5354 ; CHECK: entry:
5355 ; CHECK-NEXT: %14 = icmp sgt <2 x i64> %2, %5
5356 ; CHECK-NEXT: %15 = icmp sgt <2 x i64> %3, %6
5357 ; CHECK-NEXT: %16 = icmp sgt <2 x i64> %4, %7
5358 ; CHECK-NEXT: %17 = select <2 x i1> %14, <2 x i64> %8, <2 x i64> %11
5359 ; CHECK-NEXT: %18 = select <2 x i1> %15, <2 x i64> %9, <2 x i64> %12
5360 ; CHECK-NEXT: %19 = select <2 x i1> %16, <2 x i64> %10, <2 x i64> %13
5361 ; CHECK-NEXT: store <2 x i64> %18, <2 x i64>* %0, align 16
5362 ; CHECK-NEXT: store <2 x i64> %19, <2 x i64>* %1, align 16
5363 ; CHECK-NEXT: ret <2 x i64> %17
5364 ; CHECK-NEXT: }
5365
5366 define <6 x i64> @icmp_ugt_on_6xi64(<6 x i64>, <6 x i64>, <6 x i64>, <6 x i64>) {
5367 entry:
5368 %4 = icmp ugt <6 x i64> %0, %1
5369 %5 = select <6 x i1> %4, <6 x i64> %2, <6 x i64> %3
5370 ret <6 x i64> %5
5371 }
5372 ; CHECK-LABEL: define <2 x i64> @icmp_ugt_on_6xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64> , <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, < 2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
5373 ; CHECK: entry:
5374 ; CHECK-NEXT: %14 = icmp ugt <2 x i64> %2, %5
5375 ; CHECK-NEXT: %15 = icmp ugt <2 x i64> %3, %6
5376 ; CHECK-NEXT: %16 = icmp ugt <2 x i64> %4, %7
5377 ; CHECK-NEXT: %17 = select <2 x i1> %14, <2 x i64> %8, <2 x i64> %11
5378 ; CHECK-NEXT: %18 = select <2 x i1> %15, <2 x i64> %9, <2 x i64> %12
5379 ; CHECK-NEXT: %19 = select <2 x i1> %16, <2 x i64> %10, <2 x i64> %13
5380 ; CHECK-NEXT: store <2 x i64> %18, <2 x i64>* %0, align 16
5381 ; CHECK-NEXT: store <2 x i64> %19, <2 x i64>* %1, align 16
5382 ; CHECK-NEXT: ret <2 x i64> %17
5383 ; CHECK-NEXT: }
5384
5385 define <6 x i64> @icmp_sge_on_6xi64(<6 x i64>, <6 x i64>, <6 x i64>, <6 x i64>) {
5386 entry:
5387 %4 = icmp sge <6 x i64> %0, %1
5388 %5 = select <6 x i1> %4, <6 x i64> %2, <6 x i64> %3
5389 ret <6 x i64> %5
5390 }
5391 ; CHECK-LABEL: define <2 x i64> @icmp_sge_on_6xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64> , <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, < 2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
5392 ; CHECK: entry:
5393 ; CHECK-NEXT: %14 = icmp sge <2 x i64> %2, %5
5394 ; CHECK-NEXT: %15 = icmp sge <2 x i64> %3, %6
5395 ; CHECK-NEXT: %16 = icmp sge <2 x i64> %4, %7
5396 ; CHECK-NEXT: %17 = select <2 x i1> %14, <2 x i64> %8, <2 x i64> %11
5397 ; CHECK-NEXT: %18 = select <2 x i1> %15, <2 x i64> %9, <2 x i64> %12
5398 ; CHECK-NEXT: %19 = select <2 x i1> %16, <2 x i64> %10, <2 x i64> %13
5399 ; CHECK-NEXT: store <2 x i64> %18, <2 x i64>* %0, align 16
5400 ; CHECK-NEXT: store <2 x i64> %19, <2 x i64>* %1, align 16
5401 ; CHECK-NEXT: ret <2 x i64> %17
5402 ; CHECK-NEXT: }
5403
5404 define <6 x i64> @icmp_uge_on_6xi64(<6 x i64>, <6 x i64>, <6 x i64>, <6 x i64>) {
5405 entry:
5406 %4 = icmp uge <6 x i64> %0, %1
5407 %5 = select <6 x i1> %4, <6 x i64> %2, <6 x i64> %3
5408 ret <6 x i64> %5
5409 }
5410 ; CHECK-LABEL: define <2 x i64> @icmp_uge_on_6xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64> , <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, < 2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
5411 ; CHECK: entry:
5412 ; CHECK-NEXT: %14 = icmp uge <2 x i64> %2, %5
5413 ; CHECK-NEXT: %15 = icmp uge <2 x i64> %3, %6
5414 ; CHECK-NEXT: %16 = icmp uge <2 x i64> %4, %7
5415 ; CHECK-NEXT: %17 = select <2 x i1> %14, <2 x i64> %8, <2 x i64> %11
5416 ; CHECK-NEXT: %18 = select <2 x i1> %15, <2 x i64> %9, <2 x i64> %12
5417 ; CHECK-NEXT: %19 = select <2 x i1> %16, <2 x i64> %10, <2 x i64> %13
5418 ; CHECK-NEXT: store <2 x i64> %18, <2 x i64>* %0, align 16
5419 ; CHECK-NEXT: store <2 x i64> %19, <2 x i64>* %1, align 16
5420 ; CHECK-NEXT: ret <2 x i64> %17
5421 ; CHECK-NEXT: }
5422
5423 define <6 x i64> @icmp_slt_on_6xi64(<6 x i64>, <6 x i64>, <6 x i64>, <6 x i64>) {
5424 entry:
5425 %4 = icmp slt <6 x i64> %0, %1
5426 %5 = select <6 x i1> %4, <6 x i64> %2, <6 x i64> %3
5427 ret <6 x i64> %5
5428 }
5429 ; CHECK-LABEL: define <2 x i64> @icmp_slt_on_6xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64> , <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, < 2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
5430 ; CHECK: entry:
5431 ; CHECK-NEXT: %14 = icmp slt <2 x i64> %2, %5
5432 ; CHECK-NEXT: %15 = icmp slt <2 x i64> %3, %6
5433 ; CHECK-NEXT: %16 = icmp slt <2 x i64> %4, %7
5434 ; CHECK-NEXT: %17 = select <2 x i1> %14, <2 x i64> %8, <2 x i64> %11
5435 ; CHECK-NEXT: %18 = select <2 x i1> %15, <2 x i64> %9, <2 x i64> %12
5436 ; CHECK-NEXT: %19 = select <2 x i1> %16, <2 x i64> %10, <2 x i64> %13
5437 ; CHECK-NEXT: store <2 x i64> %18, <2 x i64>* %0, align 16
5438 ; CHECK-NEXT: store <2 x i64> %19, <2 x i64>* %1, align 16
5439 ; CHECK-NEXT: ret <2 x i64> %17
5440 ; CHECK-NEXT: }
5441
5442 define <6 x i64> @icmp_ult_on_6xi64(<6 x i64>, <6 x i64>, <6 x i64>, <6 x i64>) {
5443 entry:
5444 %4 = icmp ult <6 x i64> %0, %1
5445 %5 = select <6 x i1> %4, <6 x i64> %2, <6 x i64> %3
5446 ret <6 x i64> %5
5447 }
5448 ; CHECK-LABEL: define <2 x i64> @icmp_ult_on_6xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64> , <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, < 2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
5449 ; CHECK: entry:
5450 ; CHECK-NEXT: %14 = icmp ult <2 x i64> %2, %5
5451 ; CHECK-NEXT: %15 = icmp ult <2 x i64> %3, %6
5452 ; CHECK-NEXT: %16 = icmp ult <2 x i64> %4, %7
5453 ; CHECK-NEXT: %17 = select <2 x i1> %14, <2 x i64> %8, <2 x i64> %11
5454 ; CHECK-NEXT: %18 = select <2 x i1> %15, <2 x i64> %9, <2 x i64> %12
5455 ; CHECK-NEXT: %19 = select <2 x i1> %16, <2 x i64> %10, <2 x i64> %13
5456 ; CHECK-NEXT: store <2 x i64> %18, <2 x i64>* %0, align 16
5457 ; CHECK-NEXT: store <2 x i64> %19, <2 x i64>* %1, align 16
5458 ; CHECK-NEXT: ret <2 x i64> %17
5459 ; CHECK-NEXT: }
5460
5461 define <6 x i64> @icmp_sle_on_6xi64(<6 x i64>, <6 x i64>, <6 x i64>, <6 x i64>) {
5462 entry:
5463 %4 = icmp sle <6 x i64> %0, %1
5464 %5 = select <6 x i1> %4, <6 x i64> %2, <6 x i64> %3
5465 ret <6 x i64> %5
5466 }
5467 ; CHECK-LABEL: define <2 x i64> @icmp_sle_on_6xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64> , <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, < 2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
5468 ; CHECK: entry:
5469 ; CHECK-NEXT: %14 = icmp sle <2 x i64> %2, %5
5470 ; CHECK-NEXT: %15 = icmp sle <2 x i64> %3, %6
5471 ; CHECK-NEXT: %16 = icmp sle <2 x i64> %4, %7
5472 ; CHECK-NEXT: %17 = select <2 x i1> %14, <2 x i64> %8, <2 x i64> %11
5473 ; CHECK-NEXT: %18 = select <2 x i1> %15, <2 x i64> %9, <2 x i64> %12
5474 ; CHECK-NEXT: %19 = select <2 x i1> %16, <2 x i64> %10, <2 x i64> %13
5475 ; CHECK-NEXT: store <2 x i64> %18, <2 x i64>* %0, align 16
5476 ; CHECK-NEXT: store <2 x i64> %19, <2 x i64>* %1, align 16
5477 ; CHECK-NEXT: ret <2 x i64> %17
5478 ; CHECK-NEXT: }
5479
5480 define <6 x i64> @icmp_ule_on_6xi64(<6 x i64>, <6 x i64>, <6 x i64>, <6 x i64>) {
5481 entry:
5482 %4 = icmp ule <6 x i64> %0, %1
5483 %5 = select <6 x i1> %4, <6 x i64> %2, <6 x i64> %3
5484 ret <6 x i64> %5
5485 }
5486 ; CHECK-LABEL: define <2 x i64> @icmp_ule_on_6xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64> , <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, < 2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
5487 ; CHECK: entry:
5488 ; CHECK-NEXT: %14 = icmp ule <2 x i64> %2, %5
5489 ; CHECK-NEXT: %15 = icmp ule <2 x i64> %3, %6
5490 ; CHECK-NEXT: %16 = icmp ule <2 x i64> %4, %7
5491 ; CHECK-NEXT: %17 = select <2 x i1> %14, <2 x i64> %8, <2 x i64> %11
5492 ; CHECK-NEXT: %18 = select <2 x i1> %15, <2 x i64> %9, <2 x i64> %12
5493 ; CHECK-NEXT: %19 = select <2 x i1> %16, <2 x i64> %10, <2 x i64> %13
5494 ; CHECK-NEXT: store <2 x i64> %18, <2 x i64>* %0, align 16
5495 ; CHECK-NEXT: store <2 x i64> %19, <2 x i64>* %1, align 16
5496 ; CHECK-NEXT: ret <2 x i64> %17
5497 ; CHECK-NEXT: }
5498
5499 define <6 x i8*> @icmp_eq_on_6xi8ptr(<6 x i8*>, <6 x i8*>, <6 x i8*>, <6 x i8*>) {
5500 entry:
5501 %4 = icmp eq <6 x i8*> %0, %1
5502 %5 = select <6 x i1> %4, <6 x i8*> %2, <6 x i8*> %3
5503 ret <6 x i8*> %5
5504 }
5505 ; CHECK-LABEL: define <4 x i8*> @icmp_eq_on_6xi8ptr(<4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
5506 ; CHECK: entry:
5507 ; CHECK-NEXT: %9 = icmp eq <4 x i8*> %1, %3
5508 ; CHECK-NEXT: %10 = icmp eq <4 x i8*> %2, %4
5509 ; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x i8*> %5, <4 x i8*> %7
5510 ; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x i8*> %6, <4 x i8*> %8
5511 ; CHECK-NEXT: store <4 x i8*> %12, <4 x i8*>* %0, align 16
5512 ; CHECK-NEXT: ret <4 x i8*> %11
5513 ; CHECK-NEXT: }
5514
5515 define <6 x i8*> @icmp_ne_on_6xi8ptr(<6 x i8*>, <6 x i8*>, <6 x i8*>, <6 x i8*>) {
5516 entry:
5517 %4 = icmp ne <6 x i8*> %0, %1
5518 %5 = select <6 x i1> %4, <6 x i8*> %2, <6 x i8*> %3
5519 ret <6 x i8*> %5
5520 }
5521 ; CHECK-LABEL: define <4 x i8*> @icmp_ne_on_6xi8ptr(<4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
5522 ; CHECK: entry:
5523 ; CHECK-NEXT: %9 = icmp ne <4 x i8*> %1, %3
5524 ; CHECK-NEXT: %10 = icmp ne <4 x i8*> %2, %4
5525 ; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x i8*> %5, <4 x i8*> %7
5526 ; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x i8*> %6, <4 x i8*> %8
5527 ; CHECK-NEXT: store <4 x i8*> %12, <4 x i8*>* %0, align 16
5528 ; CHECK-NEXT: ret <4 x i8*> %11
5529 ; CHECK-NEXT: }
5530
5531 define <6 x i8*> @icmp_sgt_on_6xi8ptr(<6 x i8*>, <6 x i8*>, <6 x i8*>, <6 x i8*> ) {
5532 entry:
5533 %4 = icmp sgt <6 x i8*> %0, %1
5534 %5 = select <6 x i1> %4, <6 x i8*> %2, <6 x i8*> %3
5535 ret <6 x i8*> %5
5536 }
5537 ; CHECK-LABEL: define <4 x i8*> @icmp_sgt_on_6xi8ptr(<4 x i8*>* nocapture nonnul l dereferenceable(16), <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
5538 ; CHECK: entry:
5539 ; CHECK-NEXT: %9 = icmp sgt <4 x i8*> %1, %3
5540 ; CHECK-NEXT: %10 = icmp sgt <4 x i8*> %2, %4
5541 ; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x i8*> %5, <4 x i8*> %7
5542 ; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x i8*> %6, <4 x i8*> %8
5543 ; CHECK-NEXT: store <4 x i8*> %12, <4 x i8*>* %0, align 16
5544 ; CHECK-NEXT: ret <4 x i8*> %11
5545 ; CHECK-NEXT: }
5546
5547 define <6 x i8*> @icmp_ugt_on_6xi8ptr(<6 x i8*>, <6 x i8*>, <6 x i8*>, <6 x i8*> ) {
5548 entry:
5549 %4 = icmp ugt <6 x i8*> %0, %1
5550 %5 = select <6 x i1> %4, <6 x i8*> %2, <6 x i8*> %3
5551 ret <6 x i8*> %5
5552 }
5553 ; CHECK-LABEL: define <4 x i8*> @icmp_ugt_on_6xi8ptr(<4 x i8*>* nocapture nonnul l dereferenceable(16), <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
5554 ; CHECK: entry:
5555 ; CHECK-NEXT: %9 = icmp ugt <4 x i8*> %1, %3
5556 ; CHECK-NEXT: %10 = icmp ugt <4 x i8*> %2, %4
5557 ; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x i8*> %5, <4 x i8*> %7
5558 ; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x i8*> %6, <4 x i8*> %8
5559 ; CHECK-NEXT: store <4 x i8*> %12, <4 x i8*>* %0, align 16
5560 ; CHECK-NEXT: ret <4 x i8*> %11
5561 ; CHECK-NEXT: }
5562
5563 define <6 x i8*> @icmp_sge_on_6xi8ptr(<6 x i8*>, <6 x i8*>, <6 x i8*>, <6 x i8*> ) {
5564 entry:
5565 %4 = icmp sge <6 x i8*> %0, %1
5566 %5 = select <6 x i1> %4, <6 x i8*> %2, <6 x i8*> %3
5567 ret <6 x i8*> %5
5568 }
5569 ; CHECK-LABEL: define <4 x i8*> @icmp_sge_on_6xi8ptr(<4 x i8*>* nocapture nonnul l dereferenceable(16), <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
5570 ; CHECK: entry:
5571 ; CHECK-NEXT: %9 = icmp sge <4 x i8*> %1, %3
5572 ; CHECK-NEXT: %10 = icmp sge <4 x i8*> %2, %4
5573 ; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x i8*> %5, <4 x i8*> %7
5574 ; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x i8*> %6, <4 x i8*> %8
5575 ; CHECK-NEXT: store <4 x i8*> %12, <4 x i8*>* %0, align 16
5576 ; CHECK-NEXT: ret <4 x i8*> %11
5577 ; CHECK-NEXT: }
5578
5579 define <6 x i8*> @icmp_uge_on_6xi8ptr(<6 x i8*>, <6 x i8*>, <6 x i8*>, <6 x i8*> ) {
5580 entry:
5581 %4 = icmp uge <6 x i8*> %0, %1
5582 %5 = select <6 x i1> %4, <6 x i8*> %2, <6 x i8*> %3
5583 ret <6 x i8*> %5
5584 }
5585 ; CHECK-LABEL: define <4 x i8*> @icmp_uge_on_6xi8ptr(<4 x i8*>* nocapture nonnul l dereferenceable(16), <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
5586 ; CHECK: entry:
5587 ; CHECK-NEXT: %9 = icmp uge <4 x i8*> %1, %3
5588 ; CHECK-NEXT: %10 = icmp uge <4 x i8*> %2, %4
5589 ; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x i8*> %5, <4 x i8*> %7
5590 ; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x i8*> %6, <4 x i8*> %8
5591 ; CHECK-NEXT: store <4 x i8*> %12, <4 x i8*>* %0, align 16
5592 ; CHECK-NEXT: ret <4 x i8*> %11
5593 ; CHECK-NEXT: }
5594
5595 define <6 x i8*> @icmp_slt_on_6xi8ptr(<6 x i8*>, <6 x i8*>, <6 x i8*>, <6 x i8*> ) {
5596 entry:
5597 %4 = icmp slt <6 x i8*> %0, %1
5598 %5 = select <6 x i1> %4, <6 x i8*> %2, <6 x i8*> %3
5599 ret <6 x i8*> %5
5600 }
5601 ; CHECK-LABEL: define <4 x i8*> @icmp_slt_on_6xi8ptr(<4 x i8*>* nocapture nonnul l dereferenceable(16), <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
5602 ; CHECK: entry:
5603 ; CHECK-NEXT: %9 = icmp slt <4 x i8*> %1, %3
5604 ; CHECK-NEXT: %10 = icmp slt <4 x i8*> %2, %4
5605 ; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x i8*> %5, <4 x i8*> %7
5606 ; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x i8*> %6, <4 x i8*> %8
5607 ; CHECK-NEXT: store <4 x i8*> %12, <4 x i8*>* %0, align 16
5608 ; CHECK-NEXT: ret <4 x i8*> %11
5609 ; CHECK-NEXT: }
5610
5611 define <6 x i8*> @icmp_ult_on_6xi8ptr(<6 x i8*>, <6 x i8*>, <6 x i8*>, <6 x i8*> ) {
5612 entry:
5613 %4 = icmp ult <6 x i8*> %0, %1
5614 %5 = select <6 x i1> %4, <6 x i8*> %2, <6 x i8*> %3
5615 ret <6 x i8*> %5
5616 }
5617 ; CHECK-LABEL: define <4 x i8*> @icmp_ult_on_6xi8ptr(<4 x i8*>* nocapture nonnul l dereferenceable(16), <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
5618 ; CHECK: entry:
5619 ; CHECK-NEXT: %9 = icmp ult <4 x i8*> %1, %3
5620 ; CHECK-NEXT: %10 = icmp ult <4 x i8*> %2, %4
5621 ; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x i8*> %5, <4 x i8*> %7
5622 ; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x i8*> %6, <4 x i8*> %8
5623 ; CHECK-NEXT: store <4 x i8*> %12, <4 x i8*>* %0, align 16
5624 ; CHECK-NEXT: ret <4 x i8*> %11
5625 ; CHECK-NEXT: }
5626
5627 define <6 x i8*> @icmp_sle_on_6xi8ptr(<6 x i8*>, <6 x i8*>, <6 x i8*>, <6 x i8*> ) {
5628 entry:
5629 %4 = icmp sle <6 x i8*> %0, %1
5630 %5 = select <6 x i1> %4, <6 x i8*> %2, <6 x i8*> %3
5631 ret <6 x i8*> %5
5632 }
5633 ; CHECK-LABEL: define <4 x i8*> @icmp_sle_on_6xi8ptr(<4 x i8*>* nocapture nonnul l dereferenceable(16), <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
5634 ; CHECK: entry:
5635 ; CHECK-NEXT: %9 = icmp sle <4 x i8*> %1, %3
5636 ; CHECK-NEXT: %10 = icmp sle <4 x i8*> %2, %4
5637 ; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x i8*> %5, <4 x i8*> %7
5638 ; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x i8*> %6, <4 x i8*> %8
5639 ; CHECK-NEXT: store <4 x i8*> %12, <4 x i8*>* %0, align 16
5640 ; CHECK-NEXT: ret <4 x i8*> %11
5641 ; CHECK-NEXT: }
5642
5643 define <6 x i8*> @icmp_ule_on_6xi8ptr(<6 x i8*>, <6 x i8*>, <6 x i8*>, <6 x i8*> ) {
5644 entry:
5645 %4 = icmp ule <6 x i8*> %0, %1
5646 %5 = select <6 x i1> %4, <6 x i8*> %2, <6 x i8*> %3
5647 ret <6 x i8*> %5
5648 }
5649 ; CHECK-LABEL: define <4 x i8*> @icmp_ule_on_6xi8ptr(<4 x i8*>* nocapture nonnul l dereferenceable(16), <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
5650 ; CHECK: entry:
5651 ; CHECK-NEXT: %9 = icmp ule <4 x i8*> %1, %3
5652 ; CHECK-NEXT: %10 = icmp ule <4 x i8*> %2, %4
5653 ; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x i8*> %5, <4 x i8*> %7
5654 ; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x i8*> %6, <4 x i8*> %8
5655 ; CHECK-NEXT: store <4 x i8*> %12, <4 x i8*>* %0, align 16
5656 ; CHECK-NEXT: ret <4 x i8*> %11
5657 ; CHECK-NEXT: }
5658
5659 define <8 x i8> @icmp_eq_on_8xi8(<8 x i8>, <8 x i8>, <8 x i8>, <8 x i8>) {
5660 entry:
5661 %4 = icmp eq <8 x i8> %0, %1
5662 %5 = select <8 x i1> %4, <8 x i8> %2, <8 x i8> %3
5663 ret <8 x i8> %5
5664 }
5665 ; CHECK-LABEL: define <16 x i8> @icmp_eq_on_8xi8(<16 x i8>, <16 x i8>, <16 x i8> , <16 x i8>) {
5666 ; CHECK: entry:
5667 ; CHECK-NEXT: %4 = icmp eq <16 x i8> %0, %1
5668 ; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
5669 ; CHECK-NEXT: ret <16 x i8> %5
5670 ; CHECK-NEXT: }
5671
5672 define <8 x i8> @icmp_ne_on_8xi8(<8 x i8>, <8 x i8>, <8 x i8>, <8 x i8>) {
5673 entry:
5674 %4 = icmp ne <8 x i8> %0, %1
5675 %5 = select <8 x i1> %4, <8 x i8> %2, <8 x i8> %3
5676 ret <8 x i8> %5
5677 }
5678 ; CHECK-LABEL: define <16 x i8> @icmp_ne_on_8xi8(<16 x i8>, <16 x i8>, <16 x i8> , <16 x i8>) {
5679 ; CHECK: entry:
5680 ; CHECK-NEXT: %4 = icmp ne <16 x i8> %0, %1
5681 ; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
5682 ; CHECK-NEXT: ret <16 x i8> %5
5683 ; CHECK-NEXT: }
5684
5685 define <8 x i8> @icmp_sgt_on_8xi8(<8 x i8>, <8 x i8>, <8 x i8>, <8 x i8>) {
5686 entry:
5687 %4 = icmp sgt <8 x i8> %0, %1
5688 %5 = select <8 x i1> %4, <8 x i8> %2, <8 x i8> %3
5689 ret <8 x i8> %5
5690 }
5691 ; CHECK-LABEL: define <16 x i8> @icmp_sgt_on_8xi8(<16 x i8>, <16 x i8>, <16 x i8 >, <16 x i8>) {
5692 ; CHECK: entry:
5693 ; CHECK-NEXT: %4 = icmp sgt <16 x i8> %0, %1
5694 ; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
5695 ; CHECK-NEXT: ret <16 x i8> %5
5696 ; CHECK-NEXT: }
5697
5698 define <8 x i8> @icmp_ugt_on_8xi8(<8 x i8>, <8 x i8>, <8 x i8>, <8 x i8>) {
5699 entry:
5700 %4 = icmp ugt <8 x i8> %0, %1
5701 %5 = select <8 x i1> %4, <8 x i8> %2, <8 x i8> %3
5702 ret <8 x i8> %5
5703 }
5704 ; CHECK-LABEL: define <16 x i8> @icmp_ugt_on_8xi8(<16 x i8>, <16 x i8>, <16 x i8 >, <16 x i8>) {
5705 ; CHECK: entry:
5706 ; CHECK-NEXT: %4 = icmp ugt <16 x i8> %0, %1
5707 ; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
5708 ; CHECK-NEXT: ret <16 x i8> %5
5709 ; CHECK-NEXT: }
5710
5711 define <8 x i8> @icmp_sge_on_8xi8(<8 x i8>, <8 x i8>, <8 x i8>, <8 x i8>) {
5712 entry:
5713 %4 = icmp sge <8 x i8> %0, %1
5714 %5 = select <8 x i1> %4, <8 x i8> %2, <8 x i8> %3
5715 ret <8 x i8> %5
5716 }
5717 ; CHECK-LABEL: define <16 x i8> @icmp_sge_on_8xi8(<16 x i8>, <16 x i8>, <16 x i8 >, <16 x i8>) {
5718 ; CHECK: entry:
5719 ; CHECK-NEXT: %4 = icmp sge <16 x i8> %0, %1
5720 ; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
5721 ; CHECK-NEXT: ret <16 x i8> %5
5722 ; CHECK-NEXT: }
5723
5724 define <8 x i8> @icmp_uge_on_8xi8(<8 x i8>, <8 x i8>, <8 x i8>, <8 x i8>) {
5725 entry:
5726 %4 = icmp uge <8 x i8> %0, %1
5727 %5 = select <8 x i1> %4, <8 x i8> %2, <8 x i8> %3
5728 ret <8 x i8> %5
5729 }
5730 ; CHECK-LABEL: define <16 x i8> @icmp_uge_on_8xi8(<16 x i8>, <16 x i8>, <16 x i8 >, <16 x i8>) {
5731 ; CHECK: entry:
5732 ; CHECK-NEXT: %4 = icmp uge <16 x i8> %0, %1
5733 ; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
5734 ; CHECK-NEXT: ret <16 x i8> %5
5735 ; CHECK-NEXT: }
5736
5737 define <8 x i8> @icmp_slt_on_8xi8(<8 x i8>, <8 x i8>, <8 x i8>, <8 x i8>) {
5738 entry:
5739 %4 = icmp slt <8 x i8> %0, %1
5740 %5 = select <8 x i1> %4, <8 x i8> %2, <8 x i8> %3
5741 ret <8 x i8> %5
5742 }
5743 ; CHECK-LABEL: define <16 x i8> @icmp_slt_on_8xi8(<16 x i8>, <16 x i8>, <16 x i8 >, <16 x i8>) {
5744 ; CHECK: entry:
5745 ; CHECK-NEXT: %4 = icmp slt <16 x i8> %0, %1
5746 ; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
5747 ; CHECK-NEXT: ret <16 x i8> %5
5748 ; CHECK-NEXT: }
5749
5750 define <8 x i8> @icmp_ult_on_8xi8(<8 x i8>, <8 x i8>, <8 x i8>, <8 x i8>) {
5751 entry:
5752 %4 = icmp ult <8 x i8> %0, %1
5753 %5 = select <8 x i1> %4, <8 x i8> %2, <8 x i8> %3
5754 ret <8 x i8> %5
5755 }
5756 ; CHECK-LABEL: define <16 x i8> @icmp_ult_on_8xi8(<16 x i8>, <16 x i8>, <16 x i8 >, <16 x i8>) {
5757 ; CHECK: entry:
5758 ; CHECK-NEXT: %4 = icmp ult <16 x i8> %0, %1
5759 ; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
5760 ; CHECK-NEXT: ret <16 x i8> %5
5761 ; CHECK-NEXT: }
5762
5763 define <8 x i8> @icmp_sle_on_8xi8(<8 x i8>, <8 x i8>, <8 x i8>, <8 x i8>) {
5764 entry:
5765 %4 = icmp sle <8 x i8> %0, %1
5766 %5 = select <8 x i1> %4, <8 x i8> %2, <8 x i8> %3
5767 ret <8 x i8> %5
5768 }
5769 ; CHECK-LABEL: define <16 x i8> @icmp_sle_on_8xi8(<16 x i8>, <16 x i8>, <16 x i8 >, <16 x i8>) {
5770 ; CHECK: entry:
5771 ; CHECK-NEXT: %4 = icmp sle <16 x i8> %0, %1
5772 ; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
5773 ; CHECK-NEXT: ret <16 x i8> %5
5774 ; CHECK-NEXT: }
5775
5776 define <8 x i8> @icmp_ule_on_8xi8(<8 x i8>, <8 x i8>, <8 x i8>, <8 x i8>) {
5777 entry:
5778 %4 = icmp ule <8 x i8> %0, %1
5779 %5 = select <8 x i1> %4, <8 x i8> %2, <8 x i8> %3
5780 ret <8 x i8> %5
5781 }
5782 ; CHECK-LABEL: define <16 x i8> @icmp_ule_on_8xi8(<16 x i8>, <16 x i8>, <16 x i8 >, <16 x i8>) {
5783 ; CHECK: entry:
5784 ; CHECK-NEXT: %4 = icmp ule <16 x i8> %0, %1
5785 ; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
5786 ; CHECK-NEXT: ret <16 x i8> %5
5787 ; CHECK-NEXT: }
5788
5789 define <8 x i16> @icmp_eq_on_8xi16(<8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
5790 entry:
5791 %4 = icmp eq <8 x i16> %0, %1
5792 %5 = select <8 x i1> %4, <8 x i16> %2, <8 x i16> %3
5793 ret <8 x i16> %5
5794 }
5795 ; CHECK-LABEL: define <8 x i16> @icmp_eq_on_8xi16(<8 x i16>, <8 x i16>, <8 x i16 >, <8 x i16>) {
5796 ; CHECK: entry:
5797 ; CHECK-NEXT: %4 = icmp eq <8 x i16> %0, %1
5798 ; CHECK-NEXT: %5 = select <8 x i1> %4, <8 x i16> %2, <8 x i16> %3
5799 ; CHECK-NEXT: ret <8 x i16> %5
5800 ; CHECK-NEXT: }
5801
5802 define <8 x i16> @icmp_ne_on_8xi16(<8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
5803 entry:
5804 %4 = icmp ne <8 x i16> %0, %1
5805 %5 = select <8 x i1> %4, <8 x i16> %2, <8 x i16> %3
5806 ret <8 x i16> %5
5807 }
5808 ; CHECK-LABEL: define <8 x i16> @icmp_ne_on_8xi16(<8 x i16>, <8 x i16>, <8 x i16 >, <8 x i16>) {
5809 ; CHECK: entry:
5810 ; CHECK-NEXT: %4 = icmp ne <8 x i16> %0, %1
5811 ; CHECK-NEXT: %5 = select <8 x i1> %4, <8 x i16> %2, <8 x i16> %3
5812 ; CHECK-NEXT: ret <8 x i16> %5
5813 ; CHECK-NEXT: }
5814
5815 define <8 x i16> @icmp_sgt_on_8xi16(<8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
5816 entry:
5817 %4 = icmp sgt <8 x i16> %0, %1
5818 %5 = select <8 x i1> %4, <8 x i16> %2, <8 x i16> %3
5819 ret <8 x i16> %5
5820 }
5821 ; CHECK-LABEL: define <8 x i16> @icmp_sgt_on_8xi16(<8 x i16>, <8 x i16>, <8 x i1 6>, <8 x i16>) {
5822 ; CHECK: entry:
5823 ; CHECK-NEXT: %4 = icmp sgt <8 x i16> %0, %1
5824 ; CHECK-NEXT: %5 = select <8 x i1> %4, <8 x i16> %2, <8 x i16> %3
5825 ; CHECK-NEXT: ret <8 x i16> %5
5826 ; CHECK-NEXT: }
5827
5828 define <8 x i16> @icmp_ugt_on_8xi16(<8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
5829 entry:
5830 %4 = icmp ugt <8 x i16> %0, %1
5831 %5 = select <8 x i1> %4, <8 x i16> %2, <8 x i16> %3
5832 ret <8 x i16> %5
5833 }
5834 ; CHECK-LABEL: define <8 x i16> @icmp_ugt_on_8xi16(<8 x i16>, <8 x i16>, <8 x i1 6>, <8 x i16>) {
5835 ; CHECK: entry:
5836 ; CHECK-NEXT: %4 = icmp ugt <8 x i16> %0, %1
5837 ; CHECK-NEXT: %5 = select <8 x i1> %4, <8 x i16> %2, <8 x i16> %3
5838 ; CHECK-NEXT: ret <8 x i16> %5
5839 ; CHECK-NEXT: }
5840
5841 define <8 x i16> @icmp_sge_on_8xi16(<8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
5842 entry:
5843 %4 = icmp sge <8 x i16> %0, %1
5844 %5 = select <8 x i1> %4, <8 x i16> %2, <8 x i16> %3
5845 ret <8 x i16> %5
5846 }
5847 ; CHECK-LABEL: define <8 x i16> @icmp_sge_on_8xi16(<8 x i16>, <8 x i16>, <8 x i1 6>, <8 x i16>) {
5848 ; CHECK: entry:
5849 ; CHECK-NEXT: %4 = icmp sge <8 x i16> %0, %1
5850 ; CHECK-NEXT: %5 = select <8 x i1> %4, <8 x i16> %2, <8 x i16> %3
5851 ; CHECK-NEXT: ret <8 x i16> %5
5852 ; CHECK-NEXT: }
5853
5854 define <8 x i16> @icmp_uge_on_8xi16(<8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
5855 entry:
5856 %4 = icmp uge <8 x i16> %0, %1
5857 %5 = select <8 x i1> %4, <8 x i16> %2, <8 x i16> %3
5858 ret <8 x i16> %5
5859 }
5860 ; CHECK-LABEL: define <8 x i16> @icmp_uge_on_8xi16(<8 x i16>, <8 x i16>, <8 x i1 6>, <8 x i16>) {
5861 ; CHECK: entry:
5862 ; CHECK-NEXT: %4 = icmp uge <8 x i16> %0, %1
5863 ; CHECK-NEXT: %5 = select <8 x i1> %4, <8 x i16> %2, <8 x i16> %3
5864 ; CHECK-NEXT: ret <8 x i16> %5
5865 ; CHECK-NEXT: }
5866
5867 define <8 x i16> @icmp_slt_on_8xi16(<8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
5868 entry:
5869 %4 = icmp slt <8 x i16> %0, %1
5870 %5 = select <8 x i1> %4, <8 x i16> %2, <8 x i16> %3
5871 ret <8 x i16> %5
5872 }
5873 ; CHECK-LABEL: define <8 x i16> @icmp_slt_on_8xi16(<8 x i16>, <8 x i16>, <8 x i1 6>, <8 x i16>) {
5874 ; CHECK: entry:
5875 ; CHECK-NEXT: %4 = icmp slt <8 x i16> %0, %1
5876 ; CHECK-NEXT: %5 = select <8 x i1> %4, <8 x i16> %2, <8 x i16> %3
5877 ; CHECK-NEXT: ret <8 x i16> %5
5878 ; CHECK-NEXT: }
5879
5880 define <8 x i16> @icmp_ult_on_8xi16(<8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
5881 entry:
5882 %4 = icmp ult <8 x i16> %0, %1
5883 %5 = select <8 x i1> %4, <8 x i16> %2, <8 x i16> %3
5884 ret <8 x i16> %5
5885 }
5886 ; CHECK-LABEL: define <8 x i16> @icmp_ult_on_8xi16(<8 x i16>, <8 x i16>, <8 x i1 6>, <8 x i16>) {
5887 ; CHECK: entry:
5888 ; CHECK-NEXT: %4 = icmp ult <8 x i16> %0, %1
5889 ; CHECK-NEXT: %5 = select <8 x i1> %4, <8 x i16> %2, <8 x i16> %3
5890 ; CHECK-NEXT: ret <8 x i16> %5
5891 ; CHECK-NEXT: }
5892
5893 define <8 x i16> @icmp_sle_on_8xi16(<8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
5894 entry:
5895 %4 = icmp sle <8 x i16> %0, %1
5896 %5 = select <8 x i1> %4, <8 x i16> %2, <8 x i16> %3
5897 ret <8 x i16> %5
5898 }
5899 ; CHECK-LABEL: define <8 x i16> @icmp_sle_on_8xi16(<8 x i16>, <8 x i16>, <8 x i1 6>, <8 x i16>) {
5900 ; CHECK: entry:
5901 ; CHECK-NEXT: %4 = icmp sle <8 x i16> %0, %1
5902 ; CHECK-NEXT: %5 = select <8 x i1> %4, <8 x i16> %2, <8 x i16> %3
5903 ; CHECK-NEXT: ret <8 x i16> %5
5904 ; CHECK-NEXT: }
5905
5906 define <8 x i16> @icmp_ule_on_8xi16(<8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
5907 entry:
5908 %4 = icmp ule <8 x i16> %0, %1
5909 %5 = select <8 x i1> %4, <8 x i16> %2, <8 x i16> %3
5910 ret <8 x i16> %5
5911 }
5912 ; CHECK-LABEL: define <8 x i16> @icmp_ule_on_8xi16(<8 x i16>, <8 x i16>, <8 x i1 6>, <8 x i16>) {
5913 ; CHECK: entry:
5914 ; CHECK-NEXT: %4 = icmp ule <8 x i16> %0, %1
5915 ; CHECK-NEXT: %5 = select <8 x i1> %4, <8 x i16> %2, <8 x i16> %3
5916 ; CHECK-NEXT: ret <8 x i16> %5
5917 ; CHECK-NEXT: }
5918
5919 define <8 x i32> @icmp_eq_on_8xi32(<8 x i32>, <8 x i32>, <8 x i32>, <8 x i32>) {
5920 entry:
5921 %4 = icmp eq <8 x i32> %0, %1
5922 %5 = select <8 x i1> %4, <8 x i32> %2, <8 x i32> %3
5923 ret <8 x i32> %5
5924 }
5925 ; CHECK-LABEL: define <4 x i32> @icmp_eq_on_8xi32(<4 x i32>* nocapture nonnull d ereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
5926 ; CHECK: entry:
5927 ; CHECK-NEXT: %9 = icmp eq <4 x i32> %1, %3
5928 ; CHECK-NEXT: %10 = icmp eq <4 x i32> %2, %4
5929 ; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x i32> %5, <4 x i32> %7
5930 ; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x i32> %6, <4 x i32> %8
5931 ; CHECK-NEXT: store <4 x i32> %12, <4 x i32>* %0, align 16
5932 ; CHECK-NEXT: ret <4 x i32> %11
5933 ; CHECK-NEXT: }
5934
5935 define <8 x i32> @icmp_ne_on_8xi32(<8 x i32>, <8 x i32>, <8 x i32>, <8 x i32>) {
5936 entry:
5937 %4 = icmp ne <8 x i32> %0, %1
5938 %5 = select <8 x i1> %4, <8 x i32> %2, <8 x i32> %3
5939 ret <8 x i32> %5
5940 }
5941 ; CHECK-LABEL: define <4 x i32> @icmp_ne_on_8xi32(<4 x i32>* nocapture nonnull d ereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
5942 ; CHECK: entry:
5943 ; CHECK-NEXT: %9 = icmp ne <4 x i32> %1, %3
5944 ; CHECK-NEXT: %10 = icmp ne <4 x i32> %2, %4
5945 ; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x i32> %5, <4 x i32> %7
5946 ; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x i32> %6, <4 x i32> %8
5947 ; CHECK-NEXT: store <4 x i32> %12, <4 x i32>* %0, align 16
5948 ; CHECK-NEXT: ret <4 x i32> %11
5949 ; CHECK-NEXT: }
5950
5951 define <8 x i32> @icmp_sgt_on_8xi32(<8 x i32>, <8 x i32>, <8 x i32>, <8 x i32>) {
5952 entry:
5953 %4 = icmp sgt <8 x i32> %0, %1
5954 %5 = select <8 x i1> %4, <8 x i32> %2, <8 x i32> %3
5955 ret <8 x i32> %5
5956 }
5957 ; CHECK-LABEL: define <4 x i32> @icmp_sgt_on_8xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
5958 ; CHECK: entry:
5959 ; CHECK-NEXT: %9 = icmp sgt <4 x i32> %1, %3
5960 ; CHECK-NEXT: %10 = icmp sgt <4 x i32> %2, %4
5961 ; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x i32> %5, <4 x i32> %7
5962 ; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x i32> %6, <4 x i32> %8
5963 ; CHECK-NEXT: store <4 x i32> %12, <4 x i32>* %0, align 16
5964 ; CHECK-NEXT: ret <4 x i32> %11
5965 ; CHECK-NEXT: }
5966
5967 define <8 x i32> @icmp_ugt_on_8xi32(<8 x i32>, <8 x i32>, <8 x i32>, <8 x i32>) {
5968 entry:
5969 %4 = icmp ugt <8 x i32> %0, %1
5970 %5 = select <8 x i1> %4, <8 x i32> %2, <8 x i32> %3
5971 ret <8 x i32> %5
5972 }
5973 ; CHECK-LABEL: define <4 x i32> @icmp_ugt_on_8xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
5974 ; CHECK: entry:
5975 ; CHECK-NEXT: %9 = icmp ugt <4 x i32> %1, %3
5976 ; CHECK-NEXT: %10 = icmp ugt <4 x i32> %2, %4
5977 ; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x i32> %5, <4 x i32> %7
5978 ; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x i32> %6, <4 x i32> %8
5979 ; CHECK-NEXT: store <4 x i32> %12, <4 x i32>* %0, align 16
5980 ; CHECK-NEXT: ret <4 x i32> %11
5981 ; CHECK-NEXT: }
5982
5983 define <8 x i32> @icmp_sge_on_8xi32(<8 x i32>, <8 x i32>, <8 x i32>, <8 x i32>) {
5984 entry:
5985 %4 = icmp sge <8 x i32> %0, %1
5986 %5 = select <8 x i1> %4, <8 x i32> %2, <8 x i32> %3
5987 ret <8 x i32> %5
5988 }
5989 ; CHECK-LABEL: define <4 x i32> @icmp_sge_on_8xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
5990 ; CHECK: entry:
5991 ; CHECK-NEXT: %9 = icmp sge <4 x i32> %1, %3
5992 ; CHECK-NEXT: %10 = icmp sge <4 x i32> %2, %4
5993 ; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x i32> %5, <4 x i32> %7
5994 ; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x i32> %6, <4 x i32> %8
5995 ; CHECK-NEXT: store <4 x i32> %12, <4 x i32>* %0, align 16
5996 ; CHECK-NEXT: ret <4 x i32> %11
5997 ; CHECK-NEXT: }
5998
5999 define <8 x i32> @icmp_uge_on_8xi32(<8 x i32>, <8 x i32>, <8 x i32>, <8 x i32>) {
6000 entry:
6001 %4 = icmp uge <8 x i32> %0, %1
6002 %5 = select <8 x i1> %4, <8 x i32> %2, <8 x i32> %3
6003 ret <8 x i32> %5
6004 }
6005 ; CHECK-LABEL: define <4 x i32> @icmp_uge_on_8xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
6006 ; CHECK: entry:
6007 ; CHECK-NEXT: %9 = icmp uge <4 x i32> %1, %3
6008 ; CHECK-NEXT: %10 = icmp uge <4 x i32> %2, %4
6009 ; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x i32> %5, <4 x i32> %7
6010 ; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x i32> %6, <4 x i32> %8
6011 ; CHECK-NEXT: store <4 x i32> %12, <4 x i32>* %0, align 16
6012 ; CHECK-NEXT: ret <4 x i32> %11
6013 ; CHECK-NEXT: }
6014
6015 define <8 x i32> @icmp_slt_on_8xi32(<8 x i32>, <8 x i32>, <8 x i32>, <8 x i32>) {
6016 entry:
6017 %4 = icmp slt <8 x i32> %0, %1
6018 %5 = select <8 x i1> %4, <8 x i32> %2, <8 x i32> %3
6019 ret <8 x i32> %5
6020 }
6021 ; CHECK-LABEL: define <4 x i32> @icmp_slt_on_8xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
6022 ; CHECK: entry:
6023 ; CHECK-NEXT: %9 = icmp slt <4 x i32> %1, %3
6024 ; CHECK-NEXT: %10 = icmp slt <4 x i32> %2, %4
6025 ; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x i32> %5, <4 x i32> %7
6026 ; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x i32> %6, <4 x i32> %8
6027 ; CHECK-NEXT: store <4 x i32> %12, <4 x i32>* %0, align 16
6028 ; CHECK-NEXT: ret <4 x i32> %11
6029 ; CHECK-NEXT: }
6030
6031 define <8 x i32> @icmp_ult_on_8xi32(<8 x i32>, <8 x i32>, <8 x i32>, <8 x i32>) {
6032 entry:
6033 %4 = icmp ult <8 x i32> %0, %1
6034 %5 = select <8 x i1> %4, <8 x i32> %2, <8 x i32> %3
6035 ret <8 x i32> %5
6036 }
6037 ; CHECK-LABEL: define <4 x i32> @icmp_ult_on_8xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
6038 ; CHECK: entry:
6039 ; CHECK-NEXT: %9 = icmp ult <4 x i32> %1, %3
6040 ; CHECK-NEXT: %10 = icmp ult <4 x i32> %2, %4
6041 ; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x i32> %5, <4 x i32> %7
6042 ; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x i32> %6, <4 x i32> %8
6043 ; CHECK-NEXT: store <4 x i32> %12, <4 x i32>* %0, align 16
6044 ; CHECK-NEXT: ret <4 x i32> %11
6045 ; CHECK-NEXT: }
6046
6047 define <8 x i32> @icmp_sle_on_8xi32(<8 x i32>, <8 x i32>, <8 x i32>, <8 x i32>) {
6048 entry:
6049 %4 = icmp sle <8 x i32> %0, %1
6050 %5 = select <8 x i1> %4, <8 x i32> %2, <8 x i32> %3
6051 ret <8 x i32> %5
6052 }
6053 ; CHECK-LABEL: define <4 x i32> @icmp_sle_on_8xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
6054 ; CHECK: entry:
6055 ; CHECK-NEXT: %9 = icmp sle <4 x i32> %1, %3
6056 ; CHECK-NEXT: %10 = icmp sle <4 x i32> %2, %4
6057 ; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x i32> %5, <4 x i32> %7
6058 ; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x i32> %6, <4 x i32> %8
6059 ; CHECK-NEXT: store <4 x i32> %12, <4 x i32>* %0, align 16
6060 ; CHECK-NEXT: ret <4 x i32> %11
6061 ; CHECK-NEXT: }
6062
6063 define <8 x i32> @icmp_ule_on_8xi32(<8 x i32>, <8 x i32>, <8 x i32>, <8 x i32>) {
6064 entry:
6065 %4 = icmp ule <8 x i32> %0, %1
6066 %5 = select <8 x i1> %4, <8 x i32> %2, <8 x i32> %3
6067 ret <8 x i32> %5
6068 }
6069 ; CHECK-LABEL: define <4 x i32> @icmp_ule_on_8xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
6070 ; CHECK: entry:
6071 ; CHECK-NEXT: %9 = icmp ule <4 x i32> %1, %3
6072 ; CHECK-NEXT: %10 = icmp ule <4 x i32> %2, %4
6073 ; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x i32> %5, <4 x i32> %7
6074 ; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x i32> %6, <4 x i32> %8
6075 ; CHECK-NEXT: store <4 x i32> %12, <4 x i32>* %0, align 16
6076 ; CHECK-NEXT: ret <4 x i32> %11
6077 ; CHECK-NEXT: }
6078
6079 define <8 x i64> @icmp_eq_on_8xi64(<8 x i64>, <8 x i64>, <8 x i64>, <8 x i64>) {
6080 entry:
6081 %4 = icmp eq <8 x i64> %0, %1
6082 %5 = select <8 x i1> %4, <8 x i64> %2, <8 x i64> %3
6083 ret <8 x i64> %5
6084 }
6085 ; CHECK-LABEL: define <2 x i64> @icmp_eq_on_8xi64(<2 x i64>* nocapture nonnull d ereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i6 4>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
6086 ; CHECK: entry:
6087 ; CHECK-NEXT: %19 = icmp eq <2 x i64> %3, %7
6088 ; CHECK-NEXT: %20 = icmp eq <2 x i64> %4, %8
6089 ; CHECK-NEXT: %21 = icmp eq <2 x i64> %5, %9
6090 ; CHECK-NEXT: %22 = icmp eq <2 x i64> %6, %10
6091 ; CHECK-NEXT: %23 = select <2 x i1> %19, <2 x i64> %11, <2 x i64> %15
6092 ; CHECK-NEXT: %24 = select <2 x i1> %20, <2 x i64> %12, <2 x i64> %16
6093 ; CHECK-NEXT: %25 = select <2 x i1> %21, <2 x i64> %13, <2 x i64> %17
6094 ; CHECK-NEXT: %26 = select <2 x i1> %22, <2 x i64> %14, <2 x i64> %18
6095 ; CHECK-NEXT: store <2 x i64> %24, <2 x i64>* %0, align 16
6096 ; CHECK-NEXT: store <2 x i64> %25, <2 x i64>* %1, align 16
6097 ; CHECK-NEXT: store <2 x i64> %26, <2 x i64>* %2, align 16
6098 ; CHECK-NEXT: ret <2 x i64> %23
6099 ; CHECK-NEXT: }
6100
6101 define <8 x i64> @icmp_ne_on_8xi64(<8 x i64>, <8 x i64>, <8 x i64>, <8 x i64>) {
6102 entry:
6103 %4 = icmp ne <8 x i64> %0, %1
6104 %5 = select <8 x i1> %4, <8 x i64> %2, <8 x i64> %3
6105 ret <8 x i64> %5
6106 }
6107 ; CHECK-LABEL: define <2 x i64> @icmp_ne_on_8xi64(<2 x i64>* nocapture nonnull d ereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i6 4>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
6108 ; CHECK: entry:
6109 ; CHECK-NEXT: %19 = icmp ne <2 x i64> %3, %7
6110 ; CHECK-NEXT: %20 = icmp ne <2 x i64> %4, %8
6111 ; CHECK-NEXT: %21 = icmp ne <2 x i64> %5, %9
6112 ; CHECK-NEXT: %22 = icmp ne <2 x i64> %6, %10
6113 ; CHECK-NEXT: %23 = select <2 x i1> %19, <2 x i64> %11, <2 x i64> %15
6114 ; CHECK-NEXT: %24 = select <2 x i1> %20, <2 x i64> %12, <2 x i64> %16
6115 ; CHECK-NEXT: %25 = select <2 x i1> %21, <2 x i64> %13, <2 x i64> %17
6116 ; CHECK-NEXT: %26 = select <2 x i1> %22, <2 x i64> %14, <2 x i64> %18
6117 ; CHECK-NEXT: store <2 x i64> %24, <2 x i64>* %0, align 16
6118 ; CHECK-NEXT: store <2 x i64> %25, <2 x i64>* %1, align 16
6119 ; CHECK-NEXT: store <2 x i64> %26, <2 x i64>* %2, align 16
6120 ; CHECK-NEXT: ret <2 x i64> %23
6121 ; CHECK-NEXT: }
6122
6123 define <8 x i64> @icmp_sgt_on_8xi64(<8 x i64>, <8 x i64>, <8 x i64>, <8 x i64>) {
6124 entry:
6125 %4 = icmp sgt <8 x i64> %0, %1
6126 %5 = select <8 x i1> %4, <8 x i64> %2, <8 x i64> %3
6127 ret <8 x i64> %5
6128 }
6129 ; CHECK-LABEL: define <2 x i64> @icmp_sgt_on_8xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64> * nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i 64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> , <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
6130 ; CHECK: entry:
6131 ; CHECK-NEXT: %19 = icmp sgt <2 x i64> %3, %7
6132 ; CHECK-NEXT: %20 = icmp sgt <2 x i64> %4, %8
6133 ; CHECK-NEXT: %21 = icmp sgt <2 x i64> %5, %9
6134 ; CHECK-NEXT: %22 = icmp sgt <2 x i64> %6, %10
6135 ; CHECK-NEXT: %23 = select <2 x i1> %19, <2 x i64> %11, <2 x i64> %15
6136 ; CHECK-NEXT: %24 = select <2 x i1> %20, <2 x i64> %12, <2 x i64> %16
6137 ; CHECK-NEXT: %25 = select <2 x i1> %21, <2 x i64> %13, <2 x i64> %17
6138 ; CHECK-NEXT: %26 = select <2 x i1> %22, <2 x i64> %14, <2 x i64> %18
6139 ; CHECK-NEXT: store <2 x i64> %24, <2 x i64>* %0, align 16
6140 ; CHECK-NEXT: store <2 x i64> %25, <2 x i64>* %1, align 16
6141 ; CHECK-NEXT: store <2 x i64> %26, <2 x i64>* %2, align 16
6142 ; CHECK-NEXT: ret <2 x i64> %23
6143 ; CHECK-NEXT: }
6144
6145 define <8 x i64> @icmp_ugt_on_8xi64(<8 x i64>, <8 x i64>, <8 x i64>, <8 x i64>) {
6146 entry:
6147 %4 = icmp ugt <8 x i64> %0, %1
6148 %5 = select <8 x i1> %4, <8 x i64> %2, <8 x i64> %3
6149 ret <8 x i64> %5
6150 }
6151 ; CHECK-LABEL: define <2 x i64> @icmp_ugt_on_8xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64> * nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i 64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> , <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
6152 ; CHECK: entry:
6153 ; CHECK-NEXT: %19 = icmp ugt <2 x i64> %3, %7
6154 ; CHECK-NEXT: %20 = icmp ugt <2 x i64> %4, %8
6155 ; CHECK-NEXT: %21 = icmp ugt <2 x i64> %5, %9
6156 ; CHECK-NEXT: %22 = icmp ugt <2 x i64> %6, %10
6157 ; CHECK-NEXT: %23 = select <2 x i1> %19, <2 x i64> %11, <2 x i64> %15
6158 ; CHECK-NEXT: %24 = select <2 x i1> %20, <2 x i64> %12, <2 x i64> %16
6159 ; CHECK-NEXT: %25 = select <2 x i1> %21, <2 x i64> %13, <2 x i64> %17
6160 ; CHECK-NEXT: %26 = select <2 x i1> %22, <2 x i64> %14, <2 x i64> %18
6161 ; CHECK-NEXT: store <2 x i64> %24, <2 x i64>* %0, align 16
6162 ; CHECK-NEXT: store <2 x i64> %25, <2 x i64>* %1, align 16
6163 ; CHECK-NEXT: store <2 x i64> %26, <2 x i64>* %2, align 16
6164 ; CHECK-NEXT: ret <2 x i64> %23
6165 ; CHECK-NEXT: }
6166
6167 define <8 x i64> @icmp_sge_on_8xi64(<8 x i64>, <8 x i64>, <8 x i64>, <8 x i64>) {
6168 entry:
6169 %4 = icmp sge <8 x i64> %0, %1
6170 %5 = select <8 x i1> %4, <8 x i64> %2, <8 x i64> %3
6171 ret <8 x i64> %5
6172 }
6173 ; CHECK-LABEL: define <2 x i64> @icmp_sge_on_8xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64> * nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i 64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> , <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
6174 ; CHECK: entry:
6175 ; CHECK-NEXT: %19 = icmp sge <2 x i64> %3, %7
6176 ; CHECK-NEXT: %20 = icmp sge <2 x i64> %4, %8
6177 ; CHECK-NEXT: %21 = icmp sge <2 x i64> %5, %9
6178 ; CHECK-NEXT: %22 = icmp sge <2 x i64> %6, %10
6179 ; CHECK-NEXT: %23 = select <2 x i1> %19, <2 x i64> %11, <2 x i64> %15
6180 ; CHECK-NEXT: %24 = select <2 x i1> %20, <2 x i64> %12, <2 x i64> %16
6181 ; CHECK-NEXT: %25 = select <2 x i1> %21, <2 x i64> %13, <2 x i64> %17
6182 ; CHECK-NEXT: %26 = select <2 x i1> %22, <2 x i64> %14, <2 x i64> %18
6183 ; CHECK-NEXT: store <2 x i64> %24, <2 x i64>* %0, align 16
6184 ; CHECK-NEXT: store <2 x i64> %25, <2 x i64>* %1, align 16
6185 ; CHECK-NEXT: store <2 x i64> %26, <2 x i64>* %2, align 16
6186 ; CHECK-NEXT: ret <2 x i64> %23
6187 ; CHECK-NEXT: }
6188
6189 define <8 x i64> @icmp_uge_on_8xi64(<8 x i64>, <8 x i64>, <8 x i64>, <8 x i64>) {
6190 entry:
6191 %4 = icmp uge <8 x i64> %0, %1
6192 %5 = select <8 x i1> %4, <8 x i64> %2, <8 x i64> %3
6193 ret <8 x i64> %5
6194 }
6195 ; CHECK-LABEL: define <2 x i64> @icmp_uge_on_8xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64> * nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i 64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> , <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
6196 ; CHECK: entry:
6197 ; CHECK-NEXT: %19 = icmp uge <2 x i64> %3, %7
6198 ; CHECK-NEXT: %20 = icmp uge <2 x i64> %4, %8
6199 ; CHECK-NEXT: %21 = icmp uge <2 x i64> %5, %9
6200 ; CHECK-NEXT: %22 = icmp uge <2 x i64> %6, %10
6201 ; CHECK-NEXT: %23 = select <2 x i1> %19, <2 x i64> %11, <2 x i64> %15
6202 ; CHECK-NEXT: %24 = select <2 x i1> %20, <2 x i64> %12, <2 x i64> %16
6203 ; CHECK-NEXT: %25 = select <2 x i1> %21, <2 x i64> %13, <2 x i64> %17
6204 ; CHECK-NEXT: %26 = select <2 x i1> %22, <2 x i64> %14, <2 x i64> %18
6205 ; CHECK-NEXT: store <2 x i64> %24, <2 x i64>* %0, align 16
6206 ; CHECK-NEXT: store <2 x i64> %25, <2 x i64>* %1, align 16
6207 ; CHECK-NEXT: store <2 x i64> %26, <2 x i64>* %2, align 16
6208 ; CHECK-NEXT: ret <2 x i64> %23
6209 ; CHECK-NEXT: }
6210
6211 define <8 x i64> @icmp_slt_on_8xi64(<8 x i64>, <8 x i64>, <8 x i64>, <8 x i64>) {
6212 entry:
6213 %4 = icmp slt <8 x i64> %0, %1
6214 %5 = select <8 x i1> %4, <8 x i64> %2, <8 x i64> %3
6215 ret <8 x i64> %5
6216 }
6217 ; CHECK-LABEL: define <2 x i64> @icmp_slt_on_8xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64> * nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i 64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> , <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
6218 ; CHECK: entry:
6219 ; CHECK-NEXT: %19 = icmp slt <2 x i64> %3, %7
6220 ; CHECK-NEXT: %20 = icmp slt <2 x i64> %4, %8
6221 ; CHECK-NEXT: %21 = icmp slt <2 x i64> %5, %9
6222 ; CHECK-NEXT: %22 = icmp slt <2 x i64> %6, %10
6223 ; CHECK-NEXT: %23 = select <2 x i1> %19, <2 x i64> %11, <2 x i64> %15
6224 ; CHECK-NEXT: %24 = select <2 x i1> %20, <2 x i64> %12, <2 x i64> %16
6225 ; CHECK-NEXT: %25 = select <2 x i1> %21, <2 x i64> %13, <2 x i64> %17
6226 ; CHECK-NEXT: %26 = select <2 x i1> %22, <2 x i64> %14, <2 x i64> %18
6227 ; CHECK-NEXT: store <2 x i64> %24, <2 x i64>* %0, align 16
6228 ; CHECK-NEXT: store <2 x i64> %25, <2 x i64>* %1, align 16
6229 ; CHECK-NEXT: store <2 x i64> %26, <2 x i64>* %2, align 16
6230 ; CHECK-NEXT: ret <2 x i64> %23
6231 ; CHECK-NEXT: }
6232
6233 define <8 x i64> @icmp_ult_on_8xi64(<8 x i64>, <8 x i64>, <8 x i64>, <8 x i64>) {
6234 entry:
6235 %4 = icmp ult <8 x i64> %0, %1
6236 %5 = select <8 x i1> %4, <8 x i64> %2, <8 x i64> %3
6237 ret <8 x i64> %5
6238 }
6239 ; CHECK-LABEL: define <2 x i64> @icmp_ult_on_8xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64> * nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i 64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> , <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
6240 ; CHECK: entry:
6241 ; CHECK-NEXT: %19 = icmp ult <2 x i64> %3, %7
6242 ; CHECK-NEXT: %20 = icmp ult <2 x i64> %4, %8
6243 ; CHECK-NEXT: %21 = icmp ult <2 x i64> %5, %9
6244 ; CHECK-NEXT: %22 = icmp ult <2 x i64> %6, %10
6245 ; CHECK-NEXT: %23 = select <2 x i1> %19, <2 x i64> %11, <2 x i64> %15
6246 ; CHECK-NEXT: %24 = select <2 x i1> %20, <2 x i64> %12, <2 x i64> %16
6247 ; CHECK-NEXT: %25 = select <2 x i1> %21, <2 x i64> %13, <2 x i64> %17
6248 ; CHECK-NEXT: %26 = select <2 x i1> %22, <2 x i64> %14, <2 x i64> %18
6249 ; CHECK-NEXT: store <2 x i64> %24, <2 x i64>* %0, align 16
6250 ; CHECK-NEXT: store <2 x i64> %25, <2 x i64>* %1, align 16
6251 ; CHECK-NEXT: store <2 x i64> %26, <2 x i64>* %2, align 16
6252 ; CHECK-NEXT: ret <2 x i64> %23
6253 ; CHECK-NEXT: }
6254
6255 define <8 x i64> @icmp_sle_on_8xi64(<8 x i64>, <8 x i64>, <8 x i64>, <8 x i64>) {
6256 entry:
6257 %4 = icmp sle <8 x i64> %0, %1
6258 %5 = select <8 x i1> %4, <8 x i64> %2, <8 x i64> %3
6259 ret <8 x i64> %5
6260 }
6261 ; CHECK-LABEL: define <2 x i64> @icmp_sle_on_8xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64> * nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i 64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> , <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
6262 ; CHECK: entry:
6263 ; CHECK-NEXT: %19 = icmp sle <2 x i64> %3, %7
6264 ; CHECK-NEXT: %20 = icmp sle <2 x i64> %4, %8
6265 ; CHECK-NEXT: %21 = icmp sle <2 x i64> %5, %9
6266 ; CHECK-NEXT: %22 = icmp sle <2 x i64> %6, %10
6267 ; CHECK-NEXT: %23 = select <2 x i1> %19, <2 x i64> %11, <2 x i64> %15
6268 ; CHECK-NEXT: %24 = select <2 x i1> %20, <2 x i64> %12, <2 x i64> %16
6269 ; CHECK-NEXT: %25 = select <2 x i1> %21, <2 x i64> %13, <2 x i64> %17
6270 ; CHECK-NEXT: %26 = select <2 x i1> %22, <2 x i64> %14, <2 x i64> %18
6271 ; CHECK-NEXT: store <2 x i64> %24, <2 x i64>* %0, align 16
6272 ; CHECK-NEXT: store <2 x i64> %25, <2 x i64>* %1, align 16
6273 ; CHECK-NEXT: store <2 x i64> %26, <2 x i64>* %2, align 16
6274 ; CHECK-NEXT: ret <2 x i64> %23
6275 ; CHECK-NEXT: }
6276
6277 define <8 x i64> @icmp_ule_on_8xi64(<8 x i64>, <8 x i64>, <8 x i64>, <8 x i64>) {
6278 entry:
6279 %4 = icmp ule <8 x i64> %0, %1
6280 %5 = select <8 x i1> %4, <8 x i64> %2, <8 x i64> %3
6281 ret <8 x i64> %5
6282 }
6283 ; CHECK-LABEL: define <2 x i64> @icmp_ule_on_8xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64> * nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i 64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> , <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
6284 ; CHECK: entry:
6285 ; CHECK-NEXT: %19 = icmp ule <2 x i64> %3, %7
6286 ; CHECK-NEXT: %20 = icmp ule <2 x i64> %4, %8
6287 ; CHECK-NEXT: %21 = icmp ule <2 x i64> %5, %9
6288 ; CHECK-NEXT: %22 = icmp ule <2 x i64> %6, %10
6289 ; CHECK-NEXT: %23 = select <2 x i1> %19, <2 x i64> %11, <2 x i64> %15
6290 ; CHECK-NEXT: %24 = select <2 x i1> %20, <2 x i64> %12, <2 x i64> %16
6291 ; CHECK-NEXT: %25 = select <2 x i1> %21, <2 x i64> %13, <2 x i64> %17
6292 ; CHECK-NEXT: %26 = select <2 x i1> %22, <2 x i64> %14, <2 x i64> %18
6293 ; CHECK-NEXT: store <2 x i64> %24, <2 x i64>* %0, align 16
6294 ; CHECK-NEXT: store <2 x i64> %25, <2 x i64>* %1, align 16
6295 ; CHECK-NEXT: store <2 x i64> %26, <2 x i64>* %2, align 16
6296 ; CHECK-NEXT: ret <2 x i64> %23
6297 ; CHECK-NEXT: }
6298
6299 define <8 x i8*> @icmp_eq_on_8xi8ptr(<8 x i8*>, <8 x i8*>, <8 x i8*>, <8 x i8*>) {
6300 entry:
6301 %4 = icmp eq <8 x i8*> %0, %1
6302 %5 = select <8 x i1> %4, <8 x i8*> %2, <8 x i8*> %3
6303 ret <8 x i8*> %5
6304 }
6305 ; CHECK-LABEL: define <4 x i8*> @icmp_eq_on_8xi8ptr(<4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
6306 ; CHECK: entry:
6307 ; CHECK-NEXT: %9 = icmp eq <4 x i8*> %1, %3
6308 ; CHECK-NEXT: %10 = icmp eq <4 x i8*> %2, %4
6309 ; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x i8*> %5, <4 x i8*> %7
6310 ; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x i8*> %6, <4 x i8*> %8
6311 ; CHECK-NEXT: store <4 x i8*> %12, <4 x i8*>* %0, align 16
6312 ; CHECK-NEXT: ret <4 x i8*> %11
6313 ; CHECK-NEXT: }
6314
6315 define <8 x i8*> @icmp_ne_on_8xi8ptr(<8 x i8*>, <8 x i8*>, <8 x i8*>, <8 x i8*>) {
6316 entry:
6317 %4 = icmp ne <8 x i8*> %0, %1
6318 %5 = select <8 x i1> %4, <8 x i8*> %2, <8 x i8*> %3
6319 ret <8 x i8*> %5
6320 }
6321 ; CHECK-LABEL: define <4 x i8*> @icmp_ne_on_8xi8ptr(<4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
6322 ; CHECK: entry:
6323 ; CHECK-NEXT: %9 = icmp ne <4 x i8*> %1, %3
6324 ; CHECK-NEXT: %10 = icmp ne <4 x i8*> %2, %4
6325 ; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x i8*> %5, <4 x i8*> %7
6326 ; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x i8*> %6, <4 x i8*> %8
6327 ; CHECK-NEXT: store <4 x i8*> %12, <4 x i8*>* %0, align 16
6328 ; CHECK-NEXT: ret <4 x i8*> %11
6329 ; CHECK-NEXT: }
6330
6331 define <8 x i8*> @icmp_sgt_on_8xi8ptr(<8 x i8*>, <8 x i8*>, <8 x i8*>, <8 x i8*> ) {
6332 entry:
6333 %4 = icmp sgt <8 x i8*> %0, %1
6334 %5 = select <8 x i1> %4, <8 x i8*> %2, <8 x i8*> %3
6335 ret <8 x i8*> %5
6336 }
6337 ; CHECK-LABEL: define <4 x i8*> @icmp_sgt_on_8xi8ptr(<4 x i8*>* nocapture nonnul l dereferenceable(16), <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
6338 ; CHECK: entry:
6339 ; CHECK-NEXT: %9 = icmp sgt <4 x i8*> %1, %3
6340 ; CHECK-NEXT: %10 = icmp sgt <4 x i8*> %2, %4
6341 ; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x i8*> %5, <4 x i8*> %7
6342 ; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x i8*> %6, <4 x i8*> %8
6343 ; CHECK-NEXT: store <4 x i8*> %12, <4 x i8*>* %0, align 16
6344 ; CHECK-NEXT: ret <4 x i8*> %11
6345 ; CHECK-NEXT: }
6346
6347 define <8 x i8*> @icmp_ugt_on_8xi8ptr(<8 x i8*>, <8 x i8*>, <8 x i8*>, <8 x i8*> ) {
6348 entry:
6349 %4 = icmp ugt <8 x i8*> %0, %1
6350 %5 = select <8 x i1> %4, <8 x i8*> %2, <8 x i8*> %3
6351 ret <8 x i8*> %5
6352 }
6353 ; CHECK-LABEL: define <4 x i8*> @icmp_ugt_on_8xi8ptr(<4 x i8*>* nocapture nonnul l dereferenceable(16), <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
6354 ; CHECK: entry:
6355 ; CHECK-NEXT: %9 = icmp ugt <4 x i8*> %1, %3
6356 ; CHECK-NEXT: %10 = icmp ugt <4 x i8*> %2, %4
6357 ; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x i8*> %5, <4 x i8*> %7
6358 ; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x i8*> %6, <4 x i8*> %8
6359 ; CHECK-NEXT: store <4 x i8*> %12, <4 x i8*>* %0, align 16
6360 ; CHECK-NEXT: ret <4 x i8*> %11
6361 ; CHECK-NEXT: }
6362
6363 define <8 x i8*> @icmp_sge_on_8xi8ptr(<8 x i8*>, <8 x i8*>, <8 x i8*>, <8 x i8*> ) {
6364 entry:
6365 %4 = icmp sge <8 x i8*> %0, %1
6366 %5 = select <8 x i1> %4, <8 x i8*> %2, <8 x i8*> %3
6367 ret <8 x i8*> %5
6368 }
6369 ; CHECK-LABEL: define <4 x i8*> @icmp_sge_on_8xi8ptr(<4 x i8*>* nocapture nonnul l dereferenceable(16), <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
6370 ; CHECK: entry:
6371 ; CHECK-NEXT: %9 = icmp sge <4 x i8*> %1, %3
6372 ; CHECK-NEXT: %10 = icmp sge <4 x i8*> %2, %4
6373 ; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x i8*> %5, <4 x i8*> %7
6374 ; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x i8*> %6, <4 x i8*> %8
6375 ; CHECK-NEXT: store <4 x i8*> %12, <4 x i8*>* %0, align 16
6376 ; CHECK-NEXT: ret <4 x i8*> %11
6377 ; CHECK-NEXT: }
6378
6379 define <8 x i8*> @icmp_uge_on_8xi8ptr(<8 x i8*>, <8 x i8*>, <8 x i8*>, <8 x i8*> ) {
6380 entry:
6381 %4 = icmp uge <8 x i8*> %0, %1
6382 %5 = select <8 x i1> %4, <8 x i8*> %2, <8 x i8*> %3
6383 ret <8 x i8*> %5
6384 }
6385 ; CHECK-LABEL: define <4 x i8*> @icmp_uge_on_8xi8ptr(<4 x i8*>* nocapture nonnul l dereferenceable(16), <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
6386 ; CHECK: entry:
6387 ; CHECK-NEXT: %9 = icmp uge <4 x i8*> %1, %3
6388 ; CHECK-NEXT: %10 = icmp uge <4 x i8*> %2, %4
6389 ; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x i8*> %5, <4 x i8*> %7
6390 ; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x i8*> %6, <4 x i8*> %8
6391 ; CHECK-NEXT: store <4 x i8*> %12, <4 x i8*>* %0, align 16
6392 ; CHECK-NEXT: ret <4 x i8*> %11
6393 ; CHECK-NEXT: }
6394
6395 define <8 x i8*> @icmp_slt_on_8xi8ptr(<8 x i8*>, <8 x i8*>, <8 x i8*>, <8 x i8*> ) {
6396 entry:
6397 %4 = icmp slt <8 x i8*> %0, %1
6398 %5 = select <8 x i1> %4, <8 x i8*> %2, <8 x i8*> %3
6399 ret <8 x i8*> %5
6400 }
6401 ; CHECK-LABEL: define <4 x i8*> @icmp_slt_on_8xi8ptr(<4 x i8*>* nocapture nonnul l dereferenceable(16), <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
6402 ; CHECK: entry:
6403 ; CHECK-NEXT: %9 = icmp slt <4 x i8*> %1, %3
6404 ; CHECK-NEXT: %10 = icmp slt <4 x i8*> %2, %4
6405 ; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x i8*> %5, <4 x i8*> %7
6406 ; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x i8*> %6, <4 x i8*> %8
6407 ; CHECK-NEXT: store <4 x i8*> %12, <4 x i8*>* %0, align 16
6408 ; CHECK-NEXT: ret <4 x i8*> %11
6409 ; CHECK-NEXT: }
6410
6411 define <8 x i8*> @icmp_ult_on_8xi8ptr(<8 x i8*>, <8 x i8*>, <8 x i8*>, <8 x i8*> ) {
6412 entry:
6413 %4 = icmp ult <8 x i8*> %0, %1
6414 %5 = select <8 x i1> %4, <8 x i8*> %2, <8 x i8*> %3
6415 ret <8 x i8*> %5
6416 }
6417 ; CHECK-LABEL: define <4 x i8*> @icmp_ult_on_8xi8ptr(<4 x i8*>* nocapture nonnul l dereferenceable(16), <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
6418 ; CHECK: entry:
6419 ; CHECK-NEXT: %9 = icmp ult <4 x i8*> %1, %3
6420 ; CHECK-NEXT: %10 = icmp ult <4 x i8*> %2, %4
6421 ; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x i8*> %5, <4 x i8*> %7
6422 ; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x i8*> %6, <4 x i8*> %8
6423 ; CHECK-NEXT: store <4 x i8*> %12, <4 x i8*>* %0, align 16
6424 ; CHECK-NEXT: ret <4 x i8*> %11
6425 ; CHECK-NEXT: }
6426
6427 define <8 x i8*> @icmp_sle_on_8xi8ptr(<8 x i8*>, <8 x i8*>, <8 x i8*>, <8 x i8*> ) {
6428 entry:
6429 %4 = icmp sle <8 x i8*> %0, %1
6430 %5 = select <8 x i1> %4, <8 x i8*> %2, <8 x i8*> %3
6431 ret <8 x i8*> %5
6432 }
6433 ; CHECK-LABEL: define <4 x i8*> @icmp_sle_on_8xi8ptr(<4 x i8*>* nocapture nonnul l dereferenceable(16), <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
6434 ; CHECK: entry:
6435 ; CHECK-NEXT: %9 = icmp sle <4 x i8*> %1, %3
6436 ; CHECK-NEXT: %10 = icmp sle <4 x i8*> %2, %4
6437 ; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x i8*> %5, <4 x i8*> %7
6438 ; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x i8*> %6, <4 x i8*> %8
6439 ; CHECK-NEXT: store <4 x i8*> %12, <4 x i8*>* %0, align 16
6440 ; CHECK-NEXT: ret <4 x i8*> %11
6441 ; CHECK-NEXT: }
6442
6443 define <8 x i8*> @icmp_ule_on_8xi8ptr(<8 x i8*>, <8 x i8*>, <8 x i8*>, <8 x i8*> ) {
6444 entry:
6445 %4 = icmp ule <8 x i8*> %0, %1
6446 %5 = select <8 x i1> %4, <8 x i8*> %2, <8 x i8*> %3
6447 ret <8 x i8*> %5
6448 }
6449 ; CHECK-LABEL: define <4 x i8*> @icmp_ule_on_8xi8ptr(<4 x i8*>* nocapture nonnul l dereferenceable(16), <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
6450 ; CHECK: entry:
6451 ; CHECK-NEXT: %9 = icmp ule <4 x i8*> %1, %3
6452 ; CHECK-NEXT: %10 = icmp ule <4 x i8*> %2, %4
6453 ; CHECK-NEXT: %11 = select <4 x i1> %9, <4 x i8*> %5, <4 x i8*> %7
6454 ; CHECK-NEXT: %12 = select <4 x i1> %10, <4 x i8*> %6, <4 x i8*> %8
6455 ; CHECK-NEXT: store <4 x i8*> %12, <4 x i8*>* %0, align 16
6456 ; CHECK-NEXT: ret <4 x i8*> %11
6457 ; CHECK-NEXT: }
6458
6459 define <12 x i8> @icmp_eq_on_12xi8(<12 x i8>, <12 x i8>, <12 x i8>, <12 x i8>) {
6460 entry:
6461 %4 = icmp eq <12 x i8> %0, %1
6462 %5 = select <12 x i1> %4, <12 x i8> %2, <12 x i8> %3
6463 ret <12 x i8> %5
6464 }
6465 ; CHECK-LABEL: define <16 x i8> @icmp_eq_on_12xi8(<16 x i8>, <16 x i8>, <16 x i8 >, <16 x i8>) {
6466 ; CHECK: entry:
6467 ; CHECK-NEXT: %4 = icmp eq <16 x i8> %0, %1
6468 ; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
6469 ; CHECK-NEXT: ret <16 x i8> %5
6470 ; CHECK-NEXT: }
6471
6472 define <12 x i8> @icmp_ne_on_12xi8(<12 x i8>, <12 x i8>, <12 x i8>, <12 x i8>) {
6473 entry:
6474 %4 = icmp ne <12 x i8> %0, %1
6475 %5 = select <12 x i1> %4, <12 x i8> %2, <12 x i8> %3
6476 ret <12 x i8> %5
6477 }
6478 ; CHECK-LABEL: define <16 x i8> @icmp_ne_on_12xi8(<16 x i8>, <16 x i8>, <16 x i8 >, <16 x i8>) {
6479 ; CHECK: entry:
6480 ; CHECK-NEXT: %4 = icmp ne <16 x i8> %0, %1
6481 ; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
6482 ; CHECK-NEXT: ret <16 x i8> %5
6483 ; CHECK-NEXT: }
6484
6485 define <12 x i8> @icmp_sgt_on_12xi8(<12 x i8>, <12 x i8>, <12 x i8>, <12 x i8>) {
6486 entry:
6487 %4 = icmp sgt <12 x i8> %0, %1
6488 %5 = select <12 x i1> %4, <12 x i8> %2, <12 x i8> %3
6489 ret <12 x i8> %5
6490 }
6491 ; CHECK-LABEL: define <16 x i8> @icmp_sgt_on_12xi8(<16 x i8>, <16 x i8>, <16 x i 8>, <16 x i8>) {
6492 ; CHECK: entry:
6493 ; CHECK-NEXT: %4 = icmp sgt <16 x i8> %0, %1
6494 ; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
6495 ; CHECK-NEXT: ret <16 x i8> %5
6496 ; CHECK-NEXT: }
6497
6498 define <12 x i8> @icmp_ugt_on_12xi8(<12 x i8>, <12 x i8>, <12 x i8>, <12 x i8>) {
6499 entry:
6500 %4 = icmp ugt <12 x i8> %0, %1
6501 %5 = select <12 x i1> %4, <12 x i8> %2, <12 x i8> %3
6502 ret <12 x i8> %5
6503 }
6504 ; CHECK-LABEL: define <16 x i8> @icmp_ugt_on_12xi8(<16 x i8>, <16 x i8>, <16 x i 8>, <16 x i8>) {
6505 ; CHECK: entry:
6506 ; CHECK-NEXT: %4 = icmp ugt <16 x i8> %0, %1
6507 ; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
6508 ; CHECK-NEXT: ret <16 x i8> %5
6509 ; CHECK-NEXT: }
6510
6511 define <12 x i8> @icmp_sge_on_12xi8(<12 x i8>, <12 x i8>, <12 x i8>, <12 x i8>) {
6512 entry:
6513 %4 = icmp sge <12 x i8> %0, %1
6514 %5 = select <12 x i1> %4, <12 x i8> %2, <12 x i8> %3
6515 ret <12 x i8> %5
6516 }
6517 ; CHECK-LABEL: define <16 x i8> @icmp_sge_on_12xi8(<16 x i8>, <16 x i8>, <16 x i 8>, <16 x i8>) {
6518 ; CHECK: entry:
6519 ; CHECK-NEXT: %4 = icmp sge <16 x i8> %0, %1
6520 ; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
6521 ; CHECK-NEXT: ret <16 x i8> %5
6522 ; CHECK-NEXT: }
6523
6524 define <12 x i8> @icmp_uge_on_12xi8(<12 x i8>, <12 x i8>, <12 x i8>, <12 x i8>) {
6525 entry:
6526 %4 = icmp uge <12 x i8> %0, %1
6527 %5 = select <12 x i1> %4, <12 x i8> %2, <12 x i8> %3
6528 ret <12 x i8> %5
6529 }
6530 ; CHECK-LABEL: define <16 x i8> @icmp_uge_on_12xi8(<16 x i8>, <16 x i8>, <16 x i 8>, <16 x i8>) {
6531 ; CHECK: entry:
6532 ; CHECK-NEXT: %4 = icmp uge <16 x i8> %0, %1
6533 ; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
6534 ; CHECK-NEXT: ret <16 x i8> %5
6535 ; CHECK-NEXT: }
6536
6537 define <12 x i8> @icmp_slt_on_12xi8(<12 x i8>, <12 x i8>, <12 x i8>, <12 x i8>) {
6538 entry:
6539 %4 = icmp slt <12 x i8> %0, %1
6540 %5 = select <12 x i1> %4, <12 x i8> %2, <12 x i8> %3
6541 ret <12 x i8> %5
6542 }
6543 ; CHECK-LABEL: define <16 x i8> @icmp_slt_on_12xi8(<16 x i8>, <16 x i8>, <16 x i 8>, <16 x i8>) {
6544 ; CHECK: entry:
6545 ; CHECK-NEXT: %4 = icmp slt <16 x i8> %0, %1
6546 ; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
6547 ; CHECK-NEXT: ret <16 x i8> %5
6548 ; CHECK-NEXT: }
6549
6550 define <12 x i8> @icmp_ult_on_12xi8(<12 x i8>, <12 x i8>, <12 x i8>, <12 x i8>) {
6551 entry:
6552 %4 = icmp ult <12 x i8> %0, %1
6553 %5 = select <12 x i1> %4, <12 x i8> %2, <12 x i8> %3
6554 ret <12 x i8> %5
6555 }
6556 ; CHECK-LABEL: define <16 x i8> @icmp_ult_on_12xi8(<16 x i8>, <16 x i8>, <16 x i 8>, <16 x i8>) {
6557 ; CHECK: entry:
6558 ; CHECK-NEXT: %4 = icmp ult <16 x i8> %0, %1
6559 ; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
6560 ; CHECK-NEXT: ret <16 x i8> %5
6561 ; CHECK-NEXT: }
6562
6563 define <12 x i8> @icmp_sle_on_12xi8(<12 x i8>, <12 x i8>, <12 x i8>, <12 x i8>) {
6564 entry:
6565 %4 = icmp sle <12 x i8> %0, %1
6566 %5 = select <12 x i1> %4, <12 x i8> %2, <12 x i8> %3
6567 ret <12 x i8> %5
6568 }
6569 ; CHECK-LABEL: define <16 x i8> @icmp_sle_on_12xi8(<16 x i8>, <16 x i8>, <16 x i 8>, <16 x i8>) {
6570 ; CHECK: entry:
6571 ; CHECK-NEXT: %4 = icmp sle <16 x i8> %0, %1
6572 ; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
6573 ; CHECK-NEXT: ret <16 x i8> %5
6574 ; CHECK-NEXT: }
6575
6576 define <12 x i8> @icmp_ule_on_12xi8(<12 x i8>, <12 x i8>, <12 x i8>, <12 x i8>) {
6577 entry:
6578 %4 = icmp ule <12 x i8> %0, %1
6579 %5 = select <12 x i1> %4, <12 x i8> %2, <12 x i8> %3
6580 ret <12 x i8> %5
6581 }
6582 ; CHECK-LABEL: define <16 x i8> @icmp_ule_on_12xi8(<16 x i8>, <16 x i8>, <16 x i 8>, <16 x i8>) {
6583 ; CHECK: entry:
6584 ; CHECK-NEXT: %4 = icmp ule <16 x i8> %0, %1
6585 ; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
6586 ; CHECK-NEXT: ret <16 x i8> %5
6587 ; CHECK-NEXT: }
6588
6589 define <12 x i16> @icmp_eq_on_12xi16(<12 x i16>, <12 x i16>, <12 x i16>, <12 x i 16>) {
6590 entry:
6591 %4 = icmp eq <12 x i16> %0, %1
6592 %5 = select <12 x i1> %4, <12 x i16> %2, <12 x i16> %3
6593 ret <12 x i16> %5
6594 }
6595 ; CHECK-LABEL: define <8 x i16> @icmp_eq_on_12xi16(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
6596 ; CHECK: entry:
6597 ; CHECK-NEXT: %9 = icmp eq <8 x i16> %1, %3
6598 ; CHECK-NEXT: %10 = icmp eq <8 x i16> %2, %4
6599 ; CHECK-NEXT: %11 = select <8 x i1> %9, <8 x i16> %5, <8 x i16> %7
6600 ; CHECK-NEXT: %12 = select <8 x i1> %10, <8 x i16> %6, <8 x i16> %8
6601 ; CHECK-NEXT: store <8 x i16> %12, <8 x i16>* %0, align 16
6602 ; CHECK-NEXT: ret <8 x i16> %11
6603 ; CHECK-NEXT: }
6604
6605 define <12 x i16> @icmp_ne_on_12xi16(<12 x i16>, <12 x i16>, <12 x i16>, <12 x i 16>) {
6606 entry:
6607 %4 = icmp ne <12 x i16> %0, %1
6608 %5 = select <12 x i1> %4, <12 x i16> %2, <12 x i16> %3
6609 ret <12 x i16> %5
6610 }
6611 ; CHECK-LABEL: define <8 x i16> @icmp_ne_on_12xi16(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
6612 ; CHECK: entry:
6613 ; CHECK-NEXT: %9 = icmp ne <8 x i16> %1, %3
6614 ; CHECK-NEXT: %10 = icmp ne <8 x i16> %2, %4
6615 ; CHECK-NEXT: %11 = select <8 x i1> %9, <8 x i16> %5, <8 x i16> %7
6616 ; CHECK-NEXT: %12 = select <8 x i1> %10, <8 x i16> %6, <8 x i16> %8
6617 ; CHECK-NEXT: store <8 x i16> %12, <8 x i16>* %0, align 16
6618 ; CHECK-NEXT: ret <8 x i16> %11
6619 ; CHECK-NEXT: }
6620
6621 define <12 x i16> @icmp_sgt_on_12xi16(<12 x i16>, <12 x i16>, <12 x i16>, <12 x i16>) {
6622 entry:
6623 %4 = icmp sgt <12 x i16> %0, %1
6624 %5 = select <12 x i1> %4, <12 x i16> %2, <12 x i16> %3
6625 ret <12 x i16> %5
6626 }
6627 ; CHECK-LABEL: define <8 x i16> @icmp_sgt_on_12xi16(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
6628 ; CHECK: entry:
6629 ; CHECK-NEXT: %9 = icmp sgt <8 x i16> %1, %3
6630 ; CHECK-NEXT: %10 = icmp sgt <8 x i16> %2, %4
6631 ; CHECK-NEXT: %11 = select <8 x i1> %9, <8 x i16> %5, <8 x i16> %7
6632 ; CHECK-NEXT: %12 = select <8 x i1> %10, <8 x i16> %6, <8 x i16> %8
6633 ; CHECK-NEXT: store <8 x i16> %12, <8 x i16>* %0, align 16
6634 ; CHECK-NEXT: ret <8 x i16> %11
6635 ; CHECK-NEXT: }
6636
6637 define <12 x i16> @icmp_ugt_on_12xi16(<12 x i16>, <12 x i16>, <12 x i16>, <12 x i16>) {
6638 entry:
6639 %4 = icmp ugt <12 x i16> %0, %1
6640 %5 = select <12 x i1> %4, <12 x i16> %2, <12 x i16> %3
6641 ret <12 x i16> %5
6642 }
6643 ; CHECK-LABEL: define <8 x i16> @icmp_ugt_on_12xi16(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
6644 ; CHECK: entry:
6645 ; CHECK-NEXT: %9 = icmp ugt <8 x i16> %1, %3
6646 ; CHECK-NEXT: %10 = icmp ugt <8 x i16> %2, %4
6647 ; CHECK-NEXT: %11 = select <8 x i1> %9, <8 x i16> %5, <8 x i16> %7
6648 ; CHECK-NEXT: %12 = select <8 x i1> %10, <8 x i16> %6, <8 x i16> %8
6649 ; CHECK-NEXT: store <8 x i16> %12, <8 x i16>* %0, align 16
6650 ; CHECK-NEXT: ret <8 x i16> %11
6651 ; CHECK-NEXT: }
6652
6653 define <12 x i16> @icmp_sge_on_12xi16(<12 x i16>, <12 x i16>, <12 x i16>, <12 x i16>) {
6654 entry:
6655 %4 = icmp sge <12 x i16> %0, %1
6656 %5 = select <12 x i1> %4, <12 x i16> %2, <12 x i16> %3
6657 ret <12 x i16> %5
6658 }
6659 ; CHECK-LABEL: define <8 x i16> @icmp_sge_on_12xi16(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
6660 ; CHECK: entry:
6661 ; CHECK-NEXT: %9 = icmp sge <8 x i16> %1, %3
6662 ; CHECK-NEXT: %10 = icmp sge <8 x i16> %2, %4
6663 ; CHECK-NEXT: %11 = select <8 x i1> %9, <8 x i16> %5, <8 x i16> %7
6664 ; CHECK-NEXT: %12 = select <8 x i1> %10, <8 x i16> %6, <8 x i16> %8
6665 ; CHECK-NEXT: store <8 x i16> %12, <8 x i16>* %0, align 16
6666 ; CHECK-NEXT: ret <8 x i16> %11
6667 ; CHECK-NEXT: }
6668
6669 define <12 x i16> @icmp_uge_on_12xi16(<12 x i16>, <12 x i16>, <12 x i16>, <12 x i16>) {
6670 entry:
6671 %4 = icmp uge <12 x i16> %0, %1
6672 %5 = select <12 x i1> %4, <12 x i16> %2, <12 x i16> %3
6673 ret <12 x i16> %5
6674 }
6675 ; CHECK-LABEL: define <8 x i16> @icmp_uge_on_12xi16(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
6676 ; CHECK: entry:
6677 ; CHECK-NEXT: %9 = icmp uge <8 x i16> %1, %3
6678 ; CHECK-NEXT: %10 = icmp uge <8 x i16> %2, %4
6679 ; CHECK-NEXT: %11 = select <8 x i1> %9, <8 x i16> %5, <8 x i16> %7
6680 ; CHECK-NEXT: %12 = select <8 x i1> %10, <8 x i16> %6, <8 x i16> %8
6681 ; CHECK-NEXT: store <8 x i16> %12, <8 x i16>* %0, align 16
6682 ; CHECK-NEXT: ret <8 x i16> %11
6683 ; CHECK-NEXT: }
6684
6685 define <12 x i16> @icmp_slt_on_12xi16(<12 x i16>, <12 x i16>, <12 x i16>, <12 x i16>) {
6686 entry:
6687 %4 = icmp slt <12 x i16> %0, %1
6688 %5 = select <12 x i1> %4, <12 x i16> %2, <12 x i16> %3
6689 ret <12 x i16> %5
6690 }
6691 ; CHECK-LABEL: define <8 x i16> @icmp_slt_on_12xi16(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
6692 ; CHECK: entry:
6693 ; CHECK-NEXT: %9 = icmp slt <8 x i16> %1, %3
6694 ; CHECK-NEXT: %10 = icmp slt <8 x i16> %2, %4
6695 ; CHECK-NEXT: %11 = select <8 x i1> %9, <8 x i16> %5, <8 x i16> %7
6696 ; CHECK-NEXT: %12 = select <8 x i1> %10, <8 x i16> %6, <8 x i16> %8
6697 ; CHECK-NEXT: store <8 x i16> %12, <8 x i16>* %0, align 16
6698 ; CHECK-NEXT: ret <8 x i16> %11
6699 ; CHECK-NEXT: }
6700
6701 define <12 x i16> @icmp_ult_on_12xi16(<12 x i16>, <12 x i16>, <12 x i16>, <12 x i16>) {
6702 entry:
6703 %4 = icmp ult <12 x i16> %0, %1
6704 %5 = select <12 x i1> %4, <12 x i16> %2, <12 x i16> %3
6705 ret <12 x i16> %5
6706 }
6707 ; CHECK-LABEL: define <8 x i16> @icmp_ult_on_12xi16(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
6708 ; CHECK: entry:
6709 ; CHECK-NEXT: %9 = icmp ult <8 x i16> %1, %3
6710 ; CHECK-NEXT: %10 = icmp ult <8 x i16> %2, %4
6711 ; CHECK-NEXT: %11 = select <8 x i1> %9, <8 x i16> %5, <8 x i16> %7
6712 ; CHECK-NEXT: %12 = select <8 x i1> %10, <8 x i16> %6, <8 x i16> %8
6713 ; CHECK-NEXT: store <8 x i16> %12, <8 x i16>* %0, align 16
6714 ; CHECK-NEXT: ret <8 x i16> %11
6715 ; CHECK-NEXT: }
6716
6717 define <12 x i16> @icmp_sle_on_12xi16(<12 x i16>, <12 x i16>, <12 x i16>, <12 x i16>) {
6718 entry:
6719 %4 = icmp sle <12 x i16> %0, %1
6720 %5 = select <12 x i1> %4, <12 x i16> %2, <12 x i16> %3
6721 ret <12 x i16> %5
6722 }
6723 ; CHECK-LABEL: define <8 x i16> @icmp_sle_on_12xi16(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
6724 ; CHECK: entry:
6725 ; CHECK-NEXT: %9 = icmp sle <8 x i16> %1, %3
6726 ; CHECK-NEXT: %10 = icmp sle <8 x i16> %2, %4
6727 ; CHECK-NEXT: %11 = select <8 x i1> %9, <8 x i16> %5, <8 x i16> %7
6728 ; CHECK-NEXT: %12 = select <8 x i1> %10, <8 x i16> %6, <8 x i16> %8
6729 ; CHECK-NEXT: store <8 x i16> %12, <8 x i16>* %0, align 16
6730 ; CHECK-NEXT: ret <8 x i16> %11
6731 ; CHECK-NEXT: }
6732
6733 define <12 x i16> @icmp_ule_on_12xi16(<12 x i16>, <12 x i16>, <12 x i16>, <12 x i16>) {
6734 entry:
6735 %4 = icmp ule <12 x i16> %0, %1
6736 %5 = select <12 x i1> %4, <12 x i16> %2, <12 x i16> %3
6737 ret <12 x i16> %5
6738 }
6739 ; CHECK-LABEL: define <8 x i16> @icmp_ule_on_12xi16(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
6740 ; CHECK: entry:
6741 ; CHECK-NEXT: %9 = icmp ule <8 x i16> %1, %3
6742 ; CHECK-NEXT: %10 = icmp ule <8 x i16> %2, %4
6743 ; CHECK-NEXT: %11 = select <8 x i1> %9, <8 x i16> %5, <8 x i16> %7
6744 ; CHECK-NEXT: %12 = select <8 x i1> %10, <8 x i16> %6, <8 x i16> %8
6745 ; CHECK-NEXT: store <8 x i16> %12, <8 x i16>* %0, align 16
6746 ; CHECK-NEXT: ret <8 x i16> %11
6747 ; CHECK-NEXT: }
6748
6749 define <12 x i32> @icmp_eq_on_12xi32(<12 x i32>, <12 x i32>, <12 x i32>, <12 x i 32>) {
6750 entry:
6751 %4 = icmp eq <12 x i32> %0, %1
6752 %5 = select <12 x i1> %4, <12 x i32> %2, <12 x i32> %3
6753 ret <12 x i32> %5
6754 }
6755 ; CHECK-LABEL: define <4 x i32> @icmp_eq_on_12xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32> , <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, < 4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
6756 ; CHECK: entry:
6757 ; CHECK-NEXT: %14 = icmp eq <4 x i32> %2, %5
6758 ; CHECK-NEXT: %15 = icmp eq <4 x i32> %3, %6
6759 ; CHECK-NEXT: %16 = icmp eq <4 x i32> %4, %7
6760 ; CHECK-NEXT: %17 = select <4 x i1> %14, <4 x i32> %8, <4 x i32> %11
6761 ; CHECK-NEXT: %18 = select <4 x i1> %15, <4 x i32> %9, <4 x i32> %12
6762 ; CHECK-NEXT: %19 = select <4 x i1> %16, <4 x i32> %10, <4 x i32> %13
6763 ; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %0, align 16
6764 ; CHECK-NEXT: store <4 x i32> %19, <4 x i32>* %1, align 16
6765 ; CHECK-NEXT: ret <4 x i32> %17
6766 ; CHECK-NEXT: }
6767
6768 define <12 x i32> @icmp_ne_on_12xi32(<12 x i32>, <12 x i32>, <12 x i32>, <12 x i 32>) {
6769 entry:
6770 %4 = icmp ne <12 x i32> %0, %1
6771 %5 = select <12 x i1> %4, <12 x i32> %2, <12 x i32> %3
6772 ret <12 x i32> %5
6773 }
6774 ; CHECK-LABEL: define <4 x i32> @icmp_ne_on_12xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32> , <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, < 4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
6775 ; CHECK: entry:
6776 ; CHECK-NEXT: %14 = icmp ne <4 x i32> %2, %5
6777 ; CHECK-NEXT: %15 = icmp ne <4 x i32> %3, %6
6778 ; CHECK-NEXT: %16 = icmp ne <4 x i32> %4, %7
6779 ; CHECK-NEXT: %17 = select <4 x i1> %14, <4 x i32> %8, <4 x i32> %11
6780 ; CHECK-NEXT: %18 = select <4 x i1> %15, <4 x i32> %9, <4 x i32> %12
6781 ; CHECK-NEXT: %19 = select <4 x i1> %16, <4 x i32> %10, <4 x i32> %13
6782 ; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %0, align 16
6783 ; CHECK-NEXT: store <4 x i32> %19, <4 x i32>* %1, align 16
6784 ; CHECK-NEXT: ret <4 x i32> %17
6785 ; CHECK-NEXT: }
6786
6787 define <12 x i32> @icmp_sgt_on_12xi32(<12 x i32>, <12 x i32>, <12 x i32>, <12 x i32>) {
6788 entry:
6789 %4 = icmp sgt <12 x i32> %0, %1
6790 %5 = select <12 x i1> %4, <12 x i32> %2, <12 x i32> %3
6791 ret <12 x i32> %5
6792 }
6793 ; CHECK-LABEL: define <4 x i32> @icmp_sgt_on_12xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32 >, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
6794 ; CHECK: entry:
6795 ; CHECK-NEXT: %14 = icmp sgt <4 x i32> %2, %5
6796 ; CHECK-NEXT: %15 = icmp sgt <4 x i32> %3, %6
6797 ; CHECK-NEXT: %16 = icmp sgt <4 x i32> %4, %7
6798 ; CHECK-NEXT: %17 = select <4 x i1> %14, <4 x i32> %8, <4 x i32> %11
6799 ; CHECK-NEXT: %18 = select <4 x i1> %15, <4 x i32> %9, <4 x i32> %12
6800 ; CHECK-NEXT: %19 = select <4 x i1> %16, <4 x i32> %10, <4 x i32> %13
6801 ; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %0, align 16
6802 ; CHECK-NEXT: store <4 x i32> %19, <4 x i32>* %1, align 16
6803 ; CHECK-NEXT: ret <4 x i32> %17
6804 ; CHECK-NEXT: }
6805
6806 define <12 x i32> @icmp_ugt_on_12xi32(<12 x i32>, <12 x i32>, <12 x i32>, <12 x i32>) {
6807 entry:
6808 %4 = icmp ugt <12 x i32> %0, %1
6809 %5 = select <12 x i1> %4, <12 x i32> %2, <12 x i32> %3
6810 ret <12 x i32> %5
6811 }
6812 ; CHECK-LABEL: define <4 x i32> @icmp_ugt_on_12xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32 >, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
6813 ; CHECK: entry:
6814 ; CHECK-NEXT: %14 = icmp ugt <4 x i32> %2, %5
6815 ; CHECK-NEXT: %15 = icmp ugt <4 x i32> %3, %6
6816 ; CHECK-NEXT: %16 = icmp ugt <4 x i32> %4, %7
6817 ; CHECK-NEXT: %17 = select <4 x i1> %14, <4 x i32> %8, <4 x i32> %11
6818 ; CHECK-NEXT: %18 = select <4 x i1> %15, <4 x i32> %9, <4 x i32> %12
6819 ; CHECK-NEXT: %19 = select <4 x i1> %16, <4 x i32> %10, <4 x i32> %13
6820 ; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %0, align 16
6821 ; CHECK-NEXT: store <4 x i32> %19, <4 x i32>* %1, align 16
6822 ; CHECK-NEXT: ret <4 x i32> %17
6823 ; CHECK-NEXT: }
6824
6825 define <12 x i32> @icmp_sge_on_12xi32(<12 x i32>, <12 x i32>, <12 x i32>, <12 x i32>) {
6826 entry:
6827 %4 = icmp sge <12 x i32> %0, %1
6828 %5 = select <12 x i1> %4, <12 x i32> %2, <12 x i32> %3
6829 ret <12 x i32> %5
6830 }
6831 ; CHECK-LABEL: define <4 x i32> @icmp_sge_on_12xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32 >, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
6832 ; CHECK: entry:
6833 ; CHECK-NEXT: %14 = icmp sge <4 x i32> %2, %5
6834 ; CHECK-NEXT: %15 = icmp sge <4 x i32> %3, %6
6835 ; CHECK-NEXT: %16 = icmp sge <4 x i32> %4, %7
6836 ; CHECK-NEXT: %17 = select <4 x i1> %14, <4 x i32> %8, <4 x i32> %11
6837 ; CHECK-NEXT: %18 = select <4 x i1> %15, <4 x i32> %9, <4 x i32> %12
6838 ; CHECK-NEXT: %19 = select <4 x i1> %16, <4 x i32> %10, <4 x i32> %13
6839 ; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %0, align 16
6840 ; CHECK-NEXT: store <4 x i32> %19, <4 x i32>* %1, align 16
6841 ; CHECK-NEXT: ret <4 x i32> %17
6842 ; CHECK-NEXT: }
6843
6844 define <12 x i32> @icmp_uge_on_12xi32(<12 x i32>, <12 x i32>, <12 x i32>, <12 x i32>) {
6845 entry:
6846 %4 = icmp uge <12 x i32> %0, %1
6847 %5 = select <12 x i1> %4, <12 x i32> %2, <12 x i32> %3
6848 ret <12 x i32> %5
6849 }
6850 ; CHECK-LABEL: define <4 x i32> @icmp_uge_on_12xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32 >, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
6851 ; CHECK: entry:
6852 ; CHECK-NEXT: %14 = icmp uge <4 x i32> %2, %5
6853 ; CHECK-NEXT: %15 = icmp uge <4 x i32> %3, %6
6854 ; CHECK-NEXT: %16 = icmp uge <4 x i32> %4, %7
6855 ; CHECK-NEXT: %17 = select <4 x i1> %14, <4 x i32> %8, <4 x i32> %11
6856 ; CHECK-NEXT: %18 = select <4 x i1> %15, <4 x i32> %9, <4 x i32> %12
6857 ; CHECK-NEXT: %19 = select <4 x i1> %16, <4 x i32> %10, <4 x i32> %13
6858 ; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %0, align 16
6859 ; CHECK-NEXT: store <4 x i32> %19, <4 x i32>* %1, align 16
6860 ; CHECK-NEXT: ret <4 x i32> %17
6861 ; CHECK-NEXT: }
6862
6863 define <12 x i32> @icmp_slt_on_12xi32(<12 x i32>, <12 x i32>, <12 x i32>, <12 x i32>) {
6864 entry:
6865 %4 = icmp slt <12 x i32> %0, %1
6866 %5 = select <12 x i1> %4, <12 x i32> %2, <12 x i32> %3
6867 ret <12 x i32> %5
6868 }
6869 ; CHECK-LABEL: define <4 x i32> @icmp_slt_on_12xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32 >, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
6870 ; CHECK: entry:
6871 ; CHECK-NEXT: %14 = icmp slt <4 x i32> %2, %5
6872 ; CHECK-NEXT: %15 = icmp slt <4 x i32> %3, %6
6873 ; CHECK-NEXT: %16 = icmp slt <4 x i32> %4, %7
6874 ; CHECK-NEXT: %17 = select <4 x i1> %14, <4 x i32> %8, <4 x i32> %11
6875 ; CHECK-NEXT: %18 = select <4 x i1> %15, <4 x i32> %9, <4 x i32> %12
6876 ; CHECK-NEXT: %19 = select <4 x i1> %16, <4 x i32> %10, <4 x i32> %13
6877 ; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %0, align 16
6878 ; CHECK-NEXT: store <4 x i32> %19, <4 x i32>* %1, align 16
6879 ; CHECK-NEXT: ret <4 x i32> %17
6880 ; CHECK-NEXT: }
6881
6882 define <12 x i32> @icmp_ult_on_12xi32(<12 x i32>, <12 x i32>, <12 x i32>, <12 x i32>) {
6883 entry:
6884 %4 = icmp ult <12 x i32> %0, %1
6885 %5 = select <12 x i1> %4, <12 x i32> %2, <12 x i32> %3
6886 ret <12 x i32> %5
6887 }
6888 ; CHECK-LABEL: define <4 x i32> @icmp_ult_on_12xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32 >, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
6889 ; CHECK: entry:
6890 ; CHECK-NEXT: %14 = icmp ult <4 x i32> %2, %5
6891 ; CHECK-NEXT: %15 = icmp ult <4 x i32> %3, %6
6892 ; CHECK-NEXT: %16 = icmp ult <4 x i32> %4, %7
6893 ; CHECK-NEXT: %17 = select <4 x i1> %14, <4 x i32> %8, <4 x i32> %11
6894 ; CHECK-NEXT: %18 = select <4 x i1> %15, <4 x i32> %9, <4 x i32> %12
6895 ; CHECK-NEXT: %19 = select <4 x i1> %16, <4 x i32> %10, <4 x i32> %13
6896 ; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %0, align 16
6897 ; CHECK-NEXT: store <4 x i32> %19, <4 x i32>* %1, align 16
6898 ; CHECK-NEXT: ret <4 x i32> %17
6899 ; CHECK-NEXT: }
6900
6901 define <12 x i32> @icmp_sle_on_12xi32(<12 x i32>, <12 x i32>, <12 x i32>, <12 x i32>) {
6902 entry:
6903 %4 = icmp sle <12 x i32> %0, %1
6904 %5 = select <12 x i1> %4, <12 x i32> %2, <12 x i32> %3
6905 ret <12 x i32> %5
6906 }
6907 ; CHECK-LABEL: define <4 x i32> @icmp_sle_on_12xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32 >, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
6908 ; CHECK: entry:
6909 ; CHECK-NEXT: %14 = icmp sle <4 x i32> %2, %5
6910 ; CHECK-NEXT: %15 = icmp sle <4 x i32> %3, %6
6911 ; CHECK-NEXT: %16 = icmp sle <4 x i32> %4, %7
6912 ; CHECK-NEXT: %17 = select <4 x i1> %14, <4 x i32> %8, <4 x i32> %11
6913 ; CHECK-NEXT: %18 = select <4 x i1> %15, <4 x i32> %9, <4 x i32> %12
6914 ; CHECK-NEXT: %19 = select <4 x i1> %16, <4 x i32> %10, <4 x i32> %13
6915 ; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %0, align 16
6916 ; CHECK-NEXT: store <4 x i32> %19, <4 x i32>* %1, align 16
6917 ; CHECK-NEXT: ret <4 x i32> %17
6918 ; CHECK-NEXT: }
6919
6920 define <12 x i32> @icmp_ule_on_12xi32(<12 x i32>, <12 x i32>, <12 x i32>, <12 x i32>) {
6921 entry:
6922 %4 = icmp ule <12 x i32> %0, %1
6923 %5 = select <12 x i1> %4, <12 x i32> %2, <12 x i32> %3
6924 ret <12 x i32> %5
6925 }
6926 ; CHECK-LABEL: define <4 x i32> @icmp_ule_on_12xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32 >, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
6927 ; CHECK: entry:
6928 ; CHECK-NEXT: %14 = icmp ule <4 x i32> %2, %5
6929 ; CHECK-NEXT: %15 = icmp ule <4 x i32> %3, %6
6930 ; CHECK-NEXT: %16 = icmp ule <4 x i32> %4, %7
6931 ; CHECK-NEXT: %17 = select <4 x i1> %14, <4 x i32> %8, <4 x i32> %11
6932 ; CHECK-NEXT: %18 = select <4 x i1> %15, <4 x i32> %9, <4 x i32> %12
6933 ; CHECK-NEXT: %19 = select <4 x i1> %16, <4 x i32> %10, <4 x i32> %13
6934 ; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %0, align 16
6935 ; CHECK-NEXT: store <4 x i32> %19, <4 x i32>* %1, align 16
6936 ; CHECK-NEXT: ret <4 x i32> %17
6937 ; CHECK-NEXT: }
6938
6939 define <12 x i64> @icmp_eq_on_12xi64(<12 x i64>, <12 x i64>, <12 x i64>, <12 x i 64>) {
6940 entry:
6941 %4 = icmp eq <12 x i64> %0, %1
6942 %5 = select <12 x i1> %4, <12 x i64> %2, <12 x i64> %3
6943 ret <12 x i64> %5
6944 }
6945 ; CHECK-LABEL: define <2 x i64> @icmp_eq_on_12xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64> * nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenc eable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64 >, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i 64>) {
6946 ; CHECK: entry:
6947 ; CHECK-NEXT: %29 = icmp eq <2 x i64> %5, %11
6948 ; CHECK-NEXT: %30 = icmp eq <2 x i64> %6, %12
6949 ; CHECK-NEXT: %31 = icmp eq <2 x i64> %7, %13
6950 ; CHECK-NEXT: %32 = icmp eq <2 x i64> %8, %14
6951 ; CHECK-NEXT: %33 = icmp eq <2 x i64> %9, %15
6952 ; CHECK-NEXT: %34 = icmp eq <2 x i64> %10, %16
6953 ; CHECK-NEXT: %35 = select <2 x i1> %29, <2 x i64> %17, <2 x i64> %23
6954 ; CHECK-NEXT: %36 = select <2 x i1> %30, <2 x i64> %18, <2 x i64> %24
6955 ; CHECK-NEXT: %37 = select <2 x i1> %31, <2 x i64> %19, <2 x i64> %25
6956 ; CHECK-NEXT: %38 = select <2 x i1> %32, <2 x i64> %20, <2 x i64> %26
6957 ; CHECK-NEXT: %39 = select <2 x i1> %33, <2 x i64> %21, <2 x i64> %27
6958 ; CHECK-NEXT: %40 = select <2 x i1> %34, <2 x i64> %22, <2 x i64> %28
6959 ; CHECK-NEXT: store <2 x i64> %36, <2 x i64>* %0, align 16
6960 ; CHECK-NEXT: store <2 x i64> %37, <2 x i64>* %1, align 16
6961 ; CHECK-NEXT: store <2 x i64> %38, <2 x i64>* %2, align 16
6962 ; CHECK-NEXT: store <2 x i64> %39, <2 x i64>* %3, align 16
6963 ; CHECK-NEXT: store <2 x i64> %40, <2 x i64>* %4, align 16
6964 ; CHECK-NEXT: ret <2 x i64> %35
6965 ; CHECK-NEXT: }
6966
6967 define <12 x i64> @icmp_ne_on_12xi64(<12 x i64>, <12 x i64>, <12 x i64>, <12 x i 64>) {
6968 entry:
6969 %4 = icmp ne <12 x i64> %0, %1
6970 %5 = select <12 x i1> %4, <12 x i64> %2, <12 x i64> %3
6971 ret <12 x i64> %5
6972 }
6973 ; CHECK-LABEL: define <2 x i64> @icmp_ne_on_12xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64> * nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenc eable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64 >, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i 64>) {
6974 ; CHECK: entry:
6975 ; CHECK-NEXT: %29 = icmp ne <2 x i64> %5, %11
6976 ; CHECK-NEXT: %30 = icmp ne <2 x i64> %6, %12
6977 ; CHECK-NEXT: %31 = icmp ne <2 x i64> %7, %13
6978 ; CHECK-NEXT: %32 = icmp ne <2 x i64> %8, %14
6979 ; CHECK-NEXT: %33 = icmp ne <2 x i64> %9, %15
6980 ; CHECK-NEXT: %34 = icmp ne <2 x i64> %10, %16
6981 ; CHECK-NEXT: %35 = select <2 x i1> %29, <2 x i64> %17, <2 x i64> %23
6982 ; CHECK-NEXT: %36 = select <2 x i1> %30, <2 x i64> %18, <2 x i64> %24
6983 ; CHECK-NEXT: %37 = select <2 x i1> %31, <2 x i64> %19, <2 x i64> %25
6984 ; CHECK-NEXT: %38 = select <2 x i1> %32, <2 x i64> %20, <2 x i64> %26
6985 ; CHECK-NEXT: %39 = select <2 x i1> %33, <2 x i64> %21, <2 x i64> %27
6986 ; CHECK-NEXT: %40 = select <2 x i1> %34, <2 x i64> %22, <2 x i64> %28
6987 ; CHECK-NEXT: store <2 x i64> %36, <2 x i64>* %0, align 16
6988 ; CHECK-NEXT: store <2 x i64> %37, <2 x i64>* %1, align 16
6989 ; CHECK-NEXT: store <2 x i64> %38, <2 x i64>* %2, align 16
6990 ; CHECK-NEXT: store <2 x i64> %39, <2 x i64>* %3, align 16
6991 ; CHECK-NEXT: store <2 x i64> %40, <2 x i64>* %4, align 16
6992 ; CHECK-NEXT: ret <2 x i64> %35
6993 ; CHECK-NEXT: }
6994
6995 define <12 x i64> @icmp_sgt_on_12xi64(<12 x i64>, <12 x i64>, <12 x i64>, <12 x i64>) {
6996 entry:
6997 %4 = icmp sgt <12 x i64> %0, %1
6998 %5 = select <12 x i1> %4, <12 x i64> %2, <12 x i64> %3
6999 ret <12 x i64> %5
7000 }
7001 ; CHECK-LABEL: define <2 x i64> @icmp_sgt_on_12xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64 >* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferen ceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i6 4>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
7002 ; CHECK: entry:
7003 ; CHECK-NEXT: %29 = icmp sgt <2 x i64> %5, %11
7004 ; CHECK-NEXT: %30 = icmp sgt <2 x i64> %6, %12
7005 ; CHECK-NEXT: %31 = icmp sgt <2 x i64> %7, %13
7006 ; CHECK-NEXT: %32 = icmp sgt <2 x i64> %8, %14
7007 ; CHECK-NEXT: %33 = icmp sgt <2 x i64> %9, %15
7008 ; CHECK-NEXT: %34 = icmp sgt <2 x i64> %10, %16
7009 ; CHECK-NEXT: %35 = select <2 x i1> %29, <2 x i64> %17, <2 x i64> %23
7010 ; CHECK-NEXT: %36 = select <2 x i1> %30, <2 x i64> %18, <2 x i64> %24
7011 ; CHECK-NEXT: %37 = select <2 x i1> %31, <2 x i64> %19, <2 x i64> %25
7012 ; CHECK-NEXT: %38 = select <2 x i1> %32, <2 x i64> %20, <2 x i64> %26
7013 ; CHECK-NEXT: %39 = select <2 x i1> %33, <2 x i64> %21, <2 x i64> %27
7014 ; CHECK-NEXT: %40 = select <2 x i1> %34, <2 x i64> %22, <2 x i64> %28
7015 ; CHECK-NEXT: store <2 x i64> %36, <2 x i64>* %0, align 16
7016 ; CHECK-NEXT: store <2 x i64> %37, <2 x i64>* %1, align 16
7017 ; CHECK-NEXT: store <2 x i64> %38, <2 x i64>* %2, align 16
7018 ; CHECK-NEXT: store <2 x i64> %39, <2 x i64>* %3, align 16
7019 ; CHECK-NEXT: store <2 x i64> %40, <2 x i64>* %4, align 16
7020 ; CHECK-NEXT: ret <2 x i64> %35
7021 ; CHECK-NEXT: }
7022
7023 define <12 x i64> @icmp_ugt_on_12xi64(<12 x i64>, <12 x i64>, <12 x i64>, <12 x i64>) {
7024 entry:
7025 %4 = icmp ugt <12 x i64> %0, %1
7026 %5 = select <12 x i1> %4, <12 x i64> %2, <12 x i64> %3
7027 ret <12 x i64> %5
7028 }
7029 ; CHECK-LABEL: define <2 x i64> @icmp_ugt_on_12xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64 >* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferen ceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i6 4>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
7030 ; CHECK: entry:
7031 ; CHECK-NEXT: %29 = icmp ugt <2 x i64> %5, %11
7032 ; CHECK-NEXT: %30 = icmp ugt <2 x i64> %6, %12
7033 ; CHECK-NEXT: %31 = icmp ugt <2 x i64> %7, %13
7034 ; CHECK-NEXT: %32 = icmp ugt <2 x i64> %8, %14
7035 ; CHECK-NEXT: %33 = icmp ugt <2 x i64> %9, %15
7036 ; CHECK-NEXT: %34 = icmp ugt <2 x i64> %10, %16
7037 ; CHECK-NEXT: %35 = select <2 x i1> %29, <2 x i64> %17, <2 x i64> %23
7038 ; CHECK-NEXT: %36 = select <2 x i1> %30, <2 x i64> %18, <2 x i64> %24
7039 ; CHECK-NEXT: %37 = select <2 x i1> %31, <2 x i64> %19, <2 x i64> %25
7040 ; CHECK-NEXT: %38 = select <2 x i1> %32, <2 x i64> %20, <2 x i64> %26
7041 ; CHECK-NEXT: %39 = select <2 x i1> %33, <2 x i64> %21, <2 x i64> %27
7042 ; CHECK-NEXT: %40 = select <2 x i1> %34, <2 x i64> %22, <2 x i64> %28
7043 ; CHECK-NEXT: store <2 x i64> %36, <2 x i64>* %0, align 16
7044 ; CHECK-NEXT: store <2 x i64> %37, <2 x i64>* %1, align 16
7045 ; CHECK-NEXT: store <2 x i64> %38, <2 x i64>* %2, align 16
7046 ; CHECK-NEXT: store <2 x i64> %39, <2 x i64>* %3, align 16
7047 ; CHECK-NEXT: store <2 x i64> %40, <2 x i64>* %4, align 16
7048 ; CHECK-NEXT: ret <2 x i64> %35
7049 ; CHECK-NEXT: }
7050
7051 define <12 x i64> @icmp_sge_on_12xi64(<12 x i64>, <12 x i64>, <12 x i64>, <12 x i64>) {
7052 entry:
7053 %4 = icmp sge <12 x i64> %0, %1
7054 %5 = select <12 x i1> %4, <12 x i64> %2, <12 x i64> %3
7055 ret <12 x i64> %5
7056 }
7057 ; CHECK-LABEL: define <2 x i64> @icmp_sge_on_12xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64 >* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferen ceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i6 4>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
7058 ; CHECK: entry:
7059 ; CHECK-NEXT: %29 = icmp sge <2 x i64> %5, %11
7060 ; CHECK-NEXT: %30 = icmp sge <2 x i64> %6, %12
7061 ; CHECK-NEXT: %31 = icmp sge <2 x i64> %7, %13
7062 ; CHECK-NEXT: %32 = icmp sge <2 x i64> %8, %14
7063 ; CHECK-NEXT: %33 = icmp sge <2 x i64> %9, %15
7064 ; CHECK-NEXT: %34 = icmp sge <2 x i64> %10, %16
7065 ; CHECK-NEXT: %35 = select <2 x i1> %29, <2 x i64> %17, <2 x i64> %23
7066 ; CHECK-NEXT: %36 = select <2 x i1> %30, <2 x i64> %18, <2 x i64> %24
7067 ; CHECK-NEXT: %37 = select <2 x i1> %31, <2 x i64> %19, <2 x i64> %25
7068 ; CHECK-NEXT: %38 = select <2 x i1> %32, <2 x i64> %20, <2 x i64> %26
7069 ; CHECK-NEXT: %39 = select <2 x i1> %33, <2 x i64> %21, <2 x i64> %27
7070 ; CHECK-NEXT: %40 = select <2 x i1> %34, <2 x i64> %22, <2 x i64> %28
7071 ; CHECK-NEXT: store <2 x i64> %36, <2 x i64>* %0, align 16
7072 ; CHECK-NEXT: store <2 x i64> %37, <2 x i64>* %1, align 16
7073 ; CHECK-NEXT: store <2 x i64> %38, <2 x i64>* %2, align 16
7074 ; CHECK-NEXT: store <2 x i64> %39, <2 x i64>* %3, align 16
7075 ; CHECK-NEXT: store <2 x i64> %40, <2 x i64>* %4, align 16
7076 ; CHECK-NEXT: ret <2 x i64> %35
7077 ; CHECK-NEXT: }
7078
7079 define <12 x i64> @icmp_uge_on_12xi64(<12 x i64>, <12 x i64>, <12 x i64>, <12 x i64>) {
7080 entry:
7081 %4 = icmp uge <12 x i64> %0, %1
7082 %5 = select <12 x i1> %4, <12 x i64> %2, <12 x i64> %3
7083 ret <12 x i64> %5
7084 }
7085 ; CHECK-LABEL: define <2 x i64> @icmp_uge_on_12xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64 >* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferen ceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i6 4>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
7086 ; CHECK: entry:
7087 ; CHECK-NEXT: %29 = icmp uge <2 x i64> %5, %11
7088 ; CHECK-NEXT: %30 = icmp uge <2 x i64> %6, %12
7089 ; CHECK-NEXT: %31 = icmp uge <2 x i64> %7, %13
7090 ; CHECK-NEXT: %32 = icmp uge <2 x i64> %8, %14
7091 ; CHECK-NEXT: %33 = icmp uge <2 x i64> %9, %15
7092 ; CHECK-NEXT: %34 = icmp uge <2 x i64> %10, %16
7093 ; CHECK-NEXT: %35 = select <2 x i1> %29, <2 x i64> %17, <2 x i64> %23
7094 ; CHECK-NEXT: %36 = select <2 x i1> %30, <2 x i64> %18, <2 x i64> %24
7095 ; CHECK-NEXT: %37 = select <2 x i1> %31, <2 x i64> %19, <2 x i64> %25
7096 ; CHECK-NEXT: %38 = select <2 x i1> %32, <2 x i64> %20, <2 x i64> %26
7097 ; CHECK-NEXT: %39 = select <2 x i1> %33, <2 x i64> %21, <2 x i64> %27
7098 ; CHECK-NEXT: %40 = select <2 x i1> %34, <2 x i64> %22, <2 x i64> %28
7099 ; CHECK-NEXT: store <2 x i64> %36, <2 x i64>* %0, align 16
7100 ; CHECK-NEXT: store <2 x i64> %37, <2 x i64>* %1, align 16
7101 ; CHECK-NEXT: store <2 x i64> %38, <2 x i64>* %2, align 16
7102 ; CHECK-NEXT: store <2 x i64> %39, <2 x i64>* %3, align 16
7103 ; CHECK-NEXT: store <2 x i64> %40, <2 x i64>* %4, align 16
7104 ; CHECK-NEXT: ret <2 x i64> %35
7105 ; CHECK-NEXT: }
7106
7107 define <12 x i64> @icmp_slt_on_12xi64(<12 x i64>, <12 x i64>, <12 x i64>, <12 x i64>) {
7108 entry:
7109 %4 = icmp slt <12 x i64> %0, %1
7110 %5 = select <12 x i1> %4, <12 x i64> %2, <12 x i64> %3
7111 ret <12 x i64> %5
7112 }
7113 ; CHECK-LABEL: define <2 x i64> @icmp_slt_on_12xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64 >* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferen ceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i6 4>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
7114 ; CHECK: entry:
7115 ; CHECK-NEXT: %29 = icmp slt <2 x i64> %5, %11
7116 ; CHECK-NEXT: %30 = icmp slt <2 x i64> %6, %12
7117 ; CHECK-NEXT: %31 = icmp slt <2 x i64> %7, %13
7118 ; CHECK-NEXT: %32 = icmp slt <2 x i64> %8, %14
7119 ; CHECK-NEXT: %33 = icmp slt <2 x i64> %9, %15
7120 ; CHECK-NEXT: %34 = icmp slt <2 x i64> %10, %16
7121 ; CHECK-NEXT: %35 = select <2 x i1> %29, <2 x i64> %17, <2 x i64> %23
7122 ; CHECK-NEXT: %36 = select <2 x i1> %30, <2 x i64> %18, <2 x i64> %24
7123 ; CHECK-NEXT: %37 = select <2 x i1> %31, <2 x i64> %19, <2 x i64> %25
7124 ; CHECK-NEXT: %38 = select <2 x i1> %32, <2 x i64> %20, <2 x i64> %26
7125 ; CHECK-NEXT: %39 = select <2 x i1> %33, <2 x i64> %21, <2 x i64> %27
7126 ; CHECK-NEXT: %40 = select <2 x i1> %34, <2 x i64> %22, <2 x i64> %28
7127 ; CHECK-NEXT: store <2 x i64> %36, <2 x i64>* %0, align 16
7128 ; CHECK-NEXT: store <2 x i64> %37, <2 x i64>* %1, align 16
7129 ; CHECK-NEXT: store <2 x i64> %38, <2 x i64>* %2, align 16
7130 ; CHECK-NEXT: store <2 x i64> %39, <2 x i64>* %3, align 16
7131 ; CHECK-NEXT: store <2 x i64> %40, <2 x i64>* %4, align 16
7132 ; CHECK-NEXT: ret <2 x i64> %35
7133 ; CHECK-NEXT: }
7134
7135 define <12 x i64> @icmp_ult_on_12xi64(<12 x i64>, <12 x i64>, <12 x i64>, <12 x i64>) {
7136 entry:
7137 %4 = icmp ult <12 x i64> %0, %1
7138 %5 = select <12 x i1> %4, <12 x i64> %2, <12 x i64> %3
7139 ret <12 x i64> %5
7140 }
7141 ; CHECK-LABEL: define <2 x i64> @icmp_ult_on_12xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64 >* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferen ceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i6 4>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
7142 ; CHECK: entry:
7143 ; CHECK-NEXT: %29 = icmp ult <2 x i64> %5, %11
7144 ; CHECK-NEXT: %30 = icmp ult <2 x i64> %6, %12
7145 ; CHECK-NEXT: %31 = icmp ult <2 x i64> %7, %13
7146 ; CHECK-NEXT: %32 = icmp ult <2 x i64> %8, %14
7147 ; CHECK-NEXT: %33 = icmp ult <2 x i64> %9, %15
7148 ; CHECK-NEXT: %34 = icmp ult <2 x i64> %10, %16
7149 ; CHECK-NEXT: %35 = select <2 x i1> %29, <2 x i64> %17, <2 x i64> %23
7150 ; CHECK-NEXT: %36 = select <2 x i1> %30, <2 x i64> %18, <2 x i64> %24
7151 ; CHECK-NEXT: %37 = select <2 x i1> %31, <2 x i64> %19, <2 x i64> %25
7152 ; CHECK-NEXT: %38 = select <2 x i1> %32, <2 x i64> %20, <2 x i64> %26
7153 ; CHECK-NEXT: %39 = select <2 x i1> %33, <2 x i64> %21, <2 x i64> %27
7154 ; CHECK-NEXT: %40 = select <2 x i1> %34, <2 x i64> %22, <2 x i64> %28
7155 ; CHECK-NEXT: store <2 x i64> %36, <2 x i64>* %0, align 16
7156 ; CHECK-NEXT: store <2 x i64> %37, <2 x i64>* %1, align 16
7157 ; CHECK-NEXT: store <2 x i64> %38, <2 x i64>* %2, align 16
7158 ; CHECK-NEXT: store <2 x i64> %39, <2 x i64>* %3, align 16
7159 ; CHECK-NEXT: store <2 x i64> %40, <2 x i64>* %4, align 16
7160 ; CHECK-NEXT: ret <2 x i64> %35
7161 ; CHECK-NEXT: }
7162
7163 define <12 x i64> @icmp_sle_on_12xi64(<12 x i64>, <12 x i64>, <12 x i64>, <12 x i64>) {
7164 entry:
7165 %4 = icmp sle <12 x i64> %0, %1
7166 %5 = select <12 x i1> %4, <12 x i64> %2, <12 x i64> %3
7167 ret <12 x i64> %5
7168 }
7169 ; CHECK-LABEL: define <2 x i64> @icmp_sle_on_12xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64 >* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferen ceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i6 4>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
7170 ; CHECK: entry:
7171 ; CHECK-NEXT: %29 = icmp sle <2 x i64> %5, %11
7172 ; CHECK-NEXT: %30 = icmp sle <2 x i64> %6, %12
7173 ; CHECK-NEXT: %31 = icmp sle <2 x i64> %7, %13
7174 ; CHECK-NEXT: %32 = icmp sle <2 x i64> %8, %14
7175 ; CHECK-NEXT: %33 = icmp sle <2 x i64> %9, %15
7176 ; CHECK-NEXT: %34 = icmp sle <2 x i64> %10, %16
7177 ; CHECK-NEXT: %35 = select <2 x i1> %29, <2 x i64> %17, <2 x i64> %23
7178 ; CHECK-NEXT: %36 = select <2 x i1> %30, <2 x i64> %18, <2 x i64> %24
7179 ; CHECK-NEXT: %37 = select <2 x i1> %31, <2 x i64> %19, <2 x i64> %25
7180 ; CHECK-NEXT: %38 = select <2 x i1> %32, <2 x i64> %20, <2 x i64> %26
7181 ; CHECK-NEXT: %39 = select <2 x i1> %33, <2 x i64> %21, <2 x i64> %27
7182 ; CHECK-NEXT: %40 = select <2 x i1> %34, <2 x i64> %22, <2 x i64> %28
7183 ; CHECK-NEXT: store <2 x i64> %36, <2 x i64>* %0, align 16
7184 ; CHECK-NEXT: store <2 x i64> %37, <2 x i64>* %1, align 16
7185 ; CHECK-NEXT: store <2 x i64> %38, <2 x i64>* %2, align 16
7186 ; CHECK-NEXT: store <2 x i64> %39, <2 x i64>* %3, align 16
7187 ; CHECK-NEXT: store <2 x i64> %40, <2 x i64>* %4, align 16
7188 ; CHECK-NEXT: ret <2 x i64> %35
7189 ; CHECK-NEXT: }
7190
7191 define <12 x i64> @icmp_ule_on_12xi64(<12 x i64>, <12 x i64>, <12 x i64>, <12 x i64>) {
7192 entry:
7193 %4 = icmp ule <12 x i64> %0, %1
7194 %5 = select <12 x i1> %4, <12 x i64> %2, <12 x i64> %3
7195 ret <12 x i64> %5
7196 }
7197 ; CHECK-LABEL: define <2 x i64> @icmp_ule_on_12xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64 >* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferen ceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i6 4>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
7198 ; CHECK: entry:
7199 ; CHECK-NEXT: %29 = icmp ule <2 x i64> %5, %11
7200 ; CHECK-NEXT: %30 = icmp ule <2 x i64> %6, %12
7201 ; CHECK-NEXT: %31 = icmp ule <2 x i64> %7, %13
7202 ; CHECK-NEXT: %32 = icmp ule <2 x i64> %8, %14
7203 ; CHECK-NEXT: %33 = icmp ule <2 x i64> %9, %15
7204 ; CHECK-NEXT: %34 = icmp ule <2 x i64> %10, %16
7205 ; CHECK-NEXT: %35 = select <2 x i1> %29, <2 x i64> %17, <2 x i64> %23
7206 ; CHECK-NEXT: %36 = select <2 x i1> %30, <2 x i64> %18, <2 x i64> %24
7207 ; CHECK-NEXT: %37 = select <2 x i1> %31, <2 x i64> %19, <2 x i64> %25
7208 ; CHECK-NEXT: %38 = select <2 x i1> %32, <2 x i64> %20, <2 x i64> %26
7209 ; CHECK-NEXT: %39 = select <2 x i1> %33, <2 x i64> %21, <2 x i64> %27
7210 ; CHECK-NEXT: %40 = select <2 x i1> %34, <2 x i64> %22, <2 x i64> %28
7211 ; CHECK-NEXT: store <2 x i64> %36, <2 x i64>* %0, align 16
7212 ; CHECK-NEXT: store <2 x i64> %37, <2 x i64>* %1, align 16
7213 ; CHECK-NEXT: store <2 x i64> %38, <2 x i64>* %2, align 16
7214 ; CHECK-NEXT: store <2 x i64> %39, <2 x i64>* %3, align 16
7215 ; CHECK-NEXT: store <2 x i64> %40, <2 x i64>* %4, align 16
7216 ; CHECK-NEXT: ret <2 x i64> %35
7217 ; CHECK-NEXT: }
7218
7219 define <12 x i8*> @icmp_eq_on_12xi8ptr(<12 x i8*>, <12 x i8*>, <12 x i8*>, <12 x i8*>) {
7220 entry:
7221 %4 = icmp eq <12 x i8*> %0, %1
7222 %5 = select <12 x i1> %4, <12 x i8*> %2, <12 x i8*> %3
7223 ret <12 x i8*> %5
7224 }
7225 ; CHECK-LABEL: define <4 x i8*> @icmp_eq_on_12xi8ptr(<4 x i8*>* nocapture nonnul l dereferenceable(16), <4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8 *>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
7226 ; CHECK: entry:
7227 ; CHECK-NEXT: %14 = icmp eq <4 x i8*> %2, %5
7228 ; CHECK-NEXT: %15 = icmp eq <4 x i8*> %3, %6
7229 ; CHECK-NEXT: %16 = icmp eq <4 x i8*> %4, %7
7230 ; CHECK-NEXT: %17 = select <4 x i1> %14, <4 x i8*> %8, <4 x i8*> %11
7231 ; CHECK-NEXT: %18 = select <4 x i1> %15, <4 x i8*> %9, <4 x i8*> %12
7232 ; CHECK-NEXT: %19 = select <4 x i1> %16, <4 x i8*> %10, <4 x i8*> %13
7233 ; CHECK-NEXT: store <4 x i8*> %18, <4 x i8*>* %0, align 16
7234 ; CHECK-NEXT: store <4 x i8*> %19, <4 x i8*>* %1, align 16
7235 ; CHECK-NEXT: ret <4 x i8*> %17
7236 ; CHECK-NEXT: }
7237
7238 define <12 x i8*> @icmp_ne_on_12xi8ptr(<12 x i8*>, <12 x i8*>, <12 x i8*>, <12 x i8*>) {
7239 entry:
7240 %4 = icmp ne <12 x i8*> %0, %1
7241 %5 = select <12 x i1> %4, <12 x i8*> %2, <12 x i8*> %3
7242 ret <12 x i8*> %5
7243 }
7244 ; CHECK-LABEL: define <4 x i8*> @icmp_ne_on_12xi8ptr(<4 x i8*>* nocapture nonnul l dereferenceable(16), <4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8 *>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
7245 ; CHECK: entry:
7246 ; CHECK-NEXT: %14 = icmp ne <4 x i8*> %2, %5
7247 ; CHECK-NEXT: %15 = icmp ne <4 x i8*> %3, %6
7248 ; CHECK-NEXT: %16 = icmp ne <4 x i8*> %4, %7
7249 ; CHECK-NEXT: %17 = select <4 x i1> %14, <4 x i8*> %8, <4 x i8*> %11
7250 ; CHECK-NEXT: %18 = select <4 x i1> %15, <4 x i8*> %9, <4 x i8*> %12
7251 ; CHECK-NEXT: %19 = select <4 x i1> %16, <4 x i8*> %10, <4 x i8*> %13
7252 ; CHECK-NEXT: store <4 x i8*> %18, <4 x i8*>* %0, align 16
7253 ; CHECK-NEXT: store <4 x i8*> %19, <4 x i8*>* %1, align 16
7254 ; CHECK-NEXT: ret <4 x i8*> %17
7255 ; CHECK-NEXT: }
7256
7257 define <12 x i8*> @icmp_sgt_on_12xi8ptr(<12 x i8*>, <12 x i8*>, <12 x i8*>, <12 x i8*>) {
7258 entry:
7259 %4 = icmp sgt <12 x i8*> %0, %1
7260 %5 = select <12 x i1> %4, <12 x i8*> %2, <12 x i8*> %3
7261 ret <12 x i8*> %5
7262 }
7263 ; CHECK-LABEL: define <4 x i8*> @icmp_sgt_on_12xi8ptr(<4 x i8*>* nocapture nonnu ll dereferenceable(16), <4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i 8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*> , <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
7264 ; CHECK: entry:
7265 ; CHECK-NEXT: %14 = icmp sgt <4 x i8*> %2, %5
7266 ; CHECK-NEXT: %15 = icmp sgt <4 x i8*> %3, %6
7267 ; CHECK-NEXT: %16 = icmp sgt <4 x i8*> %4, %7
7268 ; CHECK-NEXT: %17 = select <4 x i1> %14, <4 x i8*> %8, <4 x i8*> %11
7269 ; CHECK-NEXT: %18 = select <4 x i1> %15, <4 x i8*> %9, <4 x i8*> %12
7270 ; CHECK-NEXT: %19 = select <4 x i1> %16, <4 x i8*> %10, <4 x i8*> %13
7271 ; CHECK-NEXT: store <4 x i8*> %18, <4 x i8*>* %0, align 16
7272 ; CHECK-NEXT: store <4 x i8*> %19, <4 x i8*>* %1, align 16
7273 ; CHECK-NEXT: ret <4 x i8*> %17
7274 ; CHECK-NEXT: }
7275
7276 define <12 x i8*> @icmp_ugt_on_12xi8ptr(<12 x i8*>, <12 x i8*>, <12 x i8*>, <12 x i8*>) {
7277 entry:
7278 %4 = icmp ugt <12 x i8*> %0, %1
7279 %5 = select <12 x i1> %4, <12 x i8*> %2, <12 x i8*> %3
7280 ret <12 x i8*> %5
7281 }
7282 ; CHECK-LABEL: define <4 x i8*> @icmp_ugt_on_12xi8ptr(<4 x i8*>* nocapture nonnu ll dereferenceable(16), <4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i 8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*> , <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
7283 ; CHECK: entry:
7284 ; CHECK-NEXT: %14 = icmp ugt <4 x i8*> %2, %5
7285 ; CHECK-NEXT: %15 = icmp ugt <4 x i8*> %3, %6
7286 ; CHECK-NEXT: %16 = icmp ugt <4 x i8*> %4, %7
7287 ; CHECK-NEXT: %17 = select <4 x i1> %14, <4 x i8*> %8, <4 x i8*> %11
7288 ; CHECK-NEXT: %18 = select <4 x i1> %15, <4 x i8*> %9, <4 x i8*> %12
7289 ; CHECK-NEXT: %19 = select <4 x i1> %16, <4 x i8*> %10, <4 x i8*> %13
7290 ; CHECK-NEXT: store <4 x i8*> %18, <4 x i8*>* %0, align 16
7291 ; CHECK-NEXT: store <4 x i8*> %19, <4 x i8*>* %1, align 16
7292 ; CHECK-NEXT: ret <4 x i8*> %17
7293 ; CHECK-NEXT: }
7294
7295 define <12 x i8*> @icmp_sge_on_12xi8ptr(<12 x i8*>, <12 x i8*>, <12 x i8*>, <12 x i8*>) {
7296 entry:
7297 %4 = icmp sge <12 x i8*> %0, %1
7298 %5 = select <12 x i1> %4, <12 x i8*> %2, <12 x i8*> %3
7299 ret <12 x i8*> %5
7300 }
7301 ; CHECK-LABEL: define <4 x i8*> @icmp_sge_on_12xi8ptr(<4 x i8*>* nocapture nonnu ll dereferenceable(16), <4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i 8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*> , <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
7302 ; CHECK: entry:
7303 ; CHECK-NEXT: %14 = icmp sge <4 x i8*> %2, %5
7304 ; CHECK-NEXT: %15 = icmp sge <4 x i8*> %3, %6
7305 ; CHECK-NEXT: %16 = icmp sge <4 x i8*> %4, %7
7306 ; CHECK-NEXT: %17 = select <4 x i1> %14, <4 x i8*> %8, <4 x i8*> %11
7307 ; CHECK-NEXT: %18 = select <4 x i1> %15, <4 x i8*> %9, <4 x i8*> %12
7308 ; CHECK-NEXT: %19 = select <4 x i1> %16, <4 x i8*> %10, <4 x i8*> %13
7309 ; CHECK-NEXT: store <4 x i8*> %18, <4 x i8*>* %0, align 16
7310 ; CHECK-NEXT: store <4 x i8*> %19, <4 x i8*>* %1, align 16
7311 ; CHECK-NEXT: ret <4 x i8*> %17
7312 ; CHECK-NEXT: }
7313
7314 define <12 x i8*> @icmp_uge_on_12xi8ptr(<12 x i8*>, <12 x i8*>, <12 x i8*>, <12 x i8*>) {
7315 entry:
7316 %4 = icmp uge <12 x i8*> %0, %1
7317 %5 = select <12 x i1> %4, <12 x i8*> %2, <12 x i8*> %3
7318 ret <12 x i8*> %5
7319 }
7320 ; CHECK-LABEL: define <4 x i8*> @icmp_uge_on_12xi8ptr(<4 x i8*>* nocapture nonnu ll dereferenceable(16), <4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i 8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*> , <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
7321 ; CHECK: entry:
7322 ; CHECK-NEXT: %14 = icmp uge <4 x i8*> %2, %5
7323 ; CHECK-NEXT: %15 = icmp uge <4 x i8*> %3, %6
7324 ; CHECK-NEXT: %16 = icmp uge <4 x i8*> %4, %7
7325 ; CHECK-NEXT: %17 = select <4 x i1> %14, <4 x i8*> %8, <4 x i8*> %11
7326 ; CHECK-NEXT: %18 = select <4 x i1> %15, <4 x i8*> %9, <4 x i8*> %12
7327 ; CHECK-NEXT: %19 = select <4 x i1> %16, <4 x i8*> %10, <4 x i8*> %13
7328 ; CHECK-NEXT: store <4 x i8*> %18, <4 x i8*>* %0, align 16
7329 ; CHECK-NEXT: store <4 x i8*> %19, <4 x i8*>* %1, align 16
7330 ; CHECK-NEXT: ret <4 x i8*> %17
7331 ; CHECK-NEXT: }
7332
7333 define <12 x i8*> @icmp_slt_on_12xi8ptr(<12 x i8*>, <12 x i8*>, <12 x i8*>, <12 x i8*>) {
7334 entry:
7335 %4 = icmp slt <12 x i8*> %0, %1
7336 %5 = select <12 x i1> %4, <12 x i8*> %2, <12 x i8*> %3
7337 ret <12 x i8*> %5
7338 }
7339 ; CHECK-LABEL: define <4 x i8*> @icmp_slt_on_12xi8ptr(<4 x i8*>* nocapture nonnu ll dereferenceable(16), <4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i 8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*> , <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
7340 ; CHECK: entry:
7341 ; CHECK-NEXT: %14 = icmp slt <4 x i8*> %2, %5
7342 ; CHECK-NEXT: %15 = icmp slt <4 x i8*> %3, %6
7343 ; CHECK-NEXT: %16 = icmp slt <4 x i8*> %4, %7
7344 ; CHECK-NEXT: %17 = select <4 x i1> %14, <4 x i8*> %8, <4 x i8*> %11
7345 ; CHECK-NEXT: %18 = select <4 x i1> %15, <4 x i8*> %9, <4 x i8*> %12
7346 ; CHECK-NEXT: %19 = select <4 x i1> %16, <4 x i8*> %10, <4 x i8*> %13
7347 ; CHECK-NEXT: store <4 x i8*> %18, <4 x i8*>* %0, align 16
7348 ; CHECK-NEXT: store <4 x i8*> %19, <4 x i8*>* %1, align 16
7349 ; CHECK-NEXT: ret <4 x i8*> %17
7350 ; CHECK-NEXT: }
7351
7352 define <12 x i8*> @icmp_ult_on_12xi8ptr(<12 x i8*>, <12 x i8*>, <12 x i8*>, <12 x i8*>) {
7353 entry:
7354 %4 = icmp ult <12 x i8*> %0, %1
7355 %5 = select <12 x i1> %4, <12 x i8*> %2, <12 x i8*> %3
7356 ret <12 x i8*> %5
7357 }
7358 ; CHECK-LABEL: define <4 x i8*> @icmp_ult_on_12xi8ptr(<4 x i8*>* nocapture nonnu ll dereferenceable(16), <4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i 8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*> , <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
7359 ; CHECK: entry:
7360 ; CHECK-NEXT: %14 = icmp ult <4 x i8*> %2, %5
7361 ; CHECK-NEXT: %15 = icmp ult <4 x i8*> %3, %6
7362 ; CHECK-NEXT: %16 = icmp ult <4 x i8*> %4, %7
7363 ; CHECK-NEXT: %17 = select <4 x i1> %14, <4 x i8*> %8, <4 x i8*> %11
7364 ; CHECK-NEXT: %18 = select <4 x i1> %15, <4 x i8*> %9, <4 x i8*> %12
7365 ; CHECK-NEXT: %19 = select <4 x i1> %16, <4 x i8*> %10, <4 x i8*> %13
7366 ; CHECK-NEXT: store <4 x i8*> %18, <4 x i8*>* %0, align 16
7367 ; CHECK-NEXT: store <4 x i8*> %19, <4 x i8*>* %1, align 16
7368 ; CHECK-NEXT: ret <4 x i8*> %17
7369 ; CHECK-NEXT: }
7370
7371 define <12 x i8*> @icmp_sle_on_12xi8ptr(<12 x i8*>, <12 x i8*>, <12 x i8*>, <12 x i8*>) {
7372 entry:
7373 %4 = icmp sle <12 x i8*> %0, %1
7374 %5 = select <12 x i1> %4, <12 x i8*> %2, <12 x i8*> %3
7375 ret <12 x i8*> %5
7376 }
7377 ; CHECK-LABEL: define <4 x i8*> @icmp_sle_on_12xi8ptr(<4 x i8*>* nocapture nonnu ll dereferenceable(16), <4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i 8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*> , <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
7378 ; CHECK: entry:
7379 ; CHECK-NEXT: %14 = icmp sle <4 x i8*> %2, %5
7380 ; CHECK-NEXT: %15 = icmp sle <4 x i8*> %3, %6
7381 ; CHECK-NEXT: %16 = icmp sle <4 x i8*> %4, %7
7382 ; CHECK-NEXT: %17 = select <4 x i1> %14, <4 x i8*> %8, <4 x i8*> %11
7383 ; CHECK-NEXT: %18 = select <4 x i1> %15, <4 x i8*> %9, <4 x i8*> %12
7384 ; CHECK-NEXT: %19 = select <4 x i1> %16, <4 x i8*> %10, <4 x i8*> %13
7385 ; CHECK-NEXT: store <4 x i8*> %18, <4 x i8*>* %0, align 16
7386 ; CHECK-NEXT: store <4 x i8*> %19, <4 x i8*>* %1, align 16
7387 ; CHECK-NEXT: ret <4 x i8*> %17
7388 ; CHECK-NEXT: }
7389
7390 define <12 x i8*> @icmp_ule_on_12xi8ptr(<12 x i8*>, <12 x i8*>, <12 x i8*>, <12 x i8*>) {
7391 entry:
7392 %4 = icmp ule <12 x i8*> %0, %1
7393 %5 = select <12 x i1> %4, <12 x i8*> %2, <12 x i8*> %3
7394 ret <12 x i8*> %5
7395 }
7396 ; CHECK-LABEL: define <4 x i8*> @icmp_ule_on_12xi8ptr(<4 x i8*>* nocapture nonnu ll dereferenceable(16), <4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i 8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*> , <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
7397 ; CHECK: entry:
7398 ; CHECK-NEXT: %14 = icmp ule <4 x i8*> %2, %5
7399 ; CHECK-NEXT: %15 = icmp ule <4 x i8*> %3, %6
7400 ; CHECK-NEXT: %16 = icmp ule <4 x i8*> %4, %7
7401 ; CHECK-NEXT: %17 = select <4 x i1> %14, <4 x i8*> %8, <4 x i8*> %11
7402 ; CHECK-NEXT: %18 = select <4 x i1> %15, <4 x i8*> %9, <4 x i8*> %12
7403 ; CHECK-NEXT: %19 = select <4 x i1> %16, <4 x i8*> %10, <4 x i8*> %13
7404 ; CHECK-NEXT: store <4 x i8*> %18, <4 x i8*>* %0, align 16
7405 ; CHECK-NEXT: store <4 x i8*> %19, <4 x i8*>* %1, align 16
7406 ; CHECK-NEXT: ret <4 x i8*> %17
7407 ; CHECK-NEXT: }
7408
7409 define <16 x i8> @icmp_eq_on_16xi8(<16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>) {
7410 entry:
7411 %4 = icmp eq <16 x i8> %0, %1
7412 %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
7413 ret <16 x i8> %5
7414 }
7415 ; CHECK-LABEL: define <16 x i8> @icmp_eq_on_16xi8(<16 x i8>, <16 x i8>, <16 x i8 >, <16 x i8>) {
7416 ; CHECK: entry:
7417 ; CHECK-NEXT: %4 = icmp eq <16 x i8> %0, %1
7418 ; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
7419 ; CHECK-NEXT: ret <16 x i8> %5
7420 ; CHECK-NEXT: }
7421
7422 define <16 x i8> @icmp_ne_on_16xi8(<16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>) {
7423 entry:
7424 %4 = icmp ne <16 x i8> %0, %1
7425 %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
7426 ret <16 x i8> %5
7427 }
7428 ; CHECK-LABEL: define <16 x i8> @icmp_ne_on_16xi8(<16 x i8>, <16 x i8>, <16 x i8 >, <16 x i8>) {
7429 ; CHECK: entry:
7430 ; CHECK-NEXT: %4 = icmp ne <16 x i8> %0, %1
7431 ; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
7432 ; CHECK-NEXT: ret <16 x i8> %5
7433 ; CHECK-NEXT: }
7434
7435 define <16 x i8> @icmp_sgt_on_16xi8(<16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>) {
7436 entry:
7437 %4 = icmp sgt <16 x i8> %0, %1
7438 %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
7439 ret <16 x i8> %5
7440 }
7441 ; CHECK-LABEL: define <16 x i8> @icmp_sgt_on_16xi8(<16 x i8>, <16 x i8>, <16 x i 8>, <16 x i8>) {
7442 ; CHECK: entry:
7443 ; CHECK-NEXT: %4 = icmp sgt <16 x i8> %0, %1
7444 ; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
7445 ; CHECK-NEXT: ret <16 x i8> %5
7446 ; CHECK-NEXT: }
7447
7448 define <16 x i8> @icmp_ugt_on_16xi8(<16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>) {
7449 entry:
7450 %4 = icmp ugt <16 x i8> %0, %1
7451 %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
7452 ret <16 x i8> %5
7453 }
7454 ; CHECK-LABEL: define <16 x i8> @icmp_ugt_on_16xi8(<16 x i8>, <16 x i8>, <16 x i 8>, <16 x i8>) {
7455 ; CHECK: entry:
7456 ; CHECK-NEXT: %4 = icmp ugt <16 x i8> %0, %1
7457 ; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
7458 ; CHECK-NEXT: ret <16 x i8> %5
7459 ; CHECK-NEXT: }
7460
7461 define <16 x i8> @icmp_sge_on_16xi8(<16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>) {
7462 entry:
7463 %4 = icmp sge <16 x i8> %0, %1
7464 %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
7465 ret <16 x i8> %5
7466 }
7467 ; CHECK-LABEL: define <16 x i8> @icmp_sge_on_16xi8(<16 x i8>, <16 x i8>, <16 x i 8>, <16 x i8>) {
7468 ; CHECK: entry:
7469 ; CHECK-NEXT: %4 = icmp sge <16 x i8> %0, %1
7470 ; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
7471 ; CHECK-NEXT: ret <16 x i8> %5
7472 ; CHECK-NEXT: }
7473
7474 define <16 x i8> @icmp_uge_on_16xi8(<16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>) {
7475 entry:
7476 %4 = icmp uge <16 x i8> %0, %1
7477 %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
7478 ret <16 x i8> %5
7479 }
7480 ; CHECK-LABEL: define <16 x i8> @icmp_uge_on_16xi8(<16 x i8>, <16 x i8>, <16 x i 8>, <16 x i8>) {
7481 ; CHECK: entry:
7482 ; CHECK-NEXT: %4 = icmp uge <16 x i8> %0, %1
7483 ; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
7484 ; CHECK-NEXT: ret <16 x i8> %5
7485 ; CHECK-NEXT: }
7486
7487 define <16 x i8> @icmp_slt_on_16xi8(<16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>) {
7488 entry:
7489 %4 = icmp slt <16 x i8> %0, %1
7490 %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
7491 ret <16 x i8> %5
7492 }
7493 ; CHECK-LABEL: define <16 x i8> @icmp_slt_on_16xi8(<16 x i8>, <16 x i8>, <16 x i 8>, <16 x i8>) {
7494 ; CHECK: entry:
7495 ; CHECK-NEXT: %4 = icmp slt <16 x i8> %0, %1
7496 ; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
7497 ; CHECK-NEXT: ret <16 x i8> %5
7498 ; CHECK-NEXT: }
7499
7500 define <16 x i8> @icmp_ult_on_16xi8(<16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>) {
7501 entry:
7502 %4 = icmp ult <16 x i8> %0, %1
7503 %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
7504 ret <16 x i8> %5
7505 }
7506 ; CHECK-LABEL: define <16 x i8> @icmp_ult_on_16xi8(<16 x i8>, <16 x i8>, <16 x i 8>, <16 x i8>) {
7507 ; CHECK: entry:
7508 ; CHECK-NEXT: %4 = icmp ult <16 x i8> %0, %1
7509 ; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
7510 ; CHECK-NEXT: ret <16 x i8> %5
7511 ; CHECK-NEXT: }
7512
7513 define <16 x i8> @icmp_sle_on_16xi8(<16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>) {
7514 entry:
7515 %4 = icmp sle <16 x i8> %0, %1
7516 %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
7517 ret <16 x i8> %5
7518 }
7519 ; CHECK-LABEL: define <16 x i8> @icmp_sle_on_16xi8(<16 x i8>, <16 x i8>, <16 x i 8>, <16 x i8>) {
7520 ; CHECK: entry:
7521 ; CHECK-NEXT: %4 = icmp sle <16 x i8> %0, %1
7522 ; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
7523 ; CHECK-NEXT: ret <16 x i8> %5
7524 ; CHECK-NEXT: }
7525
7526 define <16 x i8> @icmp_ule_on_16xi8(<16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>) {
7527 entry:
7528 %4 = icmp ule <16 x i8> %0, %1
7529 %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
7530 ret <16 x i8> %5
7531 }
7532 ; CHECK-LABEL: define <16 x i8> @icmp_ule_on_16xi8(<16 x i8>, <16 x i8>, <16 x i 8>, <16 x i8>) {
7533 ; CHECK: entry:
7534 ; CHECK-NEXT: %4 = icmp ule <16 x i8> %0, %1
7535 ; CHECK-NEXT: %5 = select <16 x i1> %4, <16 x i8> %2, <16 x i8> %3
7536 ; CHECK-NEXT: ret <16 x i8> %5
7537 ; CHECK-NEXT: }
7538
7539 define <16 x i16> @icmp_eq_on_16xi16(<16 x i16>, <16 x i16>, <16 x i16>, <16 x i 16>) {
7540 entry:
7541 %4 = icmp eq <16 x i16> %0, %1
7542 %5 = select <16 x i1> %4, <16 x i16> %2, <16 x i16> %3
7543 ret <16 x i16> %5
7544 }
7545 ; CHECK-LABEL: define <8 x i16> @icmp_eq_on_16xi16(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
7546 ; CHECK: entry:
7547 ; CHECK-NEXT: %9 = icmp eq <8 x i16> %1, %3
7548 ; CHECK-NEXT: %10 = icmp eq <8 x i16> %2, %4
7549 ; CHECK-NEXT: %11 = select <8 x i1> %9, <8 x i16> %5, <8 x i16> %7
7550 ; CHECK-NEXT: %12 = select <8 x i1> %10, <8 x i16> %6, <8 x i16> %8
7551 ; CHECK-NEXT: store <8 x i16> %12, <8 x i16>* %0, align 16
7552 ; CHECK-NEXT: ret <8 x i16> %11
7553 ; CHECK-NEXT: }
7554
7555 define <16 x i16> @icmp_ne_on_16xi16(<16 x i16>, <16 x i16>, <16 x i16>, <16 x i 16>) {
7556 entry:
7557 %4 = icmp ne <16 x i16> %0, %1
7558 %5 = select <16 x i1> %4, <16 x i16> %2, <16 x i16> %3
7559 ret <16 x i16> %5
7560 }
7561 ; CHECK-LABEL: define <8 x i16> @icmp_ne_on_16xi16(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
7562 ; CHECK: entry:
7563 ; CHECK-NEXT: %9 = icmp ne <8 x i16> %1, %3
7564 ; CHECK-NEXT: %10 = icmp ne <8 x i16> %2, %4
7565 ; CHECK-NEXT: %11 = select <8 x i1> %9, <8 x i16> %5, <8 x i16> %7
7566 ; CHECK-NEXT: %12 = select <8 x i1> %10, <8 x i16> %6, <8 x i16> %8
7567 ; CHECK-NEXT: store <8 x i16> %12, <8 x i16>* %0, align 16
7568 ; CHECK-NEXT: ret <8 x i16> %11
7569 ; CHECK-NEXT: }
7570
7571 define <16 x i16> @icmp_sgt_on_16xi16(<16 x i16>, <16 x i16>, <16 x i16>, <16 x i16>) {
7572 entry:
7573 %4 = icmp sgt <16 x i16> %0, %1
7574 %5 = select <16 x i1> %4, <16 x i16> %2, <16 x i16> %3
7575 ret <16 x i16> %5
7576 }
7577 ; CHECK-LABEL: define <8 x i16> @icmp_sgt_on_16xi16(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
7578 ; CHECK: entry:
7579 ; CHECK-NEXT: %9 = icmp sgt <8 x i16> %1, %3
7580 ; CHECK-NEXT: %10 = icmp sgt <8 x i16> %2, %4
7581 ; CHECK-NEXT: %11 = select <8 x i1> %9, <8 x i16> %5, <8 x i16> %7
7582 ; CHECK-NEXT: %12 = select <8 x i1> %10, <8 x i16> %6, <8 x i16> %8
7583 ; CHECK-NEXT: store <8 x i16> %12, <8 x i16>* %0, align 16
7584 ; CHECK-NEXT: ret <8 x i16> %11
7585 ; CHECK-NEXT: }
7586
7587 define <16 x i16> @icmp_ugt_on_16xi16(<16 x i16>, <16 x i16>, <16 x i16>, <16 x i16>) {
7588 entry:
7589 %4 = icmp ugt <16 x i16> %0, %1
7590 %5 = select <16 x i1> %4, <16 x i16> %2, <16 x i16> %3
7591 ret <16 x i16> %5
7592 }
7593 ; CHECK-LABEL: define <8 x i16> @icmp_ugt_on_16xi16(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
7594 ; CHECK: entry:
7595 ; CHECK-NEXT: %9 = icmp ugt <8 x i16> %1, %3
7596 ; CHECK-NEXT: %10 = icmp ugt <8 x i16> %2, %4
7597 ; CHECK-NEXT: %11 = select <8 x i1> %9, <8 x i16> %5, <8 x i16> %7
7598 ; CHECK-NEXT: %12 = select <8 x i1> %10, <8 x i16> %6, <8 x i16> %8
7599 ; CHECK-NEXT: store <8 x i16> %12, <8 x i16>* %0, align 16
7600 ; CHECK-NEXT: ret <8 x i16> %11
7601 ; CHECK-NEXT: }
7602
7603 define <16 x i16> @icmp_sge_on_16xi16(<16 x i16>, <16 x i16>, <16 x i16>, <16 x i16>) {
7604 entry:
7605 %4 = icmp sge <16 x i16> %0, %1
7606 %5 = select <16 x i1> %4, <16 x i16> %2, <16 x i16> %3
7607 ret <16 x i16> %5
7608 }
7609 ; CHECK-LABEL: define <8 x i16> @icmp_sge_on_16xi16(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
7610 ; CHECK: entry:
7611 ; CHECK-NEXT: %9 = icmp sge <8 x i16> %1, %3
7612 ; CHECK-NEXT: %10 = icmp sge <8 x i16> %2, %4
7613 ; CHECK-NEXT: %11 = select <8 x i1> %9, <8 x i16> %5, <8 x i16> %7
7614 ; CHECK-NEXT: %12 = select <8 x i1> %10, <8 x i16> %6, <8 x i16> %8
7615 ; CHECK-NEXT: store <8 x i16> %12, <8 x i16>* %0, align 16
7616 ; CHECK-NEXT: ret <8 x i16> %11
7617 ; CHECK-NEXT: }
7618
7619 define <16 x i16> @icmp_uge_on_16xi16(<16 x i16>, <16 x i16>, <16 x i16>, <16 x i16>) {
7620 entry:
7621 %4 = icmp uge <16 x i16> %0, %1
7622 %5 = select <16 x i1> %4, <16 x i16> %2, <16 x i16> %3
7623 ret <16 x i16> %5
7624 }
7625 ; CHECK-LABEL: define <8 x i16> @icmp_uge_on_16xi16(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
7626 ; CHECK: entry:
7627 ; CHECK-NEXT: %9 = icmp uge <8 x i16> %1, %3
7628 ; CHECK-NEXT: %10 = icmp uge <8 x i16> %2, %4
7629 ; CHECK-NEXT: %11 = select <8 x i1> %9, <8 x i16> %5, <8 x i16> %7
7630 ; CHECK-NEXT: %12 = select <8 x i1> %10, <8 x i16> %6, <8 x i16> %8
7631 ; CHECK-NEXT: store <8 x i16> %12, <8 x i16>* %0, align 16
7632 ; CHECK-NEXT: ret <8 x i16> %11
7633 ; CHECK-NEXT: }
7634
7635 define <16 x i16> @icmp_slt_on_16xi16(<16 x i16>, <16 x i16>, <16 x i16>, <16 x i16>) {
7636 entry:
7637 %4 = icmp slt <16 x i16> %0, %1
7638 %5 = select <16 x i1> %4, <16 x i16> %2, <16 x i16> %3
7639 ret <16 x i16> %5
7640 }
7641 ; CHECK-LABEL: define <8 x i16> @icmp_slt_on_16xi16(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
7642 ; CHECK: entry:
7643 ; CHECK-NEXT: %9 = icmp slt <8 x i16> %1, %3
7644 ; CHECK-NEXT: %10 = icmp slt <8 x i16> %2, %4
7645 ; CHECK-NEXT: %11 = select <8 x i1> %9, <8 x i16> %5, <8 x i16> %7
7646 ; CHECK-NEXT: %12 = select <8 x i1> %10, <8 x i16> %6, <8 x i16> %8
7647 ; CHECK-NEXT: store <8 x i16> %12, <8 x i16>* %0, align 16
7648 ; CHECK-NEXT: ret <8 x i16> %11
7649 ; CHECK-NEXT: }
7650
7651 define <16 x i16> @icmp_ult_on_16xi16(<16 x i16>, <16 x i16>, <16 x i16>, <16 x i16>) {
7652 entry:
7653 %4 = icmp ult <16 x i16> %0, %1
7654 %5 = select <16 x i1> %4, <16 x i16> %2, <16 x i16> %3
7655 ret <16 x i16> %5
7656 }
7657 ; CHECK-LABEL: define <8 x i16> @icmp_ult_on_16xi16(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
7658 ; CHECK: entry:
7659 ; CHECK-NEXT: %9 = icmp ult <8 x i16> %1, %3
7660 ; CHECK-NEXT: %10 = icmp ult <8 x i16> %2, %4
7661 ; CHECK-NEXT: %11 = select <8 x i1> %9, <8 x i16> %5, <8 x i16> %7
7662 ; CHECK-NEXT: %12 = select <8 x i1> %10, <8 x i16> %6, <8 x i16> %8
7663 ; CHECK-NEXT: store <8 x i16> %12, <8 x i16>* %0, align 16
7664 ; CHECK-NEXT: ret <8 x i16> %11
7665 ; CHECK-NEXT: }
7666
7667 define <16 x i16> @icmp_sle_on_16xi16(<16 x i16>, <16 x i16>, <16 x i16>, <16 x i16>) {
7668 entry:
7669 %4 = icmp sle <16 x i16> %0, %1
7670 %5 = select <16 x i1> %4, <16 x i16> %2, <16 x i16> %3
7671 ret <16 x i16> %5
7672 }
7673 ; CHECK-LABEL: define <8 x i16> @icmp_sle_on_16xi16(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
7674 ; CHECK: entry:
7675 ; CHECK-NEXT: %9 = icmp sle <8 x i16> %1, %3
7676 ; CHECK-NEXT: %10 = icmp sle <8 x i16> %2, %4
7677 ; CHECK-NEXT: %11 = select <8 x i1> %9, <8 x i16> %5, <8 x i16> %7
7678 ; CHECK-NEXT: %12 = select <8 x i1> %10, <8 x i16> %6, <8 x i16> %8
7679 ; CHECK-NEXT: store <8 x i16> %12, <8 x i16>* %0, align 16
7680 ; CHECK-NEXT: ret <8 x i16> %11
7681 ; CHECK-NEXT: }
7682
7683 define <16 x i16> @icmp_ule_on_16xi16(<16 x i16>, <16 x i16>, <16 x i16>, <16 x i16>) {
7684 entry:
7685 %4 = icmp ule <16 x i16> %0, %1
7686 %5 = select <16 x i1> %4, <16 x i16> %2, <16 x i16> %3
7687 ret <16 x i16> %5
7688 }
7689 ; CHECK-LABEL: define <8 x i16> @icmp_ule_on_16xi16(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
7690 ; CHECK: entry:
7691 ; CHECK-NEXT: %9 = icmp ule <8 x i16> %1, %3
7692 ; CHECK-NEXT: %10 = icmp ule <8 x i16> %2, %4
7693 ; CHECK-NEXT: %11 = select <8 x i1> %9, <8 x i16> %5, <8 x i16> %7
7694 ; CHECK-NEXT: %12 = select <8 x i1> %10, <8 x i16> %6, <8 x i16> %8
7695 ; CHECK-NEXT: store <8 x i16> %12, <8 x i16>* %0, align 16
7696 ; CHECK-NEXT: ret <8 x i16> %11
7697 ; CHECK-NEXT: }
7698
7699 define <16 x i32> @icmp_eq_on_16xi32(<16 x i32>, <16 x i32>, <16 x i32>, <16 x i 32>) {
7700 entry:
7701 %4 = icmp eq <16 x i32> %0, %1
7702 %5 = select <16 x i1> %4, <16 x i32> %2, <16 x i32> %3
7703 ret <16 x i32> %5
7704 }
7705 ; CHECK-LABEL: define <4 x i32> @icmp_eq_on_16xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32> * nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i 32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> , <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
7706 ; CHECK: entry:
7707 ; CHECK-NEXT: %19 = icmp eq <4 x i32> %3, %7
7708 ; CHECK-NEXT: %20 = icmp eq <4 x i32> %4, %8
7709 ; CHECK-NEXT: %21 = icmp eq <4 x i32> %5, %9
7710 ; CHECK-NEXT: %22 = icmp eq <4 x i32> %6, %10
7711 ; CHECK-NEXT: %23 = select <4 x i1> %19, <4 x i32> %11, <4 x i32> %15
7712 ; CHECK-NEXT: %24 = select <4 x i1> %20, <4 x i32> %12, <4 x i32> %16
7713 ; CHECK-NEXT: %25 = select <4 x i1> %21, <4 x i32> %13, <4 x i32> %17
7714 ; CHECK-NEXT: %26 = select <4 x i1> %22, <4 x i32> %14, <4 x i32> %18
7715 ; CHECK-NEXT: store <4 x i32> %24, <4 x i32>* %0, align 16
7716 ; CHECK-NEXT: store <4 x i32> %25, <4 x i32>* %1, align 16
7717 ; CHECK-NEXT: store <4 x i32> %26, <4 x i32>* %2, align 16
7718 ; CHECK-NEXT: ret <4 x i32> %23
7719 ; CHECK-NEXT: }
7720
7721 define <16 x i32> @icmp_ne_on_16xi32(<16 x i32>, <16 x i32>, <16 x i32>, <16 x i 32>) {
7722 entry:
7723 %4 = icmp ne <16 x i32> %0, %1
7724 %5 = select <16 x i1> %4, <16 x i32> %2, <16 x i32> %3
7725 ret <16 x i32> %5
7726 }
7727 ; CHECK-LABEL: define <4 x i32> @icmp_ne_on_16xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32> * nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i 32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> , <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
7728 ; CHECK: entry:
7729 ; CHECK-NEXT: %19 = icmp ne <4 x i32> %3, %7
7730 ; CHECK-NEXT: %20 = icmp ne <4 x i32> %4, %8
7731 ; CHECK-NEXT: %21 = icmp ne <4 x i32> %5, %9
7732 ; CHECK-NEXT: %22 = icmp ne <4 x i32> %6, %10
7733 ; CHECK-NEXT: %23 = select <4 x i1> %19, <4 x i32> %11, <4 x i32> %15
7734 ; CHECK-NEXT: %24 = select <4 x i1> %20, <4 x i32> %12, <4 x i32> %16
7735 ; CHECK-NEXT: %25 = select <4 x i1> %21, <4 x i32> %13, <4 x i32> %17
7736 ; CHECK-NEXT: %26 = select <4 x i1> %22, <4 x i32> %14, <4 x i32> %18
7737 ; CHECK-NEXT: store <4 x i32> %24, <4 x i32>* %0, align 16
7738 ; CHECK-NEXT: store <4 x i32> %25, <4 x i32>* %1, align 16
7739 ; CHECK-NEXT: store <4 x i32> %26, <4 x i32>* %2, align 16
7740 ; CHECK-NEXT: ret <4 x i32> %23
7741 ; CHECK-NEXT: }
7742
7743 define <16 x i32> @icmp_sgt_on_16xi32(<16 x i32>, <16 x i32>, <16 x i32>, <16 x i32>) {
7744 entry:
7745 %4 = icmp sgt <16 x i32> %0, %1
7746 %5 = select <16 x i1> %4, <16 x i32> %2, <16 x i32> %3
7747 ret <16 x i32> %5
7748 }
7749 ; CHECK-LABEL: define <4 x i32> @icmp_sgt_on_16xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32 >* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32 >, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
7750 ; CHECK: entry:
7751 ; CHECK-NEXT: %19 = icmp sgt <4 x i32> %3, %7
7752 ; CHECK-NEXT: %20 = icmp sgt <4 x i32> %4, %8
7753 ; CHECK-NEXT: %21 = icmp sgt <4 x i32> %5, %9
7754 ; CHECK-NEXT: %22 = icmp sgt <4 x i32> %6, %10
7755 ; CHECK-NEXT: %23 = select <4 x i1> %19, <4 x i32> %11, <4 x i32> %15
7756 ; CHECK-NEXT: %24 = select <4 x i1> %20, <4 x i32> %12, <4 x i32> %16
7757 ; CHECK-NEXT: %25 = select <4 x i1> %21, <4 x i32> %13, <4 x i32> %17
7758 ; CHECK-NEXT: %26 = select <4 x i1> %22, <4 x i32> %14, <4 x i32> %18
7759 ; CHECK-NEXT: store <4 x i32> %24, <4 x i32>* %0, align 16
7760 ; CHECK-NEXT: store <4 x i32> %25, <4 x i32>* %1, align 16
7761 ; CHECK-NEXT: store <4 x i32> %26, <4 x i32>* %2, align 16
7762 ; CHECK-NEXT: ret <4 x i32> %23
7763 ; CHECK-NEXT: }
7764
7765 define <16 x i32> @icmp_ugt_on_16xi32(<16 x i32>, <16 x i32>, <16 x i32>, <16 x i32>) {
7766 entry:
7767 %4 = icmp ugt <16 x i32> %0, %1
7768 %5 = select <16 x i1> %4, <16 x i32> %2, <16 x i32> %3
7769 ret <16 x i32> %5
7770 }
7771 ; CHECK-LABEL: define <4 x i32> @icmp_ugt_on_16xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32 >* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32 >, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
7772 ; CHECK: entry:
7773 ; CHECK-NEXT: %19 = icmp ugt <4 x i32> %3, %7
7774 ; CHECK-NEXT: %20 = icmp ugt <4 x i32> %4, %8
7775 ; CHECK-NEXT: %21 = icmp ugt <4 x i32> %5, %9
7776 ; CHECK-NEXT: %22 = icmp ugt <4 x i32> %6, %10
7777 ; CHECK-NEXT: %23 = select <4 x i1> %19, <4 x i32> %11, <4 x i32> %15
7778 ; CHECK-NEXT: %24 = select <4 x i1> %20, <4 x i32> %12, <4 x i32> %16
7779 ; CHECK-NEXT: %25 = select <4 x i1> %21, <4 x i32> %13, <4 x i32> %17
7780 ; CHECK-NEXT: %26 = select <4 x i1> %22, <4 x i32> %14, <4 x i32> %18
7781 ; CHECK-NEXT: store <4 x i32> %24, <4 x i32>* %0, align 16
7782 ; CHECK-NEXT: store <4 x i32> %25, <4 x i32>* %1, align 16
7783 ; CHECK-NEXT: store <4 x i32> %26, <4 x i32>* %2, align 16
7784 ; CHECK-NEXT: ret <4 x i32> %23
7785 ; CHECK-NEXT: }
7786
7787 define <16 x i32> @icmp_sge_on_16xi32(<16 x i32>, <16 x i32>, <16 x i32>, <16 x i32>) {
7788 entry:
7789 %4 = icmp sge <16 x i32> %0, %1
7790 %5 = select <16 x i1> %4, <16 x i32> %2, <16 x i32> %3
7791 ret <16 x i32> %5
7792 }
7793 ; CHECK-LABEL: define <4 x i32> @icmp_sge_on_16xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32 >* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32 >, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
7794 ; CHECK: entry:
7795 ; CHECK-NEXT: %19 = icmp sge <4 x i32> %3, %7
7796 ; CHECK-NEXT: %20 = icmp sge <4 x i32> %4, %8
7797 ; CHECK-NEXT: %21 = icmp sge <4 x i32> %5, %9
7798 ; CHECK-NEXT: %22 = icmp sge <4 x i32> %6, %10
7799 ; CHECK-NEXT: %23 = select <4 x i1> %19, <4 x i32> %11, <4 x i32> %15
7800 ; CHECK-NEXT: %24 = select <4 x i1> %20, <4 x i32> %12, <4 x i32> %16
7801 ; CHECK-NEXT: %25 = select <4 x i1> %21, <4 x i32> %13, <4 x i32> %17
7802 ; CHECK-NEXT: %26 = select <4 x i1> %22, <4 x i32> %14, <4 x i32> %18
7803 ; CHECK-NEXT: store <4 x i32> %24, <4 x i32>* %0, align 16
7804 ; CHECK-NEXT: store <4 x i32> %25, <4 x i32>* %1, align 16
7805 ; CHECK-NEXT: store <4 x i32> %26, <4 x i32>* %2, align 16
7806 ; CHECK-NEXT: ret <4 x i32> %23
7807 ; CHECK-NEXT: }
7808
7809 define <16 x i32> @icmp_uge_on_16xi32(<16 x i32>, <16 x i32>, <16 x i32>, <16 x i32>) {
7810 entry:
7811 %4 = icmp uge <16 x i32> %0, %1
7812 %5 = select <16 x i1> %4, <16 x i32> %2, <16 x i32> %3
7813 ret <16 x i32> %5
7814 }
7815 ; CHECK-LABEL: define <4 x i32> @icmp_uge_on_16xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32 >* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32 >, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
7816 ; CHECK: entry:
7817 ; CHECK-NEXT: %19 = icmp uge <4 x i32> %3, %7
7818 ; CHECK-NEXT: %20 = icmp uge <4 x i32> %4, %8
7819 ; CHECK-NEXT: %21 = icmp uge <4 x i32> %5, %9
7820 ; CHECK-NEXT: %22 = icmp uge <4 x i32> %6, %10
7821 ; CHECK-NEXT: %23 = select <4 x i1> %19, <4 x i32> %11, <4 x i32> %15
7822 ; CHECK-NEXT: %24 = select <4 x i1> %20, <4 x i32> %12, <4 x i32> %16
7823 ; CHECK-NEXT: %25 = select <4 x i1> %21, <4 x i32> %13, <4 x i32> %17
7824 ; CHECK-NEXT: %26 = select <4 x i1> %22, <4 x i32> %14, <4 x i32> %18
7825 ; CHECK-NEXT: store <4 x i32> %24, <4 x i32>* %0, align 16
7826 ; CHECK-NEXT: store <4 x i32> %25, <4 x i32>* %1, align 16
7827 ; CHECK-NEXT: store <4 x i32> %26, <4 x i32>* %2, align 16
7828 ; CHECK-NEXT: ret <4 x i32> %23
7829 ; CHECK-NEXT: }
7830
7831 define <16 x i32> @icmp_slt_on_16xi32(<16 x i32>, <16 x i32>, <16 x i32>, <16 x i32>) {
7832 entry:
7833 %4 = icmp slt <16 x i32> %0, %1
7834 %5 = select <16 x i1> %4, <16 x i32> %2, <16 x i32> %3
7835 ret <16 x i32> %5
7836 }
7837 ; CHECK-LABEL: define <4 x i32> @icmp_slt_on_16xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32 >* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32 >, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
7838 ; CHECK: entry:
7839 ; CHECK-NEXT: %19 = icmp slt <4 x i32> %3, %7
7840 ; CHECK-NEXT: %20 = icmp slt <4 x i32> %4, %8
7841 ; CHECK-NEXT: %21 = icmp slt <4 x i32> %5, %9
7842 ; CHECK-NEXT: %22 = icmp slt <4 x i32> %6, %10
7843 ; CHECK-NEXT: %23 = select <4 x i1> %19, <4 x i32> %11, <4 x i32> %15
7844 ; CHECK-NEXT: %24 = select <4 x i1> %20, <4 x i32> %12, <4 x i32> %16
7845 ; CHECK-NEXT: %25 = select <4 x i1> %21, <4 x i32> %13, <4 x i32> %17
7846 ; CHECK-NEXT: %26 = select <4 x i1> %22, <4 x i32> %14, <4 x i32> %18
7847 ; CHECK-NEXT: store <4 x i32> %24, <4 x i32>* %0, align 16
7848 ; CHECK-NEXT: store <4 x i32> %25, <4 x i32>* %1, align 16
7849 ; CHECK-NEXT: store <4 x i32> %26, <4 x i32>* %2, align 16
7850 ; CHECK-NEXT: ret <4 x i32> %23
7851 ; CHECK-NEXT: }
7852
7853 define <16 x i32> @icmp_ult_on_16xi32(<16 x i32>, <16 x i32>, <16 x i32>, <16 x i32>) {
7854 entry:
7855 %4 = icmp ult <16 x i32> %0, %1
7856 %5 = select <16 x i1> %4, <16 x i32> %2, <16 x i32> %3
7857 ret <16 x i32> %5
7858 }
7859 ; CHECK-LABEL: define <4 x i32> @icmp_ult_on_16xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32 >* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32 >, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
7860 ; CHECK: entry:
7861 ; CHECK-NEXT: %19 = icmp ult <4 x i32> %3, %7
7862 ; CHECK-NEXT: %20 = icmp ult <4 x i32> %4, %8
7863 ; CHECK-NEXT: %21 = icmp ult <4 x i32> %5, %9
7864 ; CHECK-NEXT: %22 = icmp ult <4 x i32> %6, %10
7865 ; CHECK-NEXT: %23 = select <4 x i1> %19, <4 x i32> %11, <4 x i32> %15
7866 ; CHECK-NEXT: %24 = select <4 x i1> %20, <4 x i32> %12, <4 x i32> %16
7867 ; CHECK-NEXT: %25 = select <4 x i1> %21, <4 x i32> %13, <4 x i32> %17
7868 ; CHECK-NEXT: %26 = select <4 x i1> %22, <4 x i32> %14, <4 x i32> %18
7869 ; CHECK-NEXT: store <4 x i32> %24, <4 x i32>* %0, align 16
7870 ; CHECK-NEXT: store <4 x i32> %25, <4 x i32>* %1, align 16
7871 ; CHECK-NEXT: store <4 x i32> %26, <4 x i32>* %2, align 16
7872 ; CHECK-NEXT: ret <4 x i32> %23
7873 ; CHECK-NEXT: }
7874
7875 define <16 x i32> @icmp_sle_on_16xi32(<16 x i32>, <16 x i32>, <16 x i32>, <16 x i32>) {
7876 entry:
7877 %4 = icmp sle <16 x i32> %0, %1
7878 %5 = select <16 x i1> %4, <16 x i32> %2, <16 x i32> %3
7879 ret <16 x i32> %5
7880 }
7881 ; CHECK-LABEL: define <4 x i32> @icmp_sle_on_16xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32 >* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32 >, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
7882 ; CHECK: entry:
7883 ; CHECK-NEXT: %19 = icmp sle <4 x i32> %3, %7
7884 ; CHECK-NEXT: %20 = icmp sle <4 x i32> %4, %8
7885 ; CHECK-NEXT: %21 = icmp sle <4 x i32> %5, %9
7886 ; CHECK-NEXT: %22 = icmp sle <4 x i32> %6, %10
7887 ; CHECK-NEXT: %23 = select <4 x i1> %19, <4 x i32> %11, <4 x i32> %15
7888 ; CHECK-NEXT: %24 = select <4 x i1> %20, <4 x i32> %12, <4 x i32> %16
7889 ; CHECK-NEXT: %25 = select <4 x i1> %21, <4 x i32> %13, <4 x i32> %17
7890 ; CHECK-NEXT: %26 = select <4 x i1> %22, <4 x i32> %14, <4 x i32> %18
7891 ; CHECK-NEXT: store <4 x i32> %24, <4 x i32>* %0, align 16
7892 ; CHECK-NEXT: store <4 x i32> %25, <4 x i32>* %1, align 16
7893 ; CHECK-NEXT: store <4 x i32> %26, <4 x i32>* %2, align 16
7894 ; CHECK-NEXT: ret <4 x i32> %23
7895 ; CHECK-NEXT: }
7896
7897 define <16 x i32> @icmp_ule_on_16xi32(<16 x i32>, <16 x i32>, <16 x i32>, <16 x i32>) {
7898 entry:
7899 %4 = icmp ule <16 x i32> %0, %1
7900 %5 = select <16 x i1> %4, <16 x i32> %2, <16 x i32> %3
7901 ret <16 x i32> %5
7902 }
7903 ; CHECK-LABEL: define <4 x i32> @icmp_ule_on_16xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32 >* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32 >, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
7904 ; CHECK: entry:
7905 ; CHECK-NEXT: %19 = icmp ule <4 x i32> %3, %7
7906 ; CHECK-NEXT: %20 = icmp ule <4 x i32> %4, %8
7907 ; CHECK-NEXT: %21 = icmp ule <4 x i32> %5, %9
7908 ; CHECK-NEXT: %22 = icmp ule <4 x i32> %6, %10
7909 ; CHECK-NEXT: %23 = select <4 x i1> %19, <4 x i32> %11, <4 x i32> %15
7910 ; CHECK-NEXT: %24 = select <4 x i1> %20, <4 x i32> %12, <4 x i32> %16
7911 ; CHECK-NEXT: %25 = select <4 x i1> %21, <4 x i32> %13, <4 x i32> %17
7912 ; CHECK-NEXT: %26 = select <4 x i1> %22, <4 x i32> %14, <4 x i32> %18
7913 ; CHECK-NEXT: store <4 x i32> %24, <4 x i32>* %0, align 16
7914 ; CHECK-NEXT: store <4 x i32> %25, <4 x i32>* %1, align 16
7915 ; CHECK-NEXT: store <4 x i32> %26, <4 x i32>* %2, align 16
7916 ; CHECK-NEXT: ret <4 x i32> %23
7917 ; CHECK-NEXT: }
7918
7919 define <16 x i64> @icmp_eq_on_16xi64(<16 x i64>, <16 x i64>, <16 x i64>, <16 x i 64>) {
7920 entry:
7921 %4 = icmp eq <16 x i64> %0, %1
7922 %5 = select <16 x i1> %4, <16 x i64> %2, <16 x i64> %3
7923 ret <16 x i64> %5
7924 }
7925 ; CHECK-LABEL: define <2 x i64> @icmp_eq_on_16xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64> * nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenc eable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocaptur e nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64 >, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
7926 ; CHECK: entry:
7927 ; CHECK-NEXT: %39 = icmp eq <2 x i64> %7, %15
7928 ; CHECK-NEXT: %40 = icmp eq <2 x i64> %8, %16
7929 ; CHECK-NEXT: %41 = icmp eq <2 x i64> %9, %17
7930 ; CHECK-NEXT: %42 = icmp eq <2 x i64> %10, %18
7931 ; CHECK-NEXT: %43 = icmp eq <2 x i64> %11, %19
7932 ; CHECK-NEXT: %44 = icmp eq <2 x i64> %12, %20
7933 ; CHECK-NEXT: %45 = icmp eq <2 x i64> %13, %21
7934 ; CHECK-NEXT: %46 = icmp eq <2 x i64> %14, %22
7935 ; CHECK-NEXT: %47 = select <2 x i1> %39, <2 x i64> %23, <2 x i64> %31
7936 ; CHECK-NEXT: %48 = select <2 x i1> %40, <2 x i64> %24, <2 x i64> %32
7937 ; CHECK-NEXT: %49 = select <2 x i1> %41, <2 x i64> %25, <2 x i64> %33
7938 ; CHECK-NEXT: %50 = select <2 x i1> %42, <2 x i64> %26, <2 x i64> %34
7939 ; CHECK-NEXT: %51 = select <2 x i1> %43, <2 x i64> %27, <2 x i64> %35
7940 ; CHECK-NEXT: %52 = select <2 x i1> %44, <2 x i64> %28, <2 x i64> %36
7941 ; CHECK-NEXT: %53 = select <2 x i1> %45, <2 x i64> %29, <2 x i64> %37
7942 ; CHECK-NEXT: %54 = select <2 x i1> %46, <2 x i64> %30, <2 x i64> %38
7943 ; CHECK-NEXT: store <2 x i64> %48, <2 x i64>* %0, align 16
7944 ; CHECK-NEXT: store <2 x i64> %49, <2 x i64>* %1, align 16
7945 ; CHECK-NEXT: store <2 x i64> %50, <2 x i64>* %2, align 16
7946 ; CHECK-NEXT: store <2 x i64> %51, <2 x i64>* %3, align 16
7947 ; CHECK-NEXT: store <2 x i64> %52, <2 x i64>* %4, align 16
7948 ; CHECK-NEXT: store <2 x i64> %53, <2 x i64>* %5, align 16
7949 ; CHECK-NEXT: store <2 x i64> %54, <2 x i64>* %6, align 16
7950 ; CHECK-NEXT: ret <2 x i64> %47
7951 ; CHECK-NEXT: }
7952
7953 define <16 x i64> @icmp_ne_on_16xi64(<16 x i64>, <16 x i64>, <16 x i64>, <16 x i 64>) {
7954 entry:
7955 %4 = icmp ne <16 x i64> %0, %1
7956 %5 = select <16 x i1> %4, <16 x i64> %2, <16 x i64> %3
7957 ret <16 x i64> %5
7958 }
7959 ; CHECK-LABEL: define <2 x i64> @icmp_ne_on_16xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64> * nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenc eable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocaptur e nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64 >, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
7960 ; CHECK: entry:
7961 ; CHECK-NEXT: %39 = icmp ne <2 x i64> %7, %15
7962 ; CHECK-NEXT: %40 = icmp ne <2 x i64> %8, %16
7963 ; CHECK-NEXT: %41 = icmp ne <2 x i64> %9, %17
7964 ; CHECK-NEXT: %42 = icmp ne <2 x i64> %10, %18
7965 ; CHECK-NEXT: %43 = icmp ne <2 x i64> %11, %19
7966 ; CHECK-NEXT: %44 = icmp ne <2 x i64> %12, %20
7967 ; CHECK-NEXT: %45 = icmp ne <2 x i64> %13, %21
7968 ; CHECK-NEXT: %46 = icmp ne <2 x i64> %14, %22
7969 ; CHECK-NEXT: %47 = select <2 x i1> %39, <2 x i64> %23, <2 x i64> %31
7970 ; CHECK-NEXT: %48 = select <2 x i1> %40, <2 x i64> %24, <2 x i64> %32
7971 ; CHECK-NEXT: %49 = select <2 x i1> %41, <2 x i64> %25, <2 x i64> %33
7972 ; CHECK-NEXT: %50 = select <2 x i1> %42, <2 x i64> %26, <2 x i64> %34
7973 ; CHECK-NEXT: %51 = select <2 x i1> %43, <2 x i64> %27, <2 x i64> %35
7974 ; CHECK-NEXT: %52 = select <2 x i1> %44, <2 x i64> %28, <2 x i64> %36
7975 ; CHECK-NEXT: %53 = select <2 x i1> %45, <2 x i64> %29, <2 x i64> %37
7976 ; CHECK-NEXT: %54 = select <2 x i1> %46, <2 x i64> %30, <2 x i64> %38
7977 ; CHECK-NEXT: store <2 x i64> %48, <2 x i64>* %0, align 16
7978 ; CHECK-NEXT: store <2 x i64> %49, <2 x i64>* %1, align 16
7979 ; CHECK-NEXT: store <2 x i64> %50, <2 x i64>* %2, align 16
7980 ; CHECK-NEXT: store <2 x i64> %51, <2 x i64>* %3, align 16
7981 ; CHECK-NEXT: store <2 x i64> %52, <2 x i64>* %4, align 16
7982 ; CHECK-NEXT: store <2 x i64> %53, <2 x i64>* %5, align 16
7983 ; CHECK-NEXT: store <2 x i64> %54, <2 x i64>* %6, align 16
7984 ; CHECK-NEXT: ret <2 x i64> %47
7985 ; CHECK-NEXT: }
7986
7987 define <16 x i64> @icmp_sgt_on_16xi64(<16 x i64>, <16 x i64>, <16 x i64>, <16 x i64>) {
7988 entry:
7989 %4 = icmp sgt <16 x i64> %0, %1
7990 %5 = select <16 x i1> %4, <16 x i64> %2, <16 x i64> %3
7991 ret <16 x i64> %5
7992 }
7993 ; CHECK-LABEL: define <2 x i64> @icmp_sgt_on_16xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64 >* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferen ceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocaptu re nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16) , <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, < 2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i6 4>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
7994 ; CHECK: entry:
7995 ; CHECK-NEXT: %39 = icmp sgt <2 x i64> %7, %15
7996 ; CHECK-NEXT: %40 = icmp sgt <2 x i64> %8, %16
7997 ; CHECK-NEXT: %41 = icmp sgt <2 x i64> %9, %17
7998 ; CHECK-NEXT: %42 = icmp sgt <2 x i64> %10, %18
7999 ; CHECK-NEXT: %43 = icmp sgt <2 x i64> %11, %19
8000 ; CHECK-NEXT: %44 = icmp sgt <2 x i64> %12, %20
8001 ; CHECK-NEXT: %45 = icmp sgt <2 x i64> %13, %21
8002 ; CHECK-NEXT: %46 = icmp sgt <2 x i64> %14, %22
8003 ; CHECK-NEXT: %47 = select <2 x i1> %39, <2 x i64> %23, <2 x i64> %31
8004 ; CHECK-NEXT: %48 = select <2 x i1> %40, <2 x i64> %24, <2 x i64> %32
8005 ; CHECK-NEXT: %49 = select <2 x i1> %41, <2 x i64> %25, <2 x i64> %33
8006 ; CHECK-NEXT: %50 = select <2 x i1> %42, <2 x i64> %26, <2 x i64> %34
8007 ; CHECK-NEXT: %51 = select <2 x i1> %43, <2 x i64> %27, <2 x i64> %35
8008 ; CHECK-NEXT: %52 = select <2 x i1> %44, <2 x i64> %28, <2 x i64> %36
8009 ; CHECK-NEXT: %53 = select <2 x i1> %45, <2 x i64> %29, <2 x i64> %37
8010 ; CHECK-NEXT: %54 = select <2 x i1> %46, <2 x i64> %30, <2 x i64> %38
8011 ; CHECK-NEXT: store <2 x i64> %48, <2 x i64>* %0, align 16
8012 ; CHECK-NEXT: store <2 x i64> %49, <2 x i64>* %1, align 16
8013 ; CHECK-NEXT: store <2 x i64> %50, <2 x i64>* %2, align 16
8014 ; CHECK-NEXT: store <2 x i64> %51, <2 x i64>* %3, align 16
8015 ; CHECK-NEXT: store <2 x i64> %52, <2 x i64>* %4, align 16
8016 ; CHECK-NEXT: store <2 x i64> %53, <2 x i64>* %5, align 16
8017 ; CHECK-NEXT: store <2 x i64> %54, <2 x i64>* %6, align 16
8018 ; CHECK-NEXT: ret <2 x i64> %47
8019 ; CHECK-NEXT: }
8020
8021 define <16 x i64> @icmp_ugt_on_16xi64(<16 x i64>, <16 x i64>, <16 x i64>, <16 x i64>) {
8022 entry:
8023 %4 = icmp ugt <16 x i64> %0, %1
8024 %5 = select <16 x i1> %4, <16 x i64> %2, <16 x i64> %3
8025 ret <16 x i64> %5
8026 }
8027 ; CHECK-LABEL: define <2 x i64> @icmp_ugt_on_16xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64 >* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferen ceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocaptu re nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16) , <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, < 2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i6 4>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
8028 ; CHECK: entry:
8029 ; CHECK-NEXT: %39 = icmp ugt <2 x i64> %7, %15
8030 ; CHECK-NEXT: %40 = icmp ugt <2 x i64> %8, %16
8031 ; CHECK-NEXT: %41 = icmp ugt <2 x i64> %9, %17
8032 ; CHECK-NEXT: %42 = icmp ugt <2 x i64> %10, %18
8033 ; CHECK-NEXT: %43 = icmp ugt <2 x i64> %11, %19
8034 ; CHECK-NEXT: %44 = icmp ugt <2 x i64> %12, %20
8035 ; CHECK-NEXT: %45 = icmp ugt <2 x i64> %13, %21
8036 ; CHECK-NEXT: %46 = icmp ugt <2 x i64> %14, %22
8037 ; CHECK-NEXT: %47 = select <2 x i1> %39, <2 x i64> %23, <2 x i64> %31
8038 ; CHECK-NEXT: %48 = select <2 x i1> %40, <2 x i64> %24, <2 x i64> %32
8039 ; CHECK-NEXT: %49 = select <2 x i1> %41, <2 x i64> %25, <2 x i64> %33
8040 ; CHECK-NEXT: %50 = select <2 x i1> %42, <2 x i64> %26, <2 x i64> %34
8041 ; CHECK-NEXT: %51 = select <2 x i1> %43, <2 x i64> %27, <2 x i64> %35
8042 ; CHECK-NEXT: %52 = select <2 x i1> %44, <2 x i64> %28, <2 x i64> %36
8043 ; CHECK-NEXT: %53 = select <2 x i1> %45, <2 x i64> %29, <2 x i64> %37
8044 ; CHECK-NEXT: %54 = select <2 x i1> %46, <2 x i64> %30, <2 x i64> %38
8045 ; CHECK-NEXT: store <2 x i64> %48, <2 x i64>* %0, align 16
8046 ; CHECK-NEXT: store <2 x i64> %49, <2 x i64>* %1, align 16
8047 ; CHECK-NEXT: store <2 x i64> %50, <2 x i64>* %2, align 16
8048 ; CHECK-NEXT: store <2 x i64> %51, <2 x i64>* %3, align 16
8049 ; CHECK-NEXT: store <2 x i64> %52, <2 x i64>* %4, align 16
8050 ; CHECK-NEXT: store <2 x i64> %53, <2 x i64>* %5, align 16
8051 ; CHECK-NEXT: store <2 x i64> %54, <2 x i64>* %6, align 16
8052 ; CHECK-NEXT: ret <2 x i64> %47
8053 ; CHECK-NEXT: }
8054
8055 define <16 x i64> @icmp_sge_on_16xi64(<16 x i64>, <16 x i64>, <16 x i64>, <16 x i64>) {
8056 entry:
8057 %4 = icmp sge <16 x i64> %0, %1
8058 %5 = select <16 x i1> %4, <16 x i64> %2, <16 x i64> %3
8059 ret <16 x i64> %5
8060 }
8061 ; CHECK-LABEL: define <2 x i64> @icmp_sge_on_16xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64 >* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferen ceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocaptu re nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16) , <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, < 2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i6 4>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
8062 ; CHECK: entry:
8063 ; CHECK-NEXT: %39 = icmp sge <2 x i64> %7, %15
8064 ; CHECK-NEXT: %40 = icmp sge <2 x i64> %8, %16
8065 ; CHECK-NEXT: %41 = icmp sge <2 x i64> %9, %17
8066 ; CHECK-NEXT: %42 = icmp sge <2 x i64> %10, %18
8067 ; CHECK-NEXT: %43 = icmp sge <2 x i64> %11, %19
8068 ; CHECK-NEXT: %44 = icmp sge <2 x i64> %12, %20
8069 ; CHECK-NEXT: %45 = icmp sge <2 x i64> %13, %21
8070 ; CHECK-NEXT: %46 = icmp sge <2 x i64> %14, %22
8071 ; CHECK-NEXT: %47 = select <2 x i1> %39, <2 x i64> %23, <2 x i64> %31
8072 ; CHECK-NEXT: %48 = select <2 x i1> %40, <2 x i64> %24, <2 x i64> %32
8073 ; CHECK-NEXT: %49 = select <2 x i1> %41, <2 x i64> %25, <2 x i64> %33
8074 ; CHECK-NEXT: %50 = select <2 x i1> %42, <2 x i64> %26, <2 x i64> %34
8075 ; CHECK-NEXT: %51 = select <2 x i1> %43, <2 x i64> %27, <2 x i64> %35
8076 ; CHECK-NEXT: %52 = select <2 x i1> %44, <2 x i64> %28, <2 x i64> %36
8077 ; CHECK-NEXT: %53 = select <2 x i1> %45, <2 x i64> %29, <2 x i64> %37
8078 ; CHECK-NEXT: %54 = select <2 x i1> %46, <2 x i64> %30, <2 x i64> %38
8079 ; CHECK-NEXT: store <2 x i64> %48, <2 x i64>* %0, align 16
8080 ; CHECK-NEXT: store <2 x i64> %49, <2 x i64>* %1, align 16
8081 ; CHECK-NEXT: store <2 x i64> %50, <2 x i64>* %2, align 16
8082 ; CHECK-NEXT: store <2 x i64> %51, <2 x i64>* %3, align 16
8083 ; CHECK-NEXT: store <2 x i64> %52, <2 x i64>* %4, align 16
8084 ; CHECK-NEXT: store <2 x i64> %53, <2 x i64>* %5, align 16
8085 ; CHECK-NEXT: store <2 x i64> %54, <2 x i64>* %6, align 16
8086 ; CHECK-NEXT: ret <2 x i64> %47
8087 ; CHECK-NEXT: }
8088
8089 define <16 x i64> @icmp_uge_on_16xi64(<16 x i64>, <16 x i64>, <16 x i64>, <16 x i64>) {
8090 entry:
8091 %4 = icmp uge <16 x i64> %0, %1
8092 %5 = select <16 x i1> %4, <16 x i64> %2, <16 x i64> %3
8093 ret <16 x i64> %5
8094 }
8095 ; CHECK-LABEL: define <2 x i64> @icmp_uge_on_16xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64 >* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferen ceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocaptu re nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16) , <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, < 2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i6 4>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
8096 ; CHECK: entry:
8097 ; CHECK-NEXT: %39 = icmp uge <2 x i64> %7, %15
8098 ; CHECK-NEXT: %40 = icmp uge <2 x i64> %8, %16
8099 ; CHECK-NEXT: %41 = icmp uge <2 x i64> %9, %17
8100 ; CHECK-NEXT: %42 = icmp uge <2 x i64> %10, %18
8101 ; CHECK-NEXT: %43 = icmp uge <2 x i64> %11, %19
8102 ; CHECK-NEXT: %44 = icmp uge <2 x i64> %12, %20
8103 ; CHECK-NEXT: %45 = icmp uge <2 x i64> %13, %21
8104 ; CHECK-NEXT: %46 = icmp uge <2 x i64> %14, %22
8105 ; CHECK-NEXT: %47 = select <2 x i1> %39, <2 x i64> %23, <2 x i64> %31
8106 ; CHECK-NEXT: %48 = select <2 x i1> %40, <2 x i64> %24, <2 x i64> %32
8107 ; CHECK-NEXT: %49 = select <2 x i1> %41, <2 x i64> %25, <2 x i64> %33
8108 ; CHECK-NEXT: %50 = select <2 x i1> %42, <2 x i64> %26, <2 x i64> %34
8109 ; CHECK-NEXT: %51 = select <2 x i1> %43, <2 x i64> %27, <2 x i64> %35
8110 ; CHECK-NEXT: %52 = select <2 x i1> %44, <2 x i64> %28, <2 x i64> %36
8111 ; CHECK-NEXT: %53 = select <2 x i1> %45, <2 x i64> %29, <2 x i64> %37
8112 ; CHECK-NEXT: %54 = select <2 x i1> %46, <2 x i64> %30, <2 x i64> %38
8113 ; CHECK-NEXT: store <2 x i64> %48, <2 x i64>* %0, align 16
8114 ; CHECK-NEXT: store <2 x i64> %49, <2 x i64>* %1, align 16
8115 ; CHECK-NEXT: store <2 x i64> %50, <2 x i64>* %2, align 16
8116 ; CHECK-NEXT: store <2 x i64> %51, <2 x i64>* %3, align 16
8117 ; CHECK-NEXT: store <2 x i64> %52, <2 x i64>* %4, align 16
8118 ; CHECK-NEXT: store <2 x i64> %53, <2 x i64>* %5, align 16
8119 ; CHECK-NEXT: store <2 x i64> %54, <2 x i64>* %6, align 16
8120 ; CHECK-NEXT: ret <2 x i64> %47
8121 ; CHECK-NEXT: }
8122
8123 define <16 x i64> @icmp_slt_on_16xi64(<16 x i64>, <16 x i64>, <16 x i64>, <16 x i64>) {
8124 entry:
8125 %4 = icmp slt <16 x i64> %0, %1
8126 %5 = select <16 x i1> %4, <16 x i64> %2, <16 x i64> %3
8127 ret <16 x i64> %5
8128 }
8129 ; CHECK-LABEL: define <2 x i64> @icmp_slt_on_16xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64 >* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferen ceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocaptu re nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16) , <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, < 2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i6 4>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
8130 ; CHECK: entry:
8131 ; CHECK-NEXT: %39 = icmp slt <2 x i64> %7, %15
8132 ; CHECK-NEXT: %40 = icmp slt <2 x i64> %8, %16
8133 ; CHECK-NEXT: %41 = icmp slt <2 x i64> %9, %17
8134 ; CHECK-NEXT: %42 = icmp slt <2 x i64> %10, %18
8135 ; CHECK-NEXT: %43 = icmp slt <2 x i64> %11, %19
8136 ; CHECK-NEXT: %44 = icmp slt <2 x i64> %12, %20
8137 ; CHECK-NEXT: %45 = icmp slt <2 x i64> %13, %21
8138 ; CHECK-NEXT: %46 = icmp slt <2 x i64> %14, %22
8139 ; CHECK-NEXT: %47 = select <2 x i1> %39, <2 x i64> %23, <2 x i64> %31
8140 ; CHECK-NEXT: %48 = select <2 x i1> %40, <2 x i64> %24, <2 x i64> %32
8141 ; CHECK-NEXT: %49 = select <2 x i1> %41, <2 x i64> %25, <2 x i64> %33
8142 ; CHECK-NEXT: %50 = select <2 x i1> %42, <2 x i64> %26, <2 x i64> %34
8143 ; CHECK-NEXT: %51 = select <2 x i1> %43, <2 x i64> %27, <2 x i64> %35
8144 ; CHECK-NEXT: %52 = select <2 x i1> %44, <2 x i64> %28, <2 x i64> %36
8145 ; CHECK-NEXT: %53 = select <2 x i1> %45, <2 x i64> %29, <2 x i64> %37
8146 ; CHECK-NEXT: %54 = select <2 x i1> %46, <2 x i64> %30, <2 x i64> %38
8147 ; CHECK-NEXT: store <2 x i64> %48, <2 x i64>* %0, align 16
8148 ; CHECK-NEXT: store <2 x i64> %49, <2 x i64>* %1, align 16
8149 ; CHECK-NEXT: store <2 x i64> %50, <2 x i64>* %2, align 16
8150 ; CHECK-NEXT: store <2 x i64> %51, <2 x i64>* %3, align 16
8151 ; CHECK-NEXT: store <2 x i64> %52, <2 x i64>* %4, align 16
8152 ; CHECK-NEXT: store <2 x i64> %53, <2 x i64>* %5, align 16
8153 ; CHECK-NEXT: store <2 x i64> %54, <2 x i64>* %6, align 16
8154 ; CHECK-NEXT: ret <2 x i64> %47
8155 ; CHECK-NEXT: }
8156
8157 define <16 x i64> @icmp_ult_on_16xi64(<16 x i64>, <16 x i64>, <16 x i64>, <16 x i64>) {
8158 entry:
8159 %4 = icmp ult <16 x i64> %0, %1
8160 %5 = select <16 x i1> %4, <16 x i64> %2, <16 x i64> %3
8161 ret <16 x i64> %5
8162 }
8163 ; CHECK-LABEL: define <2 x i64> @icmp_ult_on_16xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64 >* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferen ceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocaptu re nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16) , <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, < 2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i6 4>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
8164 ; CHECK: entry:
8165 ; CHECK-NEXT: %39 = icmp ult <2 x i64> %7, %15
8166 ; CHECK-NEXT: %40 = icmp ult <2 x i64> %8, %16
8167 ; CHECK-NEXT: %41 = icmp ult <2 x i64> %9, %17
8168 ; CHECK-NEXT: %42 = icmp ult <2 x i64> %10, %18
8169 ; CHECK-NEXT: %43 = icmp ult <2 x i64> %11, %19
8170 ; CHECK-NEXT: %44 = icmp ult <2 x i64> %12, %20
8171 ; CHECK-NEXT: %45 = icmp ult <2 x i64> %13, %21
8172 ; CHECK-NEXT: %46 = icmp ult <2 x i64> %14, %22
8173 ; CHECK-NEXT: %47 = select <2 x i1> %39, <2 x i64> %23, <2 x i64> %31
8174 ; CHECK-NEXT: %48 = select <2 x i1> %40, <2 x i64> %24, <2 x i64> %32
8175 ; CHECK-NEXT: %49 = select <2 x i1> %41, <2 x i64> %25, <2 x i64> %33
8176 ; CHECK-NEXT: %50 = select <2 x i1> %42, <2 x i64> %26, <2 x i64> %34
8177 ; CHECK-NEXT: %51 = select <2 x i1> %43, <2 x i64> %27, <2 x i64> %35
8178 ; CHECK-NEXT: %52 = select <2 x i1> %44, <2 x i64> %28, <2 x i64> %36
8179 ; CHECK-NEXT: %53 = select <2 x i1> %45, <2 x i64> %29, <2 x i64> %37
8180 ; CHECK-NEXT: %54 = select <2 x i1> %46, <2 x i64> %30, <2 x i64> %38
8181 ; CHECK-NEXT: store <2 x i64> %48, <2 x i64>* %0, align 16
8182 ; CHECK-NEXT: store <2 x i64> %49, <2 x i64>* %1, align 16
8183 ; CHECK-NEXT: store <2 x i64> %50, <2 x i64>* %2, align 16
8184 ; CHECK-NEXT: store <2 x i64> %51, <2 x i64>* %3, align 16
8185 ; CHECK-NEXT: store <2 x i64> %52, <2 x i64>* %4, align 16
8186 ; CHECK-NEXT: store <2 x i64> %53, <2 x i64>* %5, align 16
8187 ; CHECK-NEXT: store <2 x i64> %54, <2 x i64>* %6, align 16
8188 ; CHECK-NEXT: ret <2 x i64> %47
8189 ; CHECK-NEXT: }
8190
8191 define <16 x i64> @icmp_sle_on_16xi64(<16 x i64>, <16 x i64>, <16 x i64>, <16 x i64>) {
8192 entry:
8193 %4 = icmp sle <16 x i64> %0, %1
8194 %5 = select <16 x i1> %4, <16 x i64> %2, <16 x i64> %3
8195 ret <16 x i64> %5
8196 }
8197 ; CHECK-LABEL: define <2 x i64> @icmp_sle_on_16xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64 >* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferen ceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocaptu re nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16) , <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, < 2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i6 4>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
8198 ; CHECK: entry:
8199 ; CHECK-NEXT: %39 = icmp sle <2 x i64> %7, %15
8200 ; CHECK-NEXT: %40 = icmp sle <2 x i64> %8, %16
8201 ; CHECK-NEXT: %41 = icmp sle <2 x i64> %9, %17
8202 ; CHECK-NEXT: %42 = icmp sle <2 x i64> %10, %18
8203 ; CHECK-NEXT: %43 = icmp sle <2 x i64> %11, %19
8204 ; CHECK-NEXT: %44 = icmp sle <2 x i64> %12, %20
8205 ; CHECK-NEXT: %45 = icmp sle <2 x i64> %13, %21
8206 ; CHECK-NEXT: %46 = icmp sle <2 x i64> %14, %22
8207 ; CHECK-NEXT: %47 = select <2 x i1> %39, <2 x i64> %23, <2 x i64> %31
8208 ; CHECK-NEXT: %48 = select <2 x i1> %40, <2 x i64> %24, <2 x i64> %32
8209 ; CHECK-NEXT: %49 = select <2 x i1> %41, <2 x i64> %25, <2 x i64> %33
8210 ; CHECK-NEXT: %50 = select <2 x i1> %42, <2 x i64> %26, <2 x i64> %34
8211 ; CHECK-NEXT: %51 = select <2 x i1> %43, <2 x i64> %27, <2 x i64> %35
8212 ; CHECK-NEXT: %52 = select <2 x i1> %44, <2 x i64> %28, <2 x i64> %36
8213 ; CHECK-NEXT: %53 = select <2 x i1> %45, <2 x i64> %29, <2 x i64> %37
8214 ; CHECK-NEXT: %54 = select <2 x i1> %46, <2 x i64> %30, <2 x i64> %38
8215 ; CHECK-NEXT: store <2 x i64> %48, <2 x i64>* %0, align 16
8216 ; CHECK-NEXT: store <2 x i64> %49, <2 x i64>* %1, align 16
8217 ; CHECK-NEXT: store <2 x i64> %50, <2 x i64>* %2, align 16
8218 ; CHECK-NEXT: store <2 x i64> %51, <2 x i64>* %3, align 16
8219 ; CHECK-NEXT: store <2 x i64> %52, <2 x i64>* %4, align 16
8220 ; CHECK-NEXT: store <2 x i64> %53, <2 x i64>* %5, align 16
8221 ; CHECK-NEXT: store <2 x i64> %54, <2 x i64>* %6, align 16
8222 ; CHECK-NEXT: ret <2 x i64> %47
8223 ; CHECK-NEXT: }
8224
8225 define <16 x i64> @icmp_ule_on_16xi64(<16 x i64>, <16 x i64>, <16 x i64>, <16 x i64>) {
8226 entry:
8227 %4 = icmp ule <16 x i64> %0, %1
8228 %5 = select <16 x i1> %4, <16 x i64> %2, <16 x i64> %3
8229 ret <16 x i64> %5
8230 }
8231 ; CHECK-LABEL: define <2 x i64> @icmp_ule_on_16xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64 >* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferen ceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocaptu re nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16) , <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, < 2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i6 4>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
8232 ; CHECK: entry:
8233 ; CHECK-NEXT: %39 = icmp ule <2 x i64> %7, %15
8234 ; CHECK-NEXT: %40 = icmp ule <2 x i64> %8, %16
8235 ; CHECK-NEXT: %41 = icmp ule <2 x i64> %9, %17
8236 ; CHECK-NEXT: %42 = icmp ule <2 x i64> %10, %18
8237 ; CHECK-NEXT: %43 = icmp ule <2 x i64> %11, %19
8238 ; CHECK-NEXT: %44 = icmp ule <2 x i64> %12, %20
8239 ; CHECK-NEXT: %45 = icmp ule <2 x i64> %13, %21
8240 ; CHECK-NEXT: %46 = icmp ule <2 x i64> %14, %22
8241 ; CHECK-NEXT: %47 = select <2 x i1> %39, <2 x i64> %23, <2 x i64> %31
8242 ; CHECK-NEXT: %48 = select <2 x i1> %40, <2 x i64> %24, <2 x i64> %32
8243 ; CHECK-NEXT: %49 = select <2 x i1> %41, <2 x i64> %25, <2 x i64> %33
8244 ; CHECK-NEXT: %50 = select <2 x i1> %42, <2 x i64> %26, <2 x i64> %34
8245 ; CHECK-NEXT: %51 = select <2 x i1> %43, <2 x i64> %27, <2 x i64> %35
8246 ; CHECK-NEXT: %52 = select <2 x i1> %44, <2 x i64> %28, <2 x i64> %36
8247 ; CHECK-NEXT: %53 = select <2 x i1> %45, <2 x i64> %29, <2 x i64> %37
8248 ; CHECK-NEXT: %54 = select <2 x i1> %46, <2 x i64> %30, <2 x i64> %38
8249 ; CHECK-NEXT: store <2 x i64> %48, <2 x i64>* %0, align 16
8250 ; CHECK-NEXT: store <2 x i64> %49, <2 x i64>* %1, align 16
8251 ; CHECK-NEXT: store <2 x i64> %50, <2 x i64>* %2, align 16
8252 ; CHECK-NEXT: store <2 x i64> %51, <2 x i64>* %3, align 16
8253 ; CHECK-NEXT: store <2 x i64> %52, <2 x i64>* %4, align 16
8254 ; CHECK-NEXT: store <2 x i64> %53, <2 x i64>* %5, align 16
8255 ; CHECK-NEXT: store <2 x i64> %54, <2 x i64>* %6, align 16
8256 ; CHECK-NEXT: ret <2 x i64> %47
8257 ; CHECK-NEXT: }
8258
8259 define <16 x i8*> @icmp_eq_on_16xi8ptr(<16 x i8*>, <16 x i8*>, <16 x i8*>, <16 x i8*>) {
8260 entry:
8261 %4 = icmp eq <16 x i8*> %0, %1
8262 %5 = select <16 x i1> %4, <16 x i8*> %2, <16 x i8*> %3
8263 ret <16 x i8*> %5
8264 }
8265 ; CHECK-LABEL: define <4 x i8*> @icmp_eq_on_16xi8ptr(<4 x i8*>* nocapture nonnul l dereferenceable(16), <4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8 *>* nocapture nonnull dereferenceable(16), <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8 *>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
8266 ; CHECK: entry:
8267 ; CHECK-NEXT: %19 = icmp eq <4 x i8*> %3, %7
8268 ; CHECK-NEXT: %20 = icmp eq <4 x i8*> %4, %8
8269 ; CHECK-NEXT: %21 = icmp eq <4 x i8*> %5, %9
8270 ; CHECK-NEXT: %22 = icmp eq <4 x i8*> %6, %10
8271 ; CHECK-NEXT: %23 = select <4 x i1> %19, <4 x i8*> %11, <4 x i8*> %15
8272 ; CHECK-NEXT: %24 = select <4 x i1> %20, <4 x i8*> %12, <4 x i8*> %16
8273 ; CHECK-NEXT: %25 = select <4 x i1> %21, <4 x i8*> %13, <4 x i8*> %17
8274 ; CHECK-NEXT: %26 = select <4 x i1> %22, <4 x i8*> %14, <4 x i8*> %18
8275 ; CHECK-NEXT: store <4 x i8*> %24, <4 x i8*>* %0, align 16
8276 ; CHECK-NEXT: store <4 x i8*> %25, <4 x i8*>* %1, align 16
8277 ; CHECK-NEXT: store <4 x i8*> %26, <4 x i8*>* %2, align 16
8278 ; CHECK-NEXT: ret <4 x i8*> %23
8279 ; CHECK-NEXT: }
8280
8281 define <16 x i8*> @icmp_ne_on_16xi8ptr(<16 x i8*>, <16 x i8*>, <16 x i8*>, <16 x i8*>) {
8282 entry:
8283 %4 = icmp ne <16 x i8*> %0, %1
8284 %5 = select <16 x i1> %4, <16 x i8*> %2, <16 x i8*> %3
8285 ret <16 x i8*> %5
8286 }
8287 ; CHECK-LABEL: define <4 x i8*> @icmp_ne_on_16xi8ptr(<4 x i8*>* nocapture nonnul l dereferenceable(16), <4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8 *>* nocapture nonnull dereferenceable(16), <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8 *>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
8288 ; CHECK: entry:
8289 ; CHECK-NEXT: %19 = icmp ne <4 x i8*> %3, %7
8290 ; CHECK-NEXT: %20 = icmp ne <4 x i8*> %4, %8
8291 ; CHECK-NEXT: %21 = icmp ne <4 x i8*> %5, %9
8292 ; CHECK-NEXT: %22 = icmp ne <4 x i8*> %6, %10
8293 ; CHECK-NEXT: %23 = select <4 x i1> %19, <4 x i8*> %11, <4 x i8*> %15
8294 ; CHECK-NEXT: %24 = select <4 x i1> %20, <4 x i8*> %12, <4 x i8*> %16
8295 ; CHECK-NEXT: %25 = select <4 x i1> %21, <4 x i8*> %13, <4 x i8*> %17
8296 ; CHECK-NEXT: %26 = select <4 x i1> %22, <4 x i8*> %14, <4 x i8*> %18
8297 ; CHECK-NEXT: store <4 x i8*> %24, <4 x i8*>* %0, align 16
8298 ; CHECK-NEXT: store <4 x i8*> %25, <4 x i8*>* %1, align 16
8299 ; CHECK-NEXT: store <4 x i8*> %26, <4 x i8*>* %2, align 16
8300 ; CHECK-NEXT: ret <4 x i8*> %23
8301 ; CHECK-NEXT: }
8302
8303 define <16 x i8*> @icmp_sgt_on_16xi8ptr(<16 x i8*>, <16 x i8*>, <16 x i8*>, <16 x i8*>) {
8304 entry:
8305 %4 = icmp sgt <16 x i8*> %0, %1
8306 %5 = select <16 x i1> %4, <16 x i8*> %2, <16 x i8*> %3
8307 ret <16 x i8*> %5
8308 }
8309 ; CHECK-LABEL: define <4 x i8*> @icmp_sgt_on_16xi8ptr(<4 x i8*>* nocapture nonnu ll dereferenceable(16), <4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i 8*>* nocapture nonnull dereferenceable(16), <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i 8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
8310 ; CHECK: entry:
8311 ; CHECK-NEXT: %19 = icmp sgt <4 x i8*> %3, %7
8312 ; CHECK-NEXT: %20 = icmp sgt <4 x i8*> %4, %8
8313 ; CHECK-NEXT: %21 = icmp sgt <4 x i8*> %5, %9
8314 ; CHECK-NEXT: %22 = icmp sgt <4 x i8*> %6, %10
8315 ; CHECK-NEXT: %23 = select <4 x i1> %19, <4 x i8*> %11, <4 x i8*> %15
8316 ; CHECK-NEXT: %24 = select <4 x i1> %20, <4 x i8*> %12, <4 x i8*> %16
8317 ; CHECK-NEXT: %25 = select <4 x i1> %21, <4 x i8*> %13, <4 x i8*> %17
8318 ; CHECK-NEXT: %26 = select <4 x i1> %22, <4 x i8*> %14, <4 x i8*> %18
8319 ; CHECK-NEXT: store <4 x i8*> %24, <4 x i8*>* %0, align 16
8320 ; CHECK-NEXT: store <4 x i8*> %25, <4 x i8*>* %1, align 16
8321 ; CHECK-NEXT: store <4 x i8*> %26, <4 x i8*>* %2, align 16
8322 ; CHECK-NEXT: ret <4 x i8*> %23
8323 ; CHECK-NEXT: }
8324
8325 define <16 x i8*> @icmp_ugt_on_16xi8ptr(<16 x i8*>, <16 x i8*>, <16 x i8*>, <16 x i8*>) {
8326 entry:
8327 %4 = icmp ugt <16 x i8*> %0, %1
8328 %5 = select <16 x i1> %4, <16 x i8*> %2, <16 x i8*> %3
8329 ret <16 x i8*> %5
8330 }
8331 ; CHECK-LABEL: define <4 x i8*> @icmp_ugt_on_16xi8ptr(<4 x i8*>* nocapture nonnu ll dereferenceable(16), <4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i 8*>* nocapture nonnull dereferenceable(16), <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i 8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
8332 ; CHECK: entry:
8333 ; CHECK-NEXT: %19 = icmp ugt <4 x i8*> %3, %7
8334 ; CHECK-NEXT: %20 = icmp ugt <4 x i8*> %4, %8
8335 ; CHECK-NEXT: %21 = icmp ugt <4 x i8*> %5, %9
8336 ; CHECK-NEXT: %22 = icmp ugt <4 x i8*> %6, %10
8337 ; CHECK-NEXT: %23 = select <4 x i1> %19, <4 x i8*> %11, <4 x i8*> %15
8338 ; CHECK-NEXT: %24 = select <4 x i1> %20, <4 x i8*> %12, <4 x i8*> %16
8339 ; CHECK-NEXT: %25 = select <4 x i1> %21, <4 x i8*> %13, <4 x i8*> %17
8340 ; CHECK-NEXT: %26 = select <4 x i1> %22, <4 x i8*> %14, <4 x i8*> %18
8341 ; CHECK-NEXT: store <4 x i8*> %24, <4 x i8*>* %0, align 16
8342 ; CHECK-NEXT: store <4 x i8*> %25, <4 x i8*>* %1, align 16
8343 ; CHECK-NEXT: store <4 x i8*> %26, <4 x i8*>* %2, align 16
8344 ; CHECK-NEXT: ret <4 x i8*> %23
8345 ; CHECK-NEXT: }
8346
8347 define <16 x i8*> @icmp_sge_on_16xi8ptr(<16 x i8*>, <16 x i8*>, <16 x i8*>, <16 x i8*>) {
8348 entry:
8349 %4 = icmp sge <16 x i8*> %0, %1
8350 %5 = select <16 x i1> %4, <16 x i8*> %2, <16 x i8*> %3
8351 ret <16 x i8*> %5
8352 }
8353 ; CHECK-LABEL: define <4 x i8*> @icmp_sge_on_16xi8ptr(<4 x i8*>* nocapture nonnu ll dereferenceable(16), <4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i 8*>* nocapture nonnull dereferenceable(16), <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i 8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
8354 ; CHECK: entry:
8355 ; CHECK-NEXT: %19 = icmp sge <4 x i8*> %3, %7
8356 ; CHECK-NEXT: %20 = icmp sge <4 x i8*> %4, %8
8357 ; CHECK-NEXT: %21 = icmp sge <4 x i8*> %5, %9
8358 ; CHECK-NEXT: %22 = icmp sge <4 x i8*> %6, %10
8359 ; CHECK-NEXT: %23 = select <4 x i1> %19, <4 x i8*> %11, <4 x i8*> %15
8360 ; CHECK-NEXT: %24 = select <4 x i1> %20, <4 x i8*> %12, <4 x i8*> %16
8361 ; CHECK-NEXT: %25 = select <4 x i1> %21, <4 x i8*> %13, <4 x i8*> %17
8362 ; CHECK-NEXT: %26 = select <4 x i1> %22, <4 x i8*> %14, <4 x i8*> %18
8363 ; CHECK-NEXT: store <4 x i8*> %24, <4 x i8*>* %0, align 16
8364 ; CHECK-NEXT: store <4 x i8*> %25, <4 x i8*>* %1, align 16
8365 ; CHECK-NEXT: store <4 x i8*> %26, <4 x i8*>* %2, align 16
8366 ; CHECK-NEXT: ret <4 x i8*> %23
8367 ; CHECK-NEXT: }
8368
8369 define <16 x i8*> @icmp_uge_on_16xi8ptr(<16 x i8*>, <16 x i8*>, <16 x i8*>, <16 x i8*>) {
8370 entry:
8371 %4 = icmp uge <16 x i8*> %0, %1
8372 %5 = select <16 x i1> %4, <16 x i8*> %2, <16 x i8*> %3
8373 ret <16 x i8*> %5
8374 }
8375 ; CHECK-LABEL: define <4 x i8*> @icmp_uge_on_16xi8ptr(<4 x i8*>* nocapture nonnu ll dereferenceable(16), <4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i 8*>* nocapture nonnull dereferenceable(16), <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i 8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
8376 ; CHECK: entry:
8377 ; CHECK-NEXT: %19 = icmp uge <4 x i8*> %3, %7
8378 ; CHECK-NEXT: %20 = icmp uge <4 x i8*> %4, %8
8379 ; CHECK-NEXT: %21 = icmp uge <4 x i8*> %5, %9
8380 ; CHECK-NEXT: %22 = icmp uge <4 x i8*> %6, %10
8381 ; CHECK-NEXT: %23 = select <4 x i1> %19, <4 x i8*> %11, <4 x i8*> %15
8382 ; CHECK-NEXT: %24 = select <4 x i1> %20, <4 x i8*> %12, <4 x i8*> %16
8383 ; CHECK-NEXT: %25 = select <4 x i1> %21, <4 x i8*> %13, <4 x i8*> %17
8384 ; CHECK-NEXT: %26 = select <4 x i1> %22, <4 x i8*> %14, <4 x i8*> %18
8385 ; CHECK-NEXT: store <4 x i8*> %24, <4 x i8*>* %0, align 16
8386 ; CHECK-NEXT: store <4 x i8*> %25, <4 x i8*>* %1, align 16
8387 ; CHECK-NEXT: store <4 x i8*> %26, <4 x i8*>* %2, align 16
8388 ; CHECK-NEXT: ret <4 x i8*> %23
8389 ; CHECK-NEXT: }
8390
8391 define <16 x i8*> @icmp_slt_on_16xi8ptr(<16 x i8*>, <16 x i8*>, <16 x i8*>, <16 x i8*>) {
8392 entry:
8393 %4 = icmp slt <16 x i8*> %0, %1
8394 %5 = select <16 x i1> %4, <16 x i8*> %2, <16 x i8*> %3
8395 ret <16 x i8*> %5
8396 }
8397 ; CHECK-LABEL: define <4 x i8*> @icmp_slt_on_16xi8ptr(<4 x i8*>* nocapture nonnu ll dereferenceable(16), <4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i 8*>* nocapture nonnull dereferenceable(16), <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i 8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
8398 ; CHECK: entry:
8399 ; CHECK-NEXT: %19 = icmp slt <4 x i8*> %3, %7
8400 ; CHECK-NEXT: %20 = icmp slt <4 x i8*> %4, %8
8401 ; CHECK-NEXT: %21 = icmp slt <4 x i8*> %5, %9
8402 ; CHECK-NEXT: %22 = icmp slt <4 x i8*> %6, %10
8403 ; CHECK-NEXT: %23 = select <4 x i1> %19, <4 x i8*> %11, <4 x i8*> %15
8404 ; CHECK-NEXT: %24 = select <4 x i1> %20, <4 x i8*> %12, <4 x i8*> %16
8405 ; CHECK-NEXT: %25 = select <4 x i1> %21, <4 x i8*> %13, <4 x i8*> %17
8406 ; CHECK-NEXT: %26 = select <4 x i1> %22, <4 x i8*> %14, <4 x i8*> %18
8407 ; CHECK-NEXT: store <4 x i8*> %24, <4 x i8*>* %0, align 16
8408 ; CHECK-NEXT: store <4 x i8*> %25, <4 x i8*>* %1, align 16
8409 ; CHECK-NEXT: store <4 x i8*> %26, <4 x i8*>* %2, align 16
8410 ; CHECK-NEXT: ret <4 x i8*> %23
8411 ; CHECK-NEXT: }
8412
8413 define <16 x i8*> @icmp_ult_on_16xi8ptr(<16 x i8*>, <16 x i8*>, <16 x i8*>, <16 x i8*>) {
8414 entry:
8415 %4 = icmp ult <16 x i8*> %0, %1
8416 %5 = select <16 x i1> %4, <16 x i8*> %2, <16 x i8*> %3
8417 ret <16 x i8*> %5
8418 }
8419 ; CHECK-LABEL: define <4 x i8*> @icmp_ult_on_16xi8ptr(<4 x i8*>* nocapture nonnu ll dereferenceable(16), <4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i 8*>* nocapture nonnull dereferenceable(16), <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i 8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
8420 ; CHECK: entry:
8421 ; CHECK-NEXT: %19 = icmp ult <4 x i8*> %3, %7
8422 ; CHECK-NEXT: %20 = icmp ult <4 x i8*> %4, %8
8423 ; CHECK-NEXT: %21 = icmp ult <4 x i8*> %5, %9
8424 ; CHECK-NEXT: %22 = icmp ult <4 x i8*> %6, %10
8425 ; CHECK-NEXT: %23 = select <4 x i1> %19, <4 x i8*> %11, <4 x i8*> %15
8426 ; CHECK-NEXT: %24 = select <4 x i1> %20, <4 x i8*> %12, <4 x i8*> %16
8427 ; CHECK-NEXT: %25 = select <4 x i1> %21, <4 x i8*> %13, <4 x i8*> %17
8428 ; CHECK-NEXT: %26 = select <4 x i1> %22, <4 x i8*> %14, <4 x i8*> %18
8429 ; CHECK-NEXT: store <4 x i8*> %24, <4 x i8*>* %0, align 16
8430 ; CHECK-NEXT: store <4 x i8*> %25, <4 x i8*>* %1, align 16
8431 ; CHECK-NEXT: store <4 x i8*> %26, <4 x i8*>* %2, align 16
8432 ; CHECK-NEXT: ret <4 x i8*> %23
8433 ; CHECK-NEXT: }
8434
8435 define <16 x i8*> @icmp_sle_on_16xi8ptr(<16 x i8*>, <16 x i8*>, <16 x i8*>, <16 x i8*>) {
8436 entry:
8437 %4 = icmp sle <16 x i8*> %0, %1
8438 %5 = select <16 x i1> %4, <16 x i8*> %2, <16 x i8*> %3
8439 ret <16 x i8*> %5
8440 }
8441 ; CHECK-LABEL: define <4 x i8*> @icmp_sle_on_16xi8ptr(<4 x i8*>* nocapture nonnu ll dereferenceable(16), <4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i 8*>* nocapture nonnull dereferenceable(16), <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i 8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
8442 ; CHECK: entry:
8443 ; CHECK-NEXT: %19 = icmp sle <4 x i8*> %3, %7
8444 ; CHECK-NEXT: %20 = icmp sle <4 x i8*> %4, %8
8445 ; CHECK-NEXT: %21 = icmp sle <4 x i8*> %5, %9
8446 ; CHECK-NEXT: %22 = icmp sle <4 x i8*> %6, %10
8447 ; CHECK-NEXT: %23 = select <4 x i1> %19, <4 x i8*> %11, <4 x i8*> %15
8448 ; CHECK-NEXT: %24 = select <4 x i1> %20, <4 x i8*> %12, <4 x i8*> %16
8449 ; CHECK-NEXT: %25 = select <4 x i1> %21, <4 x i8*> %13, <4 x i8*> %17
8450 ; CHECK-NEXT: %26 = select <4 x i1> %22, <4 x i8*> %14, <4 x i8*> %18
8451 ; CHECK-NEXT: store <4 x i8*> %24, <4 x i8*>* %0, align 16
8452 ; CHECK-NEXT: store <4 x i8*> %25, <4 x i8*>* %1, align 16
8453 ; CHECK-NEXT: store <4 x i8*> %26, <4 x i8*>* %2, align 16
8454 ; CHECK-NEXT: ret <4 x i8*> %23
8455 ; CHECK-NEXT: }
8456
8457 define <16 x i8*> @icmp_ule_on_16xi8ptr(<16 x i8*>, <16 x i8*>, <16 x i8*>, <16 x i8*>) {
8458 entry:
8459 %4 = icmp ule <16 x i8*> %0, %1
8460 %5 = select <16 x i1> %4, <16 x i8*> %2, <16 x i8*> %3
8461 ret <16 x i8*> %5
8462 }
8463 ; CHECK-LABEL: define <4 x i8*> @icmp_ule_on_16xi8ptr(<4 x i8*>* nocapture nonnu ll dereferenceable(16), <4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i 8*>* nocapture nonnull dereferenceable(16), <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i 8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
8464 ; CHECK: entry:
8465 ; CHECK-NEXT: %19 = icmp ule <4 x i8*> %3, %7
8466 ; CHECK-NEXT: %20 = icmp ule <4 x i8*> %4, %8
8467 ; CHECK-NEXT: %21 = icmp ule <4 x i8*> %5, %9
8468 ; CHECK-NEXT: %22 = icmp ule <4 x i8*> %6, %10
8469 ; CHECK-NEXT: %23 = select <4 x i1> %19, <4 x i8*> %11, <4 x i8*> %15
8470 ; CHECK-NEXT: %24 = select <4 x i1> %20, <4 x i8*> %12, <4 x i8*> %16
8471 ; CHECK-NEXT: %25 = select <4 x i1> %21, <4 x i8*> %13, <4 x i8*> %17
8472 ; CHECK-NEXT: %26 = select <4 x i1> %22, <4 x i8*> %14, <4 x i8*> %18
8473 ; CHECK-NEXT: store <4 x i8*> %24, <4 x i8*>* %0, align 16
8474 ; CHECK-NEXT: store <4 x i8*> %25, <4 x i8*>* %1, align 16
8475 ; CHECK-NEXT: store <4 x i8*> %26, <4 x i8*>* %2, align 16
8476 ; CHECK-NEXT: ret <4 x i8*> %23
8477 ; CHECK-NEXT: }
8478
8479 define <20 x i8> @icmp_eq_on_20xi8(<20 x i8>, <20 x i8>, <20 x i8>, <20 x i8>) {
8480 entry:
8481 %4 = icmp eq <20 x i8> %0, %1
8482 %5 = select <20 x i1> %4, <20 x i8> %2, <20 x i8> %3
8483 ret <20 x i8> %5
8484 }
8485 ; CHECK-LABEL: define <16 x i8> @icmp_eq_on_20xi8(<16 x i8>* nocapture nonnull d ereferenceable(16), <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>) {
8486 ; CHECK: entry:
8487 ; CHECK-NEXT: %9 = icmp eq <16 x i8> %1, %3
8488 ; CHECK-NEXT: %10 = icmp eq <16 x i8> %2, %4
8489 ; CHECK-NEXT: %11 = select <16 x i1> %9, <16 x i8> %5, <16 x i8> %7
8490 ; CHECK-NEXT: %12 = select <16 x i1> %10, <16 x i8> %6, <16 x i8> %8
8491 ; CHECK-NEXT: store <16 x i8> %12, <16 x i8>* %0, align 16
8492 ; CHECK-NEXT: ret <16 x i8> %11
8493 ; CHECK-NEXT: }
8494
8495 define <20 x i8> @icmp_ne_on_20xi8(<20 x i8>, <20 x i8>, <20 x i8>, <20 x i8>) {
8496 entry:
8497 %4 = icmp ne <20 x i8> %0, %1
8498 %5 = select <20 x i1> %4, <20 x i8> %2, <20 x i8> %3
8499 ret <20 x i8> %5
8500 }
8501 ; CHECK-LABEL: define <16 x i8> @icmp_ne_on_20xi8(<16 x i8>* nocapture nonnull d ereferenceable(16), <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>) {
8502 ; CHECK: entry:
8503 ; CHECK-NEXT: %9 = icmp ne <16 x i8> %1, %3
8504 ; CHECK-NEXT: %10 = icmp ne <16 x i8> %2, %4
8505 ; CHECK-NEXT: %11 = select <16 x i1> %9, <16 x i8> %5, <16 x i8> %7
8506 ; CHECK-NEXT: %12 = select <16 x i1> %10, <16 x i8> %6, <16 x i8> %8
8507 ; CHECK-NEXT: store <16 x i8> %12, <16 x i8>* %0, align 16
8508 ; CHECK-NEXT: ret <16 x i8> %11
8509 ; CHECK-NEXT: }
8510
8511 define <20 x i8> @icmp_sgt_on_20xi8(<20 x i8>, <20 x i8>, <20 x i8>, <20 x i8>) {
8512 entry:
8513 %4 = icmp sgt <20 x i8> %0, %1
8514 %5 = select <20 x i1> %4, <20 x i8> %2, <20 x i8> %3
8515 ret <20 x i8> %5
8516 }
8517 ; CHECK-LABEL: define <16 x i8> @icmp_sgt_on_20xi8(<16 x i8>* nocapture nonnull dereferenceable(16), <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>) {
8518 ; CHECK: entry:
8519 ; CHECK-NEXT: %9 = icmp sgt <16 x i8> %1, %3
8520 ; CHECK-NEXT: %10 = icmp sgt <16 x i8> %2, %4
8521 ; CHECK-NEXT: %11 = select <16 x i1> %9, <16 x i8> %5, <16 x i8> %7
8522 ; CHECK-NEXT: %12 = select <16 x i1> %10, <16 x i8> %6, <16 x i8> %8
8523 ; CHECK-NEXT: store <16 x i8> %12, <16 x i8>* %0, align 16
8524 ; CHECK-NEXT: ret <16 x i8> %11
8525 ; CHECK-NEXT: }
8526
8527 define <20 x i8> @icmp_ugt_on_20xi8(<20 x i8>, <20 x i8>, <20 x i8>, <20 x i8>) {
8528 entry:
8529 %4 = icmp ugt <20 x i8> %0, %1
8530 %5 = select <20 x i1> %4, <20 x i8> %2, <20 x i8> %3
8531 ret <20 x i8> %5
8532 }
8533 ; CHECK-LABEL: define <16 x i8> @icmp_ugt_on_20xi8(<16 x i8>* nocapture nonnull dereferenceable(16), <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>) {
8534 ; CHECK: entry:
8535 ; CHECK-NEXT: %9 = icmp ugt <16 x i8> %1, %3
8536 ; CHECK-NEXT: %10 = icmp ugt <16 x i8> %2, %4
8537 ; CHECK-NEXT: %11 = select <16 x i1> %9, <16 x i8> %5, <16 x i8> %7
8538 ; CHECK-NEXT: %12 = select <16 x i1> %10, <16 x i8> %6, <16 x i8> %8
8539 ; CHECK-NEXT: store <16 x i8> %12, <16 x i8>* %0, align 16
8540 ; CHECK-NEXT: ret <16 x i8> %11
8541 ; CHECK-NEXT: }
8542
8543 define <20 x i8> @icmp_sge_on_20xi8(<20 x i8>, <20 x i8>, <20 x i8>, <20 x i8>) {
8544 entry:
8545 %4 = icmp sge <20 x i8> %0, %1
8546 %5 = select <20 x i1> %4, <20 x i8> %2, <20 x i8> %3
8547 ret <20 x i8> %5
8548 }
8549 ; CHECK-LABEL: define <16 x i8> @icmp_sge_on_20xi8(<16 x i8>* nocapture nonnull dereferenceable(16), <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>) {
8550 ; CHECK: entry:
8551 ; CHECK-NEXT: %9 = icmp sge <16 x i8> %1, %3
8552 ; CHECK-NEXT: %10 = icmp sge <16 x i8> %2, %4
8553 ; CHECK-NEXT: %11 = select <16 x i1> %9, <16 x i8> %5, <16 x i8> %7
8554 ; CHECK-NEXT: %12 = select <16 x i1> %10, <16 x i8> %6, <16 x i8> %8
8555 ; CHECK-NEXT: store <16 x i8> %12, <16 x i8>* %0, align 16
8556 ; CHECK-NEXT: ret <16 x i8> %11
8557 ; CHECK-NEXT: }
8558
8559 define <20 x i8> @icmp_uge_on_20xi8(<20 x i8>, <20 x i8>, <20 x i8>, <20 x i8>) {
8560 entry:
8561 %4 = icmp uge <20 x i8> %0, %1
8562 %5 = select <20 x i1> %4, <20 x i8> %2, <20 x i8> %3
8563 ret <20 x i8> %5
8564 }
8565 ; CHECK-LABEL: define <16 x i8> @icmp_uge_on_20xi8(<16 x i8>* nocapture nonnull dereferenceable(16), <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>) {
8566 ; CHECK: entry:
8567 ; CHECK-NEXT: %9 = icmp uge <16 x i8> %1, %3
8568 ; CHECK-NEXT: %10 = icmp uge <16 x i8> %2, %4
8569 ; CHECK-NEXT: %11 = select <16 x i1> %9, <16 x i8> %5, <16 x i8> %7
8570 ; CHECK-NEXT: %12 = select <16 x i1> %10, <16 x i8> %6, <16 x i8> %8
8571 ; CHECK-NEXT: store <16 x i8> %12, <16 x i8>* %0, align 16
8572 ; CHECK-NEXT: ret <16 x i8> %11
8573 ; CHECK-NEXT: }
8574
8575 define <20 x i8> @icmp_slt_on_20xi8(<20 x i8>, <20 x i8>, <20 x i8>, <20 x i8>) {
8576 entry:
8577 %4 = icmp slt <20 x i8> %0, %1
8578 %5 = select <20 x i1> %4, <20 x i8> %2, <20 x i8> %3
8579 ret <20 x i8> %5
8580 }
8581 ; CHECK-LABEL: define <16 x i8> @icmp_slt_on_20xi8(<16 x i8>* nocapture nonnull dereferenceable(16), <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>) {
8582 ; CHECK: entry:
8583 ; CHECK-NEXT: %9 = icmp slt <16 x i8> %1, %3
8584 ; CHECK-NEXT: %10 = icmp slt <16 x i8> %2, %4
8585 ; CHECK-NEXT: %11 = select <16 x i1> %9, <16 x i8> %5, <16 x i8> %7
8586 ; CHECK-NEXT: %12 = select <16 x i1> %10, <16 x i8> %6, <16 x i8> %8
8587 ; CHECK-NEXT: store <16 x i8> %12, <16 x i8>* %0, align 16
8588 ; CHECK-NEXT: ret <16 x i8> %11
8589 ; CHECK-NEXT: }
8590
8591 define <20 x i8> @icmp_ult_on_20xi8(<20 x i8>, <20 x i8>, <20 x i8>, <20 x i8>) {
8592 entry:
8593 %4 = icmp ult <20 x i8> %0, %1
8594 %5 = select <20 x i1> %4, <20 x i8> %2, <20 x i8> %3
8595 ret <20 x i8> %5
8596 }
8597 ; CHECK-LABEL: define <16 x i8> @icmp_ult_on_20xi8(<16 x i8>* nocapture nonnull dereferenceable(16), <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>) {
8598 ; CHECK: entry:
8599 ; CHECK-NEXT: %9 = icmp ult <16 x i8> %1, %3
8600 ; CHECK-NEXT: %10 = icmp ult <16 x i8> %2, %4
8601 ; CHECK-NEXT: %11 = select <16 x i1> %9, <16 x i8> %5, <16 x i8> %7
8602 ; CHECK-NEXT: %12 = select <16 x i1> %10, <16 x i8> %6, <16 x i8> %8
8603 ; CHECK-NEXT: store <16 x i8> %12, <16 x i8>* %0, align 16
8604 ; CHECK-NEXT: ret <16 x i8> %11
8605 ; CHECK-NEXT: }
8606
8607 define <20 x i8> @icmp_sle_on_20xi8(<20 x i8>, <20 x i8>, <20 x i8>, <20 x i8>) {
8608 entry:
8609 %4 = icmp sle <20 x i8> %0, %1
8610 %5 = select <20 x i1> %4, <20 x i8> %2, <20 x i8> %3
8611 ret <20 x i8> %5
8612 }
8613 ; CHECK-LABEL: define <16 x i8> @icmp_sle_on_20xi8(<16 x i8>* nocapture nonnull dereferenceable(16), <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>) {
8614 ; CHECK: entry:
8615 ; CHECK-NEXT: %9 = icmp sle <16 x i8> %1, %3
8616 ; CHECK-NEXT: %10 = icmp sle <16 x i8> %2, %4
8617 ; CHECK-NEXT: %11 = select <16 x i1> %9, <16 x i8> %5, <16 x i8> %7
8618 ; CHECK-NEXT: %12 = select <16 x i1> %10, <16 x i8> %6, <16 x i8> %8
8619 ; CHECK-NEXT: store <16 x i8> %12, <16 x i8>* %0, align 16
8620 ; CHECK-NEXT: ret <16 x i8> %11
8621 ; CHECK-NEXT: }
8622
8623 define <20 x i8> @icmp_ule_on_20xi8(<20 x i8>, <20 x i8>, <20 x i8>, <20 x i8>) {
8624 entry:
8625 %4 = icmp ule <20 x i8> %0, %1
8626 %5 = select <20 x i1> %4, <20 x i8> %2, <20 x i8> %3
8627 ret <20 x i8> %5
8628 }
8629 ; CHECK-LABEL: define <16 x i8> @icmp_ule_on_20xi8(<16 x i8>* nocapture nonnull dereferenceable(16), <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>) {
8630 ; CHECK: entry:
8631 ; CHECK-NEXT: %9 = icmp ule <16 x i8> %1, %3
8632 ; CHECK-NEXT: %10 = icmp ule <16 x i8> %2, %4
8633 ; CHECK-NEXT: %11 = select <16 x i1> %9, <16 x i8> %5, <16 x i8> %7
8634 ; CHECK-NEXT: %12 = select <16 x i1> %10, <16 x i8> %6, <16 x i8> %8
8635 ; CHECK-NEXT: store <16 x i8> %12, <16 x i8>* %0, align 16
8636 ; CHECK-NEXT: ret <16 x i8> %11
8637 ; CHECK-NEXT: }
8638
8639 define <20 x i16> @icmp_eq_on_20xi16(<20 x i16>, <20 x i16>, <20 x i16>, <20 x i 16>) {
8640 entry:
8641 %4 = icmp eq <20 x i16> %0, %1
8642 %5 = select <20 x i1> %4, <20 x i16> %2, <20 x i16> %3
8643 ret <20 x i16> %5
8644 }
8645 ; CHECK-LABEL: define <8 x i16> @icmp_eq_on_20xi16(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16> , <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, < 8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
8646 ; CHECK: entry:
8647 ; CHECK-NEXT: %14 = icmp eq <8 x i16> %2, %5
8648 ; CHECK-NEXT: %15 = icmp eq <8 x i16> %3, %6
8649 ; CHECK-NEXT: %16 = icmp eq <8 x i16> %4, %7
8650 ; CHECK-NEXT: %17 = select <8 x i1> %14, <8 x i16> %8, <8 x i16> %11
8651 ; CHECK-NEXT: %18 = select <8 x i1> %15, <8 x i16> %9, <8 x i16> %12
8652 ; CHECK-NEXT: %19 = select <8 x i1> %16, <8 x i16> %10, <8 x i16> %13
8653 ; CHECK-NEXT: store <8 x i16> %18, <8 x i16>* %0, align 16
8654 ; CHECK-NEXT: store <8 x i16> %19, <8 x i16>* %1, align 16
8655 ; CHECK-NEXT: ret <8 x i16> %17
8656 ; CHECK-NEXT: }
8657
8658 define <20 x i16> @icmp_ne_on_20xi16(<20 x i16>, <20 x i16>, <20 x i16>, <20 x i 16>) {
8659 entry:
8660 %4 = icmp ne <20 x i16> %0, %1
8661 %5 = select <20 x i1> %4, <20 x i16> %2, <20 x i16> %3
8662 ret <20 x i16> %5
8663 }
8664 ; CHECK-LABEL: define <8 x i16> @icmp_ne_on_20xi16(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16> , <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, < 8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
8665 ; CHECK: entry:
8666 ; CHECK-NEXT: %14 = icmp ne <8 x i16> %2, %5
8667 ; CHECK-NEXT: %15 = icmp ne <8 x i16> %3, %6
8668 ; CHECK-NEXT: %16 = icmp ne <8 x i16> %4, %7
8669 ; CHECK-NEXT: %17 = select <8 x i1> %14, <8 x i16> %8, <8 x i16> %11
8670 ; CHECK-NEXT: %18 = select <8 x i1> %15, <8 x i16> %9, <8 x i16> %12
8671 ; CHECK-NEXT: %19 = select <8 x i1> %16, <8 x i16> %10, <8 x i16> %13
8672 ; CHECK-NEXT: store <8 x i16> %18, <8 x i16>* %0, align 16
8673 ; CHECK-NEXT: store <8 x i16> %19, <8 x i16>* %1, align 16
8674 ; CHECK-NEXT: ret <8 x i16> %17
8675 ; CHECK-NEXT: }
8676
8677 define <20 x i16> @icmp_sgt_on_20xi16(<20 x i16>, <20 x i16>, <20 x i16>, <20 x i16>) {
8678 entry:
8679 %4 = icmp sgt <20 x i16> %0, %1
8680 %5 = select <20 x i1> %4, <20 x i16> %2, <20 x i16> %3
8681 ret <20 x i16> %5
8682 }
8683 ; CHECK-LABEL: define <8 x i16> @icmp_sgt_on_20xi16(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16 >, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
8684 ; CHECK: entry:
8685 ; CHECK-NEXT: %14 = icmp sgt <8 x i16> %2, %5
8686 ; CHECK-NEXT: %15 = icmp sgt <8 x i16> %3, %6
8687 ; CHECK-NEXT: %16 = icmp sgt <8 x i16> %4, %7
8688 ; CHECK-NEXT: %17 = select <8 x i1> %14, <8 x i16> %8, <8 x i16> %11
8689 ; CHECK-NEXT: %18 = select <8 x i1> %15, <8 x i16> %9, <8 x i16> %12
8690 ; CHECK-NEXT: %19 = select <8 x i1> %16, <8 x i16> %10, <8 x i16> %13
8691 ; CHECK-NEXT: store <8 x i16> %18, <8 x i16>* %0, align 16
8692 ; CHECK-NEXT: store <8 x i16> %19, <8 x i16>* %1, align 16
8693 ; CHECK-NEXT: ret <8 x i16> %17
8694 ; CHECK-NEXT: }
8695
8696 define <20 x i16> @icmp_ugt_on_20xi16(<20 x i16>, <20 x i16>, <20 x i16>, <20 x i16>) {
8697 entry:
8698 %4 = icmp ugt <20 x i16> %0, %1
8699 %5 = select <20 x i1> %4, <20 x i16> %2, <20 x i16> %3
8700 ret <20 x i16> %5
8701 }
8702 ; CHECK-LABEL: define <8 x i16> @icmp_ugt_on_20xi16(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16 >, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
8703 ; CHECK: entry:
8704 ; CHECK-NEXT: %14 = icmp ugt <8 x i16> %2, %5
8705 ; CHECK-NEXT: %15 = icmp ugt <8 x i16> %3, %6
8706 ; CHECK-NEXT: %16 = icmp ugt <8 x i16> %4, %7
8707 ; CHECK-NEXT: %17 = select <8 x i1> %14, <8 x i16> %8, <8 x i16> %11
8708 ; CHECK-NEXT: %18 = select <8 x i1> %15, <8 x i16> %9, <8 x i16> %12
8709 ; CHECK-NEXT: %19 = select <8 x i1> %16, <8 x i16> %10, <8 x i16> %13
8710 ; CHECK-NEXT: store <8 x i16> %18, <8 x i16>* %0, align 16
8711 ; CHECK-NEXT: store <8 x i16> %19, <8 x i16>* %1, align 16
8712 ; CHECK-NEXT: ret <8 x i16> %17
8713 ; CHECK-NEXT: }
8714
8715 define <20 x i16> @icmp_sge_on_20xi16(<20 x i16>, <20 x i16>, <20 x i16>, <20 x i16>) {
8716 entry:
8717 %4 = icmp sge <20 x i16> %0, %1
8718 %5 = select <20 x i1> %4, <20 x i16> %2, <20 x i16> %3
8719 ret <20 x i16> %5
8720 }
8721 ; CHECK-LABEL: define <8 x i16> @icmp_sge_on_20xi16(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16 >, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
8722 ; CHECK: entry:
8723 ; CHECK-NEXT: %14 = icmp sge <8 x i16> %2, %5
8724 ; CHECK-NEXT: %15 = icmp sge <8 x i16> %3, %6
8725 ; CHECK-NEXT: %16 = icmp sge <8 x i16> %4, %7
8726 ; CHECK-NEXT: %17 = select <8 x i1> %14, <8 x i16> %8, <8 x i16> %11
8727 ; CHECK-NEXT: %18 = select <8 x i1> %15, <8 x i16> %9, <8 x i16> %12
8728 ; CHECK-NEXT: %19 = select <8 x i1> %16, <8 x i16> %10, <8 x i16> %13
8729 ; CHECK-NEXT: store <8 x i16> %18, <8 x i16>* %0, align 16
8730 ; CHECK-NEXT: store <8 x i16> %19, <8 x i16>* %1, align 16
8731 ; CHECK-NEXT: ret <8 x i16> %17
8732 ; CHECK-NEXT: }
8733
8734 define <20 x i16> @icmp_uge_on_20xi16(<20 x i16>, <20 x i16>, <20 x i16>, <20 x i16>) {
8735 entry:
8736 %4 = icmp uge <20 x i16> %0, %1
8737 %5 = select <20 x i1> %4, <20 x i16> %2, <20 x i16> %3
8738 ret <20 x i16> %5
8739 }
8740 ; CHECK-LABEL: define <8 x i16> @icmp_uge_on_20xi16(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16 >, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
8741 ; CHECK: entry:
8742 ; CHECK-NEXT: %14 = icmp uge <8 x i16> %2, %5
8743 ; CHECK-NEXT: %15 = icmp uge <8 x i16> %3, %6
8744 ; CHECK-NEXT: %16 = icmp uge <8 x i16> %4, %7
8745 ; CHECK-NEXT: %17 = select <8 x i1> %14, <8 x i16> %8, <8 x i16> %11
8746 ; CHECK-NEXT: %18 = select <8 x i1> %15, <8 x i16> %9, <8 x i16> %12
8747 ; CHECK-NEXT: %19 = select <8 x i1> %16, <8 x i16> %10, <8 x i16> %13
8748 ; CHECK-NEXT: store <8 x i16> %18, <8 x i16>* %0, align 16
8749 ; CHECK-NEXT: store <8 x i16> %19, <8 x i16>* %1, align 16
8750 ; CHECK-NEXT: ret <8 x i16> %17
8751 ; CHECK-NEXT: }
8752
8753 define <20 x i16> @icmp_slt_on_20xi16(<20 x i16>, <20 x i16>, <20 x i16>, <20 x i16>) {
8754 entry:
8755 %4 = icmp slt <20 x i16> %0, %1
8756 %5 = select <20 x i1> %4, <20 x i16> %2, <20 x i16> %3
8757 ret <20 x i16> %5
8758 }
8759 ; CHECK-LABEL: define <8 x i16> @icmp_slt_on_20xi16(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16 >, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
8760 ; CHECK: entry:
8761 ; CHECK-NEXT: %14 = icmp slt <8 x i16> %2, %5
8762 ; CHECK-NEXT: %15 = icmp slt <8 x i16> %3, %6
8763 ; CHECK-NEXT: %16 = icmp slt <8 x i16> %4, %7
8764 ; CHECK-NEXT: %17 = select <8 x i1> %14, <8 x i16> %8, <8 x i16> %11
8765 ; CHECK-NEXT: %18 = select <8 x i1> %15, <8 x i16> %9, <8 x i16> %12
8766 ; CHECK-NEXT: %19 = select <8 x i1> %16, <8 x i16> %10, <8 x i16> %13
8767 ; CHECK-NEXT: store <8 x i16> %18, <8 x i16>* %0, align 16
8768 ; CHECK-NEXT: store <8 x i16> %19, <8 x i16>* %1, align 16
8769 ; CHECK-NEXT: ret <8 x i16> %17
8770 ; CHECK-NEXT: }
8771
8772 define <20 x i16> @icmp_ult_on_20xi16(<20 x i16>, <20 x i16>, <20 x i16>, <20 x i16>) {
8773 entry:
8774 %4 = icmp ult <20 x i16> %0, %1
8775 %5 = select <20 x i1> %4, <20 x i16> %2, <20 x i16> %3
8776 ret <20 x i16> %5
8777 }
8778 ; CHECK-LABEL: define <8 x i16> @icmp_ult_on_20xi16(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16 >, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
8779 ; CHECK: entry:
8780 ; CHECK-NEXT: %14 = icmp ult <8 x i16> %2, %5
8781 ; CHECK-NEXT: %15 = icmp ult <8 x i16> %3, %6
8782 ; CHECK-NEXT: %16 = icmp ult <8 x i16> %4, %7
8783 ; CHECK-NEXT: %17 = select <8 x i1> %14, <8 x i16> %8, <8 x i16> %11
8784 ; CHECK-NEXT: %18 = select <8 x i1> %15, <8 x i16> %9, <8 x i16> %12
8785 ; CHECK-NEXT: %19 = select <8 x i1> %16, <8 x i16> %10, <8 x i16> %13
8786 ; CHECK-NEXT: store <8 x i16> %18, <8 x i16>* %0, align 16
8787 ; CHECK-NEXT: store <8 x i16> %19, <8 x i16>* %1, align 16
8788 ; CHECK-NEXT: ret <8 x i16> %17
8789 ; CHECK-NEXT: }
8790
8791 define <20 x i16> @icmp_sle_on_20xi16(<20 x i16>, <20 x i16>, <20 x i16>, <20 x i16>) {
8792 entry:
8793 %4 = icmp sle <20 x i16> %0, %1
8794 %5 = select <20 x i1> %4, <20 x i16> %2, <20 x i16> %3
8795 ret <20 x i16> %5
8796 }
8797 ; CHECK-LABEL: define <8 x i16> @icmp_sle_on_20xi16(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16 >, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
8798 ; CHECK: entry:
8799 ; CHECK-NEXT: %14 = icmp sle <8 x i16> %2, %5
8800 ; CHECK-NEXT: %15 = icmp sle <8 x i16> %3, %6
8801 ; CHECK-NEXT: %16 = icmp sle <8 x i16> %4, %7
8802 ; CHECK-NEXT: %17 = select <8 x i1> %14, <8 x i16> %8, <8 x i16> %11
8803 ; CHECK-NEXT: %18 = select <8 x i1> %15, <8 x i16> %9, <8 x i16> %12
8804 ; CHECK-NEXT: %19 = select <8 x i1> %16, <8 x i16> %10, <8 x i16> %13
8805 ; CHECK-NEXT: store <8 x i16> %18, <8 x i16>* %0, align 16
8806 ; CHECK-NEXT: store <8 x i16> %19, <8 x i16>* %1, align 16
8807 ; CHECK-NEXT: ret <8 x i16> %17
8808 ; CHECK-NEXT: }
8809
8810 define <20 x i16> @icmp_ule_on_20xi16(<20 x i16>, <20 x i16>, <20 x i16>, <20 x i16>) {
8811 entry:
8812 %4 = icmp ule <20 x i16> %0, %1
8813 %5 = select <20 x i1> %4, <20 x i16> %2, <20 x i16> %3
8814 ret <20 x i16> %5
8815 }
8816 ; CHECK-LABEL: define <8 x i16> @icmp_ule_on_20xi16(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16 >, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) {
8817 ; CHECK: entry:
8818 ; CHECK-NEXT: %14 = icmp ule <8 x i16> %2, %5
8819 ; CHECK-NEXT: %15 = icmp ule <8 x i16> %3, %6
8820 ; CHECK-NEXT: %16 = icmp ule <8 x i16> %4, %7
8821 ; CHECK-NEXT: %17 = select <8 x i1> %14, <8 x i16> %8, <8 x i16> %11
8822 ; CHECK-NEXT: %18 = select <8 x i1> %15, <8 x i16> %9, <8 x i16> %12
8823 ; CHECK-NEXT: %19 = select <8 x i1> %16, <8 x i16> %10, <8 x i16> %13
8824 ; CHECK-NEXT: store <8 x i16> %18, <8 x i16>* %0, align 16
8825 ; CHECK-NEXT: store <8 x i16> %19, <8 x i16>* %1, align 16
8826 ; CHECK-NEXT: ret <8 x i16> %17
8827 ; CHECK-NEXT: }
8828
8829 define <20 x i32> @icmp_eq_on_20xi32(<20 x i32>, <20 x i32>, <20 x i32>, <20 x i 32>) {
8830 entry:
8831 %4 = icmp eq <20 x i32> %0, %1
8832 %5 = select <20 x i1> %4, <20 x i32> %2, <20 x i32> %3
8833 ret <20 x i32> %5
8834 }
8835 ; CHECK-LABEL: define <4 x i32> @icmp_eq_on_20xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32> * nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenc eable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i 32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
8836 ; CHECK: entry:
8837 ; CHECK-NEXT: %24 = icmp eq <4 x i32> %4, %9
8838 ; CHECK-NEXT: %25 = icmp eq <4 x i32> %5, %10
8839 ; CHECK-NEXT: %26 = icmp eq <4 x i32> %6, %11
8840 ; CHECK-NEXT: %27 = icmp eq <4 x i32> %7, %12
8841 ; CHECK-NEXT: %28 = icmp eq <4 x i32> %8, %13
8842 ; CHECK-NEXT: %29 = select <4 x i1> %24, <4 x i32> %14, <4 x i32> %19
8843 ; CHECK-NEXT: %30 = select <4 x i1> %25, <4 x i32> %15, <4 x i32> %20
8844 ; CHECK-NEXT: %31 = select <4 x i1> %26, <4 x i32> %16, <4 x i32> %21
8845 ; CHECK-NEXT: %32 = select <4 x i1> %27, <4 x i32> %17, <4 x i32> %22
8846 ; CHECK-NEXT: %33 = select <4 x i1> %28, <4 x i32> %18, <4 x i32> %23
8847 ; CHECK-NEXT: store <4 x i32> %30, <4 x i32>* %0, align 16
8848 ; CHECK-NEXT: store <4 x i32> %31, <4 x i32>* %1, align 16
8849 ; CHECK-NEXT: store <4 x i32> %32, <4 x i32>* %2, align 16
8850 ; CHECK-NEXT: store <4 x i32> %33, <4 x i32>* %3, align 16
8851 ; CHECK-NEXT: ret <4 x i32> %29
8852 ; CHECK-NEXT: }
8853
8854 define <20 x i32> @icmp_ne_on_20xi32(<20 x i32>, <20 x i32>, <20 x i32>, <20 x i 32>) {
8855 entry:
8856 %4 = icmp ne <20 x i32> %0, %1
8857 %5 = select <20 x i1> %4, <20 x i32> %2, <20 x i32> %3
8858 ret <20 x i32> %5
8859 }
8860 ; CHECK-LABEL: define <4 x i32> @icmp_ne_on_20xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32> * nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenc eable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i 32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
8861 ; CHECK: entry:
8862 ; CHECK-NEXT: %24 = icmp ne <4 x i32> %4, %9
8863 ; CHECK-NEXT: %25 = icmp ne <4 x i32> %5, %10
8864 ; CHECK-NEXT: %26 = icmp ne <4 x i32> %6, %11
8865 ; CHECK-NEXT: %27 = icmp ne <4 x i32> %7, %12
8866 ; CHECK-NEXT: %28 = icmp ne <4 x i32> %8, %13
8867 ; CHECK-NEXT: %29 = select <4 x i1> %24, <4 x i32> %14, <4 x i32> %19
8868 ; CHECK-NEXT: %30 = select <4 x i1> %25, <4 x i32> %15, <4 x i32> %20
8869 ; CHECK-NEXT: %31 = select <4 x i1> %26, <4 x i32> %16, <4 x i32> %21
8870 ; CHECK-NEXT: %32 = select <4 x i1> %27, <4 x i32> %17, <4 x i32> %22
8871 ; CHECK-NEXT: %33 = select <4 x i1> %28, <4 x i32> %18, <4 x i32> %23
8872 ; CHECK-NEXT: store <4 x i32> %30, <4 x i32>* %0, align 16
8873 ; CHECK-NEXT: store <4 x i32> %31, <4 x i32>* %1, align 16
8874 ; CHECK-NEXT: store <4 x i32> %32, <4 x i32>* %2, align 16
8875 ; CHECK-NEXT: store <4 x i32> %33, <4 x i32>* %3, align 16
8876 ; CHECK-NEXT: ret <4 x i32> %29
8877 ; CHECK-NEXT: }
8878
8879 define <20 x i32> @icmp_sgt_on_20xi32(<20 x i32>, <20 x i32>, <20 x i32>, <20 x i32>) {
8880 entry:
8881 %4 = icmp sgt <20 x i32> %0, %1
8882 %5 = select <20 x i1> %4, <20 x i32> %2, <20 x i32> %3
8883 ret <20 x i32> %5
8884 }
8885 ; CHECK-LABEL: define <4 x i32> @icmp_sgt_on_20xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32 >* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferen ceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
8886 ; CHECK: entry:
8887 ; CHECK-NEXT: %24 = icmp sgt <4 x i32> %4, %9
8888 ; CHECK-NEXT: %25 = icmp sgt <4 x i32> %5, %10
8889 ; CHECK-NEXT: %26 = icmp sgt <4 x i32> %6, %11
8890 ; CHECK-NEXT: %27 = icmp sgt <4 x i32> %7, %12
8891 ; CHECK-NEXT: %28 = icmp sgt <4 x i32> %8, %13
8892 ; CHECK-NEXT: %29 = select <4 x i1> %24, <4 x i32> %14, <4 x i32> %19
8893 ; CHECK-NEXT: %30 = select <4 x i1> %25, <4 x i32> %15, <4 x i32> %20
8894 ; CHECK-NEXT: %31 = select <4 x i1> %26, <4 x i32> %16, <4 x i32> %21
8895 ; CHECK-NEXT: %32 = select <4 x i1> %27, <4 x i32> %17, <4 x i32> %22
8896 ; CHECK-NEXT: %33 = select <4 x i1> %28, <4 x i32> %18, <4 x i32> %23
8897 ; CHECK-NEXT: store <4 x i32> %30, <4 x i32>* %0, align 16
8898 ; CHECK-NEXT: store <4 x i32> %31, <4 x i32>* %1, align 16
8899 ; CHECK-NEXT: store <4 x i32> %32, <4 x i32>* %2, align 16
8900 ; CHECK-NEXT: store <4 x i32> %33, <4 x i32>* %3, align 16
8901 ; CHECK-NEXT: ret <4 x i32> %29
8902 ; CHECK-NEXT: }
8903
8904 define <20 x i32> @icmp_ugt_on_20xi32(<20 x i32>, <20 x i32>, <20 x i32>, <20 x i32>) {
8905 entry:
8906 %4 = icmp ugt <20 x i32> %0, %1
8907 %5 = select <20 x i1> %4, <20 x i32> %2, <20 x i32> %3
8908 ret <20 x i32> %5
8909 }
8910 ; CHECK-LABEL: define <4 x i32> @icmp_ugt_on_20xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32 >* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferen ceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
8911 ; CHECK: entry:
8912 ; CHECK-NEXT: %24 = icmp ugt <4 x i32> %4, %9
8913 ; CHECK-NEXT: %25 = icmp ugt <4 x i32> %5, %10
8914 ; CHECK-NEXT: %26 = icmp ugt <4 x i32> %6, %11
8915 ; CHECK-NEXT: %27 = icmp ugt <4 x i32> %7, %12
8916 ; CHECK-NEXT: %28 = icmp ugt <4 x i32> %8, %13
8917 ; CHECK-NEXT: %29 = select <4 x i1> %24, <4 x i32> %14, <4 x i32> %19
8918 ; CHECK-NEXT: %30 = select <4 x i1> %25, <4 x i32> %15, <4 x i32> %20
8919 ; CHECK-NEXT: %31 = select <4 x i1> %26, <4 x i32> %16, <4 x i32> %21
8920 ; CHECK-NEXT: %32 = select <4 x i1> %27, <4 x i32> %17, <4 x i32> %22
8921 ; CHECK-NEXT: %33 = select <4 x i1> %28, <4 x i32> %18, <4 x i32> %23
8922 ; CHECK-NEXT: store <4 x i32> %30, <4 x i32>* %0, align 16
8923 ; CHECK-NEXT: store <4 x i32> %31, <4 x i32>* %1, align 16
8924 ; CHECK-NEXT: store <4 x i32> %32, <4 x i32>* %2, align 16
8925 ; CHECK-NEXT: store <4 x i32> %33, <4 x i32>* %3, align 16
8926 ; CHECK-NEXT: ret <4 x i32> %29
8927 ; CHECK-NEXT: }
8928
8929 define <20 x i32> @icmp_sge_on_20xi32(<20 x i32>, <20 x i32>, <20 x i32>, <20 x i32>) {
8930 entry:
8931 %4 = icmp sge <20 x i32> %0, %1
8932 %5 = select <20 x i1> %4, <20 x i32> %2, <20 x i32> %3
8933 ret <20 x i32> %5
8934 }
8935 ; CHECK-LABEL: define <4 x i32> @icmp_sge_on_20xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32 >* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferen ceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
8936 ; CHECK: entry:
8937 ; CHECK-NEXT: %24 = icmp sge <4 x i32> %4, %9
8938 ; CHECK-NEXT: %25 = icmp sge <4 x i32> %5, %10
8939 ; CHECK-NEXT: %26 = icmp sge <4 x i32> %6, %11
8940 ; CHECK-NEXT: %27 = icmp sge <4 x i32> %7, %12
8941 ; CHECK-NEXT: %28 = icmp sge <4 x i32> %8, %13
8942 ; CHECK-NEXT: %29 = select <4 x i1> %24, <4 x i32> %14, <4 x i32> %19
8943 ; CHECK-NEXT: %30 = select <4 x i1> %25, <4 x i32> %15, <4 x i32> %20
8944 ; CHECK-NEXT: %31 = select <4 x i1> %26, <4 x i32> %16, <4 x i32> %21
8945 ; CHECK-NEXT: %32 = select <4 x i1> %27, <4 x i32> %17, <4 x i32> %22
8946 ; CHECK-NEXT: %33 = select <4 x i1> %28, <4 x i32> %18, <4 x i32> %23
8947 ; CHECK-NEXT: store <4 x i32> %30, <4 x i32>* %0, align 16
8948 ; CHECK-NEXT: store <4 x i32> %31, <4 x i32>* %1, align 16
8949 ; CHECK-NEXT: store <4 x i32> %32, <4 x i32>* %2, align 16
8950 ; CHECK-NEXT: store <4 x i32> %33, <4 x i32>* %3, align 16
8951 ; CHECK-NEXT: ret <4 x i32> %29
8952 ; CHECK-NEXT: }
8953
8954 define <20 x i32> @icmp_uge_on_20xi32(<20 x i32>, <20 x i32>, <20 x i32>, <20 x i32>) {
8955 entry:
8956 %4 = icmp uge <20 x i32> %0, %1
8957 %5 = select <20 x i1> %4, <20 x i32> %2, <20 x i32> %3
8958 ret <20 x i32> %5
8959 }
8960 ; CHECK-LABEL: define <4 x i32> @icmp_uge_on_20xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32 >* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferen ceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
8961 ; CHECK: entry:
8962 ; CHECK-NEXT: %24 = icmp uge <4 x i32> %4, %9
8963 ; CHECK-NEXT: %25 = icmp uge <4 x i32> %5, %10
8964 ; CHECK-NEXT: %26 = icmp uge <4 x i32> %6, %11
8965 ; CHECK-NEXT: %27 = icmp uge <4 x i32> %7, %12
8966 ; CHECK-NEXT: %28 = icmp uge <4 x i32> %8, %13
8967 ; CHECK-NEXT: %29 = select <4 x i1> %24, <4 x i32> %14, <4 x i32> %19
8968 ; CHECK-NEXT: %30 = select <4 x i1> %25, <4 x i32> %15, <4 x i32> %20
8969 ; CHECK-NEXT: %31 = select <4 x i1> %26, <4 x i32> %16, <4 x i32> %21
8970 ; CHECK-NEXT: %32 = select <4 x i1> %27, <4 x i32> %17, <4 x i32> %22
8971 ; CHECK-NEXT: %33 = select <4 x i1> %28, <4 x i32> %18, <4 x i32> %23
8972 ; CHECK-NEXT: store <4 x i32> %30, <4 x i32>* %0, align 16
8973 ; CHECK-NEXT: store <4 x i32> %31, <4 x i32>* %1, align 16
8974 ; CHECK-NEXT: store <4 x i32> %32, <4 x i32>* %2, align 16
8975 ; CHECK-NEXT: store <4 x i32> %33, <4 x i32>* %3, align 16
8976 ; CHECK-NEXT: ret <4 x i32> %29
8977 ; CHECK-NEXT: }
8978
8979 define <20 x i32> @icmp_slt_on_20xi32(<20 x i32>, <20 x i32>, <20 x i32>, <20 x i32>) {
8980 entry:
8981 %4 = icmp slt <20 x i32> %0, %1
8982 %5 = select <20 x i1> %4, <20 x i32> %2, <20 x i32> %3
8983 ret <20 x i32> %5
8984 }
8985 ; CHECK-LABEL: define <4 x i32> @icmp_slt_on_20xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32 >* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferen ceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
8986 ; CHECK: entry:
8987 ; CHECK-NEXT: %24 = icmp slt <4 x i32> %4, %9
8988 ; CHECK-NEXT: %25 = icmp slt <4 x i32> %5, %10
8989 ; CHECK-NEXT: %26 = icmp slt <4 x i32> %6, %11
8990 ; CHECK-NEXT: %27 = icmp slt <4 x i32> %7, %12
8991 ; CHECK-NEXT: %28 = icmp slt <4 x i32> %8, %13
8992 ; CHECK-NEXT: %29 = select <4 x i1> %24, <4 x i32> %14, <4 x i32> %19
8993 ; CHECK-NEXT: %30 = select <4 x i1> %25, <4 x i32> %15, <4 x i32> %20
8994 ; CHECK-NEXT: %31 = select <4 x i1> %26, <4 x i32> %16, <4 x i32> %21
8995 ; CHECK-NEXT: %32 = select <4 x i1> %27, <4 x i32> %17, <4 x i32> %22
8996 ; CHECK-NEXT: %33 = select <4 x i1> %28, <4 x i32> %18, <4 x i32> %23
8997 ; CHECK-NEXT: store <4 x i32> %30, <4 x i32>* %0, align 16
8998 ; CHECK-NEXT: store <4 x i32> %31, <4 x i32>* %1, align 16
8999 ; CHECK-NEXT: store <4 x i32> %32, <4 x i32>* %2, align 16
9000 ; CHECK-NEXT: store <4 x i32> %33, <4 x i32>* %3, align 16
9001 ; CHECK-NEXT: ret <4 x i32> %29
9002 ; CHECK-NEXT: }
9003
9004 define <20 x i32> @icmp_ult_on_20xi32(<20 x i32>, <20 x i32>, <20 x i32>, <20 x i32>) {
9005 entry:
9006 %4 = icmp ult <20 x i32> %0, %1
9007 %5 = select <20 x i1> %4, <20 x i32> %2, <20 x i32> %3
9008 ret <20 x i32> %5
9009 }
9010 ; CHECK-LABEL: define <4 x i32> @icmp_ult_on_20xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32 >* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferen ceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
9011 ; CHECK: entry:
9012 ; CHECK-NEXT: %24 = icmp ult <4 x i32> %4, %9
9013 ; CHECK-NEXT: %25 = icmp ult <4 x i32> %5, %10
9014 ; CHECK-NEXT: %26 = icmp ult <4 x i32> %6, %11
9015 ; CHECK-NEXT: %27 = icmp ult <4 x i32> %7, %12
9016 ; CHECK-NEXT: %28 = icmp ult <4 x i32> %8, %13
9017 ; CHECK-NEXT: %29 = select <4 x i1> %24, <4 x i32> %14, <4 x i32> %19
9018 ; CHECK-NEXT: %30 = select <4 x i1> %25, <4 x i32> %15, <4 x i32> %20
9019 ; CHECK-NEXT: %31 = select <4 x i1> %26, <4 x i32> %16, <4 x i32> %21
9020 ; CHECK-NEXT: %32 = select <4 x i1> %27, <4 x i32> %17, <4 x i32> %22
9021 ; CHECK-NEXT: %33 = select <4 x i1> %28, <4 x i32> %18, <4 x i32> %23
9022 ; CHECK-NEXT: store <4 x i32> %30, <4 x i32>* %0, align 16
9023 ; CHECK-NEXT: store <4 x i32> %31, <4 x i32>* %1, align 16
9024 ; CHECK-NEXT: store <4 x i32> %32, <4 x i32>* %2, align 16
9025 ; CHECK-NEXT: store <4 x i32> %33, <4 x i32>* %3, align 16
9026 ; CHECK-NEXT: ret <4 x i32> %29
9027 ; CHECK-NEXT: }
9028
9029 define <20 x i32> @icmp_sle_on_20xi32(<20 x i32>, <20 x i32>, <20 x i32>, <20 x i32>) {
9030 entry:
9031 %4 = icmp sle <20 x i32> %0, %1
9032 %5 = select <20 x i1> %4, <20 x i32> %2, <20 x i32> %3
9033 ret <20 x i32> %5
9034 }
9035 ; CHECK-LABEL: define <4 x i32> @icmp_sle_on_20xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32 >* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferen ceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
9036 ; CHECK: entry:
9037 ; CHECK-NEXT: %24 = icmp sle <4 x i32> %4, %9
9038 ; CHECK-NEXT: %25 = icmp sle <4 x i32> %5, %10
9039 ; CHECK-NEXT: %26 = icmp sle <4 x i32> %6, %11
9040 ; CHECK-NEXT: %27 = icmp sle <4 x i32> %7, %12
9041 ; CHECK-NEXT: %28 = icmp sle <4 x i32> %8, %13
9042 ; CHECK-NEXT: %29 = select <4 x i1> %24, <4 x i32> %14, <4 x i32> %19
9043 ; CHECK-NEXT: %30 = select <4 x i1> %25, <4 x i32> %15, <4 x i32> %20
9044 ; CHECK-NEXT: %31 = select <4 x i1> %26, <4 x i32> %16, <4 x i32> %21
9045 ; CHECK-NEXT: %32 = select <4 x i1> %27, <4 x i32> %17, <4 x i32> %22
9046 ; CHECK-NEXT: %33 = select <4 x i1> %28, <4 x i32> %18, <4 x i32> %23
9047 ; CHECK-NEXT: store <4 x i32> %30, <4 x i32>* %0, align 16
9048 ; CHECK-NEXT: store <4 x i32> %31, <4 x i32>* %1, align 16
9049 ; CHECK-NEXT: store <4 x i32> %32, <4 x i32>* %2, align 16
9050 ; CHECK-NEXT: store <4 x i32> %33, <4 x i32>* %3, align 16
9051 ; CHECK-NEXT: ret <4 x i32> %29
9052 ; CHECK-NEXT: }
9053
9054 define <20 x i32> @icmp_ule_on_20xi32(<20 x i32>, <20 x i32>, <20 x i32>, <20 x i32>) {
9055 entry:
9056 %4 = icmp ule <20 x i32> %0, %1
9057 %5 = select <20 x i1> %4, <20 x i32> %2, <20 x i32> %3
9058 ret <20 x i32> %5
9059 }
9060 ; CHECK-LABEL: define <4 x i32> @icmp_ule_on_20xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32 >* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferen ceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) {
9061 ; CHECK: entry:
9062 ; CHECK-NEXT: %24 = icmp ule <4 x i32> %4, %9
9063 ; CHECK-NEXT: %25 = icmp ule <4 x i32> %5, %10
9064 ; CHECK-NEXT: %26 = icmp ule <4 x i32> %6, %11
9065 ; CHECK-NEXT: %27 = icmp ule <4 x i32> %7, %12
9066 ; CHECK-NEXT: %28 = icmp ule <4 x i32> %8, %13
9067 ; CHECK-NEXT: %29 = select <4 x i1> %24, <4 x i32> %14, <4 x i32> %19
9068 ; CHECK-NEXT: %30 = select <4 x i1> %25, <4 x i32> %15, <4 x i32> %20
9069 ; CHECK-NEXT: %31 = select <4 x i1> %26, <4 x i32> %16, <4 x i32> %21
9070 ; CHECK-NEXT: %32 = select <4 x i1> %27, <4 x i32> %17, <4 x i32> %22
9071 ; CHECK-NEXT: %33 = select <4 x i1> %28, <4 x i32> %18, <4 x i32> %23
9072 ; CHECK-NEXT: store <4 x i32> %30, <4 x i32>* %0, align 16
9073 ; CHECK-NEXT: store <4 x i32> %31, <4 x i32>* %1, align 16
9074 ; CHECK-NEXT: store <4 x i32> %32, <4 x i32>* %2, align 16
9075 ; CHECK-NEXT: store <4 x i32> %33, <4 x i32>* %3, align 16
9076 ; CHECK-NEXT: ret <4 x i32> %29
9077 ; CHECK-NEXT: }
9078
9079 define <20 x i64> @icmp_eq_on_20xi64(<20 x i64>, <20 x i64>, <20 x i64>, <20 x i 64>) {
9080 entry:
9081 %4 = icmp eq <20 x i64> %0, %1
9082 %5 = select <20 x i1> %4, <20 x i64> %2, <20 x i64> %3
9083 ret <20 x i64> %5
9084 }
9085 ; CHECK-LABEL: define <2 x i64> @icmp_eq_on_20xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64> * nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenc eable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocaptur e nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i6 4>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
9086 ; CHECK: entry:
9087 ; CHECK-NEXT: %49 = icmp eq <2 x i64> %9, %19
9088 ; CHECK-NEXT: %50 = icmp eq <2 x i64> %10, %20
9089 ; CHECK-NEXT: %51 = icmp eq <2 x i64> %11, %21
9090 ; CHECK-NEXT: %52 = icmp eq <2 x i64> %12, %22
9091 ; CHECK-NEXT: %53 = icmp eq <2 x i64> %13, %23
9092 ; CHECK-NEXT: %54 = icmp eq <2 x i64> %14, %24
9093 ; CHECK-NEXT: %55 = icmp eq <2 x i64> %15, %25
9094 ; CHECK-NEXT: %56 = icmp eq <2 x i64> %16, %26
9095 ; CHECK-NEXT: %57 = icmp eq <2 x i64> %17, %27
9096 ; CHECK-NEXT: %58 = icmp eq <2 x i64> %18, %28
9097 ; CHECK-NEXT: %59 = select <2 x i1> %49, <2 x i64> %29, <2 x i64> %39
9098 ; CHECK-NEXT: %60 = select <2 x i1> %50, <2 x i64> %30, <2 x i64> %40
9099 ; CHECK-NEXT: %61 = select <2 x i1> %51, <2 x i64> %31, <2 x i64> %41
9100 ; CHECK-NEXT: %62 = select <2 x i1> %52, <2 x i64> %32, <2 x i64> %42
9101 ; CHECK-NEXT: %63 = select <2 x i1> %53, <2 x i64> %33, <2 x i64> %43
9102 ; CHECK-NEXT: %64 = select <2 x i1> %54, <2 x i64> %34, <2 x i64> %44
9103 ; CHECK-NEXT: %65 = select <2 x i1> %55, <2 x i64> %35, <2 x i64> %45
9104 ; CHECK-NEXT: %66 = select <2 x i1> %56, <2 x i64> %36, <2 x i64> %46
9105 ; CHECK-NEXT: %67 = select <2 x i1> %57, <2 x i64> %37, <2 x i64> %47
9106 ; CHECK-NEXT: %68 = select <2 x i1> %58, <2 x i64> %38, <2 x i64> %48
9107 ; CHECK-NEXT: store <2 x i64> %60, <2 x i64>* %0, align 16
9108 ; CHECK-NEXT: store <2 x i64> %61, <2 x i64>* %1, align 16
9109 ; CHECK-NEXT: store <2 x i64> %62, <2 x i64>* %2, align 16
9110 ; CHECK-NEXT: store <2 x i64> %63, <2 x i64>* %3, align 16
9111 ; CHECK-NEXT: store <2 x i64> %64, <2 x i64>* %4, align 16
9112 ; CHECK-NEXT: store <2 x i64> %65, <2 x i64>* %5, align 16
9113 ; CHECK-NEXT: store <2 x i64> %66, <2 x i64>* %6, align 16
9114 ; CHECK-NEXT: store <2 x i64> %67, <2 x i64>* %7, align 16
9115 ; CHECK-NEXT: store <2 x i64> %68, <2 x i64>* %8, align 16
9116 ; CHECK-NEXT: ret <2 x i64> %59
9117 ; CHECK-NEXT: }
9118
9119 define <20 x i64> @icmp_ne_on_20xi64(<20 x i64>, <20 x i64>, <20 x i64>, <20 x i 64>) {
9120 entry:
9121 %4 = icmp ne <20 x i64> %0, %1
9122 %5 = select <20 x i1> %4, <20 x i64> %2, <20 x i64> %3
9123 ret <20 x i64> %5
9124 }
9125 ; CHECK-LABEL: define <2 x i64> @icmp_ne_on_20xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64> * nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenc eable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocaptur e nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i6 4>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
9126 ; CHECK: entry:
9127 ; CHECK-NEXT: %49 = icmp ne <2 x i64> %9, %19
9128 ; CHECK-NEXT: %50 = icmp ne <2 x i64> %10, %20
9129 ; CHECK-NEXT: %51 = icmp ne <2 x i64> %11, %21
9130 ; CHECK-NEXT: %52 = icmp ne <2 x i64> %12, %22
9131 ; CHECK-NEXT: %53 = icmp ne <2 x i64> %13, %23
9132 ; CHECK-NEXT: %54 = icmp ne <2 x i64> %14, %24
9133 ; CHECK-NEXT: %55 = icmp ne <2 x i64> %15, %25
9134 ; CHECK-NEXT: %56 = icmp ne <2 x i64> %16, %26
9135 ; CHECK-NEXT: %57 = icmp ne <2 x i64> %17, %27
9136 ; CHECK-NEXT: %58 = icmp ne <2 x i64> %18, %28
9137 ; CHECK-NEXT: %59 = select <2 x i1> %49, <2 x i64> %29, <2 x i64> %39
9138 ; CHECK-NEXT: %60 = select <2 x i1> %50, <2 x i64> %30, <2 x i64> %40
9139 ; CHECK-NEXT: %61 = select <2 x i1> %51, <2 x i64> %31, <2 x i64> %41
9140 ; CHECK-NEXT: %62 = select <2 x i1> %52, <2 x i64> %32, <2 x i64> %42
9141 ; CHECK-NEXT: %63 = select <2 x i1> %53, <2 x i64> %33, <2 x i64> %43
9142 ; CHECK-NEXT: %64 = select <2 x i1> %54, <2 x i64> %34, <2 x i64> %44
9143 ; CHECK-NEXT: %65 = select <2 x i1> %55, <2 x i64> %35, <2 x i64> %45
9144 ; CHECK-NEXT: %66 = select <2 x i1> %56, <2 x i64> %36, <2 x i64> %46
9145 ; CHECK-NEXT: %67 = select <2 x i1> %57, <2 x i64> %37, <2 x i64> %47
9146 ; CHECK-NEXT: %68 = select <2 x i1> %58, <2 x i64> %38, <2 x i64> %48
9147 ; CHECK-NEXT: store <2 x i64> %60, <2 x i64>* %0, align 16
9148 ; CHECK-NEXT: store <2 x i64> %61, <2 x i64>* %1, align 16
9149 ; CHECK-NEXT: store <2 x i64> %62, <2 x i64>* %2, align 16
9150 ; CHECK-NEXT: store <2 x i64> %63, <2 x i64>* %3, align 16
9151 ; CHECK-NEXT: store <2 x i64> %64, <2 x i64>* %4, align 16
9152 ; CHECK-NEXT: store <2 x i64> %65, <2 x i64>* %5, align 16
9153 ; CHECK-NEXT: store <2 x i64> %66, <2 x i64>* %6, align 16
9154 ; CHECK-NEXT: store <2 x i64> %67, <2 x i64>* %7, align 16
9155 ; CHECK-NEXT: store <2 x i64> %68, <2 x i64>* %8, align 16
9156 ; CHECK-NEXT: ret <2 x i64> %59
9157 ; CHECK-NEXT: }
9158
9159 define <20 x i64> @icmp_sgt_on_20xi64(<20 x i64>, <20 x i64>, <20 x i64>, <20 x i64>) {
9160 entry:
9161 %4 = icmp sgt <20 x i64> %0, %1
9162 %5 = select <20 x i1> %4, <20 x i64> %2, <20 x i64> %3
9163 ret <20 x i64> %5
9164 }
9165 ; CHECK-LABEL: define <2 x i64> @icmp_sgt_on_20xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64 >* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferen ceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocaptu re nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16) , <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i 64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> , <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, < 2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
9166 ; CHECK: entry:
9167 ; CHECK-NEXT: %49 = icmp sgt <2 x i64> %9, %19
9168 ; CHECK-NEXT: %50 = icmp sgt <2 x i64> %10, %20
9169 ; CHECK-NEXT: %51 = icmp sgt <2 x i64> %11, %21
9170 ; CHECK-NEXT: %52 = icmp sgt <2 x i64> %12, %22
9171 ; CHECK-NEXT: %53 = icmp sgt <2 x i64> %13, %23
9172 ; CHECK-NEXT: %54 = icmp sgt <2 x i64> %14, %24
9173 ; CHECK-NEXT: %55 = icmp sgt <2 x i64> %15, %25
9174 ; CHECK-NEXT: %56 = icmp sgt <2 x i64> %16, %26
9175 ; CHECK-NEXT: %57 = icmp sgt <2 x i64> %17, %27
9176 ; CHECK-NEXT: %58 = icmp sgt <2 x i64> %18, %28
9177 ; CHECK-NEXT: %59 = select <2 x i1> %49, <2 x i64> %29, <2 x i64> %39
9178 ; CHECK-NEXT: %60 = select <2 x i1> %50, <2 x i64> %30, <2 x i64> %40
9179 ; CHECK-NEXT: %61 = select <2 x i1> %51, <2 x i64> %31, <2 x i64> %41
9180 ; CHECK-NEXT: %62 = select <2 x i1> %52, <2 x i64> %32, <2 x i64> %42
9181 ; CHECK-NEXT: %63 = select <2 x i1> %53, <2 x i64> %33, <2 x i64> %43
9182 ; CHECK-NEXT: %64 = select <2 x i1> %54, <2 x i64> %34, <2 x i64> %44
9183 ; CHECK-NEXT: %65 = select <2 x i1> %55, <2 x i64> %35, <2 x i64> %45
9184 ; CHECK-NEXT: %66 = select <2 x i1> %56, <2 x i64> %36, <2 x i64> %46
9185 ; CHECK-NEXT: %67 = select <2 x i1> %57, <2 x i64> %37, <2 x i64> %47
9186 ; CHECK-NEXT: %68 = select <2 x i1> %58, <2 x i64> %38, <2 x i64> %48
9187 ; CHECK-NEXT: store <2 x i64> %60, <2 x i64>* %0, align 16
9188 ; CHECK-NEXT: store <2 x i64> %61, <2 x i64>* %1, align 16
9189 ; CHECK-NEXT: store <2 x i64> %62, <2 x i64>* %2, align 16
9190 ; CHECK-NEXT: store <2 x i64> %63, <2 x i64>* %3, align 16
9191 ; CHECK-NEXT: store <2 x i64> %64, <2 x i64>* %4, align 16
9192 ; CHECK-NEXT: store <2 x i64> %65, <2 x i64>* %5, align 16
9193 ; CHECK-NEXT: store <2 x i64> %66, <2 x i64>* %6, align 16
9194 ; CHECK-NEXT: store <2 x i64> %67, <2 x i64>* %7, align 16
9195 ; CHECK-NEXT: store <2 x i64> %68, <2 x i64>* %8, align 16
9196 ; CHECK-NEXT: ret <2 x i64> %59
9197 ; CHECK-NEXT: }
9198
9199 define <20 x i64> @icmp_ugt_on_20xi64(<20 x i64>, <20 x i64>, <20 x i64>, <20 x i64>) {
9200 entry:
9201 %4 = icmp ugt <20 x i64> %0, %1
9202 %5 = select <20 x i1> %4, <20 x i64> %2, <20 x i64> %3
9203 ret <20 x i64> %5
9204 }
9205 ; CHECK-LABEL: define <2 x i64> @icmp_ugt_on_20xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64 >* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferen ceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocaptu re nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16) , <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i 64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> , <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, < 2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
9206 ; CHECK: entry:
9207 ; CHECK-NEXT: %49 = icmp ugt <2 x i64> %9, %19
9208 ; CHECK-NEXT: %50 = icmp ugt <2 x i64> %10, %20
9209 ; CHECK-NEXT: %51 = icmp ugt <2 x i64> %11, %21
9210 ; CHECK-NEXT: %52 = icmp ugt <2 x i64> %12, %22
9211 ; CHECK-NEXT: %53 = icmp ugt <2 x i64> %13, %23
9212 ; CHECK-NEXT: %54 = icmp ugt <2 x i64> %14, %24
9213 ; CHECK-NEXT: %55 = icmp ugt <2 x i64> %15, %25
9214 ; CHECK-NEXT: %56 = icmp ugt <2 x i64> %16, %26
9215 ; CHECK-NEXT: %57 = icmp ugt <2 x i64> %17, %27
9216 ; CHECK-NEXT: %58 = icmp ugt <2 x i64> %18, %28
9217 ; CHECK-NEXT: %59 = select <2 x i1> %49, <2 x i64> %29, <2 x i64> %39
9218 ; CHECK-NEXT: %60 = select <2 x i1> %50, <2 x i64> %30, <2 x i64> %40
9219 ; CHECK-NEXT: %61 = select <2 x i1> %51, <2 x i64> %31, <2 x i64> %41
9220 ; CHECK-NEXT: %62 = select <2 x i1> %52, <2 x i64> %32, <2 x i64> %42
9221 ; CHECK-NEXT: %63 = select <2 x i1> %53, <2 x i64> %33, <2 x i64> %43
9222 ; CHECK-NEXT: %64 = select <2 x i1> %54, <2 x i64> %34, <2 x i64> %44
9223 ; CHECK-NEXT: %65 = select <2 x i1> %55, <2 x i64> %35, <2 x i64> %45
9224 ; CHECK-NEXT: %66 = select <2 x i1> %56, <2 x i64> %36, <2 x i64> %46
9225 ; CHECK-NEXT: %67 = select <2 x i1> %57, <2 x i64> %37, <2 x i64> %47
9226 ; CHECK-NEXT: %68 = select <2 x i1> %58, <2 x i64> %38, <2 x i64> %48
9227 ; CHECK-NEXT: store <2 x i64> %60, <2 x i64>* %0, align 16
9228 ; CHECK-NEXT: store <2 x i64> %61, <2 x i64>* %1, align 16
9229 ; CHECK-NEXT: store <2 x i64> %62, <2 x i64>* %2, align 16
9230 ; CHECK-NEXT: store <2 x i64> %63, <2 x i64>* %3, align 16
9231 ; CHECK-NEXT: store <2 x i64> %64, <2 x i64>* %4, align 16
9232 ; CHECK-NEXT: store <2 x i64> %65, <2 x i64>* %5, align 16
9233 ; CHECK-NEXT: store <2 x i64> %66, <2 x i64>* %6, align 16
9234 ; CHECK-NEXT: store <2 x i64> %67, <2 x i64>* %7, align 16
9235 ; CHECK-NEXT: store <2 x i64> %68, <2 x i64>* %8, align 16
9236 ; CHECK-NEXT: ret <2 x i64> %59
9237 ; CHECK-NEXT: }
9238
9239 define <20 x i64> @icmp_sge_on_20xi64(<20 x i64>, <20 x i64>, <20 x i64>, <20 x i64>) {
9240 entry:
9241 %4 = icmp sge <20 x i64> %0, %1
9242 %5 = select <20 x i1> %4, <20 x i64> %2, <20 x i64> %3
9243 ret <20 x i64> %5
9244 }
9245 ; CHECK-LABEL: define <2 x i64> @icmp_sge_on_20xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64 >* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferen ceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocaptu re nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16) , <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i 64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> , <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, < 2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
9246 ; CHECK: entry:
9247 ; CHECK-NEXT: %49 = icmp sge <2 x i64> %9, %19
9248 ; CHECK-NEXT: %50 = icmp sge <2 x i64> %10, %20
9249 ; CHECK-NEXT: %51 = icmp sge <2 x i64> %11, %21
9250 ; CHECK-NEXT: %52 = icmp sge <2 x i64> %12, %22
9251 ; CHECK-NEXT: %53 = icmp sge <2 x i64> %13, %23
9252 ; CHECK-NEXT: %54 = icmp sge <2 x i64> %14, %24
9253 ; CHECK-NEXT: %55 = icmp sge <2 x i64> %15, %25
9254 ; CHECK-NEXT: %56 = icmp sge <2 x i64> %16, %26
9255 ; CHECK-NEXT: %57 = icmp sge <2 x i64> %17, %27
9256 ; CHECK-NEXT: %58 = icmp sge <2 x i64> %18, %28
9257 ; CHECK-NEXT: %59 = select <2 x i1> %49, <2 x i64> %29, <2 x i64> %39
9258 ; CHECK-NEXT: %60 = select <2 x i1> %50, <2 x i64> %30, <2 x i64> %40
9259 ; CHECK-NEXT: %61 = select <2 x i1> %51, <2 x i64> %31, <2 x i64> %41
9260 ; CHECK-NEXT: %62 = select <2 x i1> %52, <2 x i64> %32, <2 x i64> %42
9261 ; CHECK-NEXT: %63 = select <2 x i1> %53, <2 x i64> %33, <2 x i64> %43
9262 ; CHECK-NEXT: %64 = select <2 x i1> %54, <2 x i64> %34, <2 x i64> %44
9263 ; CHECK-NEXT: %65 = select <2 x i1> %55, <2 x i64> %35, <2 x i64> %45
9264 ; CHECK-NEXT: %66 = select <2 x i1> %56, <2 x i64> %36, <2 x i64> %46
9265 ; CHECK-NEXT: %67 = select <2 x i1> %57, <2 x i64> %37, <2 x i64> %47
9266 ; CHECK-NEXT: %68 = select <2 x i1> %58, <2 x i64> %38, <2 x i64> %48
9267 ; CHECK-NEXT: store <2 x i64> %60, <2 x i64>* %0, align 16
9268 ; CHECK-NEXT: store <2 x i64> %61, <2 x i64>* %1, align 16
9269 ; CHECK-NEXT: store <2 x i64> %62, <2 x i64>* %2, align 16
9270 ; CHECK-NEXT: store <2 x i64> %63, <2 x i64>* %3, align 16
9271 ; CHECK-NEXT: store <2 x i64> %64, <2 x i64>* %4, align 16
9272 ; CHECK-NEXT: store <2 x i64> %65, <2 x i64>* %5, align 16
9273 ; CHECK-NEXT: store <2 x i64> %66, <2 x i64>* %6, align 16
9274 ; CHECK-NEXT: store <2 x i64> %67, <2 x i64>* %7, align 16
9275 ; CHECK-NEXT: store <2 x i64> %68, <2 x i64>* %8, align 16
9276 ; CHECK-NEXT: ret <2 x i64> %59
9277 ; CHECK-NEXT: }
9278
9279 define <20 x i64> @icmp_uge_on_20xi64(<20 x i64>, <20 x i64>, <20 x i64>, <20 x i64>) {
9280 entry:
9281 %4 = icmp uge <20 x i64> %0, %1
9282 %5 = select <20 x i1> %4, <20 x i64> %2, <20 x i64> %3
9283 ret <20 x i64> %5
9284 }
9285 ; CHECK-LABEL: define <2 x i64> @icmp_uge_on_20xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64 >* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferen ceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocaptu re nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16) , <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i 64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> , <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, < 2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
9286 ; CHECK: entry:
9287 ; CHECK-NEXT: %49 = icmp uge <2 x i64> %9, %19
9288 ; CHECK-NEXT: %50 = icmp uge <2 x i64> %10, %20
9289 ; CHECK-NEXT: %51 = icmp uge <2 x i64> %11, %21
9290 ; CHECK-NEXT: %52 = icmp uge <2 x i64> %12, %22
9291 ; CHECK-NEXT: %53 = icmp uge <2 x i64> %13, %23
9292 ; CHECK-NEXT: %54 = icmp uge <2 x i64> %14, %24
9293 ; CHECK-NEXT: %55 = icmp uge <2 x i64> %15, %25
9294 ; CHECK-NEXT: %56 = icmp uge <2 x i64> %16, %26
9295 ; CHECK-NEXT: %57 = icmp uge <2 x i64> %17, %27
9296 ; CHECK-NEXT: %58 = icmp uge <2 x i64> %18, %28
9297 ; CHECK-NEXT: %59 = select <2 x i1> %49, <2 x i64> %29, <2 x i64> %39
9298 ; CHECK-NEXT: %60 = select <2 x i1> %50, <2 x i64> %30, <2 x i64> %40
9299 ; CHECK-NEXT: %61 = select <2 x i1> %51, <2 x i64> %31, <2 x i64> %41
9300 ; CHECK-NEXT: %62 = select <2 x i1> %52, <2 x i64> %32, <2 x i64> %42
9301 ; CHECK-NEXT: %63 = select <2 x i1> %53, <2 x i64> %33, <2 x i64> %43
9302 ; CHECK-NEXT: %64 = select <2 x i1> %54, <2 x i64> %34, <2 x i64> %44
9303 ; CHECK-NEXT: %65 = select <2 x i1> %55, <2 x i64> %35, <2 x i64> %45
9304 ; CHECK-NEXT: %66 = select <2 x i1> %56, <2 x i64> %36, <2 x i64> %46
9305 ; CHECK-NEXT: %67 = select <2 x i1> %57, <2 x i64> %37, <2 x i64> %47
9306 ; CHECK-NEXT: %68 = select <2 x i1> %58, <2 x i64> %38, <2 x i64> %48
9307 ; CHECK-NEXT: store <2 x i64> %60, <2 x i64>* %0, align 16
9308 ; CHECK-NEXT: store <2 x i64> %61, <2 x i64>* %1, align 16
9309 ; CHECK-NEXT: store <2 x i64> %62, <2 x i64>* %2, align 16
9310 ; CHECK-NEXT: store <2 x i64> %63, <2 x i64>* %3, align 16
9311 ; CHECK-NEXT: store <2 x i64> %64, <2 x i64>* %4, align 16
9312 ; CHECK-NEXT: store <2 x i64> %65, <2 x i64>* %5, align 16
9313 ; CHECK-NEXT: store <2 x i64> %66, <2 x i64>* %6, align 16
9314 ; CHECK-NEXT: store <2 x i64> %67, <2 x i64>* %7, align 16
9315 ; CHECK-NEXT: store <2 x i64> %68, <2 x i64>* %8, align 16
9316 ; CHECK-NEXT: ret <2 x i64> %59
9317 ; CHECK-NEXT: }
9318
9319 define <20 x i64> @icmp_slt_on_20xi64(<20 x i64>, <20 x i64>, <20 x i64>, <20 x i64>) {
9320 entry:
9321 %4 = icmp slt <20 x i64> %0, %1
9322 %5 = select <20 x i1> %4, <20 x i64> %2, <20 x i64> %3
9323 ret <20 x i64> %5
9324 }
9325 ; CHECK-LABEL: define <2 x i64> @icmp_slt_on_20xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64 >* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferen ceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocaptu re nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16) , <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i 64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> , <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, < 2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
9326 ; CHECK: entry:
9327 ; CHECK-NEXT: %49 = icmp slt <2 x i64> %9, %19
9328 ; CHECK-NEXT: %50 = icmp slt <2 x i64> %10, %20
9329 ; CHECK-NEXT: %51 = icmp slt <2 x i64> %11, %21
9330 ; CHECK-NEXT: %52 = icmp slt <2 x i64> %12, %22
9331 ; CHECK-NEXT: %53 = icmp slt <2 x i64> %13, %23
9332 ; CHECK-NEXT: %54 = icmp slt <2 x i64> %14, %24
9333 ; CHECK-NEXT: %55 = icmp slt <2 x i64> %15, %25
9334 ; CHECK-NEXT: %56 = icmp slt <2 x i64> %16, %26
9335 ; CHECK-NEXT: %57 = icmp slt <2 x i64> %17, %27
9336 ; CHECK-NEXT: %58 = icmp slt <2 x i64> %18, %28
9337 ; CHECK-NEXT: %59 = select <2 x i1> %49, <2 x i64> %29, <2 x i64> %39
9338 ; CHECK-NEXT: %60 = select <2 x i1> %50, <2 x i64> %30, <2 x i64> %40
9339 ; CHECK-NEXT: %61 = select <2 x i1> %51, <2 x i64> %31, <2 x i64> %41
9340 ; CHECK-NEXT: %62 = select <2 x i1> %52, <2 x i64> %32, <2 x i64> %42
9341 ; CHECK-NEXT: %63 = select <2 x i1> %53, <2 x i64> %33, <2 x i64> %43
9342 ; CHECK-NEXT: %64 = select <2 x i1> %54, <2 x i64> %34, <2 x i64> %44
9343 ; CHECK-NEXT: %65 = select <2 x i1> %55, <2 x i64> %35, <2 x i64> %45
9344 ; CHECK-NEXT: %66 = select <2 x i1> %56, <2 x i64> %36, <2 x i64> %46
9345 ; CHECK-NEXT: %67 = select <2 x i1> %57, <2 x i64> %37, <2 x i64> %47
9346 ; CHECK-NEXT: %68 = select <2 x i1> %58, <2 x i64> %38, <2 x i64> %48
9347 ; CHECK-NEXT: store <2 x i64> %60, <2 x i64>* %0, align 16
9348 ; CHECK-NEXT: store <2 x i64> %61, <2 x i64>* %1, align 16
9349 ; CHECK-NEXT: store <2 x i64> %62, <2 x i64>* %2, align 16
9350 ; CHECK-NEXT: store <2 x i64> %63, <2 x i64>* %3, align 16
9351 ; CHECK-NEXT: store <2 x i64> %64, <2 x i64>* %4, align 16
9352 ; CHECK-NEXT: store <2 x i64> %65, <2 x i64>* %5, align 16
9353 ; CHECK-NEXT: store <2 x i64> %66, <2 x i64>* %6, align 16
9354 ; CHECK-NEXT: store <2 x i64> %67, <2 x i64>* %7, align 16
9355 ; CHECK-NEXT: store <2 x i64> %68, <2 x i64>* %8, align 16
9356 ; CHECK-NEXT: ret <2 x i64> %59
9357 ; CHECK-NEXT: }
9358
9359 define <20 x i64> @icmp_ult_on_20xi64(<20 x i64>, <20 x i64>, <20 x i64>, <20 x i64>) {
9360 entry:
9361 %4 = icmp ult <20 x i64> %0, %1
9362 %5 = select <20 x i1> %4, <20 x i64> %2, <20 x i64> %3
9363 ret <20 x i64> %5
9364 }
9365 ; CHECK-LABEL: define <2 x i64> @icmp_ult_on_20xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64 >* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferen ceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocaptu re nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16) , <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i 64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> , <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, < 2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
9366 ; CHECK: entry:
9367 ; CHECK-NEXT: %49 = icmp ult <2 x i64> %9, %19
9368 ; CHECK-NEXT: %50 = icmp ult <2 x i64> %10, %20
9369 ; CHECK-NEXT: %51 = icmp ult <2 x i64> %11, %21
9370 ; CHECK-NEXT: %52 = icmp ult <2 x i64> %12, %22
9371 ; CHECK-NEXT: %53 = icmp ult <2 x i64> %13, %23
9372 ; CHECK-NEXT: %54 = icmp ult <2 x i64> %14, %24
9373 ; CHECK-NEXT: %55 = icmp ult <2 x i64> %15, %25
9374 ; CHECK-NEXT: %56 = icmp ult <2 x i64> %16, %26
9375 ; CHECK-NEXT: %57 = icmp ult <2 x i64> %17, %27
9376 ; CHECK-NEXT: %58 = icmp ult <2 x i64> %18, %28
9377 ; CHECK-NEXT: %59 = select <2 x i1> %49, <2 x i64> %29, <2 x i64> %39
9378 ; CHECK-NEXT: %60 = select <2 x i1> %50, <2 x i64> %30, <2 x i64> %40
9379 ; CHECK-NEXT: %61 = select <2 x i1> %51, <2 x i64> %31, <2 x i64> %41
9380 ; CHECK-NEXT: %62 = select <2 x i1> %52, <2 x i64> %32, <2 x i64> %42
9381 ; CHECK-NEXT: %63 = select <2 x i1> %53, <2 x i64> %33, <2 x i64> %43
9382 ; CHECK-NEXT: %64 = select <2 x i1> %54, <2 x i64> %34, <2 x i64> %44
9383 ; CHECK-NEXT: %65 = select <2 x i1> %55, <2 x i64> %35, <2 x i64> %45
9384 ; CHECK-NEXT: %66 = select <2 x i1> %56, <2 x i64> %36, <2 x i64> %46
9385 ; CHECK-NEXT: %67 = select <2 x i1> %57, <2 x i64> %37, <2 x i64> %47
9386 ; CHECK-NEXT: %68 = select <2 x i1> %58, <2 x i64> %38, <2 x i64> %48
9387 ; CHECK-NEXT: store <2 x i64> %60, <2 x i64>* %0, align 16
9388 ; CHECK-NEXT: store <2 x i64> %61, <2 x i64>* %1, align 16
9389 ; CHECK-NEXT: store <2 x i64> %62, <2 x i64>* %2, align 16
9390 ; CHECK-NEXT: store <2 x i64> %63, <2 x i64>* %3, align 16
9391 ; CHECK-NEXT: store <2 x i64> %64, <2 x i64>* %4, align 16
9392 ; CHECK-NEXT: store <2 x i64> %65, <2 x i64>* %5, align 16
9393 ; CHECK-NEXT: store <2 x i64> %66, <2 x i64>* %6, align 16
9394 ; CHECK-NEXT: store <2 x i64> %67, <2 x i64>* %7, align 16
9395 ; CHECK-NEXT: store <2 x i64> %68, <2 x i64>* %8, align 16
9396 ; CHECK-NEXT: ret <2 x i64> %59
9397 ; CHECK-NEXT: }
9398
9399 define <20 x i64> @icmp_sle_on_20xi64(<20 x i64>, <20 x i64>, <20 x i64>, <20 x i64>) {
9400 entry:
9401 %4 = icmp sle <20 x i64> %0, %1
9402 %5 = select <20 x i1> %4, <20 x i64> %2, <20 x i64> %3
9403 ret <20 x i64> %5
9404 }
9405 ; CHECK-LABEL: define <2 x i64> @icmp_sle_on_20xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64 >* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferen ceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocaptu re nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16) , <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i 64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> , <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, < 2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
9406 ; CHECK: entry:
9407 ; CHECK-NEXT: %49 = icmp sle <2 x i64> %9, %19
9408 ; CHECK-NEXT: %50 = icmp sle <2 x i64> %10, %20
9409 ; CHECK-NEXT: %51 = icmp sle <2 x i64> %11, %21
9410 ; CHECK-NEXT: %52 = icmp sle <2 x i64> %12, %22
9411 ; CHECK-NEXT: %53 = icmp sle <2 x i64> %13, %23
9412 ; CHECK-NEXT: %54 = icmp sle <2 x i64> %14, %24
9413 ; CHECK-NEXT: %55 = icmp sle <2 x i64> %15, %25
9414 ; CHECK-NEXT: %56 = icmp sle <2 x i64> %16, %26
9415 ; CHECK-NEXT: %57 = icmp sle <2 x i64> %17, %27
9416 ; CHECK-NEXT: %58 = icmp sle <2 x i64> %18, %28
9417 ; CHECK-NEXT: %59 = select <2 x i1> %49, <2 x i64> %29, <2 x i64> %39
9418 ; CHECK-NEXT: %60 = select <2 x i1> %50, <2 x i64> %30, <2 x i64> %40
9419 ; CHECK-NEXT: %61 = select <2 x i1> %51, <2 x i64> %31, <2 x i64> %41
9420 ; CHECK-NEXT: %62 = select <2 x i1> %52, <2 x i64> %32, <2 x i64> %42
9421 ; CHECK-NEXT: %63 = select <2 x i1> %53, <2 x i64> %33, <2 x i64> %43
9422 ; CHECK-NEXT: %64 = select <2 x i1> %54, <2 x i64> %34, <2 x i64> %44
9423 ; CHECK-NEXT: %65 = select <2 x i1> %55, <2 x i64> %35, <2 x i64> %45
9424 ; CHECK-NEXT: %66 = select <2 x i1> %56, <2 x i64> %36, <2 x i64> %46
9425 ; CHECK-NEXT: %67 = select <2 x i1> %57, <2 x i64> %37, <2 x i64> %47
9426 ; CHECK-NEXT: %68 = select <2 x i1> %58, <2 x i64> %38, <2 x i64> %48
9427 ; CHECK-NEXT: store <2 x i64> %60, <2 x i64>* %0, align 16
9428 ; CHECK-NEXT: store <2 x i64> %61, <2 x i64>* %1, align 16
9429 ; CHECK-NEXT: store <2 x i64> %62, <2 x i64>* %2, align 16
9430 ; CHECK-NEXT: store <2 x i64> %63, <2 x i64>* %3, align 16
9431 ; CHECK-NEXT: store <2 x i64> %64, <2 x i64>* %4, align 16
9432 ; CHECK-NEXT: store <2 x i64> %65, <2 x i64>* %5, align 16
9433 ; CHECK-NEXT: store <2 x i64> %66, <2 x i64>* %6, align 16
9434 ; CHECK-NEXT: store <2 x i64> %67, <2 x i64>* %7, align 16
9435 ; CHECK-NEXT: store <2 x i64> %68, <2 x i64>* %8, align 16
9436 ; CHECK-NEXT: ret <2 x i64> %59
9437 ; CHECK-NEXT: }
9438
9439 define <20 x i64> @icmp_ule_on_20xi64(<20 x i64>, <20 x i64>, <20 x i64>, <20 x i64>) {
9440 entry:
9441 %4 = icmp ule <20 x i64> %0, %1
9442 %5 = select <20 x i1> %4, <20 x i64> %2, <20 x i64> %3
9443 ret <20 x i64> %5
9444 }
9445 ; CHECK-LABEL: define <2 x i64> @icmp_ule_on_20xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64 >* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferen ceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocaptu re nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16) , <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i 64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> , <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, < 2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>) {
9446 ; CHECK: entry:
9447 ; CHECK-NEXT: %49 = icmp ule <2 x i64> %9, %19
9448 ; CHECK-NEXT: %50 = icmp ule <2 x i64> %10, %20
9449 ; CHECK-NEXT: %51 = icmp ule <2 x i64> %11, %21
9450 ; CHECK-NEXT: %52 = icmp ule <2 x i64> %12, %22
9451 ; CHECK-NEXT: %53 = icmp ule <2 x i64> %13, %23
9452 ; CHECK-NEXT: %54 = icmp ule <2 x i64> %14, %24
9453 ; CHECK-NEXT: %55 = icmp ule <2 x i64> %15, %25
9454 ; CHECK-NEXT: %56 = icmp ule <2 x i64> %16, %26
9455 ; CHECK-NEXT: %57 = icmp ule <2 x i64> %17, %27
9456 ; CHECK-NEXT: %58 = icmp ule <2 x i64> %18, %28
9457 ; CHECK-NEXT: %59 = select <2 x i1> %49, <2 x i64> %29, <2 x i64> %39
9458 ; CHECK-NEXT: %60 = select <2 x i1> %50, <2 x i64> %30, <2 x i64> %40
9459 ; CHECK-NEXT: %61 = select <2 x i1> %51, <2 x i64> %31, <2 x i64> %41
9460 ; CHECK-NEXT: %62 = select <2 x i1> %52, <2 x i64> %32, <2 x i64> %42
9461 ; CHECK-NEXT: %63 = select <2 x i1> %53, <2 x i64> %33, <2 x i64> %43
9462 ; CHECK-NEXT: %64 = select <2 x i1> %54, <2 x i64> %34, <2 x i64> %44
9463 ; CHECK-NEXT: %65 = select <2 x i1> %55, <2 x i64> %35, <2 x i64> %45
9464 ; CHECK-NEXT: %66 = select <2 x i1> %56, <2 x i64> %36, <2 x i64> %46
9465 ; CHECK-NEXT: %67 = select <2 x i1> %57, <2 x i64> %37, <2 x i64> %47
9466 ; CHECK-NEXT: %68 = select <2 x i1> %58, <2 x i64> %38, <2 x i64> %48
9467 ; CHECK-NEXT: store <2 x i64> %60, <2 x i64>* %0, align 16
9468 ; CHECK-NEXT: store <2 x i64> %61, <2 x i64>* %1, align 16
9469 ; CHECK-NEXT: store <2 x i64> %62, <2 x i64>* %2, align 16
9470 ; CHECK-NEXT: store <2 x i64> %63, <2 x i64>* %3, align 16
9471 ; CHECK-NEXT: store <2 x i64> %64, <2 x i64>* %4, align 16
9472 ; CHECK-NEXT: store <2 x i64> %65, <2 x i64>* %5, align 16
9473 ; CHECK-NEXT: store <2 x i64> %66, <2 x i64>* %6, align 16
9474 ; CHECK-NEXT: store <2 x i64> %67, <2 x i64>* %7, align 16
9475 ; CHECK-NEXT: store <2 x i64> %68, <2 x i64>* %8, align 16
9476 ; CHECK-NEXT: ret <2 x i64> %59
9477 ; CHECK-NEXT: }
9478
9479 define <20 x i8*> @icmp_eq_on_20xi8ptr(<20 x i8*>, <20 x i8*>, <20 x i8*>, <20 x i8*>) {
9480 entry:
9481 %4 = icmp eq <20 x i8*> %0, %1
9482 %5 = select <20 x i1> %4, <20 x i8*> %2, <20 x i8*> %3
9483 ret <20 x i8*> %5
9484 }
9485 ; CHECK-LABEL: define <4 x i8*> @icmp_eq_on_20xi8ptr(<4 x i8*>* nocapture nonnul l dereferenceable(16), <4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8 *>* nocapture nonnull dereferenceable(16), <4 x i8*>* nocapture nonnull derefere nceable(16), <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, < 4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
9486 ; CHECK: entry:
9487 ; CHECK-NEXT: %24 = icmp eq <4 x i8*> %4, %9
9488 ; CHECK-NEXT: %25 = icmp eq <4 x i8*> %5, %10
9489 ; CHECK-NEXT: %26 = icmp eq <4 x i8*> %6, %11
9490 ; CHECK-NEXT: %27 = icmp eq <4 x i8*> %7, %12
9491 ; CHECK-NEXT: %28 = icmp eq <4 x i8*> %8, %13
9492 ; CHECK-NEXT: %29 = select <4 x i1> %24, <4 x i8*> %14, <4 x i8*> %19
9493 ; CHECK-NEXT: %30 = select <4 x i1> %25, <4 x i8*> %15, <4 x i8*> %20
9494 ; CHECK-NEXT: %31 = select <4 x i1> %26, <4 x i8*> %16, <4 x i8*> %21
9495 ; CHECK-NEXT: %32 = select <4 x i1> %27, <4 x i8*> %17, <4 x i8*> %22
9496 ; CHECK-NEXT: %33 = select <4 x i1> %28, <4 x i8*> %18, <4 x i8*> %23
9497 ; CHECK-NEXT: store <4 x i8*> %30, <4 x i8*>* %0, align 16
9498 ; CHECK-NEXT: store <4 x i8*> %31, <4 x i8*>* %1, align 16
9499 ; CHECK-NEXT: store <4 x i8*> %32, <4 x i8*>* %2, align 16
9500 ; CHECK-NEXT: store <4 x i8*> %33, <4 x i8*>* %3, align 16
9501 ; CHECK-NEXT: ret <4 x i8*> %29
9502 ; CHECK-NEXT: }
9503
9504 define <20 x i8*> @icmp_ne_on_20xi8ptr(<20 x i8*>, <20 x i8*>, <20 x i8*>, <20 x i8*>) {
9505 entry:
9506 %4 = icmp ne <20 x i8*> %0, %1
9507 %5 = select <20 x i1> %4, <20 x i8*> %2, <20 x i8*> %3
9508 ret <20 x i8*> %5
9509 }
9510 ; CHECK-LABEL: define <4 x i8*> @icmp_ne_on_20xi8ptr(<4 x i8*>* nocapture nonnul l dereferenceable(16), <4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i8 *>* nocapture nonnull dereferenceable(16), <4 x i8*>* nocapture nonnull derefere nceable(16), <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, < 4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
9511 ; CHECK: entry:
9512 ; CHECK-NEXT: %24 = icmp ne <4 x i8*> %4, %9
9513 ; CHECK-NEXT: %25 = icmp ne <4 x i8*> %5, %10
9514 ; CHECK-NEXT: %26 = icmp ne <4 x i8*> %6, %11
9515 ; CHECK-NEXT: %27 = icmp ne <4 x i8*> %7, %12
9516 ; CHECK-NEXT: %28 = icmp ne <4 x i8*> %8, %13
9517 ; CHECK-NEXT: %29 = select <4 x i1> %24, <4 x i8*> %14, <4 x i8*> %19
9518 ; CHECK-NEXT: %30 = select <4 x i1> %25, <4 x i8*> %15, <4 x i8*> %20
9519 ; CHECK-NEXT: %31 = select <4 x i1> %26, <4 x i8*> %16, <4 x i8*> %21
9520 ; CHECK-NEXT: %32 = select <4 x i1> %27, <4 x i8*> %17, <4 x i8*> %22
9521 ; CHECK-NEXT: %33 = select <4 x i1> %28, <4 x i8*> %18, <4 x i8*> %23
9522 ; CHECK-NEXT: store <4 x i8*> %30, <4 x i8*>* %0, align 16
9523 ; CHECK-NEXT: store <4 x i8*> %31, <4 x i8*>* %1, align 16
9524 ; CHECK-NEXT: store <4 x i8*> %32, <4 x i8*>* %2, align 16
9525 ; CHECK-NEXT: store <4 x i8*> %33, <4 x i8*>* %3, align 16
9526 ; CHECK-NEXT: ret <4 x i8*> %29
9527 ; CHECK-NEXT: }
9528
9529 define <20 x i8*> @icmp_sgt_on_20xi8ptr(<20 x i8*>, <20 x i8*>, <20 x i8*>, <20 x i8*>) {
9530 entry:
9531 %4 = icmp sgt <20 x i8*> %0, %1
9532 %5 = select <20 x i1> %4, <20 x i8*> %2, <20 x i8*> %3
9533 ret <20 x i8*> %5
9534 }
9535 ; CHECK-LABEL: define <4 x i8*> @icmp_sgt_on_20xi8ptr(<4 x i8*>* nocapture nonnu ll dereferenceable(16), <4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i 8*>* nocapture nonnull dereferenceable(16), <4 x i8*>* nocapture nonnull derefer enceable(16), <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
9536 ; CHECK: entry:
9537 ; CHECK-NEXT: %24 = icmp sgt <4 x i8*> %4, %9
9538 ; CHECK-NEXT: %25 = icmp sgt <4 x i8*> %5, %10
9539 ; CHECK-NEXT: %26 = icmp sgt <4 x i8*> %6, %11
9540 ; CHECK-NEXT: %27 = icmp sgt <4 x i8*> %7, %12
9541 ; CHECK-NEXT: %28 = icmp sgt <4 x i8*> %8, %13
9542 ; CHECK-NEXT: %29 = select <4 x i1> %24, <4 x i8*> %14, <4 x i8*> %19
9543 ; CHECK-NEXT: %30 = select <4 x i1> %25, <4 x i8*> %15, <4 x i8*> %20
9544 ; CHECK-NEXT: %31 = select <4 x i1> %26, <4 x i8*> %16, <4 x i8*> %21
9545 ; CHECK-NEXT: %32 = select <4 x i1> %27, <4 x i8*> %17, <4 x i8*> %22
9546 ; CHECK-NEXT: %33 = select <4 x i1> %28, <4 x i8*> %18, <4 x i8*> %23
9547 ; CHECK-NEXT: store <4 x i8*> %30, <4 x i8*>* %0, align 16
9548 ; CHECK-NEXT: store <4 x i8*> %31, <4 x i8*>* %1, align 16
9549 ; CHECK-NEXT: store <4 x i8*> %32, <4 x i8*>* %2, align 16
9550 ; CHECK-NEXT: store <4 x i8*> %33, <4 x i8*>* %3, align 16
9551 ; CHECK-NEXT: ret <4 x i8*> %29
9552 ; CHECK-NEXT: }
9553
9554 define <20 x i8*> @icmp_ugt_on_20xi8ptr(<20 x i8*>, <20 x i8*>, <20 x i8*>, <20 x i8*>) {
9555 entry:
9556 %4 = icmp ugt <20 x i8*> %0, %1
9557 %5 = select <20 x i1> %4, <20 x i8*> %2, <20 x i8*> %3
9558 ret <20 x i8*> %5
9559 }
9560 ; CHECK-LABEL: define <4 x i8*> @icmp_ugt_on_20xi8ptr(<4 x i8*>* nocapture nonnu ll dereferenceable(16), <4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i 8*>* nocapture nonnull dereferenceable(16), <4 x i8*>* nocapture nonnull derefer enceable(16), <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
9561 ; CHECK: entry:
9562 ; CHECK-NEXT: %24 = icmp ugt <4 x i8*> %4, %9
9563 ; CHECK-NEXT: %25 = icmp ugt <4 x i8*> %5, %10
9564 ; CHECK-NEXT: %26 = icmp ugt <4 x i8*> %6, %11
9565 ; CHECK-NEXT: %27 = icmp ugt <4 x i8*> %7, %12
9566 ; CHECK-NEXT: %28 = icmp ugt <4 x i8*> %8, %13
9567 ; CHECK-NEXT: %29 = select <4 x i1> %24, <4 x i8*> %14, <4 x i8*> %19
9568 ; CHECK-NEXT: %30 = select <4 x i1> %25, <4 x i8*> %15, <4 x i8*> %20
9569 ; CHECK-NEXT: %31 = select <4 x i1> %26, <4 x i8*> %16, <4 x i8*> %21
9570 ; CHECK-NEXT: %32 = select <4 x i1> %27, <4 x i8*> %17, <4 x i8*> %22
9571 ; CHECK-NEXT: %33 = select <4 x i1> %28, <4 x i8*> %18, <4 x i8*> %23
9572 ; CHECK-NEXT: store <4 x i8*> %30, <4 x i8*>* %0, align 16
9573 ; CHECK-NEXT: store <4 x i8*> %31, <4 x i8*>* %1, align 16
9574 ; CHECK-NEXT: store <4 x i8*> %32, <4 x i8*>* %2, align 16
9575 ; CHECK-NEXT: store <4 x i8*> %33, <4 x i8*>* %3, align 16
9576 ; CHECK-NEXT: ret <4 x i8*> %29
9577 ; CHECK-NEXT: }
9578
9579 define <20 x i8*> @icmp_sge_on_20xi8ptr(<20 x i8*>, <20 x i8*>, <20 x i8*>, <20 x i8*>) {
9580 entry:
9581 %4 = icmp sge <20 x i8*> %0, %1
9582 %5 = select <20 x i1> %4, <20 x i8*> %2, <20 x i8*> %3
9583 ret <20 x i8*> %5
9584 }
9585 ; CHECK-LABEL: define <4 x i8*> @icmp_sge_on_20xi8ptr(<4 x i8*>* nocapture nonnu ll dereferenceable(16), <4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i 8*>* nocapture nonnull dereferenceable(16), <4 x i8*>* nocapture nonnull derefer enceable(16), <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
9586 ; CHECK: entry:
9587 ; CHECK-NEXT: %24 = icmp sge <4 x i8*> %4, %9
9588 ; CHECK-NEXT: %25 = icmp sge <4 x i8*> %5, %10
9589 ; CHECK-NEXT: %26 = icmp sge <4 x i8*> %6, %11
9590 ; CHECK-NEXT: %27 = icmp sge <4 x i8*> %7, %12
9591 ; CHECK-NEXT: %28 = icmp sge <4 x i8*> %8, %13
9592 ; CHECK-NEXT: %29 = select <4 x i1> %24, <4 x i8*> %14, <4 x i8*> %19
9593 ; CHECK-NEXT: %30 = select <4 x i1> %25, <4 x i8*> %15, <4 x i8*> %20
9594 ; CHECK-NEXT: %31 = select <4 x i1> %26, <4 x i8*> %16, <4 x i8*> %21
9595 ; CHECK-NEXT: %32 = select <4 x i1> %27, <4 x i8*> %17, <4 x i8*> %22
9596 ; CHECK-NEXT: %33 = select <4 x i1> %28, <4 x i8*> %18, <4 x i8*> %23
9597 ; CHECK-NEXT: store <4 x i8*> %30, <4 x i8*>* %0, align 16
9598 ; CHECK-NEXT: store <4 x i8*> %31, <4 x i8*>* %1, align 16
9599 ; CHECK-NEXT: store <4 x i8*> %32, <4 x i8*>* %2, align 16
9600 ; CHECK-NEXT: store <4 x i8*> %33, <4 x i8*>* %3, align 16
9601 ; CHECK-NEXT: ret <4 x i8*> %29
9602 ; CHECK-NEXT: }
9603
9604 define <20 x i8*> @icmp_uge_on_20xi8ptr(<20 x i8*>, <20 x i8*>, <20 x i8*>, <20 x i8*>) {
9605 entry:
9606 %4 = icmp uge <20 x i8*> %0, %1
9607 %5 = select <20 x i1> %4, <20 x i8*> %2, <20 x i8*> %3
9608 ret <20 x i8*> %5
9609 }
9610 ; CHECK-LABEL: define <4 x i8*> @icmp_uge_on_20xi8ptr(<4 x i8*>* nocapture nonnu ll dereferenceable(16), <4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i 8*>* nocapture nonnull dereferenceable(16), <4 x i8*>* nocapture nonnull derefer enceable(16), <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
9611 ; CHECK: entry:
9612 ; CHECK-NEXT: %24 = icmp uge <4 x i8*> %4, %9
9613 ; CHECK-NEXT: %25 = icmp uge <4 x i8*> %5, %10
9614 ; CHECK-NEXT: %26 = icmp uge <4 x i8*> %6, %11
9615 ; CHECK-NEXT: %27 = icmp uge <4 x i8*> %7, %12
9616 ; CHECK-NEXT: %28 = icmp uge <4 x i8*> %8, %13
9617 ; CHECK-NEXT: %29 = select <4 x i1> %24, <4 x i8*> %14, <4 x i8*> %19
9618 ; CHECK-NEXT: %30 = select <4 x i1> %25, <4 x i8*> %15, <4 x i8*> %20
9619 ; CHECK-NEXT: %31 = select <4 x i1> %26, <4 x i8*> %16, <4 x i8*> %21
9620 ; CHECK-NEXT: %32 = select <4 x i1> %27, <4 x i8*> %17, <4 x i8*> %22
9621 ; CHECK-NEXT: %33 = select <4 x i1> %28, <4 x i8*> %18, <4 x i8*> %23
9622 ; CHECK-NEXT: store <4 x i8*> %30, <4 x i8*>* %0, align 16
9623 ; CHECK-NEXT: store <4 x i8*> %31, <4 x i8*>* %1, align 16
9624 ; CHECK-NEXT: store <4 x i8*> %32, <4 x i8*>* %2, align 16
9625 ; CHECK-NEXT: store <4 x i8*> %33, <4 x i8*>* %3, align 16
9626 ; CHECK-NEXT: ret <4 x i8*> %29
9627 ; CHECK-NEXT: }
9628
9629 define <20 x i8*> @icmp_slt_on_20xi8ptr(<20 x i8*>, <20 x i8*>, <20 x i8*>, <20 x i8*>) {
9630 entry:
9631 %4 = icmp slt <20 x i8*> %0, %1
9632 %5 = select <20 x i1> %4, <20 x i8*> %2, <20 x i8*> %3
9633 ret <20 x i8*> %5
9634 }
9635 ; CHECK-LABEL: define <4 x i8*> @icmp_slt_on_20xi8ptr(<4 x i8*>* nocapture nonnu ll dereferenceable(16), <4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i 8*>* nocapture nonnull dereferenceable(16), <4 x i8*>* nocapture nonnull derefer enceable(16), <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
9636 ; CHECK: entry:
9637 ; CHECK-NEXT: %24 = icmp slt <4 x i8*> %4, %9
9638 ; CHECK-NEXT: %25 = icmp slt <4 x i8*> %5, %10
9639 ; CHECK-NEXT: %26 = icmp slt <4 x i8*> %6, %11
9640 ; CHECK-NEXT: %27 = icmp slt <4 x i8*> %7, %12
9641 ; CHECK-NEXT: %28 = icmp slt <4 x i8*> %8, %13
9642 ; CHECK-NEXT: %29 = select <4 x i1> %24, <4 x i8*> %14, <4 x i8*> %19
9643 ; CHECK-NEXT: %30 = select <4 x i1> %25, <4 x i8*> %15, <4 x i8*> %20
9644 ; CHECK-NEXT: %31 = select <4 x i1> %26, <4 x i8*> %16, <4 x i8*> %21
9645 ; CHECK-NEXT: %32 = select <4 x i1> %27, <4 x i8*> %17, <4 x i8*> %22
9646 ; CHECK-NEXT: %33 = select <4 x i1> %28, <4 x i8*> %18, <4 x i8*> %23
9647 ; CHECK-NEXT: store <4 x i8*> %30, <4 x i8*>* %0, align 16
9648 ; CHECK-NEXT: store <4 x i8*> %31, <4 x i8*>* %1, align 16
9649 ; CHECK-NEXT: store <4 x i8*> %32, <4 x i8*>* %2, align 16
9650 ; CHECK-NEXT: store <4 x i8*> %33, <4 x i8*>* %3, align 16
9651 ; CHECK-NEXT: ret <4 x i8*> %29
9652 ; CHECK-NEXT: }
9653
9654 define <20 x i8*> @icmp_ult_on_20xi8ptr(<20 x i8*>, <20 x i8*>, <20 x i8*>, <20 x i8*>) {
9655 entry:
9656 %4 = icmp ult <20 x i8*> %0, %1
9657 %5 = select <20 x i1> %4, <20 x i8*> %2, <20 x i8*> %3
9658 ret <20 x i8*> %5
9659 }
9660 ; CHECK-LABEL: define <4 x i8*> @icmp_ult_on_20xi8ptr(<4 x i8*>* nocapture nonnu ll dereferenceable(16), <4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i 8*>* nocapture nonnull dereferenceable(16), <4 x i8*>* nocapture nonnull derefer enceable(16), <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
9661 ; CHECK: entry:
9662 ; CHECK-NEXT: %24 = icmp ult <4 x i8*> %4, %9
9663 ; CHECK-NEXT: %25 = icmp ult <4 x i8*> %5, %10
9664 ; CHECK-NEXT: %26 = icmp ult <4 x i8*> %6, %11
9665 ; CHECK-NEXT: %27 = icmp ult <4 x i8*> %7, %12
9666 ; CHECK-NEXT: %28 = icmp ult <4 x i8*> %8, %13
9667 ; CHECK-NEXT: %29 = select <4 x i1> %24, <4 x i8*> %14, <4 x i8*> %19
9668 ; CHECK-NEXT: %30 = select <4 x i1> %25, <4 x i8*> %15, <4 x i8*> %20
9669 ; CHECK-NEXT: %31 = select <4 x i1> %26, <4 x i8*> %16, <4 x i8*> %21
9670 ; CHECK-NEXT: %32 = select <4 x i1> %27, <4 x i8*> %17, <4 x i8*> %22
9671 ; CHECK-NEXT: %33 = select <4 x i1> %28, <4 x i8*> %18, <4 x i8*> %23
9672 ; CHECK-NEXT: store <4 x i8*> %30, <4 x i8*>* %0, align 16
9673 ; CHECK-NEXT: store <4 x i8*> %31, <4 x i8*>* %1, align 16
9674 ; CHECK-NEXT: store <4 x i8*> %32, <4 x i8*>* %2, align 16
9675 ; CHECK-NEXT: store <4 x i8*> %33, <4 x i8*>* %3, align 16
9676 ; CHECK-NEXT: ret <4 x i8*> %29
9677 ; CHECK-NEXT: }
9678
9679 define <20 x i8*> @icmp_sle_on_20xi8ptr(<20 x i8*>, <20 x i8*>, <20 x i8*>, <20 x i8*>) {
9680 entry:
9681 %4 = icmp sle <20 x i8*> %0, %1
9682 %5 = select <20 x i1> %4, <20 x i8*> %2, <20 x i8*> %3
9683 ret <20 x i8*> %5
9684 }
9685 ; CHECK-LABEL: define <4 x i8*> @icmp_sle_on_20xi8ptr(<4 x i8*>* nocapture nonnu ll dereferenceable(16), <4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i 8*>* nocapture nonnull dereferenceable(16), <4 x i8*>* nocapture nonnull derefer enceable(16), <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
9686 ; CHECK: entry:
9687 ; CHECK-NEXT: %24 = icmp sle <4 x i8*> %4, %9
9688 ; CHECK-NEXT: %25 = icmp sle <4 x i8*> %5, %10
9689 ; CHECK-NEXT: %26 = icmp sle <4 x i8*> %6, %11
9690 ; CHECK-NEXT: %27 = icmp sle <4 x i8*> %7, %12
9691 ; CHECK-NEXT: %28 = icmp sle <4 x i8*> %8, %13
9692 ; CHECK-NEXT: %29 = select <4 x i1> %24, <4 x i8*> %14, <4 x i8*> %19
9693 ; CHECK-NEXT: %30 = select <4 x i1> %25, <4 x i8*> %15, <4 x i8*> %20
9694 ; CHECK-NEXT: %31 = select <4 x i1> %26, <4 x i8*> %16, <4 x i8*> %21
9695 ; CHECK-NEXT: %32 = select <4 x i1> %27, <4 x i8*> %17, <4 x i8*> %22
9696 ; CHECK-NEXT: %33 = select <4 x i1> %28, <4 x i8*> %18, <4 x i8*> %23
9697 ; CHECK-NEXT: store <4 x i8*> %30, <4 x i8*>* %0, align 16
9698 ; CHECK-NEXT: store <4 x i8*> %31, <4 x i8*>* %1, align 16
9699 ; CHECK-NEXT: store <4 x i8*> %32, <4 x i8*>* %2, align 16
9700 ; CHECK-NEXT: store <4 x i8*> %33, <4 x i8*>* %3, align 16
9701 ; CHECK-NEXT: ret <4 x i8*> %29
9702 ; CHECK-NEXT: }
9703
9704 define <20 x i8*> @icmp_ule_on_20xi8ptr(<20 x i8*>, <20 x i8*>, <20 x i8*>, <20 x i8*>) {
9705 entry:
9706 %4 = icmp ule <20 x i8*> %0, %1
9707 %5 = select <20 x i1> %4, <20 x i8*> %2, <20 x i8*> %3
9708 ret <20 x i8*> %5
9709 }
9710 ; CHECK-LABEL: define <4 x i8*> @icmp_ule_on_20xi8ptr(<4 x i8*>* nocapture nonnu ll dereferenceable(16), <4 x i8*>* nocapture nonnull dereferenceable(16), <4 x i 8*>* nocapture nonnull dereferenceable(16), <4 x i8*>* nocapture nonnull derefer enceable(16), <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>, <4 x i8*>) {
9711 ; CHECK: entry:
9712 ; CHECK-NEXT: %24 = icmp ule <4 x i8*> %4, %9
9713 ; CHECK-NEXT: %25 = icmp ule <4 x i8*> %5, %10
9714 ; CHECK-NEXT: %26 = icmp ule <4 x i8*> %6, %11
9715 ; CHECK-NEXT: %27 = icmp ule <4 x i8*> %7, %12
9716 ; CHECK-NEXT: %28 = icmp ule <4 x i8*> %8, %13
9717 ; CHECK-NEXT: %29 = select <4 x i1> %24, <4 x i8*> %14, <4 x i8*> %19
9718 ; CHECK-NEXT: %30 = select <4 x i1> %25, <4 x i8*> %15, <4 x i8*> %20
9719 ; CHECK-NEXT: %31 = select <4 x i1> %26, <4 x i8*> %16, <4 x i8*> %21
9720 ; CHECK-NEXT: %32 = select <4 x i1> %27, <4 x i8*> %17, <4 x i8*> %22
9721 ; CHECK-NEXT: %33 = select <4 x i1> %28, <4 x i8*> %18, <4 x i8*> %23
9722 ; CHECK-NEXT: store <4 x i8*> %30, <4 x i8*>* %0, align 16
9723 ; CHECK-NEXT: store <4 x i8*> %31, <4 x i8*>* %1, align 16
9724 ; CHECK-NEXT: store <4 x i8*> %32, <4 x i8*>* %2, align 16
9725 ; CHECK-NEXT: store <4 x i8*> %33, <4 x i8*>* %3, align 16
9726 ; CHECK-NEXT: ret <4 x i8*> %29
9727 ; CHECK-NEXT: }
9728
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