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Unified Diff: src/IceInstARM32.def

Issue 1422753010: Subzero. ARM32. Address mode formation. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Addresses comment. Created 5 years, 1 month ago
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Index: src/IceInstARM32.def
diff --git a/src/IceInstARM32.def b/src/IceInstARM32.def
index 291a64af37cb0f912620f708efd4bb2be74ae5c8..b3d55b28385cfca213e75faf9979f28de62f76f3 100644
--- a/src/IceInstARM32.def
+++ b/src/IceInstARM32.def
@@ -289,23 +289,23 @@
// extending load/stores).
#define ICETYPEARM32_TABLE \
/* tag, element type, int_width, vec_width, addr bits sext, zext, \
- reg-reg addr allowed */ \
- X(IceType_void, IceType_void, "" , "" , 0 , 0 , 0) \
- X(IceType_i1, IceType_void, "b", "" , 8 , 12, 1) \
- X(IceType_i8, IceType_void, "b", "" , 8 , 12, 1) \
- X(IceType_i16, IceType_void, "h", "" , 8 , 8 , 1) \
- X(IceType_i32, IceType_void, "" , "" , 12, 12, 1) \
- X(IceType_i64, IceType_void, "d", "" , 0 , 0 , 0) \
- X(IceType_f32, IceType_void, "" , ".f32", 8, 8 , 0) \
- X(IceType_f64, IceType_void, "" , ".f64", 8, 8 , 0) \
- X(IceType_v4i1, IceType_i32 , "" , ".i32", 0 , 0 , 1) \
- X(IceType_v8i1, IceType_i16 , "" , ".i16", 0 , 0 , 1) \
- X(IceType_v16i1, IceType_i8 , "" , ".i8" , 0 , 0 , 1) \
- X(IceType_v16i8, IceType_i8 , "" , ".i8" , 0 , 0 , 1) \
- X(IceType_v8i16, IceType_i16 , "" , ".i16", 0 , 0 , 1) \
- X(IceType_v4i32, IceType_i32 , "" , ".i32", 0 , 0 , 1) \
- X(IceType_v4f32, IceType_f32 , "" , ".f32", 0 , 0 , 1)
-//#define X(tag, elementty, int_width, vec_width, sbits, ubits, rraddr)
+ reg-reg addr allowed, shift allowed, */ \
+ X(IceType_void, IceType_void, "" , "" , 0 , 0 , 0, 0) \
+ X(IceType_i1, IceType_void, "b", "" , 8 , 12, 1, 1) \
+ X(IceType_i8, IceType_void, "b", "" , 8 , 12, 1, 1) \
+ X(IceType_i16, IceType_void, "h", "" , 8 , 8 , 1, 0) \
+ X(IceType_i32, IceType_void, "" , "" , 12, 12, 1, 1) \
+ X(IceType_i64, IceType_void, "d", "" , 12, 12, 1, 1) \
+ X(IceType_f32, IceType_void, "" , ".f32", 8, 8 , 0, 0) \
+ X(IceType_f64, IceType_void, "" , ".f64", 8, 8 , 0, 0) \
+ X(IceType_v4i1, IceType_i32 , "" , ".i32", 0 , 0 , 1, 0) \
+ X(IceType_v8i1, IceType_i16 , "" , ".i16", 0 , 0 , 1, 0) \
+ X(IceType_v16i1, IceType_i8 , "" , ".i8" , 0 , 0 , 1, 0) \
+ X(IceType_v16i8, IceType_i8 , "" , ".i8" , 0 , 0 , 1, 0) \
+ X(IceType_v8i16, IceType_i16 , "" , ".i16", 0 , 0 , 1, 0) \
+ X(IceType_v4i32, IceType_i32 , "" , ".i32", 0 , 0 , 1, 0) \
+ X(IceType_v4f32, IceType_f32 , "" , ".f32", 0 , 0 , 1, 0)
+//#define X(tag, elementty, int_width, vec_width, sbits, ubits, rraddr, shaddr)
// Shifter types for Data-processing operands as defined in section A5.1.2.
#define ICEINSTARM32SHIFT_TABLE \
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