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Unified Diff: src/IceTargetLoweringX8632.cpp

Issue 1419903002: Subzero: Refactor x86 register definitions to use the alias mechanism. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Fix assembler unit tests. Fix register names. Code review changes. Rebase Created 5 years, 2 months ago
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Index: src/IceTargetLoweringX8632.cpp
diff --git a/src/IceTargetLoweringX8632.cpp b/src/IceTargetLoweringX8632.cpp
index dfb42d8392ec5105284990bc10aba62a5dbc26fc..6fab884abc42575d595145558d831b93e31a326e 100644
--- a/src/IceTargetLoweringX8632.cpp
+++ b/src/IceTargetLoweringX8632.cpp
@@ -438,8 +438,7 @@ void TargetX8632::addProlog(CfgNode *Node) {
size_t PreservedRegsSizeBytes = 0;
llvm::SmallBitVector Pushed(CalleeSaves.size());
for (SizeT i = 0; i < CalleeSaves.size(); ++i) {
- // SizeT Canonical = RegX8632::getCanonicalReg(i); // TODO(stichnot)
- SizeT Canonical = i;
+ SizeT Canonical = Traits::getBaseReg(i);
if (CalleeSaves[i] && RegsUsed[i]) {
Pushed[Canonical] = true;
}
@@ -611,18 +610,18 @@ void TargetX8632::addEpilog(CfgNode *Node) {
getRegisterSet(RegSet_CalleeSave, RegSet_None);
llvm::SmallBitVector Popped(CalleeSaves.size());
for (SizeT i = 0; i < CalleeSaves.size(); ++i) {
- // SizeT Canonical = RegX8632::getCanonicalReg(i); // TODO(stichnot)
- SizeT Canonical = i;
+ SizeT Canonical = Traits::getBaseReg(i);
if (CalleeSaves[i] && RegsUsed[i]) {
Popped[Canonical] = true;
}
}
for (SizeT i = 0; i < Popped.size(); ++i) {
SizeT j = Popped.size() - i - 1;
+ SizeT Canonical = Traits::getBaseReg(j);
if (j == Traits::RegisterSet::Reg_ebp && IsEbpBasedFrame)
continue;
if (Popped[j]) {
- _pop(getPhysicalRegister(j));
+ _pop(getPhysicalRegister(Canonical));
}
}
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