MIPS: [turbofan] Properly implement Float64/32 Min/Max instructions.

src/compiler/mips64/code-generator-mips64.cc

Index: src/compiler/mips64/code-generator-mips64.cc
diff --git a/src/compiler/mips64/code-generator-mips64.cc b/src/compiler/mips64/code-generator-mips64.cc
index a52359d120aeb762b58c59c8e8aba6691b12de35..3acc75c7f7575dba2ec59abd93d4fae32f91b744 100644
--- a/src/compiler/mips64/code-generator-mips64.cc
+++ b/src/compiler/mips64/code-generator-mips64.cc
@@ -786,6 +786,62 @@ void CodeGenerator::AssembleArchInstruction(Instruction* instr) {
       ASSEMBLE_ROUND_DOUBLE_TO_DOUBLE(ceil_l_d, Ceil);
       break;
     }
+    case kMips64Float64Max: {
+      // (b < a) ? a : b
+      if (kArchVariant == kMips64r6) {

[paul.l..., 2015/11/02 22:35:12]

Please see comments in mips32 version, they all apply here.

+        __ cmp(OLT, L, kScratchDoubleReg, i.InputDoubleRegister(0),
+               i.InputDoubleRegister(1));
+        __ sel_d(i.OutputSingleRegister(), i.InputDoubleRegister(1),
+                 kScratchDoubleReg);
+      } else {
+        __ c(OLT, D, i.InputDoubleRegister(0), i.InputDoubleRegister(1));
+        // Left operand is result, passthrough if false.
+        __ movt_d(i.OutputSingleRegister(), i.InputDoubleRegister(1));
+      }
+      break;
+    }
+    case kMips64Float64Min: {
+      // (a < b) ? a : b
+      if (kArchVariant == kMips64r6) {
+        __ cmp(OLT, L, kScratchDoubleReg, i.InputDoubleRegister(0),
+               i.InputDoubleRegister(1));
+        __ sel_d(i.OutputSingleRegister(), i.InputDoubleRegister(1),
+                 kScratchDoubleReg);
+      } else {
+        __ c(OLT, D, i.InputDoubleRegister(1), i.InputDoubleRegister(0));
+        // Right operand is result, passthrough if false.
+        __ movt_d(i.OutputSingleRegister(), i.InputDoubleRegister(1));
+      }
+      break;
+    }
+    case kMips64Float32Max: {
+      // (b < a) ? a : b
+      if (kArchVariant == kMips64r6) {
+        __ cmp(OLT, W, kScratchDoubleReg, i.InputDoubleRegister(0),
+               i.InputDoubleRegister(1));
+        __ sel_s(i.OutputSingleRegister(), i.InputDoubleRegister(1),
+                 kScratchDoubleReg);
+      } else {
+        __ c(OLT, S, i.InputDoubleRegister(0), i.InputDoubleRegister(1));
+        // Left operand is result, passthrough if false.
+        __ movt_s(i.OutputSingleRegister(), i.InputDoubleRegister(1));
+      }
+      break;
+    }
+    case kMips64Float32Min: {
+      // (a < b) ? a : b
+      if (kArchVariant == kMips64r6) {
+        __ cmp(OLT, W, kScratchDoubleReg, i.InputDoubleRegister(0),
+               i.InputDoubleRegister(1));
+        __ sel_d(i.OutputSingleRegister(), i.InputDoubleRegister(1),
+                 kScratchDoubleReg);
+      } else {
+        __ c(OLT, S, i.InputDoubleRegister(1), i.InputDoubleRegister(0));
+        // Right operand is result, passthrough if false.
+        __ movt_s(i.OutputSingleRegister(), i.InputDoubleRegister(1));
+      }
+      break;
+    }
     case kMips64CvtSD:
       __ cvt_s_d(i.OutputSingleRegister(), i.InputDoubleRegister(0));
       break;