Index: src/x64/macro-assembler-x64.cc |
diff --git a/src/x64/macro-assembler-x64.cc b/src/x64/macro-assembler-x64.cc |
index ef3d1554da7f151fb91f119b3e923e228e022912..4a6ed90c8be070f1783177729f0a4c721ebb43ac 100644 |
--- a/src/x64/macro-assembler-x64.cc |
+++ b/src/x64/macro-assembler-x64.cc |
@@ -2529,6 +2529,16 @@ void MacroAssembler::Move(XMMRegister dst, uint64_t src) { |
} |
+void MacroAssembler::Movaps(XMMRegister dst, XMMRegister src) { |
+ if (CpuFeatures::IsSupported(AVX)) { |
+ CpuFeatureScope scope(this, AVX); |
+ vmovaps(dst, src); |
+ } else { |
+ movaps(dst, src); |
+ } |
+} |
+ |
+ |
void MacroAssembler::Movapd(XMMRegister dst, XMMRegister src) { |
if (CpuFeatures::IsSupported(AVX)) { |
CpuFeatureScope scope(this, AVX); |
@@ -2542,7 +2552,7 @@ void MacroAssembler::Movapd(XMMRegister dst, XMMRegister src) { |
void MacroAssembler::Movsd(XMMRegister dst, XMMRegister src) { |
if (CpuFeatures::IsSupported(AVX)) { |
CpuFeatureScope scope(this, AVX); |
- vmovsd(dst, src); |
+ vmovsd(dst, dst, src); |
} else { |
movsd(dst, src); |
} |
@@ -2569,6 +2579,16 @@ void MacroAssembler::Movsd(const Operand& dst, XMMRegister src) { |
} |
+void MacroAssembler::Movss(XMMRegister dst, XMMRegister src) { |
+ if (CpuFeatures::IsSupported(AVX)) { |
+ CpuFeatureScope scope(this, AVX); |
+ vmovss(dst, dst, src); |
+ } else { |
+ movss(dst, src); |
+ } |
+} |
+ |
+ |
void MacroAssembler::Movss(XMMRegister dst, const Operand& src) { |
if (CpuFeatures::IsSupported(AVX)) { |
CpuFeatureScope scope(this, AVX); |
@@ -3032,9 +3052,7 @@ void MacroAssembler::Pinsrd(XMMRegister dst, Register src, int8_t imm8) { |
punpckldq(dst, xmm0); |
} else { |
DCHECK_EQ(0, imm8); |
- psrlq(dst, 32); |
- punpckldq(xmm0, dst); |
- movaps(dst, xmm0); |
+ Movss(dst, xmm0); |
} |
} |
@@ -3051,9 +3069,7 @@ void MacroAssembler::Pinsrd(XMMRegister dst, const Operand& src, int8_t imm8) { |
punpckldq(dst, xmm0); |
} else { |
DCHECK_EQ(0, imm8); |
- psrlq(dst, 32); |
- punpckldq(xmm0, dst); |
- movaps(dst, xmm0); |
+ Movss(dst, xmm0); |
} |
} |