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Issue 1416663004: [x64] Replace movaps with appropriate vmov* instructions when AVX is enabled. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Created 5 years, 2 months ago
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1 // Copyright 2012 the V8 project authors. All rights reserved. 1 // Copyright 2012 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #if V8_TARGET_ARCH_X64 5 #if V8_TARGET_ARCH_X64
6 6
7 #include "src/base/bits.h" 7 #include "src/base/bits.h"
8 #include "src/base/division-by-constant.h" 8 #include "src/base/division-by-constant.h"
9 #include "src/bootstrapper.h" 9 #include "src/bootstrapper.h"
10 #include "src/codegen.h" 10 #include "src/codegen.h"
(...skipping 2511 matching lines...) Expand 10 before | Expand all | Expand 10 after
2522 Move(dst, lower); 2522 Move(dst, lower);
2523 } else { 2523 } else {
2524 movq(kScratchRegister, src); 2524 movq(kScratchRegister, src);
2525 Movq(dst, kScratchRegister); 2525 Movq(dst, kScratchRegister);
2526 } 2526 }
2527 } 2527 }
2528 } 2528 }
2529 } 2529 }
2530 2530
2531 2531
2532 void MacroAssembler::Movaps(XMMRegister dst, XMMRegister src) {
2533 if (CpuFeatures::IsSupported(AVX)) {
2534 CpuFeatureScope scope(this, AVX);
2535 vmovaps(dst, src);
2536 } else {
2537 movaps(dst, src);
2538 }
2539 }
2540
2541
2532 void MacroAssembler::Movapd(XMMRegister dst, XMMRegister src) { 2542 void MacroAssembler::Movapd(XMMRegister dst, XMMRegister src) {
2533 if (CpuFeatures::IsSupported(AVX)) { 2543 if (CpuFeatures::IsSupported(AVX)) {
2534 CpuFeatureScope scope(this, AVX); 2544 CpuFeatureScope scope(this, AVX);
2535 vmovapd(dst, src); 2545 vmovapd(dst, src);
2536 } else { 2546 } else {
2537 movapd(dst, src); 2547 movapd(dst, src);
2538 } 2548 }
2539 } 2549 }
2540 2550
2541 2551
2542 void MacroAssembler::Movsd(XMMRegister dst, XMMRegister src) { 2552 void MacroAssembler::Movsd(XMMRegister dst, XMMRegister src) {
2543 if (CpuFeatures::IsSupported(AVX)) { 2553 if (CpuFeatures::IsSupported(AVX)) {
2544 CpuFeatureScope scope(this, AVX); 2554 CpuFeatureScope scope(this, AVX);
2545 vmovsd(dst, src); 2555 vmovsd(dst, dst, src);
2546 } else { 2556 } else {
2547 movsd(dst, src); 2557 movsd(dst, src);
2548 } 2558 }
2549 } 2559 }
2550 2560
2551 2561
2552 void MacroAssembler::Movsd(XMMRegister dst, const Operand& src) { 2562 void MacroAssembler::Movsd(XMMRegister dst, const Operand& src) {
2553 if (CpuFeatures::IsSupported(AVX)) { 2563 if (CpuFeatures::IsSupported(AVX)) {
2554 CpuFeatureScope scope(this, AVX); 2564 CpuFeatureScope scope(this, AVX);
2555 vmovsd(dst, src); 2565 vmovsd(dst, src);
2556 } else { 2566 } else {
2557 movsd(dst, src); 2567 movsd(dst, src);
2558 } 2568 }
2559 } 2569 }
2560 2570
2561 2571
2562 void MacroAssembler::Movsd(const Operand& dst, XMMRegister src) { 2572 void MacroAssembler::Movsd(const Operand& dst, XMMRegister src) {
2563 if (CpuFeatures::IsSupported(AVX)) { 2573 if (CpuFeatures::IsSupported(AVX)) {
2564 CpuFeatureScope scope(this, AVX); 2574 CpuFeatureScope scope(this, AVX);
2565 vmovsd(dst, src); 2575 vmovsd(dst, src);
2566 } else { 2576 } else {
2567 movsd(dst, src); 2577 movsd(dst, src);
2568 } 2578 }
2569 } 2579 }
2570 2580
2571 2581
2582 void MacroAssembler::Movss(XMMRegister dst, XMMRegister src) {
2583 if (CpuFeatures::IsSupported(AVX)) {
2584 CpuFeatureScope scope(this, AVX);
2585 vmovss(dst, dst, src);
2586 } else {
2587 movss(dst, src);
2588 }
2589 }
2590
2591
2572 void MacroAssembler::Movss(XMMRegister dst, const Operand& src) { 2592 void MacroAssembler::Movss(XMMRegister dst, const Operand& src) {
2573 if (CpuFeatures::IsSupported(AVX)) { 2593 if (CpuFeatures::IsSupported(AVX)) {
2574 CpuFeatureScope scope(this, AVX); 2594 CpuFeatureScope scope(this, AVX);
2575 vmovss(dst, src); 2595 vmovss(dst, src);
2576 } else { 2596 } else {
2577 movss(dst, src); 2597 movss(dst, src);
2578 } 2598 }
2579 } 2599 }
2580 2600
2581 2601
(...skipping 443 matching lines...) Expand 10 before | Expand all | Expand 10 after
3025 if (CpuFeatures::IsSupported(SSE4_1)) { 3045 if (CpuFeatures::IsSupported(SSE4_1)) {
3026 CpuFeatureScope sse_scope(this, SSE4_1); 3046 CpuFeatureScope sse_scope(this, SSE4_1);
3027 pinsrd(dst, src, imm8); 3047 pinsrd(dst, src, imm8);
3028 return; 3048 return;
3029 } 3049 }
3030 Movd(xmm0, src); 3050 Movd(xmm0, src);
3031 if (imm8 == 1) { 3051 if (imm8 == 1) {
3032 punpckldq(dst, xmm0); 3052 punpckldq(dst, xmm0);
3033 } else { 3053 } else {
3034 DCHECK_EQ(0, imm8); 3054 DCHECK_EQ(0, imm8);
3035 psrlq(dst, 32); 3055 Movss(dst, xmm0);
3036 punpckldq(xmm0, dst);
3037 movaps(dst, xmm0);
3038 } 3056 }
3039 } 3057 }
3040 3058
3041 3059
3042 void MacroAssembler::Pinsrd(XMMRegister dst, const Operand& src, int8_t imm8) { 3060 void MacroAssembler::Pinsrd(XMMRegister dst, const Operand& src, int8_t imm8) {
3043 DCHECK(imm8 == 0 || imm8 == 1); 3061 DCHECK(imm8 == 0 || imm8 == 1);
3044 if (CpuFeatures::IsSupported(SSE4_1)) { 3062 if (CpuFeatures::IsSupported(SSE4_1)) {
3045 CpuFeatureScope sse_scope(this, SSE4_1); 3063 CpuFeatureScope sse_scope(this, SSE4_1);
3046 pinsrd(dst, src, imm8); 3064 pinsrd(dst, src, imm8);
3047 return; 3065 return;
3048 } 3066 }
3049 Movd(xmm0, src); 3067 Movd(xmm0, src);
3050 if (imm8 == 1) { 3068 if (imm8 == 1) {
3051 punpckldq(dst, xmm0); 3069 punpckldq(dst, xmm0);
3052 } else { 3070 } else {
3053 DCHECK_EQ(0, imm8); 3071 DCHECK_EQ(0, imm8);
3054 psrlq(dst, 32); 3072 Movss(dst, xmm0);
3055 punpckldq(xmm0, dst);
3056 movaps(dst, xmm0);
3057 } 3073 }
3058 } 3074 }
3059 3075
3060 3076
3061 void MacroAssembler::Lzcntl(Register dst, Register src) { 3077 void MacroAssembler::Lzcntl(Register dst, Register src) {
3062 if (CpuFeatures::IsSupported(LZCNT)) { 3078 if (CpuFeatures::IsSupported(LZCNT)) {
3063 CpuFeatureScope scope(this, LZCNT); 3079 CpuFeatureScope scope(this, LZCNT);
3064 lzcntl(dst, src); 3080 lzcntl(dst, src);
3065 return; 3081 return;
3066 } 3082 }
(...skipping 2244 matching lines...) Expand 10 before | Expand all | Expand 10 after
5311 movl(rax, dividend); 5327 movl(rax, dividend);
5312 shrl(rax, Immediate(31)); 5328 shrl(rax, Immediate(31));
5313 addl(rdx, rax); 5329 addl(rdx, rax);
5314 } 5330 }
5315 5331
5316 5332
5317 } // namespace internal 5333 } // namespace internal
5318 } // namespace v8 5334 } // namespace v8
5319 5335
5320 #endif // V8_TARGET_ARCH_X64 5336 #endif // V8_TARGET_ARCH_X64
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