Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(1597)

Issues Search
    My Issues | Starred     Open | Closed | All

Unified Diff: tests_lit/llvm2ice_tests/64bit.pnacl.ll

Issue 1414883007: Subzero. ARM32. Implements bool folding. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Addresses comments && pulls. Created 5 years, 1 month ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View side-by-side diff with in-line comments
Download patch
« no previous file with comments | « tests_lit/assembler/arm32/branch-mult-fwd.ll ('k') | tests_lit/llvm2ice_tests/bool-folding.ll » ('j') | no next file with comments »
Expand Comments ('e') | Collapse Comments ('c') | Show Comments Hide Comments ('s')
Index: tests_lit/llvm2ice_tests/64bit.pnacl.ll
diff --git a/tests_lit/llvm2ice_tests/64bit.pnacl.ll b/tests_lit/llvm2ice_tests/64bit.pnacl.ll
index 9333f512ec7126bc7f4d25091ceb0cf8250e268c..b2e997e6cb28d758be7172eba90c82219cbd0085 100644
--- a/tests_lit/llvm2ice_tests/64bit.pnacl.ll
+++ b/tests_lit/llvm2ice_tests/64bit.pnacl.ll
@@ -18,13 +18,13 @@
; RUN: --disassemble --target arm32 -i %s --args -O2 --skip-unimplemented \
; RUN: -allow-externally-defined-symbols \
; RUN: | %if --need=target_ARM32 --need=allow_dump \
-; RUN: --command FileCheck --check-prefix ARM32 %s
+; RUN: --command FileCheck --check-prefix ARM32 --check-prefix ARM32-O2 %s
; RUN: %if --need=target_ARM32 --need=allow_dump \
; RUN: --command %p2i --filetype=asm --assemble --disassemble --target arm32 \
; RUN: -i %s --args -Om1 --skip-unimplemented \
; RUN: -allow-externally-defined-symbols \
; RUN: | %if --need=target_ARM32 --need=allow_dump \
-; RUN: --command FileCheck --check-prefix ARM32 %s
+; RUN: --command FileCheck --check-prefix ARM32 --check-prefix ARM32-OM1 %s
@__init_array_start = internal constant [0 x i8] zeroinitializer, align 4
@__fini_array_start = internal constant [0 x i8] zeroinitializer, align 4
@@ -849,8 +849,11 @@ entry:
; OPTM1-NOT: and eax,0x1
; ARM32-LABEL: trunc64To1
-; ARM32: and r0, r0, #1
-; ARM32: and r0, r0, #1
+; ARM32-OM1: and r0, r0, #1
+; ARM32-OM1: and r0, r0, #1
+; ARM32-O2: tst r0, #1
+; ARM32-O2: moveq [[RES:r[0-9]+]], #0
+; ARM32-O2: movne [[RES]], #1
define internal i64 @sext32To64(i32 %a) {
entry:
@@ -921,8 +924,12 @@ entry:
; OPTM1: sar {{.*}},0x1f
; ARM32-LABEL: sext1To64
-; ARM32: lsl {{.*}}, #31
-; ARM32: asr {{.*}}, #31
+; ARM32-OM1: lsl {{.*}}, #31
+; ARM32-OM1: asr {{.*}}, #31
+; ARM32-O2: tst r0, #1
+; ARM32-O2: mvn [[M1:r[0-9]+]], #0
+; ARM32-O2: moveq [[RES:r[0-9]+]], #0
+; ARM32-O2: movne [[RES]], [[M1]]
define internal i64 @zext32To64(i32 %a) {
entry:
@@ -991,8 +998,11 @@ entry:
; OPTM1: mov {{.*}},0x0
; ARM32-LABEL: zext1To64
-; ARM32: and {{.*}}, #1
-; ARM32: mov {{.*}}, #0
+; ARM32-OM1: and {{.*}}, #1
+; ARM32-OM1: mov {{.*}}, #0
+; ARM32-O2: tst r0, #1
+; ARM32-O2: moveq {{[^,]*}}, #0
+; ARM32-O2: movne {{[^,]*}}, #1
define internal void @icmpEq64(i64 %a, i64 %b, i64 %c, i64 %d) {
entry:
@@ -1051,13 +1061,17 @@ if.end3: ; preds = %if.then2, %if.end
; ARM32-LABEL: icmpEq64
; ARM32: cmp
; ARM32: cmpeq
-; ARM32: moveq
-; ARM32: movne
+; ARM32-OM1: movne
+; ARM32-OM1: moveq
+; ARM32-OM1: cmp
+; ARM32-O2: bne
; ARM32: bl
; ARM32: cmp
; ARM32: cmpeq
-; ARM32: moveq
-; ARM32: movne
+; ARM32-OM1: movne
+; ARM32-OM1: moveq
+; ARM32-OM1: cmp
+; ARM32-O2: bne
; ARM32: bl
declare void @func()
@@ -1119,13 +1133,17 @@ if.end3: ; preds = %if.end, %if.then2
; ARM32-LABEL: icmpNe64
; ARM32: cmp
; ARM32: cmpeq
-; ARM32: movne
-; ARM32: moveq
+; ARM32-OM1: moveq
+; ARM32-OM1: movne
+; ARM32-OM1: cmp
+; ARM32-O2: beq
; ARM32: bl
; ARM32: cmp
; ARM32: cmpeq
-; ARM32: movne
-; ARM32: moveq
+; ARM32-OM1: moveq
+; ARM32-OM1: movne
+; ARM32-OM1: cmp
+; ARM32-O2: beq
; ARM32: bl
define internal void @icmpGt64(i64 %a, i64 %b, i64 %c, i64 %d) {
@@ -1171,13 +1189,17 @@ if.end3: ; preds = %if.then2, %if.end
; ARM32-LABEL: icmpGt64
; ARM32: cmp
; ARM32: cmpeq
-; ARM32: movhi
-; ARM32: movls
+; ARM32-OM1: movls
+; ARM32-OM1: movhi
+; ARM32-OM1: cmp
+; ARM32-O2: bls
; ARM32: bl
; ARM32: cmp
; ARM32: sbcs
-; ARM32: movlt
-; ARM32: movge
+; ARM32-OM1: movge
+; ARM32-OM1: movlt
+; ARM32-OM1: cmp
+; ARM32-O2: bge
; ARM32: bl
define internal void @icmpGe64(i64 %a, i64 %b, i64 %c, i64 %d) {
@@ -1223,13 +1245,17 @@ if.end3: ; preds = %if.end, %if.then2
; ARM32-LABEL: icmpGe64
; ARM32: cmp
; ARM32: cmpeq
-; ARM32: movcs
-; ARM32: movcc
+; ARM32-OM1: movcc
+; ARM32-OM1: movcs
+; ARM32-OM1: cmp
+; ARM32-O2: bcc
; ARM32: bl
; ARM32: cmp
; ARM32: sbcs
-; ARM32: movge
-; ARM32: movlt
+; ARM32-OM1: movlt
+; ARM32-OM1: movge
+; ARM32-OM1: cmp
+; ARM32-O2: blt
; ARM32: bl
define internal void @icmpLt64(i64 %a, i64 %b, i64 %c, i64 %d) {
@@ -1275,13 +1301,17 @@ if.end3: ; preds = %if.then2, %if.end
; ARM32-LABEL: icmpLt64
; ARM32: cmp
; ARM32: cmpeq
-; ARM32: movcc
-; ARM32: movcs
+; ARM32-OM1: movcs
+; ARM32-OM1: movcc
+; ARM32-OM1: cmp
+; ARM32-O2: bcs
; ARM32: bl
; ARM32: cmp
; ARM32: sbcs
-; ARM32: movlt
-; ARM32: movge
+; ARM32-OM1: movge
+; ARM32-OM1: movlt
+; ARM32-OM1: cmp
+; ARM32-O2: bge
; ARM32: bl
define internal void @icmpLe64(i64 %a, i64 %b, i64 %c, i64 %d) {
@@ -1327,13 +1357,16 @@ if.end3: ; preds = %if.end, %if.then2
; ARM32-LABEL: icmpLe64
; ARM32: cmp
; ARM32: cmpeq
-; ARM32: movls
-; ARM32: movhi
+; ARM32-OM1: movhi
+; ARM32-OM1: movls
+; ARM32-OM1: cmp
+; ARM32-O2: bhi
; ARM32: bl
; ARM32: cmp
; ARM32: sbcs
-; ARM32: movge
-; ARM32: movlt
+; ARM32-OM1: movlt
+; ARM32-OM1: movge
+; ARM32-O2: blt
; ARM32: bl
define internal i32 @icmpEq64Bool(i64 %a, i64 %b) {
@@ -1351,8 +1384,8 @@ entry:
; OPTM1: je
; ARM32-LABEL: icmpEq64Bool
-; ARM32: moveq
; ARM32: movne
+; ARM32: moveq
define internal i32 @icmpNe64Bool(i64 %a, i64 %b) {
entry:
@@ -1369,8 +1402,8 @@ entry:
; OPTM1: jne
; ARM32-LABEL: icmpNe64Bool
-; ARM32: movne
; ARM32: moveq
+; ARM32: movne
define internal i32 @icmpSgt64Bool(i64 %a, i64 %b) {
entry:
@@ -1395,8 +1428,8 @@ entry:
; ARM32-LABEL: icmpSgt64Bool
; ARM32: cmp
; ARM32: sbcs
-; ARM32: movlt
; ARM32: movge
+; ARM32: movlt
define internal i32 @icmpUgt64Bool(i64 %a, i64 %b) {
entry:
@@ -1421,8 +1454,8 @@ entry:
; ARM32-LABEL: icmpUgt64Bool
; ARM32: cmp
; ARM32: cmpeq
-; ARM32: movhi
; ARM32: movls
+; ARM32: movhi
define internal i32 @icmpSge64Bool(i64 %a, i64 %b) {
entry:
@@ -1447,8 +1480,8 @@ entry:
; ARM32-LABEL: icmpSge64Bool
; ARM32: cmp
; ARM32: sbcs
-; ARM32: movge
; ARM32: movlt
+; ARM32: movge
define internal i32 @icmpUge64Bool(i64 %a, i64 %b) {
entry:
@@ -1473,8 +1506,8 @@ entry:
; ARM32-LABEL: icmpUge64Bool
; ARM32: cmp
; ARM32: cmpeq
-; ARM32: movcs
; ARM32: movcc
+; ARM32: movcs
define internal i32 @icmpSlt64Bool(i64 %a, i64 %b) {
entry:
@@ -1499,8 +1532,8 @@ entry:
; ARM32-LABEL: icmpSlt64Bool
; ARM32: cmp
; ARM32: sbcs
-; ARM32: movlt
; ARM32: movge
+; ARM32: movlt
define internal i32 @icmpUlt64Bool(i64 %a, i64 %b) {
entry:
@@ -1525,8 +1558,8 @@ entry:
; ARM32-LABEL: icmpUlt64Bool
; ARM32: cmp
; ARM32: cmpeq
-; ARM32: movcc
; ARM32: movcs
+; ARM32: movcc
define internal i32 @icmpSle64Bool(i64 %a, i64 %b) {
entry:
@@ -1551,8 +1584,8 @@ entry:
; ARM32-LABEL: icmpSle64Bool
; ARM32: cmp
; ARM32: sbcs
-; ARM32: movge
; ARM32: movlt
+; ARM32: movge
define internal i32 @icmpUle64Bool(i64 %a, i64 %b) {
entry:
@@ -1577,8 +1610,8 @@ entry:
; ARM32-LABEL: icmpUle64Bool
; ARM32: cmp
; ARM32: cmpeq
-; ARM32: movls
; ARM32: movhi
+; ARM32: movls
define internal i64 @load64(i32 %a) {
entry:
@@ -1666,15 +1699,15 @@ entry:
; OPTM1: cmovne
; ARM32-LABEL: select64VarVar
-; The initial compare.
; ARM32: cmp
; ARM32: cmpeq
-; ARM32: movcc
-; ARM32: movcs
-; The non-folded compare for the select.
-; ARM32: cmp
-; ARM32: movne
-; ARM32: movne
+; ARM32-OM1: movcs
+; ARM32-OM1: movcc
+; ARM32-OM1: cmp
+; ARM32-OM1: movne
+; ARM32-O2: movcc
+; ARM32-OM1: movne
+; ARM32-O2: movcc
define internal i64 @select64VarConst(i64 %a, i64 %b) {
entry:
@@ -1703,15 +1736,17 @@ entry:
; ARM32-LABEL: select64VarConst
; ARM32: cmp
; ARM32: cmpeq
-; ARM32: movcc
-; ARM32: movcs
-; ARM32: cmp
+; ARM32-OM1: movcs
+; ARM32-OM1: movcc
+; ARM32-OM1: cmp
; ARM32: movw
; ARM32: movt
-; ARM32: movne
+; ARM32-OM1: movne
+; ARM32-O2: movcc
; ARM32: movw
; ARM32: movt
-; ARM32: movne
+; ARM32-OM1: movne
+; ARM32-O2: movcc
define internal i64 @select64ConstVar(i64 %a, i64 %b) {
entry:
@@ -1740,15 +1775,17 @@ entry:
; ARM32-LABEL: select64ConstVar
; ARM32: cmp
; ARM32: cmpeq
-; ARM32: movcc
-; ARM32: movcs
-; ARM32: cmp
+; ARM32-OM1: movcs
+; ARM32-OM1: movcc
+; ARM32-OM1: cmp
; ARM32: movw
; ARM32: movt
-; ARM32: movne
+; ARM32-OM1: movne
+; ARM32-O2: movcc
; ARM32: movw
; ARM32: movt
-; ARM32: movne
+; ARM32-OM1: movne
+; ARM32-O2: movcc
define internal void @icmpEq64Imm() {
entry:
« no previous file with comments | « tests_lit/assembler/arm32/branch-mult-fwd.ll ('k') | tests_lit/llvm2ice_tests/bool-folding.ll » ('j') | no next file with comments »

Powered by Google App Engine
This is Rietveld 408576698