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Issue 1414883007: Subzero. ARM32. Implements bool folding. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Addresses comments && pulls. Created 5 years, 1 month ago
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1 ; This tries to be a comprehensive test of i64 operations, in 1 ; This tries to be a comprehensive test of i64 operations, in
2 ; particular the patterns for lowering i64 operations into constituent 2 ; particular the patterns for lowering i64 operations into constituent
3 ; i32 operations on x86-32. 3 ; i32 operations on x86-32.
4 4
5 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \ 5 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \
6 ; RUN: --target x8632 -i %s --args -O2 -allow-externally-defined-symbols \ 6 ; RUN: --target x8632 -i %s --args -O2 -allow-externally-defined-symbols \
7 ; RUN: | %if --need=target_X8632 --command FileCheck %s 7 ; RUN: | %if --need=target_X8632 --command FileCheck %s
8 8
9 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \ 9 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \
10 ; RUN: --target x8632 -i %s --args -Om1 -allow-externally-defined-symbols \ 10 ; RUN: --target x8632 -i %s --args -Om1 -allow-externally-defined-symbols \
11 ; RUN: | %if --need=target_X8632 --command FileCheck --check-prefix=OPTM1 %s 11 ; RUN: | %if --need=target_X8632 --command FileCheck --check-prefix=OPTM1 %s
12 12
13 ; TODO(jvoung): Stop skipping unimplemented parts (via --skip-unimplemented) 13 ; TODO(jvoung): Stop skipping unimplemented parts (via --skip-unimplemented)
14 ; once enough infrastructure is in. Also, switch to --filetype=obj 14 ; once enough infrastructure is in. Also, switch to --filetype=obj
15 ; when possible. 15 ; when possible.
16 ; RUN: %if --need=target_ARM32 --need=allow_dump \ 16 ; RUN: %if --need=target_ARM32 --need=allow_dump \
17 ; RUN: --command %p2i --filetype=asm --assemble \ 17 ; RUN: --command %p2i --filetype=asm --assemble \
18 ; RUN: --disassemble --target arm32 -i %s --args -O2 --skip-unimplemented \ 18 ; RUN: --disassemble --target arm32 -i %s --args -O2 --skip-unimplemented \
19 ; RUN: -allow-externally-defined-symbols \ 19 ; RUN: -allow-externally-defined-symbols \
20 ; RUN: | %if --need=target_ARM32 --need=allow_dump \ 20 ; RUN: | %if --need=target_ARM32 --need=allow_dump \
21 ; RUN: --command FileCheck --check-prefix ARM32 %s 21 ; RUN: --command FileCheck --check-prefix ARM32 --check-prefix ARM32-O2 %s
22 ; RUN: %if --need=target_ARM32 --need=allow_dump \ 22 ; RUN: %if --need=target_ARM32 --need=allow_dump \
23 ; RUN: --command %p2i --filetype=asm --assemble --disassemble --target arm32 \ 23 ; RUN: --command %p2i --filetype=asm --assemble --disassemble --target arm32 \
24 ; RUN: -i %s --args -Om1 --skip-unimplemented \ 24 ; RUN: -i %s --args -Om1 --skip-unimplemented \
25 ; RUN: -allow-externally-defined-symbols \ 25 ; RUN: -allow-externally-defined-symbols \
26 ; RUN: | %if --need=target_ARM32 --need=allow_dump \ 26 ; RUN: | %if --need=target_ARM32 --need=allow_dump \
27 ; RUN: --command FileCheck --check-prefix ARM32 %s 27 ; RUN: --command FileCheck --check-prefix ARM32 --check-prefix ARM32-OM1 %s
28 28
29 @__init_array_start = internal constant [0 x i8] zeroinitializer, align 4 29 @__init_array_start = internal constant [0 x i8] zeroinitializer, align 4
30 @__fini_array_start = internal constant [0 x i8] zeroinitializer, align 4 30 @__fini_array_start = internal constant [0 x i8] zeroinitializer, align 4
31 @__tls_template_start = internal constant [0 x i8] zeroinitializer, align 8 31 @__tls_template_start = internal constant [0 x i8] zeroinitializer, align 8
32 @__tls_template_alignment = internal constant [4 x i8] c"\01\00\00\00", align 4 32 @__tls_template_alignment = internal constant [4 x i8] c"\01\00\00\00", align 4
33 33
34 define internal i32 @ignore64BitArg(i64 %a, i32 %b, i64 %c) { 34 define internal i32 @ignore64BitArg(i64 %a, i32 %b, i64 %c) {
35 entry: 35 entry:
36 ret i32 %b 36 ret i32 %b
37 } 37 }
(...skipping 804 matching lines...) Expand 10 before | Expand all | Expand 10 after
842 ; CHECK: mov eax,DWORD PTR [esp+0x4] 842 ; CHECK: mov eax,DWORD PTR [esp+0x4]
843 ; CHECK: and eax,0x1 843 ; CHECK: and eax,0x1
844 ; CHECK-NOT: and eax,0x1 844 ; CHECK-NOT: and eax,0x1
845 ; 845 ;
846 ; OPTM1-LABEL: trunc64To1 846 ; OPTM1-LABEL: trunc64To1
847 ; OPTM1: mov eax,DWORD PTR [esp+ 847 ; OPTM1: mov eax,DWORD PTR [esp+
848 ; OPTM1: and eax,0x1 848 ; OPTM1: and eax,0x1
849 ; OPTM1-NOT: and eax,0x1 849 ; OPTM1-NOT: and eax,0x1
850 850
851 ; ARM32-LABEL: trunc64To1 851 ; ARM32-LABEL: trunc64To1
852 ; ARM32: and r0, r0, #1 852 ; ARM32-OM1: and r0, r0, #1
853 ; ARM32: and r0, r0, #1 853 ; ARM32-OM1: and r0, r0, #1
854 ; ARM32-O2: tst r0, #1
855 ; ARM32-O2: moveq [[RES:r[0-9]+]], #0
856 ; ARM32-O2: movne [[RES]], #1
854 857
855 define internal i64 @sext32To64(i32 %a) { 858 define internal i64 @sext32To64(i32 %a) {
856 entry: 859 entry:
857 %conv = sext i32 %a to i64 860 %conv = sext i32 %a to i64
858 ret i64 %conv 861 ret i64 %conv
859 } 862 }
860 ; CHECK-LABEL: sext32To64 863 ; CHECK-LABEL: sext32To64
861 ; CHECK: mov 864 ; CHECK: mov
862 ; CHECK: sar {{.*}},0x1f 865 ; CHECK: sar {{.*}},0x1f
863 ; 866 ;
(...skipping 50 matching lines...) Expand 10 before | Expand all | Expand 10 after
914 ; CHECK: mov 917 ; CHECK: mov
915 ; CHECK: shl {{.*}},0x1f 918 ; CHECK: shl {{.*}},0x1f
916 ; CHECK: sar {{.*}},0x1f 919 ; CHECK: sar {{.*}},0x1f
917 ; 920 ;
918 ; OPTM1-LABEL: sext1To64 921 ; OPTM1-LABEL: sext1To64
919 ; OPTM1: mov 922 ; OPTM1: mov
920 ; OPTM1: shl {{.*}},0x1f 923 ; OPTM1: shl {{.*}},0x1f
921 ; OPTM1: sar {{.*}},0x1f 924 ; OPTM1: sar {{.*}},0x1f
922 925
923 ; ARM32-LABEL: sext1To64 926 ; ARM32-LABEL: sext1To64
924 ; ARM32: lsl {{.*}}, #31 927 ; ARM32-OM1: lsl {{.*}}, #31
925 ; ARM32: asr {{.*}}, #31 928 ; ARM32-OM1: asr {{.*}}, #31
929 ; ARM32-O2: tst r0, #1
930 ; ARM32-O2: mvn [[M1:r[0-9]+]], #0
931 ; ARM32-O2: moveq [[RES:r[0-9]+]], #0
932 ; ARM32-O2: movne [[RES]], [[M1]]
926 933
927 define internal i64 @zext32To64(i32 %a) { 934 define internal i64 @zext32To64(i32 %a) {
928 entry: 935 entry:
929 %conv = zext i32 %a to i64 936 %conv = zext i32 %a to i64
930 ret i64 %conv 937 ret i64 %conv
931 } 938 }
932 ; CHECK-LABEL: zext32To64 939 ; CHECK-LABEL: zext32To64
933 ; CHECK: mov 940 ; CHECK: mov
934 ; CHECK: mov {{.*}},0x0 941 ; CHECK: mov {{.*}},0x0
935 ; 942 ;
(...skipping 48 matching lines...) Expand 10 before | Expand all | Expand 10 after
984 } 991 }
985 ; CHECK-LABEL: zext1To64 992 ; CHECK-LABEL: zext1To64
986 ; CHECK: and {{.*}},0x1 993 ; CHECK: and {{.*}},0x1
987 ; CHECK: mov {{.*}},0x0 994 ; CHECK: mov {{.*}},0x0
988 ; 995 ;
989 ; OPTM1-LABEL: zext1To64 996 ; OPTM1-LABEL: zext1To64
990 ; OPTM1: and {{.*}},0x1 997 ; OPTM1: and {{.*}},0x1
991 ; OPTM1: mov {{.*}},0x0 998 ; OPTM1: mov {{.*}},0x0
992 999
993 ; ARM32-LABEL: zext1To64 1000 ; ARM32-LABEL: zext1To64
994 ; ARM32: and {{.*}}, #1 1001 ; ARM32-OM1: and {{.*}}, #1
995 ; ARM32: mov {{.*}}, #0 1002 ; ARM32-OM1: mov {{.*}}, #0
1003 ; ARM32-O2: tst r0, #1
1004 ; ARM32-O2: moveq {{[^,]*}}, #0
1005 ; ARM32-O2: movne {{[^,]*}}, #1
996 1006
997 define internal void @icmpEq64(i64 %a, i64 %b, i64 %c, i64 %d) { 1007 define internal void @icmpEq64(i64 %a, i64 %b, i64 %c, i64 %d) {
998 entry: 1008 entry:
999 %cmp = icmp eq i64 %a, %b 1009 %cmp = icmp eq i64 %a, %b
1000 br i1 %cmp, label %if.then, label %if.end 1010 br i1 %cmp, label %if.then, label %if.end
1001 1011
1002 if.then: ; preds = %entry 1012 if.then: ; preds = %entry
1003 call void @func() 1013 call void @func()
1004 br label %if.end 1014 br label %if.end
1005 1015
(...skipping 38 matching lines...) Expand 10 before | Expand all | Expand 10 after
1044 ; OPTM1-NEXT: je {{.*}} 1054 ; OPTM1-NEXT: je {{.*}}
1045 ; OPTM1-NEXT: mov [[RESULT]],0x0 1055 ; OPTM1-NEXT: mov [[RESULT]],0x0
1046 ; OPTM1-NEXT: cmp [[RESULT]],0x0 1056 ; OPTM1-NEXT: cmp [[RESULT]],0x0
1047 ; OPTM1-NEXT: jne 1057 ; OPTM1-NEXT: jne
1048 ; OPTM1-NEXT: jmp 1058 ; OPTM1-NEXT: jmp
1049 ; OPTM1-NEXT: call 1059 ; OPTM1-NEXT: call
1050 1060
1051 ; ARM32-LABEL: icmpEq64 1061 ; ARM32-LABEL: icmpEq64
1052 ; ARM32: cmp 1062 ; ARM32: cmp
1053 ; ARM32: cmpeq 1063 ; ARM32: cmpeq
1054 ; ARM32: moveq 1064 ; ARM32-OM1: movne
1055 ; ARM32: movne 1065 ; ARM32-OM1: moveq
1066 ; ARM32-OM1: cmp
1067 ; ARM32-O2: bne
1056 ; ARM32: bl 1068 ; ARM32: bl
1057 ; ARM32: cmp 1069 ; ARM32: cmp
1058 ; ARM32: cmpeq 1070 ; ARM32: cmpeq
1059 ; ARM32: moveq 1071 ; ARM32-OM1: movne
1060 ; ARM32: movne 1072 ; ARM32-OM1: moveq
1073 ; ARM32-OM1: cmp
1074 ; ARM32-O2: bne
1061 ; ARM32: bl 1075 ; ARM32: bl
1062 1076
1063 declare void @func() 1077 declare void @func()
1064 1078
1065 define internal void @icmpNe64(i64 %a, i64 %b, i64 %c, i64 %d) { 1079 define internal void @icmpNe64(i64 %a, i64 %b, i64 %c, i64 %d) {
1066 entry: 1080 entry:
1067 %cmp = icmp ne i64 %a, %b 1081 %cmp = icmp ne i64 %a, %b
1068 br i1 %cmp, label %if.then, label %if.end 1082 br i1 %cmp, label %if.then, label %if.end
1069 1083
1070 if.then: ; preds = %entry 1084 if.then: ; preds = %entry
(...skipping 41 matching lines...) Expand 10 before | Expand all | Expand 10 after
1112 ; OPTM1-NEXT: jne {{.*}} 1126 ; OPTM1-NEXT: jne {{.*}}
1113 ; OPTM1-NEXT: mov [[RESULT:.*]],0x0 1127 ; OPTM1-NEXT: mov [[RESULT:.*]],0x0
1114 ; OPTM1-NEXT: cmp [[RESULT]],0x0 1128 ; OPTM1-NEXT: cmp [[RESULT]],0x0
1115 ; OPTM1-NEXT: jne {{.*}} 1129 ; OPTM1-NEXT: jne {{.*}}
1116 ; OPTM1-NEXT: jmp {{.*}} 1130 ; OPTM1-NEXT: jmp {{.*}}
1117 ; OPTM1-NEXT: call 1131 ; OPTM1-NEXT: call
1118 1132
1119 ; ARM32-LABEL: icmpNe64 1133 ; ARM32-LABEL: icmpNe64
1120 ; ARM32: cmp 1134 ; ARM32: cmp
1121 ; ARM32: cmpeq 1135 ; ARM32: cmpeq
1122 ; ARM32: movne 1136 ; ARM32-OM1: moveq
1123 ; ARM32: moveq 1137 ; ARM32-OM1: movne
1138 ; ARM32-OM1: cmp
1139 ; ARM32-O2: beq
1124 ; ARM32: bl 1140 ; ARM32: bl
1125 ; ARM32: cmp 1141 ; ARM32: cmp
1126 ; ARM32: cmpeq 1142 ; ARM32: cmpeq
1127 ; ARM32: movne 1143 ; ARM32-OM1: moveq
1128 ; ARM32: moveq 1144 ; ARM32-OM1: movne
1145 ; ARM32-OM1: cmp
1146 ; ARM32-O2: beq
1129 ; ARM32: bl 1147 ; ARM32: bl
1130 1148
1131 define internal void @icmpGt64(i64 %a, i64 %b, i64 %c, i64 %d) { 1149 define internal void @icmpGt64(i64 %a, i64 %b, i64 %c, i64 %d) {
1132 entry: 1150 entry:
1133 %cmp = icmp ugt i64 %a, %b 1151 %cmp = icmp ugt i64 %a, %b
1134 br i1 %cmp, label %if.then, label %if.end 1152 br i1 %cmp, label %if.then, label %if.end
1135 1153
1136 if.then: ; preds = %entry 1154 if.then: ; preds = %entry
1137 call void @func() 1155 call void @func()
1138 br label %if.end 1156 br label %if.end
(...skipping 25 matching lines...) Expand all
1164 ; OPTM1: ja 1182 ; OPTM1: ja
1165 ; OPTM1: call 1183 ; OPTM1: call
1166 ; OPTM1: jg 1184 ; OPTM1: jg
1167 ; OPTM1: jl 1185 ; OPTM1: jl
1168 ; OPTM1: ja 1186 ; OPTM1: ja
1169 ; OPTM1: call 1187 ; OPTM1: call
1170 1188
1171 ; ARM32-LABEL: icmpGt64 1189 ; ARM32-LABEL: icmpGt64
1172 ; ARM32: cmp 1190 ; ARM32: cmp
1173 ; ARM32: cmpeq 1191 ; ARM32: cmpeq
1174 ; ARM32: movhi 1192 ; ARM32-OM1: movls
1175 ; ARM32: movls 1193 ; ARM32-OM1: movhi
1194 ; ARM32-OM1: cmp
1195 ; ARM32-O2: bls
1176 ; ARM32: bl 1196 ; ARM32: bl
1177 ; ARM32: cmp 1197 ; ARM32: cmp
1178 ; ARM32: sbcs 1198 ; ARM32: sbcs
1179 ; ARM32: movlt 1199 ; ARM32-OM1: movge
1180 ; ARM32: movge 1200 ; ARM32-OM1: movlt
1201 ; ARM32-OM1: cmp
1202 ; ARM32-O2: bge
1181 ; ARM32: bl 1203 ; ARM32: bl
1182 1204
1183 define internal void @icmpGe64(i64 %a, i64 %b, i64 %c, i64 %d) { 1205 define internal void @icmpGe64(i64 %a, i64 %b, i64 %c, i64 %d) {
1184 entry: 1206 entry:
1185 %cmp = icmp uge i64 %a, %b 1207 %cmp = icmp uge i64 %a, %b
1186 br i1 %cmp, label %if.then, label %if.end 1208 br i1 %cmp, label %if.then, label %if.end
1187 1209
1188 if.then: ; preds = %entry 1210 if.then: ; preds = %entry
1189 call void @func() 1211 call void @func()
1190 br label %if.end 1212 br label %if.end
(...skipping 25 matching lines...) Expand all
1216 ; OPTM1: jae 1238 ; OPTM1: jae
1217 ; OPTM1: call 1239 ; OPTM1: call
1218 ; OPTM1: jg 1240 ; OPTM1: jg
1219 ; OPTM1: jl 1241 ; OPTM1: jl
1220 ; OPTM1: jae 1242 ; OPTM1: jae
1221 ; OPTM1: call 1243 ; OPTM1: call
1222 1244
1223 ; ARM32-LABEL: icmpGe64 1245 ; ARM32-LABEL: icmpGe64
1224 ; ARM32: cmp 1246 ; ARM32: cmp
1225 ; ARM32: cmpeq 1247 ; ARM32: cmpeq
1226 ; ARM32: movcs 1248 ; ARM32-OM1: movcc
1227 ; ARM32: movcc 1249 ; ARM32-OM1: movcs
1250 ; ARM32-OM1: cmp
1251 ; ARM32-O2: bcc
1228 ; ARM32: bl 1252 ; ARM32: bl
1229 ; ARM32: cmp 1253 ; ARM32: cmp
1230 ; ARM32: sbcs 1254 ; ARM32: sbcs
1231 ; ARM32: movge 1255 ; ARM32-OM1: movlt
1232 ; ARM32: movlt 1256 ; ARM32-OM1: movge
1257 ; ARM32-OM1: cmp
1258 ; ARM32-O2: blt
1233 ; ARM32: bl 1259 ; ARM32: bl
1234 1260
1235 define internal void @icmpLt64(i64 %a, i64 %b, i64 %c, i64 %d) { 1261 define internal void @icmpLt64(i64 %a, i64 %b, i64 %c, i64 %d) {
1236 entry: 1262 entry:
1237 %cmp = icmp ult i64 %a, %b 1263 %cmp = icmp ult i64 %a, %b
1238 br i1 %cmp, label %if.then, label %if.end 1264 br i1 %cmp, label %if.then, label %if.end
1239 1265
1240 if.then: ; preds = %entry 1266 if.then: ; preds = %entry
1241 call void @func() 1267 call void @func()
1242 br label %if.end 1268 br label %if.end
(...skipping 25 matching lines...) Expand all
1268 ; OPTM1: jb 1294 ; OPTM1: jb
1269 ; OPTM1: call 1295 ; OPTM1: call
1270 ; OPTM1: jl 1296 ; OPTM1: jl
1271 ; OPTM1: jg 1297 ; OPTM1: jg
1272 ; OPTM1: jb 1298 ; OPTM1: jb
1273 ; OPTM1: call 1299 ; OPTM1: call
1274 1300
1275 ; ARM32-LABEL: icmpLt64 1301 ; ARM32-LABEL: icmpLt64
1276 ; ARM32: cmp 1302 ; ARM32: cmp
1277 ; ARM32: cmpeq 1303 ; ARM32: cmpeq
1278 ; ARM32: movcc 1304 ; ARM32-OM1: movcs
1279 ; ARM32: movcs 1305 ; ARM32-OM1: movcc
1306 ; ARM32-OM1: cmp
1307 ; ARM32-O2: bcs
1280 ; ARM32: bl 1308 ; ARM32: bl
1281 ; ARM32: cmp 1309 ; ARM32: cmp
1282 ; ARM32: sbcs 1310 ; ARM32: sbcs
1283 ; ARM32: movlt 1311 ; ARM32-OM1: movge
1284 ; ARM32: movge 1312 ; ARM32-OM1: movlt
1313 ; ARM32-OM1: cmp
1314 ; ARM32-O2: bge
1285 ; ARM32: bl 1315 ; ARM32: bl
1286 1316
1287 define internal void @icmpLe64(i64 %a, i64 %b, i64 %c, i64 %d) { 1317 define internal void @icmpLe64(i64 %a, i64 %b, i64 %c, i64 %d) {
1288 entry: 1318 entry:
1289 %cmp = icmp ule i64 %a, %b 1319 %cmp = icmp ule i64 %a, %b
1290 br i1 %cmp, label %if.then, label %if.end 1320 br i1 %cmp, label %if.then, label %if.end
1291 1321
1292 if.then: ; preds = %entry 1322 if.then: ; preds = %entry
1293 call void @func() 1323 call void @func()
1294 br label %if.end 1324 br label %if.end
(...skipping 25 matching lines...) Expand all
1320 ; OPTM1: jbe 1350 ; OPTM1: jbe
1321 ; OPTM1: call 1351 ; OPTM1: call
1322 ; OPTM1: jl 1352 ; OPTM1: jl
1323 ; OPTM1: jg 1353 ; OPTM1: jg
1324 ; OPTM1: jbe 1354 ; OPTM1: jbe
1325 ; OPTM1: call 1355 ; OPTM1: call
1326 1356
1327 ; ARM32-LABEL: icmpLe64 1357 ; ARM32-LABEL: icmpLe64
1328 ; ARM32: cmp 1358 ; ARM32: cmp
1329 ; ARM32: cmpeq 1359 ; ARM32: cmpeq
1330 ; ARM32: movls 1360 ; ARM32-OM1: movhi
1331 ; ARM32: movhi 1361 ; ARM32-OM1: movls
1362 ; ARM32-OM1: cmp
1363 ; ARM32-O2: bhi
1332 ; ARM32: bl 1364 ; ARM32: bl
1333 ; ARM32: cmp 1365 ; ARM32: cmp
1334 ; ARM32: sbcs 1366 ; ARM32: sbcs
1335 ; ARM32: movge 1367 ; ARM32-OM1: movlt
1336 ; ARM32: movlt 1368 ; ARM32-OM1: movge
1369 ; ARM32-O2: blt
1337 ; ARM32: bl 1370 ; ARM32: bl
1338 1371
1339 define internal i32 @icmpEq64Bool(i64 %a, i64 %b) { 1372 define internal i32 @icmpEq64Bool(i64 %a, i64 %b) {
1340 entry: 1373 entry:
1341 %cmp = icmp eq i64 %a, %b 1374 %cmp = icmp eq i64 %a, %b
1342 %cmp.ret_ext = zext i1 %cmp to i32 1375 %cmp.ret_ext = zext i1 %cmp to i32
1343 ret i32 %cmp.ret_ext 1376 ret i32 %cmp.ret_ext
1344 } 1377 }
1345 ; CHECK-LABEL: icmpEq64Bool 1378 ; CHECK-LABEL: icmpEq64Bool
1346 ; CHECK: jne 1379 ; CHECK: jne
1347 ; CHECK: je 1380 ; CHECK: je
1348 ; 1381 ;
1349 ; OPTM1-LABEL: icmpEq64Bool 1382 ; OPTM1-LABEL: icmpEq64Bool
1350 ; OPTM1: jne 1383 ; OPTM1: jne
1351 ; OPTM1: je 1384 ; OPTM1: je
1352 1385
1353 ; ARM32-LABEL: icmpEq64Bool 1386 ; ARM32-LABEL: icmpEq64Bool
1387 ; ARM32: movne
1354 ; ARM32: moveq 1388 ; ARM32: moveq
1355 ; ARM32: movne
1356 1389
1357 define internal i32 @icmpNe64Bool(i64 %a, i64 %b) { 1390 define internal i32 @icmpNe64Bool(i64 %a, i64 %b) {
1358 entry: 1391 entry:
1359 %cmp = icmp ne i64 %a, %b 1392 %cmp = icmp ne i64 %a, %b
1360 %cmp.ret_ext = zext i1 %cmp to i32 1393 %cmp.ret_ext = zext i1 %cmp to i32
1361 ret i32 %cmp.ret_ext 1394 ret i32 %cmp.ret_ext
1362 } 1395 }
1363 ; CHECK-LABEL: icmpNe64Bool 1396 ; CHECK-LABEL: icmpNe64Bool
1364 ; CHECK: jne 1397 ; CHECK: jne
1365 ; CHECK: jne 1398 ; CHECK: jne
1366 ; 1399 ;
1367 ; OPTM1-LABEL: icmpNe64Bool 1400 ; OPTM1-LABEL: icmpNe64Bool
1368 ; OPTM1: jne 1401 ; OPTM1: jne
1369 ; OPTM1: jne 1402 ; OPTM1: jne
1370 1403
1371 ; ARM32-LABEL: icmpNe64Bool 1404 ; ARM32-LABEL: icmpNe64Bool
1405 ; ARM32: moveq
1372 ; ARM32: movne 1406 ; ARM32: movne
1373 ; ARM32: moveq
1374 1407
1375 define internal i32 @icmpSgt64Bool(i64 %a, i64 %b) { 1408 define internal i32 @icmpSgt64Bool(i64 %a, i64 %b) {
1376 entry: 1409 entry:
1377 %cmp = icmp sgt i64 %a, %b 1410 %cmp = icmp sgt i64 %a, %b
1378 %cmp.ret_ext = zext i1 %cmp to i32 1411 %cmp.ret_ext = zext i1 %cmp to i32
1379 ret i32 %cmp.ret_ext 1412 ret i32 %cmp.ret_ext
1380 } 1413 }
1381 ; CHECK-LABEL: icmpSgt64Bool 1414 ; CHECK-LABEL: icmpSgt64Bool
1382 ; CHECK: cmp 1415 ; CHECK: cmp
1383 ; CHECK: jg 1416 ; CHECK: jg
1384 ; CHECK: jl 1417 ; CHECK: jl
1385 ; CHECK: cmp 1418 ; CHECK: cmp
1386 ; CHECK: ja 1419 ; CHECK: ja
1387 ; 1420 ;
1388 ; OPTM1-LABEL: icmpSgt64Bool 1421 ; OPTM1-LABEL: icmpSgt64Bool
1389 ; OPTM1: cmp 1422 ; OPTM1: cmp
1390 ; OPTM1: jg 1423 ; OPTM1: jg
1391 ; OPTM1: jl 1424 ; OPTM1: jl
1392 ; OPTM1: cmp 1425 ; OPTM1: cmp
1393 ; OPTM1: ja 1426 ; OPTM1: ja
1394 1427
1395 ; ARM32-LABEL: icmpSgt64Bool 1428 ; ARM32-LABEL: icmpSgt64Bool
1396 ; ARM32: cmp 1429 ; ARM32: cmp
1397 ; ARM32: sbcs 1430 ; ARM32: sbcs
1431 ; ARM32: movge
1398 ; ARM32: movlt 1432 ; ARM32: movlt
1399 ; ARM32: movge
1400 1433
1401 define internal i32 @icmpUgt64Bool(i64 %a, i64 %b) { 1434 define internal i32 @icmpUgt64Bool(i64 %a, i64 %b) {
1402 entry: 1435 entry:
1403 %cmp = icmp ugt i64 %a, %b 1436 %cmp = icmp ugt i64 %a, %b
1404 %cmp.ret_ext = zext i1 %cmp to i32 1437 %cmp.ret_ext = zext i1 %cmp to i32
1405 ret i32 %cmp.ret_ext 1438 ret i32 %cmp.ret_ext
1406 } 1439 }
1407 ; CHECK-LABEL: icmpUgt64Bool 1440 ; CHECK-LABEL: icmpUgt64Bool
1408 ; CHECK: cmp 1441 ; CHECK: cmp
1409 ; CHECK: ja 1442 ; CHECK: ja
1410 ; CHECK: jb 1443 ; CHECK: jb
1411 ; CHECK: cmp 1444 ; CHECK: cmp
1412 ; CHECK: ja 1445 ; CHECK: ja
1413 ; 1446 ;
1414 ; OPTM1-LABEL: icmpUgt64Bool 1447 ; OPTM1-LABEL: icmpUgt64Bool
1415 ; OPTM1: cmp 1448 ; OPTM1: cmp
1416 ; OPTM1: ja 1449 ; OPTM1: ja
1417 ; OPTM1: jb 1450 ; OPTM1: jb
1418 ; OPTM1: cmp 1451 ; OPTM1: cmp
1419 ; OPTM1: ja 1452 ; OPTM1: ja
1420 1453
1421 ; ARM32-LABEL: icmpUgt64Bool 1454 ; ARM32-LABEL: icmpUgt64Bool
1422 ; ARM32: cmp 1455 ; ARM32: cmp
1423 ; ARM32: cmpeq 1456 ; ARM32: cmpeq
1457 ; ARM32: movls
1424 ; ARM32: movhi 1458 ; ARM32: movhi
1425 ; ARM32: movls
1426 1459
1427 define internal i32 @icmpSge64Bool(i64 %a, i64 %b) { 1460 define internal i32 @icmpSge64Bool(i64 %a, i64 %b) {
1428 entry: 1461 entry:
1429 %cmp = icmp sge i64 %a, %b 1462 %cmp = icmp sge i64 %a, %b
1430 %cmp.ret_ext = zext i1 %cmp to i32 1463 %cmp.ret_ext = zext i1 %cmp to i32
1431 ret i32 %cmp.ret_ext 1464 ret i32 %cmp.ret_ext
1432 } 1465 }
1433 ; CHECK-LABEL: icmpSge64Bool 1466 ; CHECK-LABEL: icmpSge64Bool
1434 ; CHECK: cmp 1467 ; CHECK: cmp
1435 ; CHECK: jg 1468 ; CHECK: jg
1436 ; CHECK: jl 1469 ; CHECK: jl
1437 ; CHECK: cmp 1470 ; CHECK: cmp
1438 ; CHECK: jae 1471 ; CHECK: jae
1439 ; 1472 ;
1440 ; OPTM1-LABEL: icmpSge64Bool 1473 ; OPTM1-LABEL: icmpSge64Bool
1441 ; OPTM1: cmp 1474 ; OPTM1: cmp
1442 ; OPTM1: jg 1475 ; OPTM1: jg
1443 ; OPTM1: jl 1476 ; OPTM1: jl
1444 ; OPTM1: cmp 1477 ; OPTM1: cmp
1445 ; OPTM1: jae 1478 ; OPTM1: jae
1446 1479
1447 ; ARM32-LABEL: icmpSge64Bool 1480 ; ARM32-LABEL: icmpSge64Bool
1448 ; ARM32: cmp 1481 ; ARM32: cmp
1449 ; ARM32: sbcs 1482 ; ARM32: sbcs
1483 ; ARM32: movlt
1450 ; ARM32: movge 1484 ; ARM32: movge
1451 ; ARM32: movlt
1452 1485
1453 define internal i32 @icmpUge64Bool(i64 %a, i64 %b) { 1486 define internal i32 @icmpUge64Bool(i64 %a, i64 %b) {
1454 entry: 1487 entry:
1455 %cmp = icmp uge i64 %a, %b 1488 %cmp = icmp uge i64 %a, %b
1456 %cmp.ret_ext = zext i1 %cmp to i32 1489 %cmp.ret_ext = zext i1 %cmp to i32
1457 ret i32 %cmp.ret_ext 1490 ret i32 %cmp.ret_ext
1458 } 1491 }
1459 ; CHECK-LABEL: icmpUge64Bool 1492 ; CHECK-LABEL: icmpUge64Bool
1460 ; CHECK: cmp 1493 ; CHECK: cmp
1461 ; CHECK: ja 1494 ; CHECK: ja
1462 ; CHECK: jb 1495 ; CHECK: jb
1463 ; CHECK: cmp 1496 ; CHECK: cmp
1464 ; CHECK: jae 1497 ; CHECK: jae
1465 ; 1498 ;
1466 ; OPTM1-LABEL: icmpUge64Bool 1499 ; OPTM1-LABEL: icmpUge64Bool
1467 ; OPTM1: cmp 1500 ; OPTM1: cmp
1468 ; OPTM1: ja 1501 ; OPTM1: ja
1469 ; OPTM1: jb 1502 ; OPTM1: jb
1470 ; OPTM1: cmp 1503 ; OPTM1: cmp
1471 ; OPTM1: jae 1504 ; OPTM1: jae
1472 1505
1473 ; ARM32-LABEL: icmpUge64Bool 1506 ; ARM32-LABEL: icmpUge64Bool
1474 ; ARM32: cmp 1507 ; ARM32: cmp
1475 ; ARM32: cmpeq 1508 ; ARM32: cmpeq
1509 ; ARM32: movcc
1476 ; ARM32: movcs 1510 ; ARM32: movcs
1477 ; ARM32: movcc
1478 1511
1479 define internal i32 @icmpSlt64Bool(i64 %a, i64 %b) { 1512 define internal i32 @icmpSlt64Bool(i64 %a, i64 %b) {
1480 entry: 1513 entry:
1481 %cmp = icmp slt i64 %a, %b 1514 %cmp = icmp slt i64 %a, %b
1482 %cmp.ret_ext = zext i1 %cmp to i32 1515 %cmp.ret_ext = zext i1 %cmp to i32
1483 ret i32 %cmp.ret_ext 1516 ret i32 %cmp.ret_ext
1484 } 1517 }
1485 ; CHECK-LABEL: icmpSlt64Bool 1518 ; CHECK-LABEL: icmpSlt64Bool
1486 ; CHECK: cmp 1519 ; CHECK: cmp
1487 ; CHECK: jl 1520 ; CHECK: jl
1488 ; CHECK: jg 1521 ; CHECK: jg
1489 ; CHECK: cmp 1522 ; CHECK: cmp
1490 ; CHECK: jb 1523 ; CHECK: jb
1491 ; 1524 ;
1492 ; OPTM1-LABEL: icmpSlt64Bool 1525 ; OPTM1-LABEL: icmpSlt64Bool
1493 ; OPTM1: cmp 1526 ; OPTM1: cmp
1494 ; OPTM1: jl 1527 ; OPTM1: jl
1495 ; OPTM1: jg 1528 ; OPTM1: jg
1496 ; OPTM1: cmp 1529 ; OPTM1: cmp
1497 ; OPTM1: jb 1530 ; OPTM1: jb
1498 1531
1499 ; ARM32-LABEL: icmpSlt64Bool 1532 ; ARM32-LABEL: icmpSlt64Bool
1500 ; ARM32: cmp 1533 ; ARM32: cmp
1501 ; ARM32: sbcs 1534 ; ARM32: sbcs
1535 ; ARM32: movge
1502 ; ARM32: movlt 1536 ; ARM32: movlt
1503 ; ARM32: movge
1504 1537
1505 define internal i32 @icmpUlt64Bool(i64 %a, i64 %b) { 1538 define internal i32 @icmpUlt64Bool(i64 %a, i64 %b) {
1506 entry: 1539 entry:
1507 %cmp = icmp ult i64 %a, %b 1540 %cmp = icmp ult i64 %a, %b
1508 %cmp.ret_ext = zext i1 %cmp to i32 1541 %cmp.ret_ext = zext i1 %cmp to i32
1509 ret i32 %cmp.ret_ext 1542 ret i32 %cmp.ret_ext
1510 } 1543 }
1511 ; CHECK-LABEL: icmpUlt64Bool 1544 ; CHECK-LABEL: icmpUlt64Bool
1512 ; CHECK: cmp 1545 ; CHECK: cmp
1513 ; CHECK: jb 1546 ; CHECK: jb
1514 ; CHECK: ja 1547 ; CHECK: ja
1515 ; CHECK: cmp 1548 ; CHECK: cmp
1516 ; CHECK: jb 1549 ; CHECK: jb
1517 ; 1550 ;
1518 ; OPTM1-LABEL: icmpUlt64Bool 1551 ; OPTM1-LABEL: icmpUlt64Bool
1519 ; OPTM1: cmp 1552 ; OPTM1: cmp
1520 ; OPTM1: jb 1553 ; OPTM1: jb
1521 ; OPTM1: ja 1554 ; OPTM1: ja
1522 ; OPTM1: cmp 1555 ; OPTM1: cmp
1523 ; OPTM1: jb 1556 ; OPTM1: jb
1524 1557
1525 ; ARM32-LABEL: icmpUlt64Bool 1558 ; ARM32-LABEL: icmpUlt64Bool
1526 ; ARM32: cmp 1559 ; ARM32: cmp
1527 ; ARM32: cmpeq 1560 ; ARM32: cmpeq
1561 ; ARM32: movcs
1528 ; ARM32: movcc 1562 ; ARM32: movcc
1529 ; ARM32: movcs
1530 1563
1531 define internal i32 @icmpSle64Bool(i64 %a, i64 %b) { 1564 define internal i32 @icmpSle64Bool(i64 %a, i64 %b) {
1532 entry: 1565 entry:
1533 %cmp = icmp sle i64 %a, %b 1566 %cmp = icmp sle i64 %a, %b
1534 %cmp.ret_ext = zext i1 %cmp to i32 1567 %cmp.ret_ext = zext i1 %cmp to i32
1535 ret i32 %cmp.ret_ext 1568 ret i32 %cmp.ret_ext
1536 } 1569 }
1537 ; CHECK-LABEL: icmpSle64Bool 1570 ; CHECK-LABEL: icmpSle64Bool
1538 ; CHECK: cmp 1571 ; CHECK: cmp
1539 ; CHECK: jl 1572 ; CHECK: jl
1540 ; CHECK: jg 1573 ; CHECK: jg
1541 ; CHECK: cmp 1574 ; CHECK: cmp
1542 ; CHECK: jbe 1575 ; CHECK: jbe
1543 ; 1576 ;
1544 ; OPTM1-LABEL: icmpSle64Bool 1577 ; OPTM1-LABEL: icmpSle64Bool
1545 ; OPTM1: cmp 1578 ; OPTM1: cmp
1546 ; OPTM1: jl 1579 ; OPTM1: jl
1547 ; OPTM1: jg 1580 ; OPTM1: jg
1548 ; OPTM1: cmp 1581 ; OPTM1: cmp
1549 ; OPTM1: jbe 1582 ; OPTM1: jbe
1550 1583
1551 ; ARM32-LABEL: icmpSle64Bool 1584 ; ARM32-LABEL: icmpSle64Bool
1552 ; ARM32: cmp 1585 ; ARM32: cmp
1553 ; ARM32: sbcs 1586 ; ARM32: sbcs
1587 ; ARM32: movlt
1554 ; ARM32: movge 1588 ; ARM32: movge
1555 ; ARM32: movlt
1556 1589
1557 define internal i32 @icmpUle64Bool(i64 %a, i64 %b) { 1590 define internal i32 @icmpUle64Bool(i64 %a, i64 %b) {
1558 entry: 1591 entry:
1559 %cmp = icmp ule i64 %a, %b 1592 %cmp = icmp ule i64 %a, %b
1560 %cmp.ret_ext = zext i1 %cmp to i32 1593 %cmp.ret_ext = zext i1 %cmp to i32
1561 ret i32 %cmp.ret_ext 1594 ret i32 %cmp.ret_ext
1562 } 1595 }
1563 ; CHECK-LABEL: icmpUle64Bool 1596 ; CHECK-LABEL: icmpUle64Bool
1564 ; CHECK: cmp 1597 ; CHECK: cmp
1565 ; CHECK: jb 1598 ; CHECK: jb
1566 ; CHECK: ja 1599 ; CHECK: ja
1567 ; CHECK: cmp 1600 ; CHECK: cmp
1568 ; CHECK: jbe 1601 ; CHECK: jbe
1569 ; 1602 ;
1570 ; OPTM1-LABEL: icmpUle64Bool 1603 ; OPTM1-LABEL: icmpUle64Bool
1571 ; OPTM1: cmp 1604 ; OPTM1: cmp
1572 ; OPTM1: jb 1605 ; OPTM1: jb
1573 ; OPTM1: ja 1606 ; OPTM1: ja
1574 ; OPTM1: cmp 1607 ; OPTM1: cmp
1575 ; OPTM1: jbe 1608 ; OPTM1: jbe
1576 1609
1577 ; ARM32-LABEL: icmpUle64Bool 1610 ; ARM32-LABEL: icmpUle64Bool
1578 ; ARM32: cmp 1611 ; ARM32: cmp
1579 ; ARM32: cmpeq 1612 ; ARM32: cmpeq
1613 ; ARM32: movhi
1580 ; ARM32: movls 1614 ; ARM32: movls
1581 ; ARM32: movhi
1582 1615
1583 define internal i64 @load64(i32 %a) { 1616 define internal i64 @load64(i32 %a) {
1584 entry: 1617 entry:
1585 %__1 = inttoptr i32 %a to i64* 1618 %__1 = inttoptr i32 %a to i64*
1586 %v0 = load i64, i64* %__1, align 1 1619 %v0 = load i64, i64* %__1, align 1
1587 ret i64 %v0 1620 ret i64 %v0
1588 } 1621 }
1589 ; CHECK-LABEL: load64 1622 ; CHECK-LABEL: load64
1590 ; CHECK: mov e[[REGISTER:[a-z]+]],DWORD PTR [esp+0x4] 1623 ; CHECK: mov e[[REGISTER:[a-z]+]],DWORD PTR [esp+0x4]
1591 ; CHECK-NEXT: mov {{.*}},DWORD PTR [e[[REGISTER]]] 1624 ; CHECK-NEXT: mov {{.*}},DWORD PTR [e[[REGISTER]]]
(...skipping 67 matching lines...) Expand 10 before | Expand all | Expand 10 after
1659 ; OPTM1-LABEL: select64VarVar 1692 ; OPTM1-LABEL: select64VarVar
1660 ; OPTM1: cmp 1693 ; OPTM1: cmp
1661 ; OPTM1: jb 1694 ; OPTM1: jb
1662 ; OPTM1: ja 1695 ; OPTM1: ja
1663 ; OPTM1: cmp 1696 ; OPTM1: cmp
1664 ; OPTM1: jb 1697 ; OPTM1: jb
1665 ; OPTM1: cmp 1698 ; OPTM1: cmp
1666 ; OPTM1: cmovne 1699 ; OPTM1: cmovne
1667 1700
1668 ; ARM32-LABEL: select64VarVar 1701 ; ARM32-LABEL: select64VarVar
1669 ; The initial compare.
1670 ; ARM32: cmp 1702 ; ARM32: cmp
1671 ; ARM32: cmpeq 1703 ; ARM32: cmpeq
1672 ; ARM32: movcc 1704 ; ARM32-OM1: movcs
1673 ; ARM32: movcs 1705 ; ARM32-OM1: movcc
1674 ; The non-folded compare for the select. 1706 ; ARM32-OM1: cmp
1675 ; ARM32: cmp 1707 ; ARM32-OM1: movne
1676 ; ARM32: movne 1708 ; ARM32-O2: movcc
1677 ; ARM32: movne 1709 ; ARM32-OM1: movne
1710 ; ARM32-O2: movcc
1678 1711
1679 define internal i64 @select64VarConst(i64 %a, i64 %b) { 1712 define internal i64 @select64VarConst(i64 %a, i64 %b) {
1680 entry: 1713 entry:
1681 %cmp = icmp ult i64 %a, %b 1714 %cmp = icmp ult i64 %a, %b
1682 %cond = select i1 %cmp, i64 %a, i64 -2401053092306725256 1715 %cond = select i1 %cmp, i64 %a, i64 -2401053092306725256
1683 ret i64 %cond 1716 ret i64 %cond
1684 } 1717 }
1685 ; CHECK-LABEL: select64VarConst 1718 ; CHECK-LABEL: select64VarConst
1686 ; CHECK: cmp 1719 ; CHECK: cmp
1687 ; CHECK: jb 1720 ; CHECK: jb
1688 ; CHECK: ja 1721 ; CHECK: ja
1689 ; CHECK: cmp 1722 ; CHECK: cmp
1690 ; CHECK: jb 1723 ; CHECK: jb
1691 ; CHECK: cmp 1724 ; CHECK: cmp
1692 ; CHECK: cmovne 1725 ; CHECK: cmovne
1693 ; 1726 ;
1694 ; OPTM1-LABEL: select64VarConst 1727 ; OPTM1-LABEL: select64VarConst
1695 ; OPTM1: cmp 1728 ; OPTM1: cmp
1696 ; OPTM1: jb 1729 ; OPTM1: jb
1697 ; OPTM1: ja 1730 ; OPTM1: ja
1698 ; OPTM1: cmp 1731 ; OPTM1: cmp
1699 ; OPTM1: jb 1732 ; OPTM1: jb
1700 ; OPTM1: cmp 1733 ; OPTM1: cmp
1701 ; OPTM1: cmovne 1734 ; OPTM1: cmovne
1702 1735
1703 ; ARM32-LABEL: select64VarConst 1736 ; ARM32-LABEL: select64VarConst
1704 ; ARM32: cmp 1737 ; ARM32: cmp
1705 ; ARM32: cmpeq 1738 ; ARM32: cmpeq
1706 ; ARM32: movcc 1739 ; ARM32-OM1: movcs
1707 ; ARM32: movcs 1740 ; ARM32-OM1: movcc
1708 ; ARM32: cmp 1741 ; ARM32-OM1: cmp
1709 ; ARM32: movw 1742 ; ARM32: movw
1710 ; ARM32: movt 1743 ; ARM32: movt
1711 ; ARM32: movne 1744 ; ARM32-OM1: movne
1745 ; ARM32-O2: movcc
1712 ; ARM32: movw 1746 ; ARM32: movw
1713 ; ARM32: movt 1747 ; ARM32: movt
1714 ; ARM32: movne 1748 ; ARM32-OM1: movne
1749 ; ARM32-O2: movcc
1715 1750
1716 define internal i64 @select64ConstVar(i64 %a, i64 %b) { 1751 define internal i64 @select64ConstVar(i64 %a, i64 %b) {
1717 entry: 1752 entry:
1718 %cmp = icmp ult i64 %a, %b 1753 %cmp = icmp ult i64 %a, %b
1719 %cond = select i1 %cmp, i64 -2401053092306725256, i64 %b 1754 %cond = select i1 %cmp, i64 -2401053092306725256, i64 %b
1720 ret i64 %cond 1755 ret i64 %cond
1721 } 1756 }
1722 ; CHECK-LABEL: select64ConstVar 1757 ; CHECK-LABEL: select64ConstVar
1723 ; CHECK: cmp 1758 ; CHECK: cmp
1724 ; CHECK: jb 1759 ; CHECK: jb
1725 ; CHECK: ja 1760 ; CHECK: ja
1726 ; CHECK: cmp 1761 ; CHECK: cmp
1727 ; CHECK: jb 1762 ; CHECK: jb
1728 ; CHECK: cmp 1763 ; CHECK: cmp
1729 ; CHECK: cmove 1764 ; CHECK: cmove
1730 ; 1765 ;
1731 ; OPTM1-LABEL: select64ConstVar 1766 ; OPTM1-LABEL: select64ConstVar
1732 ; OPTM1: cmp 1767 ; OPTM1: cmp
1733 ; OPTM1: jb 1768 ; OPTM1: jb
1734 ; OPTM1: ja 1769 ; OPTM1: ja
1735 ; OPTM1: cmp 1770 ; OPTM1: cmp
1736 ; OPTM1: jb 1771 ; OPTM1: jb
1737 ; OPTM1: cmp 1772 ; OPTM1: cmp
1738 ; OPTM1: cmove 1773 ; OPTM1: cmove
1739 1774
1740 ; ARM32-LABEL: select64ConstVar 1775 ; ARM32-LABEL: select64ConstVar
1741 ; ARM32: cmp 1776 ; ARM32: cmp
1742 ; ARM32: cmpeq 1777 ; ARM32: cmpeq
1743 ; ARM32: movcc 1778 ; ARM32-OM1: movcs
1744 ; ARM32: movcs 1779 ; ARM32-OM1: movcc
1745 ; ARM32: cmp 1780 ; ARM32-OM1: cmp
1746 ; ARM32: movw 1781 ; ARM32: movw
1747 ; ARM32: movt 1782 ; ARM32: movt
1748 ; ARM32: movne 1783 ; ARM32-OM1: movne
1784 ; ARM32-O2: movcc
1749 ; ARM32: movw 1785 ; ARM32: movw
1750 ; ARM32: movt 1786 ; ARM32: movt
1751 ; ARM32: movne 1787 ; ARM32-OM1: movne
1788 ; ARM32-O2: movcc
1752 1789
1753 define internal void @icmpEq64Imm() { 1790 define internal void @icmpEq64Imm() {
1754 entry: 1791 entry:
1755 %cmp = icmp eq i64 123, 234 1792 %cmp = icmp eq i64 123, 234
1756 br i1 %cmp, label %if.then, label %if.end 1793 br i1 %cmp, label %if.then, label %if.end
1757 1794
1758 if.then: ; preds = %entry 1795 if.then: ; preds = %entry
1759 call void @func() 1796 call void @func()
1760 br label %if.end 1797 br label %if.end
1761 1798
(...skipping 84 matching lines...) Expand 10 before | Expand all | Expand 10 after
1846 ; CHECK-LABEL: phi64Undef 1883 ; CHECK-LABEL: phi64Undef
1847 ; CHECK: mov {{.*}},0x0 1884 ; CHECK: mov {{.*}},0x0
1848 ; CHECK: mov {{.*}},0x0 1885 ; CHECK: mov {{.*}},0x0
1849 ; OPTM1-LABEL: phi64Undef 1886 ; OPTM1-LABEL: phi64Undef
1850 ; OPTM1: mov {{.*}},0x0 1887 ; OPTM1: mov {{.*}},0x0
1851 ; OPTM1: mov {{.*}},0x0 1888 ; OPTM1: mov {{.*}},0x0
1852 ; ARM32-LABEL: phi64Undef 1889 ; ARM32-LABEL: phi64Undef
1853 ; ARM32: mov {{.*}} #0 1890 ; ARM32: mov {{.*}} #0
1854 ; ARM32: mov {{.*}} #0 1891 ; ARM32: mov {{.*}} #0
1855 1892
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