| Index: tests_lit/llvm2ice_tests/vector-fcmp.ll
|
| diff --git a/tests_lit/llvm2ice_tests/vector-fcmp.ll b/tests_lit/llvm2ice_tests/vector-fcmp.ll
|
| index 641d71584abd9505fff03ca35d11239ce0b7d1d7..97e438b724d55e904c80f4978a428f0db49b80ff 100644
|
| --- a/tests_lit/llvm2ice_tests/vector-fcmp.ll
|
| +++ b/tests_lit/llvm2ice_tests/vector-fcmp.ll
|
| @@ -7,7 +7,7 @@
|
| ; Check that sext elimination occurs when the result of the comparison
|
| ; instruction is alrady sign extended. Sign extension to 4 x i32 uses
|
| ; the pslld instruction.
|
| -define <4 x i32> @sextElimination(<4 x float> %a, <4 x float> %b) {
|
| +define internal <4 x i32> @sextElimination(<4 x float> %a, <4 x float> %b) {
|
| entry:
|
| %res.trunc = fcmp oeq <4 x float> %a, %b
|
| %res = sext <4 x i1> %res.trunc to <4 x i32>
|
| @@ -17,7 +17,7 @@ entry:
|
| ; CHECK-NOT: pslld
|
| }
|
|
|
| -define <4 x i32> @fcmpFalseVector(<4 x float> %a, <4 x float> %b) {
|
| +define internal <4 x i32> @fcmpFalseVector(<4 x float> %a, <4 x float> %b) {
|
| entry:
|
| %res.trunc = fcmp false <4 x float> %a, %b
|
| %res = sext <4 x i1> %res.trunc to <4 x i32>
|
| @@ -26,7 +26,7 @@ entry:
|
| ; CHECK: pxor
|
| }
|
|
|
| -define <4 x i32> @fcmpOeqVector(<4 x float> %a, <4 x float> %b) {
|
| +define internal <4 x i32> @fcmpOeqVector(<4 x float> %a, <4 x float> %b) {
|
| entry:
|
| %res.trunc = fcmp oeq <4 x float> %a, %b
|
| %res = sext <4 x i1> %res.trunc to <4 x i32>
|
| @@ -35,7 +35,7 @@ entry:
|
| ; CHECK: cmpeqps
|
| }
|
|
|
| -define <4 x i32> @fcmpOgeVector(<4 x float> %a, <4 x float> %b) {
|
| +define internal <4 x i32> @fcmpOgeVector(<4 x float> %a, <4 x float> %b) {
|
| entry:
|
| %res.trunc = fcmp oge <4 x float> %a, %b
|
| %res = sext <4 x i1> %res.trunc to <4 x i32>
|
| @@ -44,7 +44,7 @@ entry:
|
| ; CHECK: cmpleps
|
| }
|
|
|
| -define <4 x i32> @fcmpOgtVector(<4 x float> %a, <4 x float> %b) {
|
| +define internal <4 x i32> @fcmpOgtVector(<4 x float> %a, <4 x float> %b) {
|
| entry:
|
| %res.trunc = fcmp ogt <4 x float> %a, %b
|
| %res = sext <4 x i1> %res.trunc to <4 x i32>
|
| @@ -53,7 +53,7 @@ entry:
|
| ; CHECK: cmpltps
|
| }
|
|
|
| -define <4 x i32> @fcmpOleVector(<4 x float> %a, <4 x float> %b) {
|
| +define internal <4 x i32> @fcmpOleVector(<4 x float> %a, <4 x float> %b) {
|
| entry:
|
| %res.trunc = fcmp ole <4 x float> %a, %b
|
| %res = sext <4 x i1> %res.trunc to <4 x i32>
|
| @@ -62,7 +62,7 @@ entry:
|
| ; CHECK: cmpleps
|
| }
|
|
|
| -define <4 x i32> @fcmpOltVector(<4 x float> %a, <4 x float> %b) {
|
| +define internal <4 x i32> @fcmpOltVector(<4 x float> %a, <4 x float> %b) {
|
| entry:
|
| %res.trunc = fcmp olt <4 x float> %a, %b
|
| %res = sext <4 x i1> %res.trunc to <4 x i32>
|
| @@ -71,7 +71,7 @@ entry:
|
| ; CHECK: cmpltps
|
| }
|
|
|
| -define <4 x i32> @fcmpOneVector(<4 x float> %a, <4 x float> %b) {
|
| +define internal <4 x i32> @fcmpOneVector(<4 x float> %a, <4 x float> %b) {
|
| entry:
|
| %res.trunc = fcmp one <4 x float> %a, %b
|
| %res = sext <4 x i1> %res.trunc to <4 x i32>
|
| @@ -82,7 +82,7 @@ entry:
|
| ; CHECK: pand
|
| }
|
|
|
| -define <4 x i32> @fcmpOrdVector(<4 x float> %a, <4 x float> %b) {
|
| +define internal <4 x i32> @fcmpOrdVector(<4 x float> %a, <4 x float> %b) {
|
| entry:
|
| %res.trunc = fcmp ord <4 x float> %a, %b
|
| %res = sext <4 x i1> %res.trunc to <4 x i32>
|
| @@ -91,7 +91,7 @@ entry:
|
| ; CHECK: cmpordps
|
| }
|
|
|
| -define <4 x i32> @fcmpTrueVector(<4 x float> %a, <4 x float> %b) {
|
| +define internal <4 x i32> @fcmpTrueVector(<4 x float> %a, <4 x float> %b) {
|
| entry:
|
| %res.trunc = fcmp true <4 x float> %a, %b
|
| %res = sext <4 x i1> %res.trunc to <4 x i32>
|
| @@ -100,7 +100,7 @@ entry:
|
| ; CHECK: pcmpeqd
|
| }
|
|
|
| -define <4 x i32> @fcmpUeqVector(<4 x float> %a, <4 x float> %b) {
|
| +define internal <4 x i32> @fcmpUeqVector(<4 x float> %a, <4 x float> %b) {
|
| entry:
|
| %res.trunc = fcmp ueq <4 x float> %a, %b
|
| %res = sext <4 x i1> %res.trunc to <4 x i32>
|
| @@ -111,7 +111,7 @@ entry:
|
| ; CHECK: por
|
| }
|
|
|
| -define <4 x i32> @fcmpUgeVector(<4 x float> %a, <4 x float> %b) {
|
| +define internal <4 x i32> @fcmpUgeVector(<4 x float> %a, <4 x float> %b) {
|
| entry:
|
| %res.trunc = fcmp uge <4 x float> %a, %b
|
| %res = sext <4 x i1> %res.trunc to <4 x i32>
|
| @@ -120,7 +120,7 @@ entry:
|
| ; CHECK: cmpnltps
|
| }
|
|
|
| -define <4 x i32> @fcmpUgtVector(<4 x float> %a, <4 x float> %b) {
|
| +define internal <4 x i32> @fcmpUgtVector(<4 x float> %a, <4 x float> %b) {
|
| entry:
|
| %res.trunc = fcmp ugt <4 x float> %a, %b
|
| %res = sext <4 x i1> %res.trunc to <4 x i32>
|
| @@ -129,7 +129,7 @@ entry:
|
| ; CHECK: cmpnleps
|
| }
|
|
|
| -define <4 x i32> @fcmpUleVector(<4 x float> %a, <4 x float> %b) {
|
| +define internal <4 x i32> @fcmpUleVector(<4 x float> %a, <4 x float> %b) {
|
| entry:
|
| %res.trunc = fcmp ule <4 x float> %a, %b
|
| %res = sext <4 x i1> %res.trunc to <4 x i32>
|
| @@ -138,7 +138,7 @@ entry:
|
| ; CHECK: cmpnltps
|
| }
|
|
|
| -define <4 x i32> @fcmpUltVector(<4 x float> %a, <4 x float> %b) {
|
| +define internal <4 x i32> @fcmpUltVector(<4 x float> %a, <4 x float> %b) {
|
| entry:
|
| %res.trunc = fcmp ult <4 x float> %a, %b
|
| %res = sext <4 x i1> %res.trunc to <4 x i32>
|
| @@ -147,7 +147,7 @@ entry:
|
| ; CHECK: cmpnleps
|
| }
|
|
|
| -define <4 x i32> @fcmpUneVector(<4 x float> %a, <4 x float> %b) {
|
| +define internal <4 x i32> @fcmpUneVector(<4 x float> %a, <4 x float> %b) {
|
| entry:
|
| %res.trunc = fcmp une <4 x float> %a, %b
|
| %res = sext <4 x i1> %res.trunc to <4 x i32>
|
| @@ -156,7 +156,7 @@ entry:
|
| ; CHECK: cmpneqps
|
| }
|
|
|
| -define <4 x i32> @fcmpUnoVector(<4 x float> %a, <4 x float> %b) {
|
| +define internal <4 x i32> @fcmpUnoVector(<4 x float> %a, <4 x float> %b) {
|
| entry:
|
| %res.trunc = fcmp uno <4 x float> %a, %b
|
| %res = sext <4 x i1> %res.trunc to <4 x i32>
|
|
|