src/mips64/assembler-mips64.h - Issue 1346623002: MIPS: Fixing floating point register clobbering

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Unified Diff: src/mips64/assembler-mips64.h

Issue 1346623002: MIPS: Fixing floating point register clobbering (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master

Patch Set: Created 5 years, 3 months ago

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Index: src/mips64/assembler-mips64.h

diff --git a/src/mips64/assembler-mips64.h b/src/mips64/assembler-mips64.h

index 01640723333947555e4c040a9459175272e4cb3c..2036aa796397f05009804038c2e504659fa24b8e 100644

--- a/src/mips64/assembler-mips64.h

+++ b/src/mips64/assembler-mips64.h

@@ -327,7 +327,8 @@ const FPURegister f31 = { 31 };

#define kLithiumScratchDouble f30

#define kDoubleRegZero f28

// Used on mips64r6 for compare operations.

-#define kDoubleCompareReg f31

+// We use the last non-callee saved odd register for N64 ABI

+#define kDoubleCompareReg f23

// FPU (coprocessor 1) control registers.

// Currently only FCSR (#31) is implemented.

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