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Unified Diff: src/mips/assembler-mips.h

Issue 1346623002: MIPS: Fixing floating point register clobbering (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Created 5 years, 3 months ago
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Index: src/mips/assembler-mips.h
diff --git a/src/mips/assembler-mips.h b/src/mips/assembler-mips.h
index 4db04b065fd25a5a8712c05fe38fcc680962e636..c47f6d3abe2760997039c195e584ce6276a9440d 100644
--- a/src/mips/assembler-mips.h
+++ b/src/mips/assembler-mips.h
@@ -335,7 +335,8 @@ const FPURegister f31 = { 31 };
#define kLithiumScratchDouble f30
#define kDoubleRegZero f28
// Used on mips32r6 for compare operations.
-#define kDoubleCompareReg f31
+// We use the last non-callee saved odd register for O32 ABI
+#define kDoubleCompareReg f19
// FPU (coprocessor 1) control registers.
// Currently only FCSR (#31) is implemented.
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