| Index: src/IceTargetLoweringX8664Traits.h
|
| diff --git a/src/IceTargetLoweringX8664Traits.h b/src/IceTargetLoweringX8664Traits.h
|
| index 2caaeb5524d6bf38669984307f3ab776d30811d3..454b6cb82d214acf1a9c719c9b0994bf911a8e1b 100644
|
| --- a/src/IceTargetLoweringX8664Traits.h
|
| +++ b/src/IceTargetLoweringX8664Traits.h
|
| @@ -410,8 +410,8 @@ template <> struct MachineTraits<TargetX8664> {
|
| // class. For x86-64, this would comprise the 16 XMM registers. This is
|
| // for performance, not correctness.
|
| static const unsigned MaxEquivalenceClassSize = 8;
|
| - typedef llvm::SmallVector<int32_t, MaxEquivalenceClassSize> RegisterList;
|
| - typedef std::map<uint32_t, RegisterList> EquivalenceClassMap;
|
| + using RegisterList = llvm::SmallVector<int32_t, MaxEquivalenceClassSize>;
|
| + using EquivalenceClassMap = std::map<uint32_t, RegisterList>;
|
| EquivalenceClassMap EquivalenceClasses;
|
| SizeT NumShuffled = 0, NumPreserved = 0;
|
|
|
|
|