Refactor all instances of `typedef y x` to the C++11 `using x = y` syntax.

src/IceTargetLoweringX8664Traits.h

 //===- subzero/src/IceTargetLoweringX8664Traits.h - x86-64 traits -*- C++ -*-=//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 392 matching lines @@
                                 llvm::SmallVectorImpl<int32_t> &Permutation,
                                 const llvm::SmallBitVector &ExcludeRegisters,
                                 uint64_t Salt) {
     // TODO(stichnot): Declaring Permutation this way loses type/size
     // information.  Fix this in conjunction with the caller-side TODO.
     assert(Permutation.size() >= RegisterSet::Reg_NUM);
     // Expected upper bound on the number of registers in a single equivalence
     // class.  For x86-64, this would comprise the 16 XMM registers.  This is
     // for performance, not correctness.
     static const unsigned MaxEquivalenceClassSize = 8;
-    typedef llvm::SmallVector<int32_t, MaxEquivalenceClassSize> RegisterList;
-    typedef std::map<uint32_t, RegisterList> EquivalenceClassMap;
+    using RegisterList = llvm::SmallVector<int32_t, MaxEquivalenceClassSize>;
+    using EquivalenceClassMap = std::map<uint32_t, RegisterList>;
     EquivalenceClassMap EquivalenceClasses;
     SizeT NumShuffled = 0, NumPreserved = 0;
 
 // Build up the equivalence classes of registers by looking at the register
 // properties as well as whether the registers should be explicitly excluded
 // from shuffling.
 #define X(val, encode, name64, name32, name16, name8, scratch, preserved,      \
           stackptr, frameptr, isInt, isFP)                                     \
   if (ExcludeRegisters[RegisterSet::val]) {                                    \
     /* val stays the same in the resulting permutation. */                     \
@@ skipping 323 matching lines @@
 
 } // end of namespace X86Internal
 
 namespace X8664 {
 using Traits = ::Ice::X86Internal::MachineTraits<TargetX8664>;
 } // end of namespace X8664
 
 } // end of namespace Ice
 
 #endif // SUBZERO_SRC_ICETARGETLOWERINGX8664TRAITS_H