Make FlushICache part of Assembler(Base) and take Isolate as parameter.

src/arm64/cpu-arm64.cc

Index: src/arm64/cpu-arm64.cc
diff --git a/src/arm64/cpu-arm64.cc b/src/arm64/cpu-arm64.cc
index 57180b5aa3f9227543c47de941b7b506f9d6fc0b..cf2cc572155ac43a7ca5438a2afed43458a89e18 100644
--- a/src/arm64/cpu-arm64.cc
+++ b/src/arm64/cpu-arm64.cc
@@ -39,16 +39,7 @@ class CacheLineSizes {
 
 
 void CpuFeatures::FlushICache(void* address, size_t length) {
-  if (length == 0) return;
-
-  if (CpuFeatures::IsSupported(COHERENT_CACHE)) return;
-
-#ifdef USE_SIMULATOR
-  // TODO(all): consider doing some cache simulation to ensure every address
-  // run has been synced.
-  USE(address);
-  USE(length);
-#else
+#ifdef V8_HOST_ARCH_ARM64
   // The code below assumes user space cache operations are allowed. The goal
   // of this routine is to make sure the code generated is visible to the I
   // side of the CPU.
@@ -115,7 +106,7 @@ void CpuFeatures::FlushICache(void* address, size_t length) {
     // move this code before the code is generated.
     : "cc", "memory"
   );  // NOLINT
-#endif
+#endif  // V8_HOST_ARCH_ARM64
 }
 
 }  // namespace internal