| Index: src/mips/assembler-mips.cc
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| diff --git a/src/mips/assembler-mips.cc b/src/mips/assembler-mips.cc
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| index 4c11c7f5490b7fa940b5c625f7883e5ab6c05245..c255d0fbda970efa8e93df9a66d5cc88a23e9fb4 100644
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| --- a/src/mips/assembler-mips.cc
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| +++ b/src/mips/assembler-mips.cc
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| @@ -490,7 +490,6 @@ bool Assembler::IsBranch(Instr instr) {
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|    uint32_t opcode   = GetOpcodeField(instr);
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|    uint32_t rt_field = GetRtField(instr);
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|    uint32_t rs_field = GetRsField(instr);
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| -  uint32_t label_constant = GetLabelConst(instr);
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|    // Checks if the instruction is a branch.
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|    return opcode == BEQ ||
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|        opcode == BNE ||
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| @@ -502,10 +501,13 @@ bool Assembler::IsBranch(Instr instr) {
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|        opcode == BGTZL ||
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|        (opcode == REGIMM && (rt_field == BLTZ || rt_field == BGEZ ||
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|                              rt_field == BLTZAL || rt_field == BGEZAL)) ||
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| -      (opcode == COP1 && rs_field == BC1) ||  // Coprocessor branch.
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| -      label_constant == 0;  // Emitted label const in reg-exp engine.
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| +      (opcode == COP1 && rs_field == BC1);  // Coprocessor branch.
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|  }
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|  
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| +bool Assembler::IsEmittedConstant(Instr instr) {
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| +  uint32_t label_constant = GetLabelConst(instr);
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| +  return label_constant == 0;  // Emitted label const in reg-exp engine.
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| +}
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|  
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|  bool Assembler::IsBeq(Instr instr) {
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|    return GetOpcodeField(instr) == BEQ;
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| @@ -796,7 +798,7 @@ void Assembler::bind_to(Label* L, int pos) {
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|        }
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|        target_at_put(fixup_pos, pos);
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|      } else {
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| -      ASSERT(IsJ(instr) || IsLui(instr));
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| +      ASSERT(IsJ(instr) || IsLui(instr) || IsEmittedConstant(instr));
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|        target_at_put(fixup_pos, pos);
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|      }
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|    }
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| 
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