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| 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
| 2 // All Rights Reserved. | 2 // All Rights Reserved. |
| 3 // | 3 // |
| 4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
| 5 // modification, are permitted provided that the following conditions are | 5 // modification, are permitted provided that the following conditions are |
| 6 // met: | 6 // met: |
| 7 // | 7 // |
| 8 // - Redistributions of source code must retain the above copyright notice, | 8 // - Redistributions of source code must retain the above copyright notice, |
| 9 // this list of conditions and the following disclaimer. | 9 // this list of conditions and the following disclaimer. |
| 10 // | 10 // |
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| 483 | 483 |
| 484 const int kEndOfChain = -4; | 484 const int kEndOfChain = -4; |
| 485 // Determines the end of the Jump chain (a subset of the label link chain). | 485 // Determines the end of the Jump chain (a subset of the label link chain). |
| 486 const int kEndOfJumpChain = 0; | 486 const int kEndOfJumpChain = 0; |
| 487 | 487 |
| 488 | 488 |
| 489 bool Assembler::IsBranch(Instr instr) { | 489 bool Assembler::IsBranch(Instr instr) { |
| 490 uint32_t opcode = GetOpcodeField(instr); | 490 uint32_t opcode = GetOpcodeField(instr); |
| 491 uint32_t rt_field = GetRtField(instr); | 491 uint32_t rt_field = GetRtField(instr); |
| 492 uint32_t rs_field = GetRsField(instr); | 492 uint32_t rs_field = GetRsField(instr); |
| 493 uint32_t label_constant = GetLabelConst(instr); | |
| 494 // Checks if the instruction is a branch. | 493 // Checks if the instruction is a branch. |
| 495 return opcode == BEQ || | 494 return opcode == BEQ || |
| 496 opcode == BNE || | 495 opcode == BNE || |
| 497 opcode == BLEZ || | 496 opcode == BLEZ || |
| 498 opcode == BGTZ || | 497 opcode == BGTZ || |
| 499 opcode == BEQL || | 498 opcode == BEQL || |
| 500 opcode == BNEL || | 499 opcode == BNEL || |
| 501 opcode == BLEZL || | 500 opcode == BLEZL || |
| 502 opcode == BGTZL || | 501 opcode == BGTZL || |
| 503 (opcode == REGIMM && (rt_field == BLTZ || rt_field == BGEZ || | 502 (opcode == REGIMM && (rt_field == BLTZ || rt_field == BGEZ || |
| 504 rt_field == BLTZAL || rt_field == BGEZAL)) || | 503 rt_field == BLTZAL || rt_field == BGEZAL)) || |
| 505 (opcode == COP1 && rs_field == BC1) || // Coprocessor branch. | 504 (opcode == COP1 && rs_field == BC1); // Coprocessor branch. |
| 506 label_constant == 0; // Emitted label const in reg-exp engine. | |
| 507 } | 505 } |
| 508 | 506 |
| 507 bool Assembler::IsEmittedConstant(Instr instr) { |
| 508 uint32_t label_constant = GetLabelConst(instr); |
| 509 return label_constant == 0; // Emitted label const in reg-exp engine. |
| 510 } |
| 509 | 511 |
| 510 bool Assembler::IsBeq(Instr instr) { | 512 bool Assembler::IsBeq(Instr instr) { |
| 511 return GetOpcodeField(instr) == BEQ; | 513 return GetOpcodeField(instr) == BEQ; |
| 512 } | 514 } |
| 513 | 515 |
| 514 | 516 |
| 515 bool Assembler::IsBne(Instr instr) { | 517 bool Assembler::IsBne(Instr instr) { |
| 516 return GetOpcodeField(instr) == BNE; | 518 return GetOpcodeField(instr) == BNE; |
| 517 } | 519 } |
| 518 | 520 |
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| 789 trampoline_pos = get_trampoline_entry(fixup_pos); | 791 trampoline_pos = get_trampoline_entry(fixup_pos); |
| 790 CHECK(trampoline_pos != kInvalidSlotPos); | 792 CHECK(trampoline_pos != kInvalidSlotPos); |
| 791 } | 793 } |
| 792 ASSERT((trampoline_pos - fixup_pos) <= kMaxBranchOffset); | 794 ASSERT((trampoline_pos - fixup_pos) <= kMaxBranchOffset); |
| 793 target_at_put(fixup_pos, trampoline_pos); | 795 target_at_put(fixup_pos, trampoline_pos); |
| 794 fixup_pos = trampoline_pos; | 796 fixup_pos = trampoline_pos; |
| 795 dist = pos - fixup_pos; | 797 dist = pos - fixup_pos; |
| 796 } | 798 } |
| 797 target_at_put(fixup_pos, pos); | 799 target_at_put(fixup_pos, pos); |
| 798 } else { | 800 } else { |
| 799 ASSERT(IsJ(instr) || IsLui(instr)); | 801 ASSERT(IsJ(instr) || IsLui(instr) || IsEmittedConstant(instr)); |
| 800 target_at_put(fixup_pos, pos); | 802 target_at_put(fixup_pos, pos); |
| 801 } | 803 } |
| 802 } | 804 } |
| 803 L->bind_to(pos); | 805 L->bind_to(pos); |
| 804 | 806 |
| 805 // Keep track of the last bound label so we don't eliminate any instructions | 807 // Keep track of the last bound label so we don't eliminate any instructions |
| 806 // before a bound label. | 808 // before a bound label. |
| 807 if (pos > last_bound_pos_) | 809 if (pos > last_bound_pos_) |
| 808 last_bound_pos_ = pos; | 810 last_bound_pos_ = pos; |
| 809 } | 811 } |
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| 2296 } | 2298 } |
| 2297 | 2299 |
| 2298 if (patched) { | 2300 if (patched) { |
| 2299 CPU::FlushICache(pc+2, sizeof(Address)); | 2301 CPU::FlushICache(pc+2, sizeof(Address)); |
| 2300 } | 2302 } |
| 2301 } | 2303 } |
| 2302 | 2304 |
| 2303 } } // namespace v8::internal | 2305 } } // namespace v8::internal |
| 2304 | 2306 |
| 2305 #endif // V8_TARGET_ARCH_MIPS | 2307 #endif // V8_TARGET_ARCH_MIPS |
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