| Index: src/arm64/macro-assembler-arm64-inl.h
|
| diff --git a/src/arm64/macro-assembler-arm64-inl.h b/src/arm64/macro-assembler-arm64-inl.h
|
| index b691e218135ee0a1aa09a4a283cdb1c0c7bf508c..445513bf5abb619ca68d959fc1f4866b7c8fb393 100644
|
| --- a/src/arm64/macro-assembler-arm64-inl.h
|
| +++ b/src/arm64/macro-assembler-arm64-inl.h
|
| @@ -869,15 +869,6 @@ void MacroAssembler::Isb() {
|
| }
|
|
|
|
|
| -void MacroAssembler::Ldnp(const CPURegister& rt,
|
| - const CPURegister& rt2,
|
| - const MemOperand& src) {
|
| - DCHECK(allow_macro_instructions_);
|
| - DCHECK(!AreAliased(rt, rt2));
|
| - ldnp(rt, rt2, src);
|
| -}
|
| -
|
| -
|
| void MacroAssembler::Ldr(const CPURegister& rt, const Immediate& imm) {
|
| DCHECK(allow_macro_instructions_);
|
| ldr(rt, imm);
|
| @@ -1134,14 +1125,6 @@ void MacroAssembler::Umull(const Register& rd, const Register& rn,
|
| }
|
|
|
|
|
| -void MacroAssembler::Stnp(const CPURegister& rt,
|
| - const CPURegister& rt2,
|
| - const MemOperand& dst) {
|
| - DCHECK(allow_macro_instructions_);
|
| - stnp(rt, rt2, dst);
|
| -}
|
| -
|
| -
|
| void MacroAssembler::Sxtb(const Register& rd, const Register& rn) {
|
| DCHECK(allow_macro_instructions_);
|
| DCHECK(!rd.IsZero());
|
|
|