| Index: lib/Target/X86/MCTargetDesc/X86MCNaClExpander.cpp
|
| diff --git a/lib/Target/X86/MCTargetDesc/X86MCNaClExpander.cpp b/lib/Target/X86/MCTargetDesc/X86MCNaClExpander.cpp
|
| index 3979974ae8281bf2ee6dc7bba93053dbac2f35cb..30665f79096a38de3e35fd6a714044260212bde5 100644
|
| --- a/lib/Target/X86/MCTargetDesc/X86MCNaClExpander.cpp
|
| +++ b/lib/Target/X86/MCTargetDesc/X86MCNaClExpander.cpp
|
| @@ -39,6 +39,14 @@ static bool isAbsoluteReg(unsigned Reg) {
|
| Reg == X86::RIP);
|
| }
|
|
|
| +bool X86::X86MCNaClExpander::isValidScratchRegister(unsigned Reg) const {
|
| + // TODO(dschuff): Check the register class.
|
| + if (isAbsoluteReg(Reg))
|
| + return false;
|
| + return true;
|
| +}
|
| +
|
| +
|
| static void PushReturnAddress(const llvm::MCSubtargetInfo &STI,
|
| MCContext &Context, MCStreamer &Out,
|
| MCSymbol *RetTarget) {
|
| @@ -565,10 +573,12 @@ void X86::X86MCNaClExpander::emitInstruction(const MCInst &Inst,
|
| Out.EmitInstruction(Inst, STI);
|
| }
|
|
|
| +
|
| void X86::X86MCNaClExpander::doExpandInst(const MCInst &Inst, MCStreamer &Out,
|
| const MCSubtargetInfo &STI,
|
| bool EmitPrefixes) {
|
|
|
| +
|
| // Explicitly IGNORE all pseudo instructions, these will be handled in the
|
| // older customExpandInst code
|
| switch (Inst.getOpcode()) {
|
| @@ -635,6 +645,7 @@ bool X86::X86MCNaClExpander::expandInst(const MCInst &Inst, MCStreamer &Out,
|
| Guard = true;
|
|
|
| doExpandInst(Inst, Out, STI, true);
|
| + invalidateScratchRegs(Inst);
|
|
|
| Guard = false;
|
| return true;
|
|
|