| Index: src/compiler/pipeline.cc
|
| diff --git a/src/compiler/pipeline.cc b/src/compiler/pipeline.cc
|
| index f55b4d35125e2380bc1d94106c531ba548aa8c65..c1e2eb663e0a0d4fccfaf19eb00c42e7f356a4dd 100644
|
| --- a/src/compiler/pipeline.cc
|
| +++ b/src/compiler/pipeline.cc
|
| @@ -1337,13 +1337,9 @@ void Pipeline::AllocateRegisters(const RegisterConfiguration* config,
|
| Run<PreprocessLiveRangesPhase>();
|
| }
|
|
|
| - if (FLAG_turbo_greedy_regalloc) {
|
| - Run<AllocateGeneralRegistersPhase<GreedyAllocator>>();
|
| - Run<AllocateDoubleRegistersPhase<GreedyAllocator>>();
|
| - } else {
|
| - Run<AllocateGeneralRegistersPhase<LinearScanAllocator>>();
|
| - Run<AllocateDoubleRegistersPhase<LinearScanAllocator>>();
|
| - }
|
| + // TODO(mtrofin): re-enable greedy once we have bots for range preprocessing.
|
| + Run<AllocateGeneralRegistersPhase<LinearScanAllocator>>();
|
| + Run<AllocateDoubleRegistersPhase<LinearScanAllocator>>();
|
|
|
| if (FLAG_turbo_frame_elision) {
|
| Run<LocateSpillSlotsPhase>();
|
|
|