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Unified Diff: src/IceTargetLoweringMIPS32.h

Issue 1253833002: Subzero: Cleanly implement register allocation after phi lowering. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Cleanup Created 5 years, 5 months ago
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« src/IceTargetLoweringARM32.cpp ('K') | « src/IceTargetLoweringARM32.cpp ('k') | src/IceTargetLoweringMIPS32.cpp » ('j') | src/IceTargetLoweringX86BaseImpl.h » ('J')
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Index: src/IceTargetLoweringMIPS32.h
diff --git a/src/IceTargetLoweringMIPS32.h b/src/IceTargetLoweringMIPS32.h
index e63d7388de3209b87917050ca78976c78cff1c8f..5ec9c0b830756f4fc9af1bc50b9da1fbaad67800 100644
--- a/src/IceTargetLoweringMIPS32.h
+++ b/src/IceTargetLoweringMIPS32.h
@@ -112,8 +112,6 @@ protected:
void lowerSwitch(const InstSwitch *Inst) override;
void lowerUnreachable(const InstUnreachable *Inst) override;
void prelowerPhis() override;
- void lowerPhiAssignments(CfgNode *Node,
- const AssignList &Assignments) override;
void doAddressOptLoad() override;
void doAddressOptStore() override;
void randomlyInsertNop(float Probability) override;
« src/IceTargetLoweringARM32.cpp ('K') | « src/IceTargetLoweringARM32.cpp ('k') | src/IceTargetLoweringMIPS32.cpp » ('j') | src/IceTargetLoweringX86BaseImpl.h » ('J')

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