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Side by Side Diff: src/IceTargetLoweringMIPS32.h

Issue 1253833002: Subzero: Cleanly implement register allocation after phi lowering. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Cleanup Created 5 years, 5 months ago
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1 //===- subzero/src/IceTargetLoweringMIPS32.h - MIPS32 lowering ---*- C++-*-===// 1 //===- subzero/src/IceTargetLoweringMIPS32.h - MIPS32 lowering ---*- C++-*-===//
2 // 2 //
3 // The Subzero Code Generator 3 // The Subzero Code Generator
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 /// 9 ///
10 /// \file 10 /// \file
(...skipping 94 matching lines...) Expand 10 before | Expand all | Expand 10 after
105 void lowerIntrinsicCall(const InstIntrinsicCall *Inst) override; 105 void lowerIntrinsicCall(const InstIntrinsicCall *Inst) override;
106 void lowerInsertElement(const InstInsertElement *Inst) override; 106 void lowerInsertElement(const InstInsertElement *Inst) override;
107 void lowerLoad(const InstLoad *Inst) override; 107 void lowerLoad(const InstLoad *Inst) override;
108 void lowerPhi(const InstPhi *Inst) override; 108 void lowerPhi(const InstPhi *Inst) override;
109 void lowerRet(const InstRet *Inst) override; 109 void lowerRet(const InstRet *Inst) override;
110 void lowerSelect(const InstSelect *Inst) override; 110 void lowerSelect(const InstSelect *Inst) override;
111 void lowerStore(const InstStore *Inst) override; 111 void lowerStore(const InstStore *Inst) override;
112 void lowerSwitch(const InstSwitch *Inst) override; 112 void lowerSwitch(const InstSwitch *Inst) override;
113 void lowerUnreachable(const InstUnreachable *Inst) override; 113 void lowerUnreachable(const InstUnreachable *Inst) override;
114 void prelowerPhis() override; 114 void prelowerPhis() override;
115 void lowerPhiAssignments(CfgNode *Node,
116 const AssignList &Assignments) override;
117 void doAddressOptLoad() override; 115 void doAddressOptLoad() override;
118 void doAddressOptStore() override; 116 void doAddressOptStore() override;
119 void randomlyInsertNop(float Probability) override; 117 void randomlyInsertNop(float Probability) override;
120 void makeRandomRegisterPermutation( 118 void makeRandomRegisterPermutation(
121 llvm::SmallVectorImpl<int32_t> &Permutation, 119 llvm::SmallVectorImpl<int32_t> &Permutation,
122 const llvm::SmallBitVector &ExcludeRegisters) const override; 120 const llvm::SmallBitVector &ExcludeRegisters) const override;
123 121
124 static Type stackSlotType(); 122 static Type stackSlotType();
125 123
126 bool UsesFramePointer = false; 124 bool UsesFramePointer = false;
(...skipping 42 matching lines...) Expand 10 before | Expand all | Expand 10 after
169 protected: 167 protected:
170 explicit TargetHeaderMIPS32(GlobalContext *Ctx); 168 explicit TargetHeaderMIPS32(GlobalContext *Ctx);
171 169
172 private: 170 private:
173 ~TargetHeaderMIPS32() = default; 171 ~TargetHeaderMIPS32() = default;
174 }; 172 };
175 173
176 } // end of namespace Ice 174 } // end of namespace Ice
177 175
178 #endif // SUBZERO_SRC_ICETARGETLOWERINGMIPS32_H 176 #endif // SUBZERO_SRC_ICETARGETLOWERINGMIPS32_H
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