| Index: src/IceTargetLoweringARM32.cpp
|
| diff --git a/src/IceTargetLoweringARM32.cpp b/src/IceTargetLoweringARM32.cpp
|
| index e09a85fff0b41b4fd692cba9b6f928c6da20099b..c9d61af8c2070ed121ca0a48319765bb53ab1b59 100644
|
| --- a/src/IceTargetLoweringARM32.cpp
|
| +++ b/src/IceTargetLoweringARM32.cpp
|
| @@ -348,17 +348,17 @@ bool TargetARM32::doBranchOpt(Inst *I, const CfgNode *NextNode) {
|
| return false;
|
| }
|
|
|
| -IceString TargetARM32::RegNames[] = {
|
| +IceString TargetARM32::getRegName(SizeT RegNum, Type Ty) const {
|
| + assert(RegNum < RegARM32::Reg_NUM);
|
| + (void)Ty;
|
| + static const char *RegNames[] = {
|
| #define X(val, encode, name, scratch, preserved, stackptr, frameptr, isInt, \
|
| isFP) \
|
| name,
|
| - REGARM32_TABLE
|
| + REGARM32_TABLE
|
| #undef X
|
| -};
|
| + };
|
|
|
| -IceString TargetARM32::getRegName(SizeT RegNum, Type Ty) const {
|
| - assert(RegNum < RegARM32::Reg_NUM);
|
| - (void)Ty;
|
| return RegNames[RegNum];
|
| }
|
|
|
|
|