| Index: runtime/vm/assembler_arm_test.cc
|
| ===================================================================
|
| --- runtime/vm/assembler_arm_test.cc (revision 19404)
|
| +++ runtime/vm/assembler_arm_test.cc (working copy)
|
| @@ -1361,6 +1361,68 @@
|
| EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
|
| }
|
|
|
| +
|
| +// Check that assembler mrc instruction encoding, and simulator decoding
|
| +// are in agreement.
|
| +#if defined(USING_SIMULATOR)
|
| +ASSEMBLER_TEST_GENERATE(MrcHaveDiv, assembler) {
|
| + __ mrc(R0, 15, 0, 0, 2, 0);
|
| + __ Lsr(R0, R0, 24);
|
| + __ and_(R0, R0, ShifterOperand(0xf));
|
| + __ mov(PC, ShifterOperand(LR));
|
| +}
|
| +
|
| +
|
| +ASSEMBLER_TEST_RUN(MrcHaveDiv, test) {
|
| + EXPECT(test != NULL);
|
| + typedef int (*Tst)();
|
| + bool b = CPUFeatures::integer_division_supported();
|
| + CPUFeatures::set_integer_division_supported(true);
|
| + EXPECT_LT(0, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
|
| + CPUFeatures::set_integer_division_supported(b);
|
| +}
|
| +
|
| +
|
| +ASSEMBLER_TEST_GENERATE(MrcNoDiv, assembler) {
|
| + __ mrc(R0, 15, 0, 0, 2, 0);
|
| + __ Lsr(R0, R0, 24);
|
| + __ and_(R0, R0, ShifterOperand(0xf));
|
| + __ mov(PC, ShifterOperand(LR));
|
| +}
|
| +
|
| +
|
| +ASSEMBLER_TEST_RUN(MrcNoDiv, test) {
|
| + EXPECT(test != NULL);
|
| + typedef int (*Tst)();
|
| + bool b = CPUFeatures::integer_division_supported();
|
| + CPUFeatures::set_integer_division_supported(false);
|
| + EXPECT_EQ(0, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
|
| + CPUFeatures::set_integer_division_supported(b);
|
| +}
|
| +#endif // defined(USING_SIMULATOR)
|
| +
|
| +
|
| +ASSEMBLER_TEST_GENERATE(MrcReal, assembler) {
|
| + __ mrc(R0, 15, 0, 0, 2, 0);
|
| + __ Lsr(R0, R0, 24);
|
| + __ and_(R0, R0, ShifterOperand(0xf));
|
| + __ mov(PC, ShifterOperand(LR));
|
| +}
|
| +
|
| +
|
| +ASSEMBLER_TEST_RUN(MrcReal, test) {
|
| + EXPECT(test != NULL);
|
| + typedef int (*Tst)();
|
| + bool have_div = CPUFeatures::integer_division_supported();
|
| + int32_t r = EXECUTE_TEST_CODE_INT32(Tst, test->entry());
|
| + if (have_div) {
|
| + EXPECT_LT(0, r);
|
| + } else {
|
| + EXPECT_EQ(0, r);
|
| + }
|
| +}
|
| +
|
| +
|
| } // namespace dart
|
|
|
| #endif // defined TARGET_ARCH_ARM
|
|
|