Adds mrc instruction to arm simulator, assembler, disassembler.

runtime/vm/assembler_arm_test.cc

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include "vm/globals.h"
 #if defined(TARGET_ARCH_ARM)
 
 #include "vm/assembler.h"
 #include "vm/os.h"
 #include "vm/unit_test.h"
@@ skipping 1343 matching lines @@
   __ mov(PC, ShifterOperand(LR));
 }
 
 
 ASSEMBLER_TEST_RUN(VstmsVldms_off, test) {
   EXPECT(test != NULL);
   typedef int (*Tst)();
   EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
+
+// Check that assembler mrc instruction encoding, and simulator decoding
+// are in agreement.
+#if defined(USING_SIMULATOR)
+ASSEMBLER_TEST_GENERATE(MrcHaveDiv, assembler) {
+  __ mrc(R0, 15, 0, 0, 2, 0);
+  __ Lsr(R0, R0, 24);
+  __ and_(R0, R0, ShifterOperand(0xf));
+  __ mov(PC, ShifterOperand(LR));
+}
+
+
+ASSEMBLER_TEST_RUN(MrcHaveDiv, test) {
+  EXPECT(test != NULL);
+  typedef int (*Tst)();
+  bool b = CPUFeatures::integer_division_supported();
+  CPUFeatures::set_integer_division_supported(true);
+  EXPECT_LT(0, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
+  CPUFeatures::set_integer_division_supported(b);
+}
+
+
+ASSEMBLER_TEST_GENERATE(MrcNoDiv, assembler) {
+  __ mrc(R0, 15, 0, 0, 2, 0);
+  __ Lsr(R0, R0, 24);
+  __ and_(R0, R0, ShifterOperand(0xf));
+  __ mov(PC, ShifterOperand(LR));
+}
+
+
+ASSEMBLER_TEST_RUN(MrcNoDiv, test) {
+  EXPECT(test != NULL);
+  typedef int (*Tst)();
+  bool b = CPUFeatures::integer_division_supported();
+  CPUFeatures::set_integer_division_supported(false);
+  EXPECT_EQ(0, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
+  CPUFeatures::set_integer_division_supported(b);
+}
+#endif  // defined(USING_SIMULATOR)
+
+
+ASSEMBLER_TEST_GENERATE(MrcReal, assembler) {
+  __ mrc(R0, 15, 0, 0, 2, 0);
+  __ Lsr(R0, R0, 24);
+  __ and_(R0, R0, ShifterOperand(0xf));
+  __ mov(PC, ShifterOperand(LR));
+}
+
+
+ASSEMBLER_TEST_RUN(MrcReal, test) {
+  EXPECT(test != NULL);
+  typedef int (*Tst)();
+  bool have_div = CPUFeatures::integer_division_supported();
+  int32_t r = EXECUTE_TEST_CODE_INT32(Tst, test->entry());
+  if (have_div) {
+    EXPECT_LT(0, r);
+  } else {
+    EXPECT_EQ(0, r);
+  }
+}
+
+
 }  // namespace dart
 
 #endif  // defined TARGET_ARCH_ARM