src/trusted/validator_arm/gen/arm32_decode.h - Issue 12223046: Use generated actual decoders for ARM table:

Unified Diff: src/trusted/validator_arm/gen/arm32_decode.h

Issue 12223046: Use generated actual decoders for ARM table: (Closed) Base URL: svn://svn.chromium.org/native_client/trunk/src/native_client/

Patch Set: Created 7 years, 10 months ago

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Index: src/trusted/validator_arm/gen/arm32_decode.h

===================================================================

--- src/trusted/validator_arm/gen/arm32_decode.h (revision 10736)

+++ src/trusted/validator_arm/gen/arm32_decode.h (working copy)

@@ -157,11 +157,14 @@

const Actual_BKPT_cccc00010010iiiiiiiiiiii0111iiii_case_1 Actual_BKPT_cccc00010010iiiiiiiiiiii0111iiii_case_1_instance_;

const Actual_BLX_immediate_1111101hiiiiiiiiiiiiiiiiiiiiiiii_case_1 Actual_BLX_immediate_1111101hiiiiiiiiiiiiiiiiiiiiiiii_case_1_instance_;

const Actual_BLX_register_cccc000100101111111111110011mmmm_case_1 Actual_BLX_register_cccc000100101111111111110011mmmm_case_1_instance_;

+ const Actual_BL_BLX_immediate_cccc1011iiiiiiiiiiiiiiiiiiiiiiii_case_1 Actual_BL_BLX_immediate_cccc1011iiiiiiiiiiiiiiiiiiiiiiii_case_1_instance_;

+ const Actual_B_cccc1010iiiiiiiiiiiiiiiiiiiiiiii_case_1 Actual_B_cccc1010iiiiiiiiiiiiiiiiiiiiiiii_case_1_instance_;

const Actual_Bx_cccc000100101111111111110001mmmm_case_1 Actual_Bx_cccc000100101111111111110001mmmm_case_1_instance_;

const Actual_CLZ_cccc000101101111dddd11110001mmmm_case_1 Actual_CLZ_cccc000101101111dddd11110001mmmm_case_1_instance_;

const Actual_CMN_immediate_cccc00110111nnnn0000iiiiiiiiiiii_case_1 Actual_CMN_immediate_cccc00110111nnnn0000iiiiiiiiiiii_case_1_instance_;

const Actual_CMN_register_cccc00010111nnnn0000iiiiitt0mmmm_case_1 Actual_CMN_register_cccc00010111nnnn0000iiiiitt0mmmm_case_1_instance_;

const Actual_CMN_register_shifted_register_cccc00010111nnnn0000ssss0tt1mmmm_case_1 Actual_CMN_register_shifted_register_cccc00010111nnnn0000ssss0tt1mmmm_case_1_instance_;

+ const Actual_LDMDA_LDMFA_cccc100000w1nnnnrrrrrrrrrrrrrrrr_case_1 Actual_LDMDA_LDMFA_cccc100000w1nnnnrrrrrrrrrrrrrrrr_case_1_instance_;

const Actual_LDRD_immediate_cccc000pu1w0nnnnttttiiii1101iiii_case_1 Actual_LDRD_immediate_cccc000pu1w0nnnnttttiiii1101iiii_case_1_instance_;

const Actual_LDRD_literal_cccc0001u1001111ttttiiii1101iiii_case_1 Actual_LDRD_literal_cccc0001u1001111ttttiiii1101iiii_case_1_instance_;

const Actual_LDRD_register_cccc000pu0w0nnnntttt00001101mmmm_case_1 Actual_LDRD_register_cccc000pu0w0nnnntttt00001101mmmm_case_1_instance_;

@@ -186,6 +189,7 @@

const Actual_SMLAL_A1_cccc0000111shhhhllllmmmm1001nnnn_case_1 Actual_SMLAL_A1_cccc0000111shhhhllllmmmm1001nnnn_case_1_instance_;

const Actual_SMULBB_SMULBT_SMULTB_SMULTT_cccc00010110dddd0000mmmm1xx0nnnn_case_1 Actual_SMULBB_SMULBT_SMULTB_SMULTT_cccc00010110dddd0000mmmm1xx0nnnn_case_1_instance_;

const Actual_SMULL_A1_cccc0000110shhhhllllmmmm1001nnnn_case_1 Actual_SMULL_A1_cccc0000110shhhhllllmmmm1001nnnn_case_1_instance_;

+ const Actual_STMDA_STMED_cccc100000w0nnnnrrrrrrrrrrrrrrrr_case_1 Actual_STMDA_STMED_cccc100000w0nnnnrrrrrrrrrrrrrrrr_case_1_instance_;

const Actual_STRD_immediate_cccc000pu1w0nnnnttttiiii1111iiii_case_1 Actual_STRD_immediate_cccc000pu1w0nnnnttttiiii1111iiii_case_1_instance_;

const Actual_STRD_register_cccc000pu0w0nnnntttt00001111mmmm_case_1 Actual_STRD_register_cccc000pu0w0nnnntttt00001111mmmm_case_1_instance_;

const Actual_STREXB_cccc00011100nnnndddd11111001tttt_case_1 Actual_STREXB_cccc00011100nnnndddd11111001tttt_case_1_instance_;

@@ -202,7 +206,6 @@

const Binary4RegisterDualOp Binary4RegisterDualOp_instance_;

const Binary4RegisterDualOpNoCondsUpdate Binary4RegisterDualOpNoCondsUpdate_instance_;

const Binary4RegisterDualResultNoCondsUpdate Binary4RegisterDualResultNoCondsUpdate_instance_;

- const BranchImmediate24 BranchImmediate24_instance_;

const CondVfpOp CondVfpOp_instance_;

const DataBarrier DataBarrier_instance_;

const Deprecated Deprecated_instance_;

@@ -213,7 +216,6 @@

const LdrImmediateOp LdrImmediateOp_instance_;

const Load2RegisterImm12Op Load2RegisterImm12Op_instance_;

const Load3RegisterImm5Op Load3RegisterImm5Op_instance_;

- const LoadRegisterList LoadRegisterList_instance_;

const LoadVectorRegister LoadVectorRegister_instance_;

const LoadVectorRegisterList LoadVectorRegisterList_instance_;

const MoveDoubleVfpRegisterOp MoveDoubleVfpRegisterOp_instance_;

@@ -224,7 +226,6 @@

const PreloadRegisterPairOp PreloadRegisterPairOp_instance_;

const Store2RegisterImm12Op Store2RegisterImm12Op_instance_;

const Store3RegisterImm5Op Store3RegisterImm5Op_instance_;

- const StoreRegisterList StoreRegisterList_instance_;

const StoreVectorRegister StoreVectorRegister_instance_;

const StoreVectorRegisterList StoreVectorRegisterList_instance_;

const Unary1RegisterBitRangeMsbGeLsb Unary1RegisterBitRangeMsbGeLsb_instance_;

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