Adds the X8664 register definition.

Adds the X8664 register definition.

BUG=
R=stichnot@chromium.org

Committed: https://gerrit.chromium.org/gerrit/gitweb?p=native_client/pnacl-subzero.git;a=commit;h=2b18687b888d7d5caf10fa9d0de9fc860279b671

[John, 2015-06-26 00:13:05]

jpp@chromium.org changed reviewers:
+ stichnot@chromium.org

[John, 2015-06-26 00:13:05]

I was going to work on the assembler, but that will be painfully big. Let's
start small. :)

[Jim Stichnoth, 2015-06-26 01:12:03]

otherwise lgtm

https://codereview.chromium.org/1211103004/diff/1/src/IceInstX8664.def
File src/IceInstX8664.def (right):

https://codereview.chromium.org/1211103004/diff/1/src/IceInstX8664.def#newcode1
src/IceInstX8664.def:1: //===- subzero/src/IceInstX8664.def - X-macros for
x86-32 insts -*- C++ -*-===//
x86-64, presumably?

https://codereview.chromium.org/1211103004/diff/1/src/IceInstX8664.def#newcode21
src/IceInstX8664.def:21: stackptr, frameptr, isI8, isInt, isFP */               
                  \
I wonder if we'll be able to get rid of isI8 for x86-64?

https://codereview.chromium.org/1211103004/diff/1/src/IceInstX8664.def#newcode23
src/IceInstX8664.def:23: X(Reg_rcx, = Reg_rax + 1, "rcx", "ecx", "cx", "cl", 1,
0, 0, 0, 1, 1, 0)     \
It would be nice if some or all of these tables could have their columns lined
up.

https://codereview.chromium.org/1211103004/diff/1/src/IceInstX8664.def#newcode60
src/IceInstX8664.def:60: X(Reg_xmm15, = Reg_xmm0 + 14, "xmm15", "", "", "", 1,
0, 0, 0, 0, 0, 1)
+ 15

https://codereview.chromium.org/1211103004/diff/1/src/IceInstX8664.def#newcode68
src/IceInstX8664.def:68: // Note that the isI8 attributed of Reg_ah is not set. 
In general we
Long live Reg_ah.

https://codereview.chromium.org/1211103004/diff/1/src/IceInstX8664.def#newcod...
src/IceInstX8664.def:130: X(Br_g, = 15, Br_le, "g", "jg") //#define X(tag,
encode, opp, dump, emit)
put #define comment on separate line, here and below

[John, 2015-06-26 20:40:32]

https://codereview.chromium.org/1211103004/diff/1/src/IceInstX8664.def
File src/IceInstX8664.def (right):

https://codereview.chromium.org/1211103004/diff/1/src/IceInstX8664.def#newcode1
src/IceInstX8664.def:1: //===- subzero/src/IceInstX8664.def - X-macros for
x86-32 insts -*- C++ -*-===//
On 2015/06/26 01:12:02, stichnot wrote:
> x86-64, presumably?

Done.

https://codereview.chromium.org/1211103004/diff/1/src/IceInstX8664.def#newcode21
src/IceInstX8664.def:21: stackptr, frameptr, isI8, isInt, isFP */               
                  \
On 2015/06/26 01:12:02, stichnot wrote:
> I wonder if we'll be able to get rid of isI8 for x86-64?

Good point. Given that x86-64 is a little bit more sane when it comes to 8-bit
registers, it's unlikely we'll need this info. I will add it later in case I
need.

https://codereview.chromium.org/1211103004/diff/1/src/IceInstX8664.def#newcode23
src/IceInstX8664.def:23: X(Reg_rcx, = Reg_rax + 1, "rcx", "ecx", "cx", "cl", 1,
0, 0, 0, 1, 1, 0)     \
On 2015/06/26 01:12:02, stichnot wrote:
> It would be nice if some or all of these tables could have their columns lined
> up.

I meant to do this, but I forgot to before sending the CL. Done.

https://codereview.chromium.org/1211103004/diff/1/src/IceInstX8664.def#newcode60
src/IceInstX8664.def:60: X(Reg_xmm15, = Reg_xmm0 + 14, "xmm15", "", "", "", 1,
0, 0, 0, 0, 0, 1)
On 2015/06/26 01:12:02, stichnot wrote:
> + 15

Done.

https://codereview.chromium.org/1211103004/diff/1/src/IceInstX8664.def#newcode68
src/IceInstX8664.def:68: // Note that the isI8 attributed of Reg_ah is not set. 
In general we
On 2015/06/26 01:12:02, stichnot wrote:
> Long live Reg_ah.

Long live! I might be able to avoid it completly. If I do, I will rewrite this.

https://codereview.chromium.org/1211103004/diff/1/src/IceInstX8664.def#newcod...
src/IceInstX8664.def:130: X(Br_g, = 15, Br_le, "g", "jg") //#define X(tag,
encode, opp, dump, emit)
On 2015/06/26 01:12:02, stichnot wrote:
> put #define comment on separate line, here and below

Done.

[John, 2015-06-26 20:41:05]

Committed patchset #2 (id:20001) manually as
2b18687b888d7d5caf10fa9d0de9fc860279b671 (presubmit successful).