Chromium Code Reviews| Index: src/trusted/validator_ragel/gen_dfa.py |
| diff --git a/src/trusted/validator_ragel/gen_dfa.py b/src/trusted/validator_ragel/gen_dfa.py |
| index d17ade790ff33680bc4de34be1aa6ce577e7eb0a..22d57d8d93bf064df0edbb243bdfe06089c6f14c 100644 |
| --- a/src/trusted/validator_ragel/gen_dfa.py |
| +++ b/src/trusted/validator_ragel/gen_dfa.py |
| @@ -114,6 +114,11 @@ SUPPORTED_ATTRIBUTES = [ |
| ] |
| +def Attribute(name): |
| + assert name in SUPPORTED_ATTRIBUTES |
| + return name |
| + |
| + |
| class Operand(object): |
| __slots__ = [ |
| @@ -187,6 +192,12 @@ class Operand(object): |
| """ |
| if self.size == 'b': |
| return '8bit' |
| + if self.size == 'w': |
| + return '16bit' |
| + if self.size == 'd': |
| + return '32bit' |
| + if self.size == 'q': |
| + return '64bit' |
| # TODO(shcherbina): support other formats. |
| raise NotImplementedError() |
| @@ -204,7 +215,24 @@ class Instruction(object): |
| 'name', |
| 'operands', |
| 'opcodes', |
| - 'attributes'] |
| + 'attributes', |
| + 'rex'] |
| + |
| + class RexStatus(object): |
| + __slots__ = [ |
| + 'b_matters', |
| + 'x_matters', |
| + 'r_matters', |
| + 'w_matters', |
| + 'w_set'] |
| + |
| + def __init__(self): |
| + self.rex = self.RexStatus() |
| + self.rex.b_matters = False |
| + self.rex.x_matters = False |
| + self.rex.r_matters = False |
| + self.rex.w_matters = True |
| + self.rex.w_set = False |
| @staticmethod |
| def Parse(line): |
| @@ -329,6 +357,11 @@ class Instruction(object): |
| """ |
| return re.sub(r'\W', '_', self.name) |
| + def IsVexOrXop(self): |
| + return len(self.opcodes) >= 3 and ( |
| + self.opcodes[0] == '0xc4' or |
| + self.opcodes[0] == '0x8f' and self.opcodes[1] != '/0') |
|
khim
2013/01/29 14:07:01
I don't think you need to check self.opcodes[1] he
Vlad Shcherbina
2013/01/29 14:50:37
Changed to what I think is more straightforward ch
|
| + |
| def __str__(self): |
| return ' '.join([self.name] + map(str, self.operands)) |
| @@ -349,6 +382,18 @@ class InstructionPrinter(object): |
| def GetContent(self): |
| return self._out.getvalue() |
| + def _PrintRexPrefix(self, instruction): |
|
halyavin
2013/01/29 15:15:56
"""Print machine for rex prefix."""
|
| + assert self._bitness == 64 |
| + assert not instruction.IsVexOrXop() |
| + |
| + if Attribute('norex') in instruction.attributes: |
| + return |
| + |
| + if instruction.rex.w_set: |
| + self._out.write('REXW_RXB\n') |
| + else: |
| + self._out.write('REX_RXB?\n') |
| + |
| def _PrintOpcode(self, instruction): |
|
halyavin
2013/01/29 15:15:56
"""Print machine for opcode."""
|
| main_opcode_part = instruction.GetMainOpcodePart() |
| if instruction.HasRegisterInOpcode(): |
| @@ -403,8 +448,21 @@ class InstructionPrinter(object): |
| # TODO(shcherbina): print info about CPU features. |
| # TODO(shcherbina): att_show_name_suffix. |
| - # TODO(shcherbina): print spurious REX stuff (probably not in this |
| - # function). |
| + if (self._mode == DECODER and |
| + self._bitness == 64 and |
| + not instruction.IsVexOrXop()): |
| + # Note that even if 'norex' attribute is present, we print |
| + # @spurious_rex_... actions because NOP needs them (and it has REX |
| + # prefix specified as part of the opcode). |
| + # TODO(shcherbina): fix that? |
| + if not instruction.rex.b_matters: |
| + self._out.write('@set_spurious_rex_b\n') |
| + if not instruction.rex.x_matters: |
| + self._out.write('@set_spurious_rex_x\n') |
| + if not instruction.rex.r_matters: |
| + self._out.write('@set_spurious_rex_r\n') |
| + if not instruction.rex.w_matters: |
| + self._out.write('@set_spurious_rex_w\n') |
| def _PrintOperandSource(self, operand, source): |
| # TODO(shcherbina): add mechanism to check that all operand sources are |
| @@ -427,9 +485,13 @@ class InstructionPrinter(object): |
| def PrintInstructionWithoutModRM(self, instruction): |
| # TODO(shcherbina): print legacy prefixes. |
| - # TODO(shcherbina): print REX prefix. |
| + assert not instruction.IsVexOrXop() |
|
khim
2013/01/29 14:07:01
Why not? Where and how do you plan to print vzeroa
Vlad Shcherbina
2013/01/29 14:50:37
Right, marked as 'not implemented'.
|
| assert not instruction.HasModRM() |
| + |
| + if self._bitness == 64: |
| + self._PrintRexPrefix(instruction) |
| + |
| assert not instruction.HasOpcodeInsteadOfImmediate(), 'not supported yet' |
| self._PrintOpcode(instruction) |