Index: sim/testsuite/sim/bfin/c_dsp32shiftim_amix.s |
diff --git a/sim/testsuite/sim/bfin/c_dsp32shiftim_amix.s b/sim/testsuite/sim/bfin/c_dsp32shiftim_amix.s |
index 1bf91784556ecc70f81afec42fd457c0b27c78b8..d1c0c20ea34c5b12302fa585cb5ad8237ddfa06e 100644 |
--- a/sim/testsuite/sim/bfin/c_dsp32shiftim_amix.s |
+++ b/sim/testsuite/sim/bfin/c_dsp32shiftim_amix.s |
@@ -114,6 +114,13 @@ R7 = R2 << 5 (S); /* r7 = 0x80000000 */ |
CHECKREG r6, 0x80000000; |
CHECKREG r7, 0x80000000; |
+imm32 r0, 0xFFFFFFF4; |
+imm32 r2, 0xFFF00001; |
+R6 = R0 << 31 (S); /* r6 = 0x80000000 */ |
+R7 = R2 << 31 (S); /* r7 = 0x80000000 */ |
+CHECKREG r6, 0x80000000; |
+CHECKREG r7, 0x80000000; |
+ |
// Ashift : NEGATIVE data, count (-)=right (half reg) Working ok |
imm32 r0, 0x80f080f0; |