Merge GDB 7.5.1

sim/bfin/bfin-sim.h

Index: sim/bfin/bfin-sim.h
diff --git a/sim/bfin/bfin-sim.h b/sim/bfin/bfin-sim.h
index 17bcdeb9302d87f0a50a34dbc2526edc19aaf559..9dadcd9d2e9024c72da22db22a15000cf6078789 100644
--- a/sim/bfin/bfin-sim.h
+++ b/sim/bfin/bfin-sim.h
@@ -44,6 +44,13 @@ struct store {
   bu32 val;
 };
 
+enum bfin_parallel_group {
+  BFIN_PARALLEL_NONE,
+  BFIN_PARALLEL_GROUP0,	/* 32bit slot.  */
+  BFIN_PARALLEL_GROUP1,	/* 16bit group1.  */
+  BFIN_PARALLEL_GROUP2,	/* 16bit group2.  */
+};
+
 /* The KSP/USP handling wrt SP may not follow the hardware exactly (the hw
    looks at current mode and uses either SP or USP based on that.  We instead
    always operate on SP and mirror things in KSP and USP.  During a CEC
@@ -78,6 +85,10 @@ struct bfin_cpu_state
   /* The pc currently being interpreted in parallel insns.  */
   bu32 multi_pc;
 
+  /* Some insns are valid in group1, and others in group2, so we
+     need to keep track of the exact slot we're processing.  */
+  enum bfin_parallel_group group;
+
   /* Needed for supporting the DISALGNEXCPT instruction */
   int dis_algn_expt;
 
@@ -126,6 +137,7 @@ struct bfin_cpu_state
 #define EMUDAT_INREG	(BFIN_CPU_STATE.emudat[0])
 #define EMUDAT_OUTREG	(BFIN_CPU_STATE.emudat[1])
 #define INSN_LEN	(BFIN_CPU_STATE.insn_len)
+#define PARALLEL_GROUP	(BFIN_CPU_STATE.group)
 #define CYCLE_DELAY	(BFIN_CPU_STATE.cycle_delay)
 #define DIS_ALGN_EXPT	(BFIN_CPU_STATE.dis_algn_expt)