| Index: runtime/vm/constants_arm.h
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| ===================================================================
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| --- runtime/vm/constants_arm.h	(revision 17245)
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| +++ runtime/vm/constants_arm.h	(working copy)
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| @@ -1,4 +1,4 @@
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| -// Copyright (c) 2011, the Dart project authors.  Please see the AUTHORS file
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| +// Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
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|  // for details. All rights reserved. Use of this source code is governed by a
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|  // BSD-style license that can be found in the LICENSE file.
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|  
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| @@ -7,6 +7,14 @@
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|  
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|  namespace dart {
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|  
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| +// We support both VFPv3-D16 and VFPv3-D32 profiles, but currently only one at
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| +// a time.
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| +#define VFPv3_D16
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| +#if defined(VFPv3_D16) == defined(VFPv3_D32)
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| +#error "Exactly one of VFPv3_D16 or VFPv3_D32 can be defined at a time."
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| +#endif
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| +
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| +
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|  enum Register {
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|    R0  =  0,
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|    R1  =  1,
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| @@ -29,11 +37,107 @@
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|    SP  = 13,
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|    LR  = 14,
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|    PC  = 15,
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| -  kNumberOfCoreRegisters = 16,
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| +  kNumberOfCpuRegisters = 16,
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|    kNoRegister = -1,
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|  };
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|  
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|  
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| +// Values for single-precision floating point registers.
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| +enum SRegister {
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| +  S0  =  0,
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| +  S1  =  1,
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| +  S2  =  2,
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| +  S3  =  3,
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| +  S4  =  4,
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| +  S5  =  5,
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| +  S6  =  6,
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| +  S7  =  7,
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| +  S8  =  8,
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| +  S9  =  9,
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| +  S10 = 10,
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| +  S11 = 11,
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| +  S12 = 12,
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| +  S13 = 13,
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| +  S14 = 14,
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| +  S15 = 15,
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| +  S16 = 16,
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| +  S17 = 17,
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| +  S18 = 18,
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| +  S19 = 19,
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| +  S20 = 20,
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| +  S21 = 21,
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| +  S22 = 22,
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| +  S23 = 23,
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| +  S24 = 24,
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| +  S25 = 25,
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| +  S26 = 26,
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| +  S27 = 27,
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| +  S28 = 28,
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| +  S29 = 29,
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| +  S30 = 30,
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| +  S31 = 31,
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| +  kNumberOfSRegisters = 32,
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| +  kNoSRegister = -1,
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| +};
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| +
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| +
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| +// Values for double-precision floating point registers.
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| +enum DRegister {
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| +  D0  =  0,
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| +  D1  =  1,
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| +  D2  =  2,
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| +  D3  =  3,
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| +  D4  =  4,
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| +  D5  =  5,
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| +  D6  =  6,
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| +  D7  =  7,
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| +  D8  =  8,
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| +  D9  =  9,
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| +  D10 = 10,
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| +  D11 = 11,
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| +  D12 = 12,
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| +  D13 = 13,
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| +  D14 = 14,
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| +  D15 = 15,
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| +#ifdef VFPv3_D16
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| +  kNumberOfDRegisters = 16,
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| +#else
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| +  D16 = 16,
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| +  D17 = 17,
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| +  D18 = 18,
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| +  D19 = 19,
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| +  D20 = 20,
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| +  D21 = 21,
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| +  D22 = 22,
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| +  D23 = 23,
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| +  D24 = 24,
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| +  D25 = 25,
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| +  D26 = 26,
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| +  D27 = 27,
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| +  D28 = 28,
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| +  D29 = 29,
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| +  D30 = 30,
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| +  D31 = 31,
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| +  kNumberOfDRegisters = 32,
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| +#endif
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| +  kNumberOfOverlappingDRegisters = 16,
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| +  kNoDRegister = -1,
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| +};
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| +
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| +
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| +// Architecture independent aliases.
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| +typedef DRegister FpuRegister;
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| +const FpuRegister FpuTMP = D0;
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| +const int kNumberOfFpuRegisters = kNumberOfDRegisters;
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| +
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| +
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| +// Register aliases.
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| +const Register TMP = kNoRegister;  // No scratch register used by assembler.
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| +const Register CTX = R9;           // Caches current context in generated code.
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| +const Register SPREG = SP;
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| +const Register FPREG = FP;
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| +
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| +
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|  // Values for the condition field as defined in section A3.2.
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|  enum Condition {
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|    kNoCondition = -1,
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| 
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