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1 // Copyright (c) 2011, the Dart project authors. Please see the AUTHORS file | 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file |
2 // for details. All rights reserved. Use of this source code is governed by a | 2 // for details. All rights reserved. Use of this source code is governed by a |
3 // BSD-style license that can be found in the LICENSE file. | 3 // BSD-style license that can be found in the LICENSE file. |
4 | 4 |
5 #ifndef VM_CONSTANTS_ARM_H_ | 5 #ifndef VM_CONSTANTS_ARM_H_ |
6 #define VM_CONSTANTS_ARM_H_ | 6 #define VM_CONSTANTS_ARM_H_ |
7 | 7 |
8 namespace dart { | 8 namespace dart { |
9 | 9 |
| 10 // We support both VFPv3-D16 and VFPv3-D32 profiles, but currently only one at |
| 11 // a time. |
| 12 #define VFPv3_D16 |
| 13 #if defined(VFPv3_D16) == defined(VFPv3_D32) |
| 14 #error "Exactly one of VFPv3_D16 or VFPv3_D32 can be defined at a time." |
| 15 #endif |
| 16 |
| 17 |
10 enum Register { | 18 enum Register { |
11 R0 = 0, | 19 R0 = 0, |
12 R1 = 1, | 20 R1 = 1, |
13 R2 = 2, | 21 R2 = 2, |
14 R3 = 3, | 22 R3 = 3, |
15 R4 = 4, | 23 R4 = 4, |
16 R5 = 5, | 24 R5 = 5, |
17 R6 = 6, | 25 R6 = 6, |
18 R7 = 7, | 26 R7 = 7, |
19 R8 = 8, | 27 R8 = 8, |
20 R9 = 9, | 28 R9 = 9, |
21 R10 = 10, | 29 R10 = 10, |
22 R11 = 11, | 30 R11 = 11, |
23 R12 = 12, | 31 R12 = 12, |
24 R13 = 13, | 32 R13 = 13, |
25 R14 = 14, | 33 R14 = 14, |
26 R15 = 15, | 34 R15 = 15, |
27 FP = 11, | 35 FP = 11, |
28 IP = 12, | 36 IP = 12, |
29 SP = 13, | 37 SP = 13, |
30 LR = 14, | 38 LR = 14, |
31 PC = 15, | 39 PC = 15, |
32 kNumberOfCoreRegisters = 16, | 40 kNumberOfCpuRegisters = 16, |
33 kNoRegister = -1, | 41 kNoRegister = -1, |
34 }; | 42 }; |
35 | 43 |
36 | 44 |
| 45 // Values for single-precision floating point registers. |
| 46 enum SRegister { |
| 47 S0 = 0, |
| 48 S1 = 1, |
| 49 S2 = 2, |
| 50 S3 = 3, |
| 51 S4 = 4, |
| 52 S5 = 5, |
| 53 S6 = 6, |
| 54 S7 = 7, |
| 55 S8 = 8, |
| 56 S9 = 9, |
| 57 S10 = 10, |
| 58 S11 = 11, |
| 59 S12 = 12, |
| 60 S13 = 13, |
| 61 S14 = 14, |
| 62 S15 = 15, |
| 63 S16 = 16, |
| 64 S17 = 17, |
| 65 S18 = 18, |
| 66 S19 = 19, |
| 67 S20 = 20, |
| 68 S21 = 21, |
| 69 S22 = 22, |
| 70 S23 = 23, |
| 71 S24 = 24, |
| 72 S25 = 25, |
| 73 S26 = 26, |
| 74 S27 = 27, |
| 75 S28 = 28, |
| 76 S29 = 29, |
| 77 S30 = 30, |
| 78 S31 = 31, |
| 79 kNumberOfSRegisters = 32, |
| 80 kNoSRegister = -1, |
| 81 }; |
| 82 |
| 83 |
| 84 // Values for double-precision floating point registers. |
| 85 enum DRegister { |
| 86 D0 = 0, |
| 87 D1 = 1, |
| 88 D2 = 2, |
| 89 D3 = 3, |
| 90 D4 = 4, |
| 91 D5 = 5, |
| 92 D6 = 6, |
| 93 D7 = 7, |
| 94 D8 = 8, |
| 95 D9 = 9, |
| 96 D10 = 10, |
| 97 D11 = 11, |
| 98 D12 = 12, |
| 99 D13 = 13, |
| 100 D14 = 14, |
| 101 D15 = 15, |
| 102 #ifdef VFPv3_D16 |
| 103 kNumberOfDRegisters = 16, |
| 104 #else |
| 105 D16 = 16, |
| 106 D17 = 17, |
| 107 D18 = 18, |
| 108 D19 = 19, |
| 109 D20 = 20, |
| 110 D21 = 21, |
| 111 D22 = 22, |
| 112 D23 = 23, |
| 113 D24 = 24, |
| 114 D25 = 25, |
| 115 D26 = 26, |
| 116 D27 = 27, |
| 117 D28 = 28, |
| 118 D29 = 29, |
| 119 D30 = 30, |
| 120 D31 = 31, |
| 121 kNumberOfDRegisters = 32, |
| 122 #endif |
| 123 kNumberOfOverlappingDRegisters = 16, |
| 124 kNoDRegister = -1, |
| 125 }; |
| 126 |
| 127 |
| 128 // Architecture independent aliases. |
| 129 typedef DRegister FpuRegister; |
| 130 const FpuRegister FpuTMP = D0; |
| 131 const int kNumberOfFpuRegisters = kNumberOfDRegisters; |
| 132 |
| 133 |
| 134 // Register aliases. |
| 135 const Register TMP = kNoRegister; // No scratch register used by assembler. |
| 136 const Register CTX = R9; // Caches current context in generated code. |
| 137 const Register SPREG = SP; |
| 138 const Register FPREG = FP; |
| 139 |
| 140 |
37 // Values for the condition field as defined in section A3.2. | 141 // Values for the condition field as defined in section A3.2. |
38 enum Condition { | 142 enum Condition { |
39 kNoCondition = -1, | 143 kNoCondition = -1, |
40 EQ = 0, // equal | 144 EQ = 0, // equal |
41 NE = 1, // not equal | 145 NE = 1, // not equal |
42 CS = 2, // carry set/unsigned higher or same | 146 CS = 2, // carry set/unsigned higher or same |
43 CC = 3, // carry clear/unsigned lower | 147 CC = 3, // carry clear/unsigned lower |
44 MI = 4, // minus/negative | 148 MI = 4, // minus/negative |
45 PL = 5, // plus/positive or zero | 149 PL = 5, // plus/positive or zero |
46 VS = 6, // overflow | 150 VS = 6, // overflow |
47 VC = 7, // no overflow | 151 VC = 7, // no overflow |
48 HI = 8, // unsigned higher | 152 HI = 8, // unsigned higher |
49 LS = 9, // unsigned lower or same | 153 LS = 9, // unsigned lower or same |
50 GE = 10, // signed greater than or equal | 154 GE = 10, // signed greater than or equal |
51 LT = 11, // signed less than | 155 LT = 11, // signed less than |
52 GT = 12, // signed greater than | 156 GT = 12, // signed greater than |
53 LE = 13, // signed less than or equal | 157 LE = 13, // signed less than or equal |
54 AL = 14, // always (unconditional) | 158 AL = 14, // always (unconditional) |
55 kSpecialCondition = 15, // special condition (refer to section A3.2.1) | 159 kSpecialCondition = 15, // special condition (refer to section A3.2.1) |
56 kMaxCondition = 16, | 160 kMaxCondition = 16, |
57 }; | 161 }; |
58 | 162 |
59 } // namespace dart | 163 } // namespace dart |
60 | 164 |
61 #endif // VM_CONSTANTS_ARM_H_ | 165 #endif // VM_CONSTANTS_ARM_H_ |
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