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Unified Diff: src/IceClFlags.cpp

Issue 1182603004: Subzero: Transform suitable Load/Arith/Store sequences into RMW ops. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Code review changes Created 5 years, 6 months ago
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Index: src/IceClFlags.cpp
diff --git a/src/IceClFlags.cpp b/src/IceClFlags.cpp
index 5cd4a6b7272c2d7077c4d520a78e0e12f7a7f23c..d74ae82c0c9f827d9cffbbb06d413db860bf9fed 100644
--- a/src/IceClFlags.cpp
+++ b/src/IceClFlags.cpp
@@ -211,6 +211,7 @@ cl::list<Ice::VerboseItem> VerboseList(
clEnumValN(Ice::IceV_AddrOpt, "addropt", "Address mode optimization"),
clEnumValN(Ice::IceV_Random, "random", "Randomization details"),
clEnumValN(Ice::IceV_Folding, "fold", "Instruction folding details"),
+ clEnumValN(Ice::IceV_RMW, "rmw", "ReadModifyWrite optimization"),
clEnumValN(Ice::IceV_All, "all", "Use all verbose options"),
clEnumValN(Ice::IceV_Most, "most",
"Use all verbose options except 'regalloc'"),
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