Index: lib/Target/X86/MCTargetDesc/X86MCNaCl.cpp |
diff --git a/lib/Target/X86/MCTargetDesc/X86MCNaCl.cpp b/lib/Target/X86/MCTargetDesc/X86MCNaCl.cpp |
index 724d75bbd78e0471411a12636007c1314993d766..0bacda8d7c59104a25c46ea9c96c788771913002 100644 |
--- a/lib/Target/X86/MCTargetDesc/X86MCNaCl.cpp |
+++ b/lib/Target/X86/MCTargetDesc/X86MCNaCl.cpp |
@@ -481,11 +481,14 @@ bool CustomExpandInstNaClX86(const llvm::MCSubtargetInfo &STI, |
const MCInst &Inst, MCStreamer &Out, |
X86MCNaClSFIState &State) { |
// If we are emitting to .s, only sandbox pseudos not supported by gas. |
+ |
if (Out.hasRawTextSupport()) { |
if (!(Inst.getOpcode() == X86::NACL_ANDSPi8 || |
- Inst.getOpcode() == X86::NACL_ANDSPi32)) |
+ Inst.getOpcode() == X86::NACL_ANDSPi32 || |
+ Inst.getOpcode() == X86::RETL)) |
return false; |
} |
+ |
// If we make a call to EmitInstruction, we will be called recursively. In |
// this case we just want the raw instruction to be emitted instead of |
// handling the insruction here. |
@@ -536,6 +539,7 @@ bool CustomExpandInstNaClX86(const llvm::MCSubtargetInfo &STI, |
assert(State.PrefixSaved == 0); |
EmitIndirectBranch(STI, Inst.getOperand(0), true, false, Out); |
return true; |
+ case X86::RETL: |
case X86::NACL_RET32: |
assert(State.PrefixSaved == 0); |
EmitRet(STI, NULL, false, Out); |