Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(14)

Unified Diff: src/IceInstMIPS32.h

Issue 1176133004: implement the null function for the Mips32 subzero compiler (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Fixing patch per review comments Created 5 years, 5 months ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View side-by-side diff with in-line comments
Download patch
Index: src/IceInstMIPS32.h
diff --git a/src/IceInstMIPS32.h b/src/IceInstMIPS32.h
index 17c25833b9a28eb033eb9df416769bef1ad70c9d..1d20340188c109eb0cc606b6a3740d479bacfb99 100644
--- a/src/IceInstMIPS32.h
+++ b/src/IceInstMIPS32.h
@@ -18,11 +18,65 @@
#define SUBZERO_SRC_ICEINSTMIPS32_H
#include "IceDefs.h"
+#include "IceInst.h"
+#include "IceInstMIPS32.def"
+#include "IceOperand.h"
namespace Ice {
class TargetMIPS32;
-// Fill this in.
+
+// Base class for Mips instructions.
+class InstMIPS32 : public InstTarget {
+ InstMIPS32() = delete;
+ InstMIPS32(const InstMIPS32 &) = delete;
+ InstMIPS32 &operator=(const InstMIPS32 &) = delete;
+
+public:
+ enum InstKindMIPS32 { k__Start = Inst::Target, Ret };
+
+ static const char *getWidthString(Type Ty);
+
+ void dump(const Cfg *Func) const override;
+
+protected:
+ InstMIPS32(Cfg *Func, InstKindMIPS32 Kind, SizeT Maxsrcs, Variable *Dest)
+ : InstTarget(Func, static_cast<InstKind>(Kind), Maxsrcs, Dest) {}
+ ~InstMIPS32() override {}
+ static bool isClassof(const Inst *Inst, InstKindMIPS32 MyKind) {
+ return Inst->getKind() == static_cast<InstKind>(MyKind);
+ }
+};
+
+// Ret pseudo-instruction. This is actually a "jr" instruction with
+// an "ra" register operand, but epilogue lowering will search for a Ret
+// instead of a generic "jr". This instruction also takes a Source
+// operand (for non-void returning functions) for liveness analysis, though
+// a FakeUse before the ret would do just as well.
+// This needs was take from the ARM port and needs to be scrubbed in the future
+// TODO(reed kotler)
+//
+class InstMIPS32Ret : public InstMIPS32 {
+
+ InstMIPS32Ret() = delete;
+ InstMIPS32Ret(const InstMIPS32Ret &) = delete;
+ InstMIPS32Ret &operator=(const InstMIPS32Ret &) = delete;
+
+public:
+ static InstMIPS32Ret *create(Cfg *Func, Variable *RA,
+ Variable *Source = nullptr) {
+ return new (Func->allocate<InstMIPS32Ret>())
+ InstMIPS32Ret(Func, RA, Source);
+ }
+ void emit(const Cfg *Func) const override;
+ void emitIAS(const Cfg *Func) const override;
+ void dump(const Cfg *Func) const override;
+ static bool classof(const Inst *Inst) { return isClassof(Inst, Ret); }
+
+private:
+ InstMIPS32Ret(Cfg *Func, Variable *RA, Variable *Source);
+ ~InstMIPS32Ret() override {}
+};
} // end of namespace Ice

Powered by Google App Engine
This is Rietveld 408576698