ARM64: Work around Clang's inline assembly limitations.

src/base/atomicops_internals_arm64_gcc.h

Index: src/base/atomicops_internals_arm64_gcc.h
diff --git a/src/base/atomicops_internals_arm64_gcc.h b/src/base/atomicops_internals_arm64_gcc.h
index b01783e6a7e275cfe09e53576cfecea892ab41ff..c7de95d80d174d2740fc2b57d1e975a2aaf519fe 100644
--- a/src/base/atomicops_internals_arm64_gcc.h
+++ b/src/base/atomicops_internals_arm64_gcc.h
@@ -39,7 +39,12 @@ inline Atomic32 NoBarrier_CompareAndSwap(volatile Atomic32* ptr,
     : [prev]"=&r" (prev),
       [temp]"=&r" (temp),
       [ptr]"+Q" (*ptr)
+#ifdef __clang__
+    // Workaround for Clang (https://llvm.org/bugs/show_bug.cgi?id=23575).
+    : [old_value]"Ir" (old_value),
+#else
     : [old_value]"IJr" (old_value),
+#endif
       [new_value]"r" (new_value)
     : "cc", "memory"
   );  // NOLINT
@@ -81,7 +86,12 @@ inline Atomic32 NoBarrier_AtomicIncrement(volatile Atomic32* ptr,
     : [result]"=&r" (result),
       [temp]"=&r" (temp),
       [ptr]"+Q" (*ptr)
+#ifdef __clang__
+    // Workaround for Clang (https://llvm.org/bugs/show_bug.cgi?id=23575).
+    : [increment]"Ir" (increment)
+#else
     : [increment]"IJr" (increment)
+#endif
     : "memory"
   );  // NOLINT
 
@@ -189,7 +199,12 @@ inline Atomic64 NoBarrier_CompareAndSwap(volatile Atomic64* ptr,
     : [prev]"=&r" (prev),
       [temp]"=&r" (temp),
       [ptr]"+Q" (*ptr)
+#ifdef __clang__
+    // Workaround for Clang (https://llvm.org/bugs/show_bug.cgi?id=23575).
+    : [old_value]"Ir" (old_value),
+#else
     : [old_value]"IJr" (old_value),
+#endif
       [new_value]"r" (new_value)
     : "cc", "memory"
   );  // NOLINT
@@ -231,7 +246,12 @@ inline Atomic64 NoBarrier_AtomicIncrement(volatile Atomic64* ptr,
     : [result]"=&r" (result),
       [temp]"=&r" (temp),
       [ptr]"+Q" (*ptr)
+#ifdef __clang__
+    // Workaround for Clang (https://llvm.org/bugs/show_bug.cgi?id=23575).
+    : [increment]"Ir" (increment)
+#else
     : [increment]"IJr" (increment)
+#endif
     : "memory"
   );  // NOLINT